Skip to content

Commit f64d381

Browse files
iotmemberiotmember
committed
Add support for the VBLUno51 board
The VBLUno51 board has BOARD_ID is 0xC006 Signed-off-by: iotvietmember <robotden@gmail.com>
1 parent 2f498fe commit f64d381

File tree

6 files changed

+192
-5
lines changed

6 files changed

+192
-5
lines changed

‎projects.yaml‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -278,3 +278,11 @@ projects:
278278
- *module_if
279279
- *module_hic_sam3u2c
280280
- records/board/ncs36510rf.yaml
281+
sam3u2c_ublox_evk_nina_b1_if:
282+
- *module_if
283+
- *module_hic_sam3u2c
284+
- records/board/ublox_evk_nina_b1.yaml
285+
lpc11u35_vbluno51_if:
286+
- *module_if
287+
- *module_hic_lpc11u35
288+
- records/board/vbluno51.yaml

‎records/board/vbluno51.yaml‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
common:
2+
macros:
3+
- IO_CONFIG_OVERRIDE
4+
includes:
5+
- source/board/override_vbluno51
6+
sources:
7+
board:
8+
- source/board/vbluno51.c
9+
target:
10+
- source/target/nordic/nrf51822/target_32.c
11+
- source/target/nordic/target_reset.c

‎source/board/override_vbluno51/IO_Config_Override.h‎

Lines changed: 113 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,113 @@
1+
/**
2+
* @file IO_Config_Override.c
3+
* @brief Alternative IO for LPC11U35 based Hardware Interface Circuit
4+
*
5+
* DAPLink Interface Firmware
6+
* Copyright (c) 2009-2017, ARM Limited, All Rights Reserved
7+
* SPDX-License-Identifier: Apache-2.0
8+
*
9+
* Licensed under the Apache License, Version 2.0 (the "License"); you may
10+
* not use this file except in compliance with the License.
11+
* You may obtain a copy of the License at
12+
*
13+
* http://www.apache.org/licenses/LICENSE-2.0
14+
*
15+
* Unless required by applicable law or agreed to in writing, software
16+
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
17+
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
18+
* See the License for the specific language governing permissions and
19+
* limitations under the License.
20+
*/
21+
22+
/**
23+
* The VBLUno51 board use PIO0_9(18) pin for TGT_SWCLK function.
24+
* Because it uses RTS/CTS pins for UART Hardware flow control feature.
25+
*/
26+
27+
#ifndef __IO_CONFIG_H__
28+
#define __IO_CONFIG_H__
29+
30+
#include "LPC11Uxx.h"
31+
#include "daplink.h"
32+
33+
// This GPIO configuration is only valid for the LPC11U35 HIC
34+
COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_LPC11U35);
35+
36+
// Peripheral register bit masks (used for pin inits)
37+
#define FUNC_0 0
38+
#define FUNC_1 1
39+
#define PULL_DOWN_ENABLED (1 << 3)
40+
#define PULL_UP_ENABLED (2 << 3)
41+
#define OPENDRAIN (1 << 10)
42+
43+
// DAP LED PIO0_21
44+
#define PIN_DAP_LED_PORT 0
45+
#define PIN_DAP_LED_BIT 21
46+
#define PIN_DAP_LED (1 << PIN_DAP_LED_BIT)
47+
#define PIN_DAP_LED_IOCON LPC_IOCON->PIO0_21
48+
#define PIN_DAP_LED_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED)
49+
50+
// MSD LED PIO0_20
51+
#define PIN_MSD_LED_PORT 0
52+
#define PIN_MSD_LED_BIT 20
53+
#define PIN_MSD_LED (1 << PIN_MSD_LED_BIT)
54+
#define PIN_MSD_LED_IOCON LPC_IOCON->PIO0_20
55+
#define PIN_MSD_LED_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED)
56+
57+
// CDC LED PIO0_11
58+
#define PIN_CDC_LED_PORT 0
59+
#define PIN_CDC_LED_BIT 11
60+
#define PIN_CDC_LED (1 << PIN_CDC_LED_BIT)
61+
#define PIN_CDC_LED_IOCON LPC_IOCON->TDI_PIO0_11
62+
#define PIN_CDC_LED_IOCON_INIT (FUNC_1 | PULL_UP_ENABLED)
63+
64+
// Non-Forwarded Reset in PIN PIO1_19
65+
#define PIN_RESET_IN_PORT 1
66+
#define PIN_RESET_IN_BIT 19
67+
#define PIN_RESET_IN (1 << PIN_RESET_IN_BIT)
68+
#define PIN_RESET_IN_IOCON LPC_IOCON->PIO1_19
69+
#define PIN_RESET_IN_IOCON_INIT (FUNC_0 | OPENDRAIN | PULL_UP_ENABLED)
70+
71+
// Forwarded Reset in PIN PIO0_1
72+
#define PIN_RESET_IN_FWRD_PORT 0
73+
#define PIN_RESET_IN_FWRD_BIT 1
74+
#define PIN_RESET_IN_FWRD (1 << PIN_RESET_IN_FWRD_BIT)
75+
#define PIN_RESET_IN_FWRD_IOCON LPC_IOCON->PIO0_1
76+
#define PIN_RESET_IN_FWRD_IOCON_INIT (FUNC_0 | OPENDRAIN | PULL_UP_ENABLED)
77+
78+
// nRESET OUT Pin PIO0_2
79+
#define PIN_nRESET_PORT 0
80+
#define PIN_nRESET_BIT 2
81+
#define PIN_nRESET (1 << PIN_nRESET_BIT)
82+
#define PIN_nRESET_IOCON LPC_IOCON->PIO0_2
83+
#define PIN_nRESET_IOCON_INIT (FUNC_0 | OPENDRAIN | PULL_UP_ENABLED)
84+
85+
// SWCLK/TCK Pin PIO0_9
86+
#define PIN_SWCLK_PORT 0
87+
#define PIN_SWCLK_BIT 9
88+
#define PIN_SWCLK (1 << PIN_SWCLK_BIT)
89+
#define PIN_SWCLK_TCK_IOCON LPC_IOCON->PIO0_9
90+
#define PIN_SWCLK_TCK_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED)
91+
92+
// SWDIO/TMS In/Out Pin PIO0_8
93+
#define PIN_SWDIO_PORT 0
94+
#define PIN_SWDIO_BIT 8
95+
#define PIN_SWDIO (1 << PIN_SWDIO_BIT)
96+
#define PIN_SWDIO_TMS_IOCON LPC_IOCON->PIO0_8
97+
#define PIN_SWDIO_TMS_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED)
98+
99+
// TDI Pin PIO0_17
100+
#define PIN_TDI_PORT 17
101+
#define PIN_TDI_BIT 17
102+
#define PIN_TDI (1 << PIN_TDI_BIT)
103+
#define PIN_TDI_IOCON LPC_IOCON->PIO0_17
104+
#define PIN_TDI_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED)
105+
106+
// SWO/TDO Pin PIO0_9
107+
#define PIN_TDO_PORT 9
108+
#define PIN_TDO_BIT 9
109+
#define PIN_TDO (1 << PIN_TDO_BIT)
110+
#define PIN_TDO_IOCON LPC_IOCON->PIO0_9
111+
#define PIN_TDO_IOCON_INIT (FUNC_0 | PULL_UP_ENABLED)
112+
113+
#endif

‎source/board/vbluno51.c‎

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,42 @@
1+
/**
2+
* @file vbluno51.c
3+
* @brief Board ID for the VBLUno51 board (VNG Bluetooth Low Energy UNO nRF51822 board)
4+
*
5+
* DAPLink Interface Firmware
6+
* Copyright (c) 2009-2017, ARM Limited, All Rights Reserved
7+
* SPDX-License-Identifier: Apache-2.0
8+
*
9+
* Licensed under the Apache License, Version 2.0 (the "License"); you may
10+
* not use this file except in compliance with the License.
11+
* You may obtain a copy of the License at
12+
*
13+
* http://www.apache.org/licenses/LICENSE-2.0
14+
*
15+
* Unless required by applicable law or agreed to in writing, software
16+
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
17+
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
18+
* See the License for the specific language governing permissions and
19+
* limitations under the License.
20+
*/
21+
22+
#include "virtual_fs.h"
23+
#include "uart.h"
24+
25+
const char *board_id = "C006";
26+
27+
// Override default behavior
28+
//
29+
// URL_NAME and DRIVE_NAME must be 11 characters excluding
30+
// the null terminated character
31+
// Note - 4 byte alignemnt required as workaround for ARMCC compiler bug with weak references
32+
__attribute__((aligned(4)))
33+
const vfs_filename_t daplink_url_name = "VBLUNO51HTM";
34+
__attribute__((aligned(4)))
35+
const vfs_filename_t daplink_drive_name = "DAPLINK ";
36+
__attribute__((aligned(4)))
37+
const char *const daplink_target_url = "https://vngiotlab.github.io/vbluno/";
38+
39+
void prerun_board_config()
40+
{
41+
uart_enable_flow_control(true);
42+
}

‎source/hic_hal/nxp/lpc11u35/uart.c‎

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,8 @@ uint8_t write_buffer_data[BUFFER_SIZE];
4040
circ_buf_t read_buffer;
4141
uint8_t read_buffer_data[BUFFER_SIZE];
4242

43+
static uint8_t flow_control_enabled = 0;
44+
4345
static int32_t reset(void);
4446

4547
int32_t uart_initialize(void)
@@ -146,8 +148,8 @@ int32_t uart_set_configuration(UART_Configuration *config)
146148
parity = 0x00;
147149
break;
148150
}
149-
150-
if (config->FlowControl == UART_FLOW_CONTROL_RTS_CTS) {
151+
152+
if (flow_control_enabled)
151153
LPC_IOCON->PIO0_17 |= 0x01; // RTS
152154
LPC_IOCON->PIO0_7 |= 0x01; // CTS
153155
// enable auto RTS and CTS
@@ -249,7 +251,12 @@ int32_t uart_get_configuration(UART_Configuration *config)
249251
}
250252

251253
// get flow control
252-
config->FlowControl = UART_FLOW_CONTROL_NONE;
254+
if (flow_control_enabled) {
255+
config->FlowControl = UART_FLOW_CONTROL_RTS_CTS;
256+
}
257+
else {
258+
config->FlowControl = UART_FLOW_CONTROL_NONE;
259+
}
253260
return 1;
254261
}
255262

@@ -283,7 +290,7 @@ int32_t uart_read_data(uint8_t *data, uint16_t size)
283290

284291
void uart_enable_flow_control(bool enabled)
285292
{
286-
// Flow control not implemented for this platform
293+
flow_control_enabled = (uint8_t)enabled;
287294
}
288295

289296
void UART_IRQHandler(void)

‎test/info.py‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,8 @@
7171
('lpc11u35_wizwiki_w7500_if', False, 0x0000, "bin" ),
7272
('lpc11u35_wizwiki_w7500_eco_if', False, 0x0000, "bin" ),
7373
('lpc11u35_wizwiki_w7500p_if', False, 0x0000, "bin" ),
74+
("sam3u2c_ublox_evk_nina_b1_if", True, 0x5000, "bin" ),
75+
("lpc11u35_vbluno51_if", False, 0x0000, "bin" ),
7476
}
7577

7678
# All supported configurations
@@ -134,6 +136,8 @@
134136
( 0x2201, 'lpc11u35_wizwiki_w7500_if', None, 'WIZWIKI_W7500' ),
135137
( 0x2202, 'lpc11u35_wizwiki_w7500_eco_if', None, 'WIZWIKI_W7500ECO' ),
136138
( 0x2203, 'lpc11u35_wizwiki_w7500p_if', None, 'WIZWIKI_W7500P' ),
139+
( 0x1237, 'sam3u2c_ublox_evk_nina_b1_if', 'sam3u2c_bl', 'U-BLOX-EVK-NINA-B1' ),
140+
( 0xC006, 'lpc11u35_vbluno51_if', None, 'VNG-VBLUno51' ),
137141
]
138142

139143
# Add new HICs here
@@ -179,7 +183,9 @@
179183
'Seeed-Tiny-BLE',
180184
'Seeed-Arch-Link',
181185
'SSCI-MBIT',
182-
'BlueNinja',]
186+
'BlueNinja',
187+
'U-BLOX-EVK-NINA-B1',
188+
'VNG-VBLUno51']
183189

184190
BOARD_ID_TO_BUILD_TARGET = {config[0]: config[3] for config in
185191
SUPPORTED_CONFIGURATIONS}

0 commit comments

Comments
 (0)