2424
2525static const SWM_Map SWM_SPI_SSEL [] = {
2626 {4 , 16 },
27- {5 , 16 },
27+ {6 , 8 },
2828};
2929
3030static const SWM_Map SWM_SPI_SCLK [] = {
3131 {3 , 24 },
32- {4 , 24 },
32+ {5 , 16 },
3333};
3434
3535static const SWM_Map SWM_SPI_MOSI [] = {
3636 {4 , 0 },
37- {5 , 0 },
37+ {5 , 24 },
3838};
3939
4040static const SWM_Map SWM_SPI_MISO [] = {
4141 {4 , 8 },
42- {5 , 16 },
42+ {6 , 0 },
4343};
4444
4545// bit flags for used SPIs
@@ -55,8 +55,8 @@ static int get_available_spi(void)
5555 return -1 ;
5656}
5757
58- static inline int ssp_disable (spi_t * obj );
59- static inline int ssp_enable (spi_t * obj );
58+ static inline void spi_disable (spi_t * obj );
59+ static inline void spi_enable (spi_t * obj );
6060
6161void spi_init (spi_t * obj , PinName mosi , PinName miso , PinName sclk , PinName ssel )
6262{
@@ -104,7 +104,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
104104 LPC_SYSCON -> PRESETCTRL |= (1 << obj -> spi_n );
105105
106106 // set default format and frequency
107- if (ssel == NC ) {
107+ if (ssel == ( PinName ) NC ) {
108108 spi_format (obj , 8 , 0 , 0 ); // 8 bits, mode 0, master
109109 } else {
110110 spi_format (obj , 8 , 0 , 1 ); // 8 bits, mode 0, slave
@@ -113,7 +113,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
113113 obj -> spi -> DLY = 2 ; // 2 SPI clock times pre-delay
114114
115115 // enable the ssp channel
116- ssp_enable (obj );
116+ spi_enable (obj );
117117}
118118
119119void spi_free (spi_t * obj )
@@ -123,92 +123,87 @@ void spi_free(spi_t *obj)
123123void spi_format (spi_t * obj , int bits , int mode , int slave )
124124{
125125 MBED_ASSERT (((bits >= 1 ) && (bits <= 16 )) && ((mode >= 0 ) && (mode <= 3 )));
126- ssp_disable (obj );
126+ spi_disable (obj );
127127
128128 obj -> spi -> CFG &= ~((0x3 << 4 ) | (1 << 2 ));
129129 obj -> spi -> CFG |= ((mode & 0x3 ) << 4 ) | ((slave ? 0 : 1 ) << 2 );
130130
131- obj -> spi -> TXDATCTL &= ~( 0xF << 24 );
132- obj -> spi -> TXDATCTL |= ((( bits & 0xF ) - 1 ) << 24 );
131+ obj -> spi -> TXCTL &= ~( 0xF << 24 );
132+ obj -> spi -> TXCTL |= ((bits - 1 ) << 24 );
133133
134- ssp_enable (obj );
134+ spi_enable (obj );
135135}
136136
137137void spi_frequency (spi_t * obj , int hz )
138138{
139- ssp_disable (obj );
139+ spi_disable (obj );
140140
141141 // rise DIV value if it cannot be divided
142142 obj -> spi -> DIV = (SystemCoreClock + (hz - 1 ))/hz - 1 ;
143143
144- ssp_enable (obj );
144+ spi_enable (obj );
145145}
146146
147- static inline int ssp_disable (spi_t * obj )
147+ static inline void spi_disable (spi_t * obj )
148148{
149- return obj -> spi -> CFG &= ~(1 << 0 );
149+ obj -> spi -> CFG &= ~(1 << 0 );
150150}
151151
152- static inline int ssp_enable (spi_t * obj )
152+ static inline void spi_enable (spi_t * obj )
153153{
154- return obj -> spi -> CFG |= (1 << 0 );
154+ obj -> spi -> CFG |= (1 << 0 );
155155}
156156
157- static inline int ssp_readable (spi_t * obj )
157+ static inline int spi_readable (spi_t * obj )
158158{
159159 return obj -> spi -> STAT & (1 << 0 );
160160}
161161
162- static inline int ssp_writeable (spi_t * obj )
162+ static inline int spi_writeable (spi_t * obj )
163163{
164164 return obj -> spi -> STAT & (1 << 1 );
165165}
166166
167- static inline void ssp_write (spi_t * obj , int value )
167+ static inline void spi_write (spi_t * obj , int value )
168168{
169- while (!ssp_writeable (obj ));
169+ while (!spi_writeable (obj ));
170170 // end of transfer
171- obj -> spi -> TXDATCTL |= (1 << 20 );
172- obj -> spi -> TXDAT = value ;
171+ obj -> spi -> TXCTL |= (1 << 20 );
172+ obj -> spi -> TXDAT = ( value & 0xffff ) ;
173173}
174174
175- static inline int ssp_read (spi_t * obj )
175+ static inline int spi_read (spi_t * obj )
176176{
177- while (!ssp_readable (obj ));
178- return obj -> spi -> RXDAT ;
177+ while (!spi_readable (obj ));
178+ return ( obj -> spi -> RXDAT & 0xFFFF ) ;
179179}
180180
181- static inline int ssp_busy (spi_t * obj )
181+ int spi_master_write (spi_t * obj , int value )
182182{
183- // checking RXOV(Receiver Overrun interrupt flag)
184- return obj -> spi -> STAT & ( 1 << 2 );
183+ spi_write ( obj , value );
184+ return spi_read ( obj );
185185}
186186
187- int spi_master_write (spi_t * obj , int value )
187+ static inline int spi_busy (spi_t * obj )
188188{
189- ssp_write ( obj , value );
190- return ssp_read ( obj );
189+ // checking RXOV(Receiver Overrun interrupt flag)
190+ return obj -> spi -> STAT & ( 1 << 2 );
191191}
192192
193193int spi_slave_receive (spi_t * obj )
194194{
195- return (ssp_readable (obj ) && !ssp_busy (obj )) ? (1 ) : (0 );
195+ return (spi_readable (obj ) && !spi_busy (obj )) ? (1 ) : (0 );
196196}
197197
198198int spi_slave_read (spi_t * obj )
199199{
200- return obj -> spi -> RXDAT ;
200+ return ( obj -> spi -> RXDAT & 0xFFFF ) ;
201201}
202202
203203void spi_slave_write (spi_t * obj , int value )
204204{
205- while (ssp_writeable (obj ) == 0 );
205+ while (spi_writeable (obj ) == 0 );
206206 obj -> spi -> TXDAT = value ;
207207}
208208
209- int spi_busy (spi_t * obj )
210- {
211- return ssp_busy (obj );
212- }
213-
214209#endif
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