From cbcdfab7416adc0b13599ce5731a6421928af4e0 Mon Sep 17 00:00:00 2001 From: Arnaud RICHARD Date: Thu, 10 Mar 2016 14:40:41 +0100 Subject: [PATCH] Fix IRQ enabled in serial_irq_set() UART_IT_TC was enabled instead of UART_IT_TXE This was causing an issue because UART_IT_TXE (and not UART_IT_TC) was disabled by same function. Consequently if a transfer was ongoing when serial_irq_set() was called to disable IRQ, UART_IT_TC would still trigger (once). Side effect is maybe speed: I guess using UART_IT_TC prevented implementation of continuous transfer. This commit is focused on solving an issue observed with TARGET_STM32F4. It doesn't presume it should or shouldn't be done for other targets. --- .../mbed/targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c index 16042882786..768c30e8a2c 100644 --- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c +++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/serial_api.c @@ -748,7 +748,7 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) NVIC_EnableIRQ(irq_n); #endif } else { // TxIrq - __HAL_UART_ENABLE_IT(handle, UART_IT_TC); + __HAL_UART_ENABLE_IT(handle, UART_IT_TXE); NVIC_SetVector(irq_n, vector); NVIC_EnableIRQ(irq_n); #if DEVICE_SERIAL_ASYNCH_DMA