diff --git a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/system_nrf51822.c b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/system_nrf51822.c index 3a704439a5a..74271f3a515 100644 --- a/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/system_nrf51822.c +++ b/libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/system_nrf51822.c @@ -1,6 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2013 Nordic Semiconductor. + * Copyright (c) 2015 Nordic Semiconductor. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,8 +21,12 @@ #include "nrf51822.h" #include "system_nrf51822.h" +#ifdef TARGET_DELTA_DFCM_NNN40 -#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */ + #define __SYSTEM_CLOCK (32000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 32MHz */ +#else + #define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */ +#endif static bool is_manual_peripheral_setup_needed(void); static bool is_disabled_in_debug_needed(void); @@ -67,7 +71,7 @@ void SystemInit(void) // Start the external 32khz crystal oscillator. -#ifdef TARGET_HRM1017 +#ifdef TARGET_DELTA_DFCM_NNN40 || TARGET_HRM1017 NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos); #else NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos); diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/PinNames.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/PinNames.h new file mode 100644 index 00000000000..c6c288ec62f --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/PinNames.h @@ -0,0 +1,125 @@ +/* mbed Microcontroller Library + * Copyright (c) 2015 Nordic Semiconductor + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_PINNAMES_H +#define MBED_PINNAMES_H + +#include "cmsis.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + PIN_INPUT, + PIN_OUTPUT +} PinDirection; + +#define PORT_SHIFT 3 + +typedef enum { + NC = (int)0xFFFFFFFF, + p0 = 0, + p1 = 1, + p2 = 2, + p3 = 3, + p4 = 4, + p5 = 5, + p6 = 6, + p7 = 7, + p8 = NC, + p9 = NC, + p10 = NC, + p11 = NC, + p12 = NC, + p13 = 13, + p14 = NC, + p15 = NC, + p16 = 16, + p17 = 17, + p18 = NC, + p19 = 19, + p20 = 20, + p21 = 21, + p22 = 22, + p23 = 23, + p24 = 24, + p25 = 25, + p26 = 26, + p27 = 27, + p28 = NC, + p29 = 29, + p30 = 30, + p31 = 31, + + LED1 = p7, + LED2 = p13, + + BUTTON0 = p16, + BUTTON1 = p17, + + RX_PIN_NUMBER = p23, + TX_PIN_NUMBER = p25, + + // mBed interface Pins + USBTX = TX_PIN_NUMBER, + USBRX = RX_PIN_NUMBER, + + SPI_PSELMOSI0 = p24, + SPI_PSELMISO0 = p29, + SPI_PSELSS0 = p6, + SPI_PSELSCK0 = p21, + + SPIS_PSELMOSI = p24, + SPIS_PSELMISO = p29, + SPIS_PSELSS = p6, + SPIS_PSELSCK = p21, + + I2C_SDA0 = p22, + I2C_SCL0 = p20, + + A0 = p0, + A1 = p1, + A2 = p2, + A3 = p3, + A4 = p4, + A5 = p5, + + SWIO = p19, + VERF0 = p0, + // Not connected + + CTS_PIN_NUMBER = NC, + RTS_PIN_NUMBER = NC, + SPI_PSELMOSI1 = NC, + SPI_PSELMISO1 = NC, + SPI_PSELSS1 = NC, + SPI_PSELSCK1 = NC, + LED3 = NC, + LED4 = NC +} PinName; + +typedef enum { + PullNone = 0, + PullDown = 1, + PullUp = 3, + PullDefault = PullUp +} PinMode; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/device.h b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/device.h new file mode 100644 index 00000000000..21442bcf3ac --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/device.h @@ -0,0 +1,57 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2015 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_DEVICE_H +#define MBED_DEVICE_H + +#define DEVICE_PORTIN 1 +#define DEVICE_PORTOUT 1 +#define DEVICE_PORTINOUT 1 + +#define DEVICE_INTERRUPTIN 1 + +#define DEVICE_ANALOGIN 1 +#define DEVICE_ANALOGOUT 0 + +#define DEVICE_SERIAL 1 + +#define DEVICE_I2C 1 +#define DEVICE_I2CSLAVE 0 + +#define DEVICE_SPI 1 +#define DEVICE_SPISLAVE 1 + +#define DEVICE_CAN 0 + +#define DEVICE_RTC 0 + +#define DEVICE_ETHERNET 0 + +#define DEVICE_PWMOUT 1 + +#define DEVICE_SEMIHOST 0 +#define DEVICE_LOCALFILESYSTEM 0 + +#define DEVICE_SLEEP 1 + +#define DEVICE_DEBUG_AWARENESS 1 + +#define DEVICE_STDIO_MESSAGES 0 + +#define DEVICE_ERROR_PATTERN 1 + +#include "objects.h" + +#endif diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/mbed_overrides.c b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/mbed_overrides.c new file mode 100644 index 00000000000..993cec19250 --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_DELTA_DFCM_NNN40/mbed_overrides.c @@ -0,0 +1,20 @@ +/* mbed Microcontroller Library + * Copyright (c) 2015, Cyntec + */ +#include "cmsis.h" + +// This function is called after RAM initialization and before main. +void mbed_sdk_init() +{ + // Default SWIO setting, pull SWIO(p19) to low for turning antenna switch to BLE radiated path. +#ifdef TARGET_DELTA_DFCM_NNN40 + NRF_GPIO->PIN_CNF[19] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) + | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) + | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) + | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) + | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); + + NRF_GPIO->OUTCLR = (GPIO_OUTCLR_PIN19_Clear << GPIO_OUTCLR_PIN19_Pos); + +#endif +} diff --git a/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/i2c_api.c b/libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/i2c_api.c old mode 100755 new mode 100644 diff --git a/libraries/tests/mbed/analog/main.cpp b/libraries/tests/mbed/analog/main.cpp index 8dcc1772ab9..a4e368af3ce 100644 --- a/libraries/tests/mbed/analog/main.cpp +++ b/libraries/tests/mbed/analog/main.cpp @@ -62,4 +62,4 @@ int main() { } notify_completion(check); -} +} \ No newline at end of file diff --git a/libraries/tests/mbed/i2c_eeprom/main.cpp b/libraries/tests/mbed/i2c_eeprom/main.cpp index 97a962d2171..bc3091aa5e8 100644 --- a/libraries/tests/mbed/i2c_eeprom/main.cpp +++ b/libraries/tests/mbed/i2c_eeprom/main.cpp @@ -45,6 +45,9 @@ I2C i2c(P0_23, P0_22); #elif defined(TARGET_LPC11U68) I2C i2c(SDA, SCL); +#elif defined(TARGET_DELTA_DFCM_NNN40) +I2C i2c(I2C_SDA0, I2C_SCL0); + #elif defined(TARGET_NUCLEO_F030R8) || \ defined(TARGET_NUCLEO_F070RB) || \ defined(TARGET_NUCLEO_F072RB) || \ diff --git a/libraries/tests/mbed/i2c_eeprom_line/main.cpp b/libraries/tests/mbed/i2c_eeprom_line/main.cpp index 1b701d469d4..754242326a7 100644 --- a/libraries/tests/mbed/i2c_eeprom_line/main.cpp +++ b/libraries/tests/mbed/i2c_eeprom_line/main.cpp @@ -55,6 +55,9 @@ I2C i2c(P0_23, P0_22); #elif defined(TARGET_LPC11U68) I2C i2c(SDA, SCL); +#elif defined(TARGET_DELTA_DFCM_NNN40) +I2C i2c(I2C_SDA0, I2C_SCL0); + #elif defined(TARGET_NUCLEO_F030R8) || \ defined(TARGET_NUCLEO_F070RB) || \ defined(TARGET_NUCLEO_F072RB) || \ diff --git a/workspace_tools/export/gcc_arm_delta_dfcm_nnn40.tmpl b/workspace_tools/export/gcc_arm_delta_dfcm_nnn40.tmpl new file mode 100644 index 00000000000..48be8817914 --- /dev/null +++ b/workspace_tools/export/gcc_arm_delta_dfcm_nnn40.tmpl @@ -0,0 +1,76 @@ +# This file was automagically generated by mbed.org. For more information, +# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded + +GCC_BIN = +PROJECT = {{name}} +OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %} +SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %} +INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %} +LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %} +LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %} +LINKER_SCRIPT = {{linker_script}} +SOFTDEVICE = mbed/TARGET_NRF51822/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_0_0/s110_nrf51822_7.0.0_softdevice.hex + +############################################################################### +AS = $(GCC_BIN)arm-none-eabi-as +CC = $(GCC_BIN)arm-none-eabi-gcc +CPP = $(GCC_BIN)arm-none-eabi-g++ +LD = $(GCC_BIN)arm-none-eabi-gcc +OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy +OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump +SIZE = $(GCC_BIN)arm-none-eabi-size +SREC_CAT = srec_cat + +CPU = -mcpu=cortex-m0 -mthumb +CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer +CC_FLAGS += -MMD -MP +CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %} + +LD_FLAGS = $(CPU) -Wl,--gc-sections -Wl,--wrap=main --specs=nano.specs -u _printf_float -u _scanf_float +LD_FLAGS += -Wl,-Map=$(PROJECT).map,--cref +LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys + +ifeq ($(DEBUG), 1) + CC_FLAGS += -DDEBUG -O0 +else + CC_FLAGS += -DNDEBUG -Os +endif + +all: $(PROJECT).bin $(PROJECT).hex + +clean: + rm -f $(PROJECT).bin $(PROJECT).elf $(PROJECT).hex $(PROJECT).map $(PROJECT).lst $(OBJECTS) $(DEPS) + +.s.o: + $(AS) $(CPU) -o $@ $< + +.c.o: + $(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $< + +.cpp.o: + $(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 -fno-rtti $(INCLUDE_PATHS) -o $@ $< + + +$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) + $(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS) + $(SIZE) $@ + +$(PROJECT).bin: $(PROJECT).elf + @$(OBJCOPY) -O binary $< $@ + +$(PROJECT).hex: $(PROJECT).elf + @$(OBJCOPY) -O ihex $< $@ + +$(PROJECT).lst: $(PROJECT).elf + @$(OBJDUMP) -Sdh $< > $@ + +lst: $(PROJECT).lst + +size: + $(SIZE) $(PROJECT).elf + +DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d) +-include $(DEPS) + +merge: + $(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44 diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py index 82a37a3245c..a5f4b21bd56 100644 --- a/workspace_tools/export/gccarm.py +++ b/workspace_tools/export/gccarm.py @@ -74,6 +74,7 @@ class GccArm(Exporter): 'NRF51_DONGLE', 'BLE_SMURFS', 'DISCO_F401VC', + 'DELTA_DFCM_NNN40', ] DOT_IN_RELATIVE_PATH = True diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py index 29cfd37c08a..452853a87d3 100644 --- a/workspace_tools/export/uvision4.py +++ b/workspace_tools/export/uvision4.py @@ -68,6 +68,7 @@ class Uvision4(Exporter): 'NRF51_DONGLE', 'BLE_SMURFS', 'LPC11U37H_401', + 'DELTA_DFCM_NNN40', ] USING_MICROLIB = [ diff --git a/workspace_tools/export/uvision4_delta_dfcm_nnn40.uvopt.tmpl b/workspace_tools/export/uvision4_delta_dfcm_nnn40.uvopt.tmpl new file mode 100644 index 00000000000..2d8cbbceb08 --- /dev/null +++ b/workspace_tools/export/uvision4_delta_dfcm_nnn40.uvopt.tmpl @@ -0,0 +1,214 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + nRF51822AA + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 0 + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 1 + 1 + 0 + 0 + 12 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + JL2CM3 + -U480204337 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO31 -FD20000000 -FC2000 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51xxx$Flash\nrf51xxx.flm) + + + 0 + UL2CM3 + -S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf51xxx -FS00 -FL0200000 -FP0($$Device:nRF51$Flash\nrf51xxx.flm)) + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + ULP2CM3 + -O2510 -S0 -C0 -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P128_48MHZ -FS00 -FL020000) + + + 0 + CMSIS_AGDI + -X"MBED CMSIS-DAP" -U107002011FE6E019E2180F91 -O718 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -FO31 -FD20000000 -FC2000 -FN1 -FF0nrf51xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF51xxx$Flash\nrf51xxx.flm) + + + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + src + 1 + 0 + 0 + + 1 + 1 + 8 + 0 + 0 + 0 + 0 + 1 + 2 + 0 + main.cpp + main.cpp + + + + diff --git a/workspace_tools/export/uvision4_delta_dfcm_nnn40.uvproj.tmpl b/workspace_tools/export/uvision4_delta_dfcm_nnn40.uvproj.tmpl new file mode 100644 index 00000000000..713e1412bdc --- /dev/null +++ b/workspace_tools/export/uvision4_delta_dfcm_nnn40.uvproj.tmpl @@ -0,0 +1,431 @@ + + + + 1.1 + +
###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision
+ + + + nRF51822AA + 0x4 + ARM-ADS + + + nRF51xxx + Nordic Semiconductor + IROM(0x00000000,0x40000) IRAM(0x20000000,0x4000) CPUTYPE("Cortex-M0") CLOCK(16000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf51xxx -FS00 -FL0200000 -FP0($$Device:nRF51xxx$Flash\nrf51xxx.flm)) + 0 + $$Device:nRF51xxx$Device\Include\nrf.h + + + + + + + + + + $$Device:nRF51xxx$SVD\nrf51.xml + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\ + {{name}} + 1 + 0 + 1 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + + 0 + 1 + + + + + + + + + + + + + + BIN\UL2CM3.DLL + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + {% for flag in flags %}{{flag}} {% endfor %} + {% for s in symbols %} {{s}}, {% endfor %} + + {% for path in include_paths %} {{path}}; {% endfor %} + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x10000000 + + {{scatter_file}} + + + + {% for file in object_files %} + {{file}} + {% endfor %} + + + + + + + + {% for group,files in source_files %} + + {{group}} + + {% for file in files %} + + {{file.name}} + {{file.type}} + {{file.path}} + {%if file.type == "1" %} + + + + + --c99 + + + + + {% endif %} + + {% endfor %} + + + {% endfor %} + + + + + diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index a1d9c44163d..eefd1bf419e 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -1,6 +1,6 @@ """ mbed SDK -Copyright (c) 2011-2013 ARM Limited +Copyright (c) 2011-2015 ARM Limited Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -842,6 +842,20 @@ def __init__(self): NRF51822.__init__(self) self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] self.macros = ['TARGET_NRF51822'] + +class DELTA_DFCM_NNN40(NRF51822): + def __init__(self): + NRF51822.__init__(self) + self.core = "Cortex-M0" + self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K'] + self.macros = ['TARGET_NRF51822'] + +class DELTA_DFCM_NNN40_OTA(NRF51822): + def __init__(self): + NRF51822.__init__(self) + self.core = "Cortex-M0" + self.extra_labels = ['NORDIC', 'MCU_NRF51822', 'MCU_NORDIC_16K', 'DELTA_DFCM_NNN40'] + self.MERGE_SOFT_DEVICE = False ### ARM ### @@ -957,6 +971,8 @@ def program_cycle_s(self): RBLAB_BLENANO(),# nRF51822 NRF51822_Y5_MBUG(),#nRF51822 WALLBOT_BLE(), # nRF51822 + DELTA_DFCM_NNN40(), # nRF51822 + DELTA_DFCM_NNN40_OTA(), # nRF51822 ### ARM ### ARM_MPS2(),