From 1a60059db68bedc7da4a778bd78fe81a2abe4562 Mon Sep 17 00:00:00 2001 From: Cruz Monrreal II Date: Thu, 10 Jan 2019 23:49:20 -0600 Subject: [PATCH] Revert "Merge pull request #9092 from mprse/stack_unification_sec_try" This reverts commit 2454b25eba55b05b6adaf1258faf61e0818f51ae, reversing changes made to 12980f4acd49d31374954f59ab309db4cb5e03b6. --- .../mbed_hal/stack_size_unification/main.cpp | 76 ------------------- .../stack_size_unification.h | 51 ------------- .../TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c | 4 - .../TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c | 11 +-- .../TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c | 11 +-- rtos/TARGET_CORTEX/mbed_boot.h | 5 ++ .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +- .../device/TOOLCHAIN_IAR/MPS2.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 8 +- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +- .../device/TOOLCHAIN_IAR/MPS2.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 8 +- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +- .../device/TOOLCHAIN_IAR/MPS2.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 8 +- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +- .../device/TOOLCHAIN_IAR/MPS2.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 8 +- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +- .../device/TOOLCHAIN_IAR/MPS2.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/BEETLE.sct | 14 +--- .../device/TOOLCHAIN_GCC_ARM/BEETLE.ld | 9 +-- .../device/TOOLCHAIN_IAR/BEETLE.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +- .../device/TOOLCHAIN_IAR/MPS2.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 11 +-- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 11 +-- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 11 +-- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 11 +-- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 12 +-- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 12 +-- .../TOOLCHAIN_ARM_STD/ADuCM3029.sct | 12 +-- .../TOOLCHAIN_GCC_ARM/ADuCM3029.ld | 9 +-- .../TOOLCHAIN_IAR/ADuCM3029.icf | 6 +- .../TOOLCHAIN_ARM_STD/ADuCM4050.sct | 13 +--- .../TOOLCHAIN_GCC_ARM/ADuCM4050.ld | 5 +- .../TOOLCHAIN_IAR/ADuCM4050.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/samd21g18a.ld | 14 +--- .../device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/samd21j18a.ld | 14 +--- .../device/TOOLCHAIN_ARM_STD/SAML21J18A.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/saml21j18a.ld | 14 +--- .../device/TOOLCHAIN_ARM_STD/SAMR21G18A.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/samr21g18a.ld | 14 +--- .../device/TOOLCHAIN_GCC_ARM/samg55j19.ld | 14 +--- .../TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct | 10 --- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld | 8 +- .../device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf | 8 +- .../TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct | 10 --- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld | 8 +- .../TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/MK20D5.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/MK20D5.ld | 8 +- .../device/TOOLCHAIN_IAR/MK20D5.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/MK20DX256.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/MK20DX256.ld | 8 +- .../device/TOOLCHAIN_ARM_STD/MKL05Z4.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld | 8 +- .../device/TOOLCHAIN_IAR/MKL05Z4.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/MKL25Z4.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld | 8 +- .../device/TOOLCHAIN_GCC_CW_EWL/MKL25Z4.ld | 6 +- .../device/TOOLCHAIN_GCC_CW_NEWLIB/MKL25Z4.ld | 8 +- .../device/TOOLCHAIN_IAR/MKL25Z4.icf | 5 +- .../device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld | 8 +- .../device/TOOLCHAIN_IAR/MKL26Z4.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/MKL46Z4.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld | 8 +- .../device/TOOLCHAIN_IAR/MKL46Z4.icf | 6 +- .../TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct | 8 +- .../TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld | 6 +- .../device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf | 6 +- .../TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct | 8 +- .../TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld | 6 +- .../device/TOOLCHAIN_IAR/MK82FN256xxx15.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct | 8 +- .../device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld | 6 +- .../device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf | 7 +- .../TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct | 9 +-- .../device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld | 6 +- .../device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf | 7 +- .../TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct | 8 +- .../device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld | 6 +- .../device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf | 6 +- .../TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct | 8 +- .../device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld | 6 +- .../device/TOOLCHAIN_IAR/MKW24D512xxx5.icf | 7 +- .../TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct | 2 - .../TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct | 8 +- .../TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld | 9 +-- .../device/TOOLCHAIN_IAR/MK22F51212.icf | 6 +- .../TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct | 15 +--- .../TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld | 7 +- .../device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/gd32f307vg.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld | 8 +- .../device/TOOLCHAIN_IAR/gd32f307vg.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/MAX32600.sct | 13 +--- .../device/TOOLCHAIN_GCC_ARM/max32600.ld | 8 +- .../device/TOOLCHAIN_IAR/MAX32600.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/MAX32610.sct | 13 +--- .../device/TOOLCHAIN_GCC_ARM/max32610.ld | 8 +- .../device/TOOLCHAIN_IAR/MAX32610.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/MAX32620.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/max32620.ld | 8 +- .../device/TOOLCHAIN_IAR/MAX32620.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/MAX32620.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/max32620.ld | 8 +- .../device/TOOLCHAIN_IAR/MAX32620.icf | 6 +- .../TARGET_MAX32625NEXPAQ/MAX32625.sct | 11 +-- .../TARGET_MAX32625_BOOT/MAX32625.sct | 10 +-- .../TARGET_MAX32625_NO_BOOT/MAX32625.sct | 11 +-- .../TARGET_MAX32625NEXPAQ/max32625.ld | 8 +- .../TARGET_MAX32625_BOOT/max32625.ld | 8 +- .../TARGET_MAX32625_NO_BOOT/max32625.ld | 8 +- .../TARGET_MAX32625NEXPAQ/MAX32625.icf | 5 +- .../TARGET_MAX32625_BOOT/MAX32625.icf | 6 +- .../TARGET_MAX32625_NO_BOOT/MAX32625.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/MAX3263x.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/max3263x.ld | 8 +- .../device/TOOLCHAIN_IAR/MAX3263x.icf | 5 +- .../TARGET_MCU_NORDIC_32K/nRF51822.sct | 6 -- .../TARGET_MCU_NRF51_16K_S110/nRF51822.sct | 6 -- .../TARGET_MCU_NRF51_16K_S130/nRF51822.sct | 6 -- .../TARGET_MCU_NORDIC_32K/NRF51822.ld | 8 +- .../TARGET_MCU_NRF51_16K_S110/NRF51822.ld | 8 +- .../TARGET_MCU_NRF51_16K_S130/NRF51822.ld | 8 +- .../TOOLCHAIN_GCC_ARM/startup_NRF51822.S | 7 ++ .../TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf | 5 +- .../TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf | 6 +- .../TARGET_MCU_NORDIC_32K/nRF51822.sct | 6 -- .../TARGET_MCU_NRF51_16K_S110/nRF51822.sct | 6 -- .../TARGET_MCU_NRF51_16K_S130/nRF51822.sct | 6 -- .../TARGET_MCU_NORDIC_32K/NRF51822.ld | 8 +- .../TARGET_MCU_NRF51_16K_S110/NRF51822.ld | 8 +- .../TARGET_MCU_NRF51_16K_S130/NRF51822.ld | 8 +- .../TOOLCHAIN_GCC_ARM/startup_NRF51822.S | 7 ++ .../TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf | 5 +- .../TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/nRF52832.sct | 4 - .../device/TOOLCHAIN_GCC_ARM/NRF52832.ld | 12 +-- .../device/TOOLCHAIN_IAR/nRF52832.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/nRF52840.sct | 4 - .../device/TOOLCHAIN_GCC_ARM/NRF52840.ld | 12 +-- .../device/TOOLCHAIN_IAR/nRF52840.icf | 7 +- .../TARGET_LPC11U68/LPC11U68.sct | 11 +-- .../TARGET_LPC11U68/LPC11U68.icf | 7 +- .../TARGET_LPC11U24_301/LPC11U24.sct | 11 +-- .../TARGET_LPC11U24_401/LPC11U24.sct | 11 +-- .../TARGET_LPC11U34_421/LPC11U34.sct | 11 +-- .../TARGET_LPC11U35_401/LPC11U35.sct | 11 +-- .../TARGET_LPC11U35_501/LPC11U35.sct | 11 +-- .../TARGET_LPC11U37H_401/LPC11U37.sct | 11 +-- .../TARGET_LPC11U37_501/LPC11U37.sct | 11 +-- .../TARGET_OC_MBUINO/LPC11U24.sct | 11 +-- .../TARGET_LPC11U24_301/LPC11U24.ld | 8 +- .../TARGET_LPC11U24_401/LPC11U24.ld | 8 +- .../TARGET_LPC11U34_421/LPC11U34.ld | 9 +-- .../TARGET_LPC11U35_401/LPC11U35.ld | 9 +-- .../TARGET_LPC11U35_501/LPC11U35.ld | 9 +-- .../TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld | 9 +-- .../TARGET_LPC11U37H_401/LPC11U37.ld | 9 +-- .../TARGET_LPC11U37_501/LPC11U37.ld | 9 +-- .../TARGET_LPCCAPPUCCINO/LPC11U37.ld | 9 +-- .../TARGET_OC_MBUINO/LPC11U24.ld | 8 +- .../TARGET_LPC11U24_301/LPC11U24.icf | 6 +- .../TARGET_LPC11U24_401/LPC11U24.icf | 6 +- .../TARGET_LPC11U35_401/LPC11U35.icf | 6 +- .../TARGET_LPC11U35_501/LPC11U35.icf | 6 +- .../TARGET_LPC11U37_501/LPC11U37.icf | 6 +- .../TARGET_OC_MBUINO/LPC11U24.icf | 6 +- .../TARGET_LPC11CXX/LPC11C24.sct | 11 +-- .../TARGET_LPC11XX/LPC1114.sct | 11 +-- .../TARGET_LPC11CXX/LPC11C24.ld | 8 +- .../TARGET_LPC11XX/LPC1114.ld | 8 +- .../TARGET_LPC11CXX/LPC11C24.icf | 6 +- .../TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/LPC1347.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/LPC1347.ld | 8 +- .../device/TOOLCHAIN_IAR/LPC1347.icf | 6 +- .../device/TOOLCHAIN_GCC_ARM/LPC1549.ld | 8 +- .../device/TOOLCHAIN_IAR/LPC15xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/LPC1768.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/LPC1768.ld | 9 +-- .../TARGET_XBED_LPC1768/XBED_LPC1768.ld | 8 +- .../device/TOOLCHAIN_IAR/LPC17xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/LPC407X_8X.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/LPC4088.ld | 8 +- .../device/TOOLCHAIN_IAR/LPC4088.icf | 7 +- .../TARGET_LPC4330/LPC43xx.sct | 11 +-- .../TARGET_LPC4337/LPC4337.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/LPC4330.ld | 8 +- .../device/TOOLCHAIN_IAR/LPC43xx.icf | 7 +- .../device/TOOLCHAIN_GCC_ARM/LPC812.ld | 10 +-- .../device/TOOLCHAIN_IAR/LPC812.icf | 5 +- .../device/TOOLCHAIN_GCC_ARM/LPC810.ld | 10 +-- .../device/TOOLCHAIN_IAR/LPC810.icf | 5 +- .../device/TOOLCHAIN_GCC_ARM/LPC812.ld | 10 +-- .../device/TOOLCHAIN_IAR/LPC812.icf | 5 +- .../device/TOOLCHAIN_GCC_ARM/LPC824.ld | 10 +-- .../device/TOOLCHAIN_IAR/LPC824.icf | 5 +- .../device/TOOLCHAIN_GCC_ARM/LPC824.ld | 10 +-- .../TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct | 6 +- .../LPC54114J256_cm4_flash.ld | 6 +- .../TOOLCHAIN_IAR/LPC54114J256_cm4.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/LPC54628J512.sct | 6 +- .../device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld | 6 +- .../device/TOOLCHAIN_IAR/LPC54628J512.icf | 6 +- .../TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct | 7 +- .../TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld | 6 +- .../device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf | 6 +- .../device/TOOLCHAIN_ARM/NCS36510.sct | 9 --- .../device/TOOLCHAIN_GCC_ARM/NCS36510.ld | 10 +-- .../device/TOOLCHAIN_IAR/NCS36510.icf | 5 +- .../TARGET_UNO_91H/RDA5981C.sct | 12 +-- .../TARGET_UNO_91H/RDA5981C.ld | 8 +- .../TOOLCHAIN_IAR/TARGET_UNO_91H/RDA5981C.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/rtl8195a.sct | 9 +-- .../device/TOOLCHAIN_GCC_ARM/rtl8195a.ld | 8 +- .../device/TOOLCHAIN_IAR/rtl8195a.icf | 6 +- targets/TARGET_Realtek/mbed_rtx.h | 17 ++++- .../device/TOOLCHAIN_ARM_STD/stm32f0xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld | 9 +-- .../device/TOOLCHAIN_ARM_STD/stm32f0xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f030x8.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f0xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f031x6.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f0xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f042x6.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f070xb.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld | 10 +-- .../device/TOOLCHAIN_IAR/stm32f070xb.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f072rb.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld | 10 +-- .../device/TOOLCHAIN_IAR/stm32f072xb.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f091rc.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f091xc.icf | 5 +- .../device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld | 9 +-- .../device/TOOLCHAIN_ARM_STD/stm32f100xb.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F100.ld | 8 +- .../device/TOOLCHAIN_ARM_STD/stm32f103xb.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f103xb.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f207xx.sct | 11 +-- .../TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f207xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32f302x8.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f302x8.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f303x8.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f303x8.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f303xc.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f303xc.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f303xe.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f303xe.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f334x8.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f334x8.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f411re.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f411xe.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32f411re.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f411xe.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32f405xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F405.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f405xx.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f411re.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f411xe.icf | 6 +- .../device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld | 9 +-- .../device/TOOLCHAIN_ARM_STD/stm32f401xe.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f401xe.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/STM32F407xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f407xx.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f410xb.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f410xx.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f411re.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f411xe.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f412xg.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f412xx.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f413xh.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f413xx.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f429xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld | 10 +-- .../TOOLCHAIN_IAR/stm32f429xx_flash.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f437xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f437xx.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f439xx.sct | 13 +--- .../device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld | 8 +- .../TOOLCHAIN_IAR/stm32f439xx_flash.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f446xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f446xx.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f469xx.sct | 9 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f469xx.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f746xg.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f746xg.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32f756xg.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32f756xg.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f767xi.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f767xi.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32f769xi.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32f769xi.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32h743xI.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32h743xI.icf | 3 +- .../device/TOOLCHAIN_ARM_STD/stm32l031k6.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l031xx.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l073xz.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l073xx.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l053x8.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l053xx.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l072xz.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l072xx.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l082xZ.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l082xZ.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l152rc.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l152xc.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l151rc.sct | 9 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l152xc.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l151cba.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l152xba.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l152re.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l152xe.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32l151rc.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld | 8 +- .../device/TOOLCHAIN_ARM_STD/stm32l151rc.sct | 9 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld | 9 +-- .../device/TOOLCHAIN_IAR/stm32l152xc.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/stm32l471xx.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l471xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32l432xx.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l432xx.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32l433xx.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l433xx.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/stm32l443xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l443xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32l475xx.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l475xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32l476xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l476xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32l486xx.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l486xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32l496xx.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l496xx.icf | 7 +- .../device/TOOLCHAIN_ARM_STD/stm32l4r5xx.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld | 8 +- .../device/TOOLCHAIN_IAR/stm32l4r5xx.icf | 5 +- .../TOOLCHAIN_ARM_STD/efm32gg.sct | 11 +-- .../TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld | 18 ++--- .../TOOLCHAIN_IAR/efm32gg990f1024.icf | 4 +- .../device/TOOLCHAIN_ARM_STD/efm32gg11.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/efm32gg11.ld | 8 +- .../TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf | 4 +- .../TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld | 8 +- .../TOOLCHAIN_IAR/efm32hg322f64.icf | 4 +- .../TARGET_256K/TOOLCHAIN_ARM_STD/efm32lg.sct | 10 +-- .../TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld | 8 +- .../TOOLCHAIN_IAR/efm32lg990f256.icf | 4 +- .../TOOLCHAIN_ARM_STD/efm32pg1b.sct | 10 +-- .../TOOLCHAIN_GCC_ARM/efm32pg1b.ld | 8 +- .../TOOLCHAIN_IAR/efm32pg1b200f256.icf | 4 +- .../device/TOOLCHAIN_ARM_STD/efr32pg12b.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld | 8 +- .../TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf | 3 +- .../TARGET_256K/TOOLCHAIN_ARM_STD/efm32wg.sct | 10 +-- .../TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld | 8 +- .../TOOLCHAIN_IAR/efm32wg990f256.icf | 4 +- .../TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld | 8 +- .../TOOLCHAIN_IAR/efm32zg222f32.icf | 4 +- .../device/TOOLCHAIN_ARM_STD/efr32mg1p.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld | 8 +- .../TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf | 4 +- .../device/TOOLCHAIN_ARM_STD/efr32mg12p.sct | 10 +-- .../device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld | 8 +- .../TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf | 4 +- .../device/TOOLCHAIN_ARM_STD/tmpm066fwug.sct | 13 +--- .../device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld | 8 +- .../device/TOOLCHAIN_IAR/tmpm066fwug.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/tmpm3h6fwfg.sct | 13 +--- .../device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld | 8 +- .../device/TOOLCHAIN_IAR/tmpm3h6fwfg.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld | 8 +- .../device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf | 5 +- .../device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld | 8 +- .../device/TOOLCHAIN_IAR/tmpm46bf10fg.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct | 11 +-- .../device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld | 8 +- .../device/TOOLCHAIN_IAR/tmpm4g9f15.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct | 10 --- .../device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld | 6 +- .../device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/W7500.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/W7500.ld | 9 +-- .../device/TOOLCHAIN_IAR/W7500_Flash.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/W7500.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/W7500.ld | 9 +-- .../device/TOOLCHAIN_IAR/W7500_Flash.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/W7500.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/W7500.ld | 9 +-- .../device/TOOLCHAIN_IAR/W7500_Flash.icf | 6 +- .../device/TOOLCHAIN_ARM_STD/hi2110.sct | 12 +-- .../device/TOOLCHAIN_GCC_ARM/hi2110.ld | 9 +-- .../device/TOOLCHAIN_IAR/hi2110.icf | 6 +- 445 files changed, 596 insertions(+), 3177 deletions(-) delete mode 100644 TESTS/mbed_hal/stack_size_unification/main.cpp delete mode 100644 TESTS/mbed_hal/stack_size_unification/stack_size_unification.h diff --git a/TESTS/mbed_hal/stack_size_unification/main.cpp b/TESTS/mbed_hal/stack_size_unification/main.cpp deleted file mode 100644 index 66a6df49d3d..00000000000 --- a/TESTS/mbed_hal/stack_size_unification/main.cpp +++ /dev/null @@ -1,76 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2019-2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "mbed.h" -#include "greentea-client/test_env.h" -#include "unity.h" -#include "utest.h" - -#ifdef TARGET_RENESAS -#error [NOT_SUPPORTED] Cortex-A target not supported for this test -#endif - -using namespace utest::v1; - -extern osThreadAttr_t _main_thread_attr; -extern uint32_t mbed_stack_isr_size; - -/* Exception for Nordic boards - BLE requires 2KB ISR stack. */ -#if defined(TARGET_NRF5x) -#define EXPECTED_ISR_STACK_SIZE (2048) -#else -#define EXPECTED_ISR_STACK_SIZE (1024) -#endif - -#if defined(TARGET_NUCLEO_F070RB) || defined(TARGET_NANO100) || defined(TARGET_STM32F072RB) || defined(TARGET_TMPM46B) || defined(TARGET_TMPM066) -#define EXPECTED_MAIN_THREAD_STACK_SIZE (3072) -#else -#define EXPECTED_MAIN_THREAD_STACK_SIZE (4096) -#endif - -#define EXPECTED_USER_THREAD_DEFAULT_STACK_SIZE (4096) - -/* Test sizes of ISR stack, main thread stack, default user thread stack. - * - * On some platforms with lower RAM size (e.g. NUCLEO_F070RB - 16 KB RAM) it is impossible - * to create thread with default stack size to check its size, that is why we will - * check only macro which specifies default user thread stack. - * - */ -void stack_size_unification_test() -{ - TEST_ASSERT_EQUAL(EXPECTED_ISR_STACK_SIZE, mbed_stack_isr_size); - TEST_ASSERT_EQUAL(EXPECTED_MAIN_THREAD_STACK_SIZE, _main_thread_attr.stack_size); - TEST_ASSERT_EQUAL(EXPECTED_USER_THREAD_DEFAULT_STACK_SIZE, OS_STACK_SIZE); -} - -utest::v1::status_t test_setup(const size_t number_of_cases) -{ - GREENTEA_SETUP(10, "default_auto"); - return verbose_test_setup_handler(number_of_cases); -} - -Case cases[] = { - Case("Stack size unification test", stack_size_unification_test) -}; - -Specification specification(test_setup, cases); - -int main() -{ - return !Harness::run(specification); -} diff --git a/TESTS/mbed_hal/stack_size_unification/stack_size_unification.h b/TESTS/mbed_hal/stack_size_unification/stack_size_unification.h deleted file mode 100644 index 253d04e3418..00000000000 --- a/TESTS/mbed_hal/stack_size_unification/stack_size_unification.h +++ /dev/null @@ -1,51 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2019-2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** \addtogroup hal_rtc_tests - * @{ - */ - -#ifndef MBED_STACK_SIZE_UNIFICATION_H -#define MBED_STACK_SIZE_UNIFICATION_H - -#ifdef __cplusplus -extern "C" { -#endif - -/** Test sizes of ISR stack, main thread stack, default user thread stack. - * - * Given is Mbed OS configuration. - * When ISR stack, main thread stack, default user thread stack sizes are defined. - * Then ISR stack size is equal to 1 KB, - * main thread stack size is equal to 4 KB, - * default user thread stack size is equal to 4 KB. - * - * NOTE: - * It is impossible to verify RTOS-less thread stack size since all tests are build with RTOS. - */ -void stack_size_unification_test(void); - -/**@}*/ - -#ifdef __cplusplus -} -#endif - -#endif - -/** @}*/ diff --git a/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c b/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c index 06373232de3..58080a168da 100644 --- a/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c +++ b/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c @@ -25,10 +25,6 @@ extern uint32_t __initial_sp[]; extern uint32_t __heap_base[]; extern uint32_t __heap_limit[]; -#if !defined(ISR_STACK_SIZE) -#define ISR_STACK_SIZE ((uint32_t)1024) -#endif - /* * mbed entry point for the MICROLIB toolchain * diff --git a/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c b/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c index 78e05a88a8e..482870f501b 100644 --- a/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c +++ b/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c @@ -27,20 +27,11 @@ __value_in_regs struct __argc_argv __rt_lib_init(unsigned heapbase, unsigned heaptop); void _platform_post_stackheap_init(void); -#if !defined(ISR_STACK_SIZE) -#if (defined(__CC_ARM)) -extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; -extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; -#define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base) -#define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length) -#endif -#endif - #if !defined(HEAP_START) /* Defined by linker script */ extern uint32_t Image$$RW_IRAM1$$ZI$$Limit[]; #define HEAP_START ((unsigned char*)Image$$RW_IRAM1$$ZI$$Limit) -#define HEAP_SIZE ((uint32_t)((uint32_t)ISR_STACK_START - (uint32_t)HEAP_START)) +#define HEAP_SIZE ((uint32_t)((uint32_t)INITIAL_SP - (uint32_t)HEAP_START)) #endif /* diff --git a/rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c b/rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c index a99339133c0..1060f349f69 100644 --- a/rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c +++ b/rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c @@ -29,20 +29,11 @@ static osMutexId_t env_mutex_id; static mbed_rtos_storage_mutex_t env_mutex_obj; static osMutexAttr_t env_mutex_attr; -#if !defined(ISR_STACK_SIZE) -#if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION)) -extern uint32_t __StackLimit; -extern uint32_t __StackTop; -#define ISR_STACK_START ((unsigned char*)&__StackLimit) -#define ISR_STACK_SIZE ((uint32_t)((uint32_t)&__StackTop - (uint32_t)&__StackLimit)) -#endif -#endif - #if !defined(HEAP_START) /* Defined by linker script */ extern uint32_t __end__[]; #define HEAP_START ((unsigned char*)__end__) -#define HEAP_SIZE ((uint32_t)((uint32_t)ISR_STACK_START - (uint32_t)HEAP_START)) +#define HEAP_SIZE ((uint32_t)((uint32_t)INITIAL_SP - (uint32_t)HEAP_START)) #endif extern void __libc_init_array(void); diff --git a/rtos/TARGET_CORTEX/mbed_boot.h b/rtos/TARGET_CORTEX/mbed_boot.h index 65f7af6fcbe..aed0cdd7071 100644 --- a/rtos/TARGET_CORTEX/mbed_boot.h +++ b/rtos/TARGET_CORTEX/mbed_boot.h @@ -50,6 +50,11 @@ extern "C" { * @{ */ +/* Define stack sizes if they haven't been set already */ +#if !defined(ISR_STACK_SIZE) +#define ISR_STACK_SIZE ((uint32_t)1024) +#endif + /* Heap limits - only used if set */ extern unsigned char *mbed_heap_start; extern uint32_t mbed_heap_size; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld index e791e0baaf2..f50b4d56294 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -31,10 +31,6 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - MEMORY { VECTORS (rx) : ORIGIN = MAPPABLE_START, LENGTH = MAPPABLE_SIZE @@ -70,7 +66,7 @@ MEMORY */ ENTRY(Reset_Handler) -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = 0x400; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf index c76fd9af14d..936ce2e8725 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf @@ -48,11 +48,8 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct index 8249c3542a4..585b1d054f7 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -37,14 +37,10 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE 0x0400 #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. @@ -60,7 +56,7 @@ LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region .ANY (+RO) } ; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE) { ; RW data + RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data .ANY (+RW +ZI) } ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 0c7568e2bb6..7e2c8bdf3e9 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -66,11 +66,7 @@ MEMORY */ ENTRY(Reset_Handler) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = 0x400; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf index c76fd9af14d..936ce2e8725 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf @@ -48,11 +48,8 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct index 8249c3542a4..585b1d054f7 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -37,14 +37,10 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE 0x0400 #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. @@ -60,7 +56,7 @@ LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region .ANY (+RO) } ; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE) { ; RW data + RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data .ANY (+RW +ZI) } ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 2990cee1dec..af52d7fe129 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -66,11 +66,7 @@ MEMORY */ ENTRY(Reset_Handler) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = 0x400; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf index c76fd9af14d..936ce2e8725 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf @@ -48,11 +48,8 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct index 8249c3542a4..585b1d054f7 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -37,14 +37,10 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE 0x0400 #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. @@ -60,7 +56,7 @@ LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region .ANY (+RO) } ; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE) { ; RW data + RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data .ANY (+RW +ZI) } ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 6d3557e00fe..23435e3167b 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -31,10 +31,6 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - MEMORY { VECTORS (rx) : ORIGIN = MAPPABLE_START, LENGTH = MAPPABLE_SIZE @@ -70,7 +66,7 @@ MEMORY */ ENTRY(Reset_Handler) -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = 0x400; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf index c76fd9af14d..936ce2e8725 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf @@ -48,11 +48,8 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct index fa3de1650f0..196ca9a0996 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -37,14 +37,10 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE 0x0400 #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. @@ -60,7 +56,7 @@ LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region .ANY (+RO) } ; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE) { ; RW data + RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data .ANY (+RW +ZI) } ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 7fdc930e1b7..8e065ba4134 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -66,11 +66,7 @@ MEMORY */ ENTRY(Reset_Handler) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = 0x400; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf index c76fd9af14d..936ce2e8725 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf @@ -48,11 +48,8 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_ARM_STD/BEETLE.sct b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_ARM_STD/BEETLE.sct index 67178a90d43..fa339463c99 100644 --- a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_ARM_STD/BEETLE.sct +++ b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_ARM_STD/BEETLE.sct @@ -1,5 +1,4 @@ -#! armcc -E; -/* +;/* ; * BEETLE CMSIS Library ; */ ;/* @@ -23,12 +22,6 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x00040000 { ; load region size_region ER_IROM1 0x00000000 0x00040000 { ; load address = execution address *.o (RESET, +FIRST) @@ -37,10 +30,7 @@ LR_IROM1 0x00000000 0x00040000 { ; load region size_region CORDIO_RO_2.1.o (*) } ; Total: 80 vectors = 320 bytes (0x140) to be reserved in RAM - RW_IRAM1 (0x20000000+0x140) (0x20000-0x140-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x140) (0x20000-0x140) { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld index 710f15aebed..176804cb47c 100644 --- a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld +++ b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld @@ -59,11 +59,8 @@ MEMORY */ ENTRY(Reset_Handler) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -__stack_size__ = MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +__stack_size__ = 0x4000; __heap_size__ = 0x8000; HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; @@ -205,7 +202,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); __HeapBase = .; - . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; + . += HEAP_SIZE; __HeapLimit = .; __heap_limit = .; /* Add for _sbrk */ } > RAM diff --git a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf index e24541e6f78..5827d60ebd4 100644 --- a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf +++ b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf @@ -29,13 +29,8 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x20000140; define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*-Sizes-*/ - -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - /* Heap and Stack size */ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x4000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct index 8d58db3d7ce..0007aced1f9 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -29,12 +29,6 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; The vector table is loaded at address 0x00000000 in Flash memory region. LR_IROM1 FLASH_START FLASH_SIZE { ER_IROM1 FLASH_START FLASH_SIZE { @@ -44,12 +38,10 @@ LR_IROM1 FLASH_START FLASH_SIZE { ; Rest of the code is loaded to the ZBT SSRAM1. LR_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE { - ER_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE-Stack_Size { + ER_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE { *(InRoot$$Sections) .ANY (+RO) } - ARM_LIB_STACK ZBT_SSRAM1_START+ZBT_SSRAM1_SIZE EMPTY -Stack_Size { ; Stack region growing down - } ; At execution, RAM is set to be in ZBT SSRAM2 and 3, just after the vector ; table previously moved from Flash. RW_IRAM1 (ZBT_SSRAM23_START + NVIC_VECTORS_SIZE) (ZBT_SSRAM23_SIZE - NVIC_VECTORS_SIZE) { diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 6eae076729b..0fc60f65941 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -25,10 +25,6 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - MEMORY { VECTORS (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE @@ -65,7 +61,7 @@ MEMORY ENTRY(Reset_Handler) HEAP_SIZE = 0x4000; -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = 0x1000; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf index 368a7b32e2f..e888b99dbce 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf @@ -57,10 +57,7 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SSRAM23_START + ZBT_SSRAM23_ /* Sizes */ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_heap__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_heap__ = 0xF000; define symbol __ICFEDIT_size_cstack__ = 0x1000; define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_SSG/TARGET_IOTSS/TARGET_IOTSS_BEID/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_IOTSS/TARGET_IOTSS_BEID/device/TOOLCHAIN_ARM_STD/MPS2.sct index db4b7e89eb6..e157314325b 100644 --- a/targets/TARGET_ARM_SSG/TARGET_IOTSS/TARGET_IOTSS_BEID/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_IOTSS/TARGET_IOTSS_BEID/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -1,4 +1,3 @@ -#! armcc -E ;* MPS2 CMSIS Library ;* ;* Copyright (c) 2006-2016 ARM Limited @@ -34,12 +33,6 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address *.o (RESET, +First) @@ -47,10 +40,8 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region .ANY (+RO) } ; Total: 80 vectors = 320 bytes (0x140) to be reserved in RAM - RW_IRAM1 (0x20000000+0x140) (0x400000-0x140-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x140) (0x400000-0x140) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct index 904eeb6a0b8..625a92a2db6 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -1,4 +1,3 @@ -#! armcc -E ;* MPS2 CMSIS Library ;* ;* Copyright (c) 2006-2016 ARM Limited @@ -34,12 +33,6 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address *.o (RESET, +First) @@ -47,10 +40,8 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region .ANY (+RO) } ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct index 904eeb6a0b8..625a92a2db6 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -1,4 +1,3 @@ -#! armcc -E ;* MPS2 CMSIS Library ;* ;* Copyright (c) 2006-2016 ARM Limited @@ -34,12 +33,6 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address *.o (RESET, +First) @@ -47,10 +40,8 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region .ANY (+RO) } ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct index 904eeb6a0b8..625a92a2db6 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -1,4 +1,3 @@ -#! armcc -E ;* MPS2 CMSIS Library ;* ;* Copyright (c) 2006-2016 ARM Limited @@ -34,12 +33,6 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address *.o (RESET, +First) @@ -47,10 +40,8 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region .ANY (+RO) } ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct index d522720b3f2..625a92a2db6 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;* MPS2 CMSIS Library ;* ;* Copyright (c) 2006-2016 ARM Limited @@ -35,12 +33,6 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address *.o (RESET, +First) @@ -48,10 +40,8 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region .ANY (+RO) } ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct index 875c6c498a6..d81707aa5f6 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;* MPS2 CMSIS Library ;* ;* Copyright (c) 2006-2016 ARM Limited @@ -35,12 +33,6 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address *.o (RESET, +First) @@ -48,10 +40,8 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region .ANY (+RO) } ; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM - RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct index 5f0a6103548..41aa6e56644 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct @@ -45,12 +45,6 @@ #define ADUCM_VECTOR_SIZE 0x1A0 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE { *(.vectors, +First) @@ -69,11 +63,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY - (0x20004000 - AlignExpr(ImageLimit(RW_IRAM1), 16) - Stack_Size) { ; heap + ADUCM_HEAP AlignExpr(+0, 16) EMPTY + (0x20003000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; heap } - ARM_LIB_STACK AlignExpr(+0, 16) EMPTY Stack_Size { ; stack + ADUCM_STACK AlignExpr(+0, 16) EMPTY 0x1000 { ; stack } ADUCM_IRAM2 0x20004000 0x4000 { ; bss section diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld index 5e5bdc8c72e..b78bfa9bc9d 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld @@ -33,10 +33,7 @@ MEMORY /* Library configurations */ GROUP(libgcc.a libc.a libm.a libnosys.a) /* Custom stack and heap sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x1000; __heap_size__ = 0x2000; /* select custom or default sizes for stack and heap */ @@ -223,13 +220,13 @@ SECTIONS __HeapBase = .; __end__ = .; end = __end__; - . = ORIGIN(DSRAM_A) + LENGTH(DSRAM_A) - STACK_SIZE; + . += HEAP_SIZE; __HeapLimit = .; } > DSRAM_A /* Set stack top to end of DSRAM_A, and move stack limit down by * size of stack_dummy section */ - __StackTop = ORIGIN(DSRAM_A) + LENGTH(DSRAM_A); + __StackTop = ORIGIN(DSRAM_C); __StackLimit = __StackTop - STACK_SIZE; PROVIDE(__stack = __StackTop); diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf index 4ffaae8b248..95761bf1e99 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf @@ -38,10 +38,6 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x40000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - define symbol ADUCM_SECTOR_SIZE = 0x800; define symbol ADUCM_VECTOR_SIZE = 0x1A0; @@ -53,7 +49,7 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO define region RAM_bank1_region = mem:[from 0x20000200 size 0x00003E00]; define region RAM_bank2_region = mem:[from 0x20004000 size 0x00004000] | mem:[from 0x20040000 size 0x00007000]; -define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 16, size = 0x1000 { }; define block HEAP with alignment = 16, size = 0x2000 { }; do not initialize { section .noinit }; initialize by copy { rw }; diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct index 196981d4faf..07a39bfd616 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct @@ -42,12 +42,6 @@ #define ADUCM_VECTOR_SIZE 0x1A0 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE { *(.vectors, +First) @@ -68,9 +62,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ADUCM_IRAM3 0x20048000 0x10000 { *(+ZI) } - ARM_LIB_HEAP AlignExpr(ImageLimit(RW_IRAM1), 16) EMPTY - (ImageBase(ADUCM_IRAM3) - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ; heap - - ARM_LIB_STACK AlignExpr(+0, 16) EMPTY Stack_Size { ; stack - } + ADUCM_HEAP AlignExpr(ImageLimit(RW_IRAM1), 16) EMPTY + (ImageBase(ADUCM_IRAM3) - 0x2000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ; heap } diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld index 43be1ca5c2d..d025aae5c8e 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld @@ -34,10 +34,7 @@ MEMORY GROUP(libgcc.a libc.a libm.a libnosys.a) /* Custom stack and heap sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x2000; __heap_size__ = 0x6000; /* select custom or default sizes for stack and heap */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf index 2249b9fbdaf..30bf31c1887 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf @@ -38,10 +38,6 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x7F000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - define symbol ADUCM_SECTOR_SIZE = 0x800; define symbol ADUCM_VECTOR_SIZE = 0x1A0; @@ -53,7 +49,7 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO define region RAM_bank1_region = mem:[from 0x20040000 size 0x00008000]; define region RAM_bank2_region = mem:[from 0x20000200 size 0x00006E00] | mem:[from 0x20048000 size 0x00010000]; -define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 16, size = 0x2000 { }; define block HEAP with alignment = 16, size = 0x6000 { }; do not initialize { section .noinit }; initialize by copy { rw }; diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct index 61cc8b5128d..7fda6ed3980 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct @@ -1,14 +1,7 @@ -#! armcc -E - ;SAMD21G18A ;256KB FLASH (0x40000) @ 0x000000000 ;2KB RAM (0x8000) @ 0x20000000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE ;SAMD21G18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) LR_IROM1 0x00000000 0x40000 { ; load region size_region @@ -22,6 +15,5 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x8000 EMPTY -Stack_Size { ; Stack region growing down - } + } \ No newline at end of file diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld index 7c1a79b9b23..21334d715a5 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld @@ -2,18 +2,15 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) SEARCH_DIR(.) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Memory Spaces Definitions */ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8 } + /* The stack size used by the application. NOTE: you need to adjust according to your application. */ + STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000; + /* Section Definitions */ SECTIONS { .text : @@ -117,10 +114,5 @@ MEMORY { _estack = .; } > ram - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(ram) + LENGTH(ram); - __StackLimit = __StackTop - STACK_SIZE; - . = ALIGN(8); } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct index ad1df9d8cd0..49ff53cda2c 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct @@ -1,14 +1,7 @@ -#! armcc -E - ;SAMD21J18A ;256KB FLASH (0x40000) @ 0x000000000 ;2KB RAM (0x8000) @ 0x20000000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE ;SAMD21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) LR_IROM1 0x00000000 0x40000 { ; load region size_region @@ -19,9 +12,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region } ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment - RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x8000 EMPTY -Stack_Size { ; Stack region growing down - } + } \ No newline at end of file diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld index d35c80cbe2f..21334d715a5 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld @@ -2,18 +2,15 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) SEARCH_DIR(.) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Memory Spaces Definitions */ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8 } + /* The stack size used by the application. NOTE: you need to adjust according to your application. */ + STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000; + /* Section Definitions */ SECTIONS { .text : @@ -116,11 +113,6 @@ MEMORY { . = ALIGN(8); _estack = .; } > ram - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; . = ALIGN(8); } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct index 7ffda3b72cf..86cae7a5172 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct @@ -1,15 +1,7 @@ -#! armcc -E - ;SAML21J18A ;256KB FLASH (0x40000) @ 0x000000000 ;32KB RAM (0x8000) @ 0x20000000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ;SAML21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) LR_IROM1 0x00000000 0x40000 { ; load region size_region ER_IROM1 0x00000000 0x40000 { ; load address = execution address @@ -19,9 +11,7 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region } ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment - RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x8000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld index 68a37eda361..21334d715a5 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld @@ -2,18 +2,15 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) SEARCH_DIR(.) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Memory Spaces Definitions */ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8 } + /* The stack size used by the application. NOTE: you need to adjust according to your application. */ + STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000; + /* Section Definitions */ SECTIONS { .text : @@ -117,10 +114,5 @@ MEMORY { _estack = .; } > ram - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; - . = ALIGN(8); } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_STD/SAMR21G18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_STD/SAMR21G18A.sct index b3b1c653dea..669d9fe7a73 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_STD/SAMR21G18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_STD/SAMR21G18A.sct @@ -1,14 +1,7 @@ -#! armcc -E - ;SAMR21G18A ;256KB FLASH (0x40000) @ 0x000000000 ;2KB RAM (0x8000) @ 0x20000000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE ;SAMR21G18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) LR_IROM1 0x00000000 0x40000 { ; load region size_region @@ -19,9 +12,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region } ; [RAM] Vector table dynamic copy: 44 vectors * 4 bytes = (0xB0) - alignment - RW_IRAM1 (0x20000000+0xB0) (0x8000-0xB0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xB0) (0x8000-0xB0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20000000+0x8000 EMPTY -Stack_Size { ; Stack region growing down - } + } \ No newline at end of file diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld index a547756f2cd..f060f236f6e 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld @@ -2,18 +2,15 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) SEARCH_DIR(.) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Memory Spaces Definitions */ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 ram (rwx) : ORIGIN = 0x20000000 + 0xB0, LENGTH = 0x00008000 - 0xB0 } + /* The stack size used by the application. NOTE: you need to adjust according to your application. */ + STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000; + /* Section Definitions */ SECTIONS { .text : @@ -117,10 +114,5 @@ MEMORY { _estack = .; } > ram - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; - . = ALIGN(8); } diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld b/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld index 85291c7d5de..e3e802d7149 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld @@ -2,18 +2,15 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) SEARCH_DIR(.) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Memory Spaces Definitions */ MEMORY { rom (rx) : ORIGIN = 0x00400000, LENGTH = 0x00080000 ram (rwx) : ORIGIN = 0x20000000 + 0x108, LENGTH = 0x00028000 - 0x108 } + /* The stack size used by the application. NOTE: you need to adjust according to your application. */ + STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x3000; + /* Section Definitions */ SECTIONS { .text : @@ -116,11 +113,6 @@ MEMORY { . = ALIGN(8); _estack = .; } > ram - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; . = ALIGN(8); } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct index 902b7bf83f9..436c57d1b22 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct @@ -46,12 +46,6 @@ #define MBED_RAM_SIZE 0x10000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. @@ -141,10 +135,6 @@ LR_IROM1 FLASH_START (FLASH_SIZE - 0x8000) { * (.noinit) } - - ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -Stack_Size - { ; Stack region growing down - } } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld index 9de1257d3fa..cc19f08b5af 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld @@ -44,12 +44,6 @@ ENTRY(Reset_Handler) #define MBED_RAM_SIZE 0x10000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard * libraries. You may list several symbols for each EXTERN, and you may use @@ -313,7 +307,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(ram) + LENGTH(ram); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf index a161c7b0b62..77d8375c0e0 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf @@ -114,17 +114,11 @@ define symbol __ICFEDIT_region_ERAM2_end__ = 0x0; define symbol __ICFEDIT_region_ERAM3_start__ = 0x0; define symbol __ICFEDIT_region_ERAM3_end__ = 0x0; /*-Sizes-*/ - -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; + define symbol __ICFEDIT_size_cstack__ = 0x1000; } else { define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE; } - define symbol __ICFEDIT_size_proc_stack__ = 0x0; if (!isdefinedsymbol(__HEAP_SIZE)) { define symbol __ICFEDIT_size_heap__ = 0x4000; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct index e101199e505..414aa7c1384 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct @@ -46,12 +46,6 @@ #define MBED_RAM_SIZE 0x37800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. @@ -131,10 +125,6 @@ LR_IROM1 FLASH_START FLASH_SIZE * (.cy_ramfunc) .ANY (+RW, +ZI) } - - ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -Stack_Size - { ; Stack region growing down - } ; Place variables in the section that should not be initialized during the ; device startup. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index f65b095fff3..da825c4dcd1 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -44,12 +44,6 @@ ENTRY(Reset_Handler) #define MBED_RAM_SIZE 0x37800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard * libraries. You may list several symbols for each EXTERN, and you may use @@ -311,7 +305,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(ram) + LENGTH(ram); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf index 89aa5aae1ba..9148ff418c4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf @@ -116,13 +116,8 @@ define symbol __ICFEDIT_region_ERAM2_end__ = 0x0; define symbol __ICFEDIT_region_ERAM3_start__ = 0x0; define symbol __ICFEDIT_region_ERAM3_end__ = 0x0; /*-Sizes-*/ - -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; + define symbol __ICFEDIT_size_cstack__ = 0x1000; } else { define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE; } diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct index ee7bf245cc8..9a661627b7f 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x20000 { ; load region size_region (132k) ER_IROM1 0x00000000 0x20000 { ; load address = execution address @@ -14,10 +7,8 @@ LR_IROM1 0x00000000 0x20000 { ; load region size_region (132k) } ; 8_byte_aligned(62 vect * 4 bytes) = 8_byte_aligned(0xF8) = 0xF8 ; 0x4000 - 0xF8 = 0x3F08 - RW_IRAM1 0x1FFFE0F8 0x3F08-Stack_Size { + RW_IRAM1 0x1FFFE0F8 0x3F08 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFFE0F8+0x3F08 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld index 01a9d637dcd..36fdf5b23c2 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld @@ -2,12 +2,6 @@ * K20 ARM GCC linker script file */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 @@ -161,7 +155,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf index 1adfbf9df2f..e73c38a0c1c 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf @@ -11,10 +11,8 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1fffe0f7; define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0f8; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x600; define symbol __ICFEDIT_size_heap__ = 0xC00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct index 88fcdc0a580..8e8908c2820 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) ER_IROM1 0x00000000 0x40000 { ; load address = execution address @@ -14,9 +7,7 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) } ; 8_byte_aligned(112 vect * 4 bytes) = 8_byte_aligned(0x1C0) = 0x1C0 ; 0x10000 - 0x1C0 = 0xFE40 - RW_IRAM1 0x1FFF81C0 0xFE40-Stack_Size { + RW_IRAM1 0x1FFF81C0 0xFE40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFF81C0+0xFE40 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld index 64e4f2831f1..c950a5d679b 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld @@ -2,12 +2,6 @@ * K20DX256 ARM GCC linker script file */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 @@ -162,7 +156,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct index 4b8533287bd..1afd9a9dc0a 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct @@ -1,11 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) ER_IROM1 0x00000000 0x8000 { ; load address = execution address *.o (RESET, +First) @@ -14,9 +6,7 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 0x1000 - 0xC0 = 0xF40 - RW_IRAM1 0x1FFFFCC0 0xF40-Stack_Size { + RW_IRAM1 0x1FFFFCC0 0xF40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFFFCC0+0xF40 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld index 75fe86f173e..92505fac8bf 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld @@ -2,12 +2,6 @@ * KL05Z ARM GCC linker script file, Martin Kojtal (0xc0170) */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000410 @@ -152,7 +146,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf index a3a4f28e309..4bfab3fc15d 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf @@ -11,10 +11,8 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffffcbf; define symbol __ICFEDIT_region_RAM_start__ = 0x1ffffcc0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x200; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct index b171491a5f4..10160684212 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k) ER_IROM1 0x00000000 0x20000 { ; load address = execution address @@ -14,10 +7,8 @@ LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 0x4000 - 0xC0 = 0x3F40 - RW_IRAM1 0x1FFFF0C0 0x3F40-Stack_Size { + RW_IRAM1 0x1FFFF0C0 0x3F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFFF0C0+0x3F40 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld index d1d0125a05b..2c9c6ec0292 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld @@ -2,12 +2,6 @@ * KL25Z ARM GCC linker script file */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 @@ -161,7 +155,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_EWL/MKL25Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_EWL/MKL25Z4.ld index 17c95bd9605..3ba122952d7 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_EWL/MKL25Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_EWL/MKL25Z4.ld @@ -14,13 +14,9 @@ ENTRY(__thumb_startup) _estack = 0x20003000; /* end of SRAM */ __SP_INIT = _estack; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Generate a link error if heap and stack don't fit into RAM */ __heap_size = 0x400; /* required amount of heap */ -__stack_size = MBED_BOOT_STACK_SIZE; /* required amount of stack */ +__stack_size = 0x400; /* required amount of stack */ /* Specify the memory areas */ MEMORY diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_NEWLIB/MKL25Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_NEWLIB/MKL25Z4.ld index df5d9737536..6a0920ade8b 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_NEWLIB/MKL25Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_NEWLIB/MKL25Z4.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1768 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -151,7 +145,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf index 69ca77114ce..e4359f4192c 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf @@ -11,10 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf; define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0xC00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld index d1d0125a05b..2c9c6ec0292 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld @@ -2,12 +2,6 @@ * KL25Z ARM GCC linker script file */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 @@ -161,7 +155,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf index d800ef53fc3..55caa808479 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf @@ -11,10 +11,8 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf; define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; define symbol __ICFEDIT_size_heap__ = 0x1000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct index b736beb0cf6..82ddfb87861 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) ER_IROM1 0x00000000 0x40000 { ; load address = execution address @@ -14,10 +7,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 0x8000 - 0xC0 = 0x7F40 - RW_IRAM1 0x1FFFE0C0 0x7F40-Stack_Size { + RW_IRAM1 0x1FFFE0C0 0x7F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x1FFFE0C0+0x7F40 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld index 709d473daa9..9131dfc02b2 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld @@ -2,12 +2,6 @@ * KL46Z ARM GCC linker script file */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 @@ -161,7 +155,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf index 6f0a1be498c..2a765b6731a 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf @@ -11,10 +11,8 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1fffe0bf; define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0c0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x4000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct index 7e4b127455d..0651acc58f2 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct @@ -81,15 +81,11 @@ #define m_data_2_start 0x20000000 #define m_data_2_size 0x00030000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) @@ -127,6 +123,4 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo } RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up } - ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld index 76dda197a47..bb7e13f59a3 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld @@ -44,10 +44,6 @@ ** ################################################################### */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Entry Point */ ENTRY(Reset_Handler) @@ -55,7 +51,7 @@ __ram_vector_table__ = 1; /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x400; __heap_size__ = 0x6000; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf index e158f20d21c..d8a1ebd2816 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf @@ -45,10 +45,8 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x8000; define symbol __heap_size__=0x10000; if (!isdefinedsymbol(MBED_APP_START)) { diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct index b780a35be2d..56fdcc82350 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct @@ -77,15 +77,11 @@ #define m_data_2_start 0x20000000 #define m_data_2_size 0x00030000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) @@ -124,6 +120,4 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load } RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up } - ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld index 4df3cc9e8df..33c6bc8ffb5 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld @@ -47,10 +47,6 @@ ** ################################################################### */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Entry Point */ ENTRY(Reset_Handler) @@ -58,7 +54,7 @@ __ram_vector_table__ = 1; /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x400; __heap_size__ = 0x6000; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf index 555c0ca16e0..6f9a97a619d 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf @@ -49,10 +49,8 @@ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x8000; define symbol __heap_size__=0x10000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003C0 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct index 2ad3b089a56..cc5a6612e5e 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct @@ -71,15 +71,11 @@ #define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size) #define m_data_size (0x00004000 - m_interrupts_ram_size) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) @@ -112,7 +108,5 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo } RW_IRAM1 +0 { ; Heap region growing up } - ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld index 0775ebe86d3..9e27cf9a8bb 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld @@ -53,13 +53,9 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x400; /* With the RTOS in use, this does not affect the main heap size. */ __heap_size__ = 0x0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf index dd9d819685a..206fcf91fe0 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf @@ -49,11 +49,8 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x800; define symbol __heap_size__=0x1000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct index fe3a7917c7a..99f6220caf4 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct @@ -68,16 +68,11 @@ #define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size) #define m_data_size (0x00008000 - m_interrupts_ram_size) - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) @@ -110,7 +105,5 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load } RW_IRAM1 +0 { ; Heap region growing up } - ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld index 8b0d6c78204..19329969f4c 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld @@ -50,13 +50,9 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x400; __heap_size__ = 0x2800; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf index 9658042ef04..6b645fee868 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf @@ -46,11 +46,8 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x1000; define symbol __heap_size__=0x2800; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct index f6dc71617bd..299f8187424 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct @@ -79,17 +79,13 @@ #define m_usb_sram_size 0x00000800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* USB BDT size */ #define usb_bdt_size 0x200 /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) @@ -125,8 +121,6 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load } RW_IRAM1 +0 { ; Heap region growing up } - ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down - } } #if (defined(__usb_use_usbram__)) diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld index 35b92a4f008..b46708160e0 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld @@ -53,13 +53,9 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x400; __heap_size__ = 0x6000; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf index 81547705415..b7ceb2c1b2d 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf @@ -49,10 +49,8 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x3000; define symbol __heap_size__=0x6000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000140 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct index 295ed6e98ab..3bb6b02da42 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct @@ -59,10 +59,6 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #define m_interrupts_start MBED_APP_START #define m_interrupts_size 0x00000400 @@ -85,7 +81,7 @@ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) @@ -121,7 +117,5 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load } RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up } - ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld index 11029890da4..1f54167cb38 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld @@ -48,13 +48,9 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x400; __heap_size__ = 0x4000; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf index 2ce502adf35..28794497a94 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf @@ -44,11 +44,8 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x2000; define symbol __heap_size__=0x4000; if (!isdefinedsymbol(MBED_APP_START)) { diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct index 05b2803a5d9..ab0396fc31d 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct @@ -115,7 +115,5 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load } RW_IRAM1 +0 { ; Heap region growing up } - ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct index 085982585f4..4d6de09b1db 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct @@ -51,10 +51,6 @@ */ #define __ram_vector_table__ 1 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #if (defined(__ram_vector_table__)) #define __ram_vector_table_size__ 0x00000400 #else @@ -83,7 +79,7 @@ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) @@ -119,7 +115,5 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo } RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up } - ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld index ca5767e7e03..433f8d82914 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld @@ -48,18 +48,13 @@ ** ################################################################### */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Entry Point */ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -__stack_size__ = MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +__stack_size__ = 0x4000; __heap_size__ = 0x8000; HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf index e6bbc311933..5ec97d3327b 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf @@ -49,10 +49,8 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x4000; define symbol __heap_size__=0x8000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct index 701bcf3257f..b3e2ac4ef16 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct @@ -63,17 +63,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -/* Sizes */ -#if (defined(__stack_size__)) - #define Stack_Size __stack_size__ -#else - #define Stack_Size MBED_BOOT_STACK_SIZE -#endif - #define m_interrupts_start MBED_APP_START #define m_interrupts_size 0x00000400 @@ -107,11 +96,9 @@ LR_IROM1 m_interrupts_start m_text_size+m_interrupts_size+m_flash_config_size { RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } - RW_IRAM1 m_data_2_start m_data_2_size-Stack_Size { ; RW data + RW_IRAM1 m_data_2_start m_data_2_size { ; RW data .ANY (+RW +ZI) } VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { } - ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld index 51eee8cbfd5..e227aa037ea 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld @@ -47,16 +47,13 @@ ** ################################################################### */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Entry Point */ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -__stack_size__ = MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +__stack_size__ = 0x8000; __heap_size__ = 0x10000; #if !defined(MBED_APP_START) diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf index de769863b95..eaff80afa66 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf @@ -48,10 +48,8 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x8000; define symbol __heap_size__=0x10000; if (!isdefinedsymbol(MBED_APP_START)) { diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct index 2718d5d7f44..35cb12437b1 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct @@ -11,12 +11,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K) ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address @@ -26,11 +20,8 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K) } ; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) - RW_IRAM1 (0x20000000+0x150) (0x18000-0x150-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x150) (0x18000-0x150) { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (0x20000000+0x18000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld index 11d9a976162..3f72df037ad 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld @@ -1,9 +1,3 @@ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* specify memory regions */ MEMORY { @@ -121,7 +115,7 @@ SECTIONS /* initializes stack on the end of block */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf index 43e5243ad47..de026cc1be2 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf @@ -6,9 +6,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x0800000 if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; @@ -16,9 +13,9 @@ define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000; define symbol __ICFEDIT_region_NVIC_end__ = 0x2000014F; define symbol __ICFEDIT_region_RAM_start__ = 0x20000150; define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; - /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x3000; define symbol __ICFEDIT_size_heap__ = 0x6000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct index 4ea029f320e..cdc367ab991 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct @@ -1,4 +1,4 @@ -#! armcc -E + ; MAX32600 ; 256KB FLASH (0x40000) @ 0x000000000 ; 2KB RAM (0x8000) @ 0x20000000 @@ -6,12 +6,6 @@ ; MAX32600: 256KB FLASH (0x40000) + 32KB RAM (0x8000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x40000 { ; load region size_region ER_IROM1 0x00000000 0x40000 { ; load address = execution address *.o (RESET, +First) @@ -20,9 +14,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region } ; [RAM] Vector table dynamic copy: 79 vectors * 4 bytes = (0x140) - alignment - RW_IRAM1 (0x20000000+0x140) (0x8000-0x140-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x140) (0x8000-0x140) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } + } \ No newline at end of file diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld index 61f4774ef29..cb845f7914f 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld @@ -37,12 +37,6 @@ * *****************************************************************************/ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 /* start from 0x0, fullsize flash, 256k */ @@ -180,7 +174,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf index cb767e1418e..96d5c1555b1 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x0800; define symbol __size_heap__ = 0x3000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct index a0065e9e936..61369d30549 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct @@ -1,4 +1,4 @@ -#! armcc -E + ; MAX32610 ; 256KB FLASH (0x40000) @ 0x000000000 ; 2KB RAM (0x8000) @ 0x20000000 @@ -6,12 +6,6 @@ ; MAX32610: 256KB FLASH (0x40000) + 32KB RAM (0x8000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x40000 { ; load region size_region ER_IROM1 0x00000000 0x40000 { ; load address = execution address *.o (RESET, +First) @@ -20,9 +14,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region } ; [RAM] Vector table dynamic copy: 79 vectors * 4 bytes = (0x140) - alignment - RW_IRAM1 (0x20000000+0x140) (0x8000-0x140-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x140) (0x8000-0x140) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } + } \ No newline at end of file diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld index 953f97ef995..ab9d1cedf2a 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld @@ -37,12 +37,6 @@ * *****************************************************************************/ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 /* start from 0x0, fullsize flash, 256k */ @@ -180,7 +174,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf index 658d755b1bc..96d5c1555b1 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf @@ -15,11 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x0800; define symbol __size_heap__ = 0x3000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct index 0910c7eefca..77c2cb1a5c0 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct @@ -1,4 +1,3 @@ -#! armcc -E ; MAX32620 ; 2MB FLASH (0x200000) @ 0x000000000 ; 256KB RAM (0x40000) @ 0x20000000 @@ -7,12 +6,6 @@ ; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x200000 { ; load region size_region ER_IROM1 0x00000000 0x200000 { ; load address = execution address *.o (RESET, +First) @@ -22,9 +15,8 @@ LR_IROM1 0x00000000 0x200000 { ; load region size_region ; [RAM] Vector table dynamic copy: 65 vectors * 4 bytes = 260 (0x104) + 4 ; for 8 byte alignment - RW_IRAM1 (0x20000000+0x108) (0x40000-0x108-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x108) (0x40000-0x108) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x40000) EMPTY -Stack_Size { ; stack - } + } diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld index 5e8a39c53d4..3f5d5adb5ab 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld @@ -31,12 +31,6 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 2M @@ -174,7 +168,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf index db3dbf7b4eb..7edf37819cb 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf @@ -15,11 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x1000; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct index 0910c7eefca..77c2cb1a5c0 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct @@ -1,4 +1,3 @@ -#! armcc -E ; MAX32620 ; 2MB FLASH (0x200000) @ 0x000000000 ; 256KB RAM (0x40000) @ 0x20000000 @@ -7,12 +6,6 @@ ; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x200000 { ; load region size_region ER_IROM1 0x00000000 0x200000 { ; load address = execution address *.o (RESET, +First) @@ -22,9 +15,8 @@ LR_IROM1 0x00000000 0x200000 { ; load region size_region ; [RAM] Vector table dynamic copy: 65 vectors * 4 bytes = 260 (0x104) + 4 ; for 8 byte alignment - RW_IRAM1 (0x20000000+0x108) (0x40000-0x108-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x108) (0x40000-0x108) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x40000) EMPTY -Stack_Size { ; stack - } + } diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld index 5e8a39c53d4..3f5d5adb5ab 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld @@ -31,12 +31,6 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 2M @@ -174,7 +168,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf index db3dbf7b4eb..7edf37819cb 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf @@ -15,11 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x1000; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625NEXPAQ/MAX32625.sct b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625NEXPAQ/MAX32625.sct index a3651f1284c..6ea0cb73ba2 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625NEXPAQ/MAX32625.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625NEXPAQ/MAX32625.sct @@ -1,14 +1,7 @@ -#! armcc -E ; MAX32625 ; 512KB FLASH (0x70000) @ 0x000010000 ; 160KB RAM (0x24F00) @ 0x20003100 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x000010000 0x70000 { ; load region size_region ER_IROM1 0x000010000 0x70000 { ; load address = execution address *.o (RESET, +First) @@ -17,9 +10,7 @@ LR_IROM1 0x000010000 0x70000 { ; load region size_region } ; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110) - RW_IRAM1 (0x20003100+0x110) (0x24F00-0x110-Stack_Size) { ; RW data + RW_IRAM1 (0x20003100+0x110) (0x24F00-0x110) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20003100+0x24F00) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct index 175f4f54c81..83525ba4fe2 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct @@ -11,12 +11,6 @@ #define MBED_APP_SIZE 0x00070000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) @@ -25,9 +19,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110) - RW_IRAM1 (0x20000000+0x110) (0x28000-0x110-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x110) (0x28000-0x110) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x28000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct index 71ebcda2134..0c3bb3a099a 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct @@ -1,14 +1,7 @@ -#! armcc -E ; MAX32625 ; 512KB FLASH (0x80000) @ 0x000000000 ; 160KB RAM (0x28000) @ 0x20000000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x000000000 0x80000 { ; load region size_region ER_IROM1 0x000000000 0x80000 { ; load address = execution address *.o (RESET, +First) @@ -17,9 +10,7 @@ LR_IROM1 0x000000000 0x80000 { ; load region size_region } ; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110) - RW_IRAM1 (0x20000000+0x110) (0x28000-0x110-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x110) (0x28000-0x110) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x28000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld index 9e012681438..76103a93d99 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625NEXPAQ/max32625.ld @@ -31,12 +31,6 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00010000, LENGTH = 0x00070000 @@ -174,7 +168,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld index 0dc37d66372..203cefb267a 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld @@ -39,12 +39,6 @@ #define MBED_APP_SIZE 0x00070000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -182,7 +176,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld index 8fa66025cde..23d0c57e346 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld @@ -31,12 +31,6 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 @@ -174,7 +168,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf index 03788d6b842..1566573c706 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x5000; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf index 711cfe0da08..716245bf71b 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf @@ -22,11 +22,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x5000; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf index c6ea44891d2..6365e98e416 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x5000; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct index 29c4d7fb782..59f465a389b 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct @@ -1,14 +1,7 @@ -#! armcc -E ; MAX3263x ; 2MB FLASH (0x200000) @ 0x000000000 ; 512KB RAM (0x80000) @ 0x20000000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x000000000 0x200000 { ; load region size_region ER_IROM1 0x000000000 0x200000 { ; load address = execution address *.o (RESET, +First) @@ -17,9 +10,7 @@ LR_IROM1 0x000000000 0x200000 { ; load region size_region } ; [RAM] Vector table dynamic copy: 68 vectors * 4 bytes = 272 (0x110) - RW_IRAM1 (0x20000000+0x110) (0x80000-0x110-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x110) (0x80000-0x110) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x80000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld index 639fc3853a8..dbf74c33585 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld @@ -31,12 +31,6 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00200000 @@ -174,7 +168,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf index 80b5667d9de..7cb8fbadc99 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x5000; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct index b0639553851..cbbea83ae78 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;WITHOUT SOFTDEVICE: ;LR_IROM1 0x00000000 0x00040000 { ; ER_IROM1 0x00000000 0x00040000 { @@ -14,8 +12,6 @@ ; ;WITH SOFTDEVICE: -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x1C000 0x0024000 { ER_IROM1 0x1C000 0x0024000 { *.o (RESET, +First) @@ -25,6 +21,4 @@ LR_IROM1 0x1C000 0x0024000 { RW_IRAM1 0x20002800 0x00005800 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20002800+0x00005800 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct index 1a3cd8ec11d..62638400f2a 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;WITHOUT SOFTDEVICE: ;LR_IROM1 0x00000000 0x00040000 { ; ER_IROM1 0x00000000 0x00040000 { @@ -14,8 +12,6 @@ ; ;WITH SOFTDEVICE: -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x18000 0x0028000 { ER_IROM1 0x18000 0x0028000 { *.o (RESET, +First) @@ -25,6 +21,4 @@ LR_IROM1 0x18000 0x0028000 { RW_IRAM1 0x20002000 0x00002000 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20002000+0x00002000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct index acdeb8ba156..212c545f250 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;WITHOUT SOFTDEVICE: ;LR_IROM1 0x00000000 0x00040000 { ; ER_IROM1 0x00000000 0x00040000 { @@ -14,8 +12,6 @@ ; ;WITH SOFTDEVICE: -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x1C000 0x0024000 { ER_IROM1 0x1C000 0x0024000 { *.o (RESET, +First) @@ -25,6 +21,4 @@ LR_IROM1 0x1C000 0x0024000 { RW_IRAM1 0x20002800 0x00001800 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20002800+0x00001800 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld index 88357ce3e9a..41546f2c783 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld @@ -1,9 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - MEMORY { FLASH (rx) : ORIGIN = 0x0001C000, LENGTH = 0x24000 @@ -134,7 +130,7 @@ SECTIONS end = __end__; __HeapBase = .; *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - Stack_Size; __HeapLimit = .; } > RAM @@ -149,7 +145,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld index 98c31c677fa..f4eaf88e05e 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld @@ -1,9 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - MEMORY { FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000 @@ -134,7 +130,7 @@ SECTIONS end = __end__; __HeapBase = .; *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - Stack_Size; __HeapLimit = .; } > RAM @@ -149,7 +145,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld index b342ad8db02..e7b9ee53fed 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld @@ -1,9 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - MEMORY { FLASH (rx) : ORIGIN = 0x0001C000, LENGTH = 0x24000 @@ -134,7 +130,7 @@ SECTIONS end = __end__; __HeapBase = .; *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - Stack_Size; __HeapLimit = .; } > RAM @@ -149,7 +145,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S index f9a7f9fb357..7fb929dd26b 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S @@ -38,9 +38,16 @@ expected to be copied into the application project folder prior to its use! .section .stack .align 3 +#ifdef __STACK_SIZE + .equ Stack_Size, __STACK_SIZE +#else + .equ Stack_Size, 2048 +#endif + .globl Stack_Size .globl __StackTop .globl __StackLimit __StackLimit: + .space Stack_Size .size __StackLimit, . - __StackLimit __StackTop: .size __StackTop, . - __StackTop diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf index a269934a6c1..d71c75cb3fa 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf @@ -3,16 +3,13 @@ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = 0x00016000; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = 0x000160c0; define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x20002000; define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x900; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf index 14274a6f2dc..e53b889cc8e 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf @@ -3,16 +3,14 @@ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = 0x00016000; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = 0x000160c0; define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x20002000; define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0xc00; define symbol __ICFEDIT_size_heap__ = 0x1800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct index c3ec0e86ff7..0d10720cf1c 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;WITHOUT SOFTDEVICE: ;LR_IROM1 0x00000000 0x00040000 { ; ER_IROM1 0x00000000 0x00040000 { @@ -14,8 +12,6 @@ ; ;WITH SOFTDEVICE: -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x1B000 0x0025000 { ER_IROM1 0x1B000 0x0025000 { *.o (RESET, +First) @@ -28,6 +24,4 @@ LR_IROM1 0x1B000 0x0025000 { RW_IRAM1 0x20002FB8 0x00005048 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20002FB8+0x00005048 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct index 8da3f804c22..7baf111cbe5 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;WITHOUT SOFTDEVICE: ;LR_IROM1 0x00000000 0x00040000 { ; ER_IROM1 0x00000000 0x00040000 { @@ -14,8 +12,6 @@ ; ;WITH SOFTDEVICE: -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x18000 0x0028000 { ER_IROM1 0x18000 0x0028000 { *.o (RESET, +First) @@ -28,6 +24,4 @@ LR_IROM1 0x18000 0x0028000 { RW_IRAM1 0x200020C0 0x00001F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x200020C0+0x00001F40 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct index 8311c162a1e..96fbdd496b0 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;WITHOUT SOFTDEVICE: ;LR_IROM1 0x00000000 0x00040000 { ; ER_IROM1 0x00000000 0x00040000 { @@ -14,8 +12,6 @@ ; ;WITH SOFTDEVICE: -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x0001B000 0x0025000 { ER_IROM1 0x0001B000 0x0025000 { *.o (RESET, +First) @@ -28,6 +24,4 @@ LR_IROM1 0x0001B000 0x0025000 { RW_IRAM1 0x20002FB8 0x00001048 { .ANY (+RW +ZI) } - ARM_LIB_STACK 0x20002FB8+0x00001048 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld index 6d4f2b6f6ba..9ddce97f408 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld @@ -1,9 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - MEMORY { FLASH (rx) : ORIGIN = 0x0001B000, LENGTH = 0x25000 @@ -148,7 +144,7 @@ SECTIONS end = __end__; __HeapBase = .; *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - Stack_Size; __HeapLimit = .; } > RAM @@ -163,7 +159,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld index 98c31c677fa..f4eaf88e05e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld @@ -1,9 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - MEMORY { FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000 @@ -134,7 +130,7 @@ SECTIONS end = __end__; __HeapBase = .; *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - Stack_Size; __HeapLimit = .; } > RAM @@ -149,7 +145,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld index e6f2352d540..1b520bdf01d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld @@ -1,9 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - MEMORY { FLASH (rx) : ORIGIN = 0x0001B000, LENGTH = 0x25000 @@ -146,7 +142,7 @@ SECTIONS end = __end__; __HeapBase = .; *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - Stack_Size; __HeapLimit = .; } > RAM @@ -161,7 +157,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S index baaec11d4cf..491e7123137 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S @@ -47,9 +47,16 @@ expected to be copied into the application project folder prior to its use! .section .stack .align 3 +#ifdef __STACK_SIZE + .equ Stack_Size, __STACK_SIZE +#else + .equ Stack_Size, 2048 +#endif + .globl Stack_Size .globl __StackTop .globl __StackLimit __StackLimit: + .space Stack_Size .size __StackLimit, . - __StackLimit __StackTop: .size __StackTop, . - __StackTop diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf index 4d2fe9d568f..98c6cdea45f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf @@ -3,9 +3,6 @@ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = 0x0001b000; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = 0x0001b0c0; define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF; @@ -14,7 +11,7 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; export symbol __ICFEDIT_region_RAM_start__; export symbol __ICFEDIT_region_RAM_end__; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x800; define symbol __ICFEDIT_size_heap__ = 0x900; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf index 22bc35e2dea..d55af37da7d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf @@ -2,9 +2,6 @@ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ /*-Specials-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} define symbol __ICFEDIT_intvec_start__ = 0x0001b000; /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = 0x0001b0c0; @@ -14,7 +11,8 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; export symbol __ICFEDIT_region_RAM_start__; export symbol __ICFEDIT_region_RAM_end__; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; define symbol __ICFEDIT_size_heap__ = 0x1800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index 06d9dbddc24..2db7508c19e 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -9,8 +9,6 @@ #define MBED_APP_SIZE 0x80000 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE - /* If softdevice is present, set aside space for it */ #if !defined(MBED_RAM_START) #if defined(SOFTDEVICE_PRESENT) @@ -40,6 +38,4 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK MBED_RAM1_START+MBED_RAM1_SIZE EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld index c37b11ae44b..e30c4f2121f 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld @@ -36,10 +36,6 @@ #endif #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - #define MBED_RAM0_START MBED_RAM_START #define MBED_RAM0_SIZE 0xE0 #define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE) @@ -236,8 +232,8 @@ SECTIONS *(.heap*); /* Expand the heap to reach the stack boundary. */ - ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE), "heap region overflowed into stack"); - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - 0x800), "heap region overflowed into stack"); + . += (ORIGIN(RAM) + LENGTH(RAM) - 0x800) - .; } > RAM PROVIDE(__heap_start = ADDR(.heap)); PROVIDE(__heap_size = SIZEOF(.heap)); @@ -251,12 +247,12 @@ SECTIONS { __StackLimit = .; *(.stack*) - . = ORIGIN(RAM) + LENGTH(RAM); + . += (ORIGIN(RAM) + LENGTH(RAM) - .); } > RAM /* Set the stack top to the end of RAM and move down the stack limit by * the size of the stack_dummy section. */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack); PROVIDE(__stack = __StackTop); } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf index f116c49455c..714b59a9e86 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf @@ -22,10 +22,6 @@ if (!isdefinedsymbol(MBED_RAM_START)) { } } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - define symbol MBED_RAM0_START = MBED_RAM_START; define symbol MBED_RAM0_SIZE = 0xE0; /* 8-byte aligned(0xDC) = 0xE0 */ define symbol MBED_RAM1_START = (MBED_RAM_START + MBED_RAM0_SIZE); @@ -45,7 +41,8 @@ export symbol __ICFEDIT_region_RAM_start__; export symbol __ICFEDIT_region_RAM_end__; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; define symbol __ICFEDIT_size_heap__ = 0x5800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct index d5101884399..57626d97146 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct @@ -20,8 +20,6 @@ #endif #endif -#define Stack_Size MBED_BOOT_STACK_SIZE - #define MBED_RAM0_START MBED_RAM_START #define MBED_RAM0_SIZE 0x100 @@ -45,6 +43,4 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK MBED_RAM1_START+MBED_RAM1_SIZE EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld index eb739c16f24..7cb1621ac61 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld @@ -25,10 +25,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 -#endif - /* If softdevice is present, set aside space for it */ #if !defined(MBED_RAM_START) #if defined(SOFTDEVICE_PRESENT) @@ -252,8 +248,8 @@ SECTIONS *(.heap*); /* Expand the heap to reach the stack boundary. */ - ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE), "heap region overflowed into stack"); - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - 0x800), "heap region overflowed into stack"); + . += (ORIGIN(RAM) + LENGTH(RAM) - 0x800) - .; } > RAM PROVIDE(__heap_start = ADDR(.heap)); PROVIDE(__heap_size = SIZEOF(.heap)); @@ -267,12 +263,12 @@ SECTIONS { __StackLimit = .; *(.stack*) - . = ORIGIN(RAM) + LENGTH(RAM); + . += (ORIGIN(RAM) + LENGTH(RAM) - .); } > RAM /* Set the stack top to the end of RAM and move down the stack limit by * the size of the stack_dummy section. */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack); PROVIDE(__stack = __StackTop); } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf index 8402657f30f..9396c998b02 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf @@ -22,10 +22,6 @@ if (!isdefinedsymbol(MBED_RAM_START)) { } } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - define symbol MBED_RAM0_START = MBED_RAM_START; define symbol MBED_RAM0_SIZE = 0x100; define symbol MBED_CRASH_REPORT_RAM_START = (MBED_RAM_START + MBED_RAM0_SIZE); @@ -49,7 +45,8 @@ export symbol __ICFEDIT_region_RAM_start__; export symbol __ICFEDIT_region_RAM_end__; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; define symbol __ICFEDIT_size_heap__ = 0x17800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct index 904338bebd6..8a9325406a9 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) ER_IROM1 0x00000000 0x40000 { ; load address = execution address @@ -14,9 +7,7 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) } ; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100 ; 32kB (0x8000) - 0x100 = 0x7F00 - RW_IRAM1 (0x10000000+0x100) (0x8000-0x100-Stack_Size) { + RW_IRAM1 (0x10000000+0x100) (0x8000-0x100) { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x10000000+0x8000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf index acce872bc87..4fa111c6f99 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf @@ -11,11 +11,8 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000FF; define symbol __ICFEDIT_region_RAM_start__ = 0x10000100; define symbol __ICFEDIT_region_RAM_end__ = 0x10007FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_301/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_301/LPC11U24.sct index bcd213ebb52..5a6e12b2405 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_301/LPC11U24.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_301/LPC11U24.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) ER_IROM1 0x00000000 0x8000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 6KB - 0xC0 = 0x1740 - RW_IRAM1 0x100000C0 0x1740-Stack_Size { + RW_IRAM1 0x100000C0 0x1740 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1740) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_401/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_401/LPC11U24.sct index 36e3a42330a..093772cc060 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_401/LPC11U24.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U24_401/LPC11U24.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) ER_IROM1 0x00000000 0x8000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40-Stack_Size { + RW_IRAM1 0x100000C0 0x1F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1F40) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U34_421/LPC11U34.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U34_421/LPC11U34.sct index 23f4dac75c2..398efab5560 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U34_421/LPC11U34.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U34_421/LPC11U34.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0xC000 { ; load region size_region (48k) ER_IROM1 0x00000000 0xC000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0xC000 { ; load region size_region (48k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40-Stack_Size { + RW_IRAM1 0x100000C0 0x1F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1F40) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U35_401/LPC11U35.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U35_401/LPC11U35.sct index edf8fb023f4..99d9a6c20de 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U35_401/LPC11U35.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U35_401/LPC11U35.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x10000 { ; load region size_region (64k) ER_IROM1 0x00000000 0x10000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0x10000 { ; load region size_region (64k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40-Stack_Size { + RW_IRAM1 0x100000C0 0x1F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1F40) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U35_501/LPC11U35.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U35_501/LPC11U35.sct index 4ea27ceb6c9..7a8a1e2451b 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U35_501/LPC11U35.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U35_501/LPC11U35.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x10000 { ; load region size_region (64k) ER_IROM1 0x00000000 0x10000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0x10000 { ; load region size_region (64k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40-Stack_Size { + RW_IRAM1 0x100000C0 0x1F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1F40) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM .ANY (IOHANDLER_RAM) } diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U37H_401/LPC11U37.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U37H_401/LPC11U37.sct index 7d37c2b52e3..ff71e26bfba 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U37H_401/LPC11U37.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U37H_401/LPC11U37.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K) ER_IROM1 0x00000000 0x10000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40-Stack_Size { + RW_IRAM1 0x100000C0 0x1F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1F40) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM .ANY (IOHANDLER_RAM) } diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U37_501/LPC11U37.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U37_501/LPC11U37.sct index 7d37c2b52e3..ff71e26bfba 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U37_501/LPC11U37.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U37_501/LPC11U37.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K) ER_IROM1 0x00000000 0x10000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40-Stack_Size { + RW_IRAM1 0x100000C0 0x1F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1F40) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM .ANY (IOHANDLER_RAM) } diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_OC_MBUINO/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_OC_MBUINO/LPC11U24.sct index bcd213ebb52..5a6e12b2405 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_OC_MBUINO/LPC11U24.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_STD/TARGET_OC_MBUINO/LPC11U24.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) ER_IROM1 0x00000000 0x8000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 6KB - 0xC0 = 0x1740 - RW_IRAM1 0x100000C0 0x1740-Stack_Size { + RW_IRAM1 0x100000C0 0x1740 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1740) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_301/LPC11U24.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_301/LPC11U24.ld index 7f4ed1e0107..4163579f64e 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_301/LPC11U24.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_301/LPC11U24.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1768 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -152,7 +146,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_401/LPC11U24.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_401/LPC11U24.ld index 2a9a6880867..83bfca86c9a 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_401/LPC11U24.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U24_401/LPC11U24.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1768 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -152,7 +146,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld index a4b155b3ac8..f320538ab77 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U34_421/LPC11U34.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 48K @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_401/LPC11U35.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_401/LPC11U35.ld index 0eb20c94099..6788470eee3 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_401/LPC11U35.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_401/LPC11U35.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 64K @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_501/LPC11U35.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_501/LPC11U35.ld index 0eb20c94099..6788470eee3 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_501/LPC11U35.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_501/LPC11U35.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 64K @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld index 0eb20c94099..6788470eee3 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U35_Y5_MBUG/LPC11U35.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 64K @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld index a819b2bbf74..24de61af486 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K @@ -151,7 +144,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37_501/LPC11U37.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37_501/LPC11U37.ld index b10a7ea25f4..22b881e017e 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37_501/LPC11U37.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37_501/LPC11U37.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPCCAPPUCCINO/LPC11U37.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPCCAPPUCCINO/LPC11U37.ld index b10a7ea25f4..22b881e017e 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPCCAPPUCCINO/LPC11U37.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPCCAPPUCCINO/LPC11U37.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_OC_MBUINO/LPC11U24.ld b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_OC_MBUINO/LPC11U24.ld index 7f4ed1e0107..4163579f64e 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_OC_MBUINO/LPC11U24.ld +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_GCC_ARM/TARGET_OC_MBUINO/LPC11U24.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1768 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -152,7 +146,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf index d3c91e89259..82211b9d2bb 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x100017DF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf index ef4ec28459a..64a361e64a0 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0xA00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf index 52f6519ece1..5a70d38b02d 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf index 001ec345195..e351413f0a7 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf index 82c6546a02a..1985c370e65 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf index dc029b0dff3..2384f52e84e 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/LPC11C24.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/LPC11C24.sct index cbe95b29340..8868823c45a 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/LPC11C24.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/LPC11C24.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) ER_IROM1 0x00000000 0x8000 { ; load address = execution address @@ -14,10 +7,8 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40-Stack_Size { + RW_IRAM1 0x100000C0 0x1F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1F40) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct index 783b0e553c6..0a7772d0c31 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) ER_IROM1 0x00000000 0x8000 { ; load address = execution address @@ -14,10 +7,8 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0xF40 - RW_IRAM1 0x100000C0 0xF40-Stack_Size { + RW_IRAM1 0x100000C0 0xF40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0xF40) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld index 4ab4ab3f03a..1019dc14848 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1114 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -147,7 +141,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld index a646cdceb99..daec21b7732 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1114 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -147,7 +141,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf index e3696147db0..ebf55e7559c 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf index 81c5b7d519c..e52023155bc 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10000FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_STD/LPC1347.sct b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_STD/LPC1347.sct index c05229658a4..2b47f77f049 100644 --- a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_STD/LPC1347.sct +++ b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_STD/LPC1347.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x10000 { ; load region size_region ER_IROM1 0x00000000 0x10000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x00000000 0x10000 { ; load region size_region } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40-Stack_Size { + RW_IRAM1 0x100000C0 0x1F40 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C0+0x1F40) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20000000 0x800 { ; RW data .ANY (AHBSRAM0) } diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/LPC1347.ld b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/LPC1347.ld index 50b2210252b..49b3149bdca 100644 --- a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/LPC1347.ld +++ b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_GCC_ARM/LPC1347.ld @@ -10,12 +10,6 @@ MEMORY USB_RAM(rwx) : ORIGIN = 0x20004000, LENGTH = 2K } -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: @@ -147,7 +141,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf index d869b4287f7..fb6b9bb2648 100644 --- a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf +++ b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf @@ -11,11 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_GCC_ARM/LPC1549.ld b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_GCC_ARM/LPC1549.ld index e0f8e19b866..49c146f426d 100644 --- a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_GCC_ARM/LPC1549.ld +++ b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_GCC_ARM/LPC1549.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1549 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -152,7 +146,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(Ram0_16) + LENGTH(Ram0_16) + LENGTH(Ram1_16) + LENGTH(Ram2_4); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf index 40ee72a0a3d..c2bf0070188 100644 --- a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf +++ b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf @@ -11,11 +11,8 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x020000FF; define symbol __ICFEDIT_region_RAM_start__ = 0x02000100; define symbol __ICFEDIT_region_RAM_end__ = 0x02008FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1200; define symbol __ICFEDIT_size_heap__ = 0x2400; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct index a2405404621..f56aae73897 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct @@ -8,12 +8,6 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM0 MBED_APP_START 0x2FC { ; load address = execution address *.o (RESET, +First) @@ -28,11 +22,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8 ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18 - RW_IRAM1 0x100000C8 0x7F18-Stack_Size { + RW_IRAM1 0x100000C8 0x7F18 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000C8+0x7F18) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x2007C000 0x4000 { ; RW data, ETH RAM .ANY (AHBSRAM0) } diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld index c1ea6ad1aa6..d7fd60e8413 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld @@ -6,13 +6,6 @@ #if !defined(MBED_APP_SIZE) #define MBED_APP_SIZE 512K #endif - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -164,7 +157,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/TARGET_XBED_LPC1768/XBED_LPC1768.ld b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/TARGET_XBED_LPC1768/XBED_LPC1768.ld index 13831d40a82..2fc036a2f55 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/TARGET_XBED_LPC1768/XBED_LPC1768.ld +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/TARGET_XBED_LPC1768/XBED_LPC1768.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1768 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -151,7 +145,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf index 5ddc375ebe7..0cea4b47c71 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf @@ -14,11 +14,8 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x100000C8; define symbol __ICFEDIT_region_RAM_end__ = 0x10007FE0; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_ARM_STD/LPC407X_8X.sct b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_ARM_STD/LPC407X_8X.sct index 23c12aef800..e24f8b1c057 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_ARM_STD/LPC407X_8X.sct +++ b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_ARM_STD/LPC407X_8X.sct @@ -1,15 +1,7 @@ -#! armcc -E - ; ************************************************************* ; *** Scatter-Loading Description File generated by uVision *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x00080000 { ; load region size_region ER_IROM1 0x00000000 0x00080000 { ; load address = execution address *.o (RESET, +First) @@ -18,11 +10,9 @@ LR_IROM1 0x00000000 0x00080000 { ; load region size_region .ANY2 (+RO-DATA) ; prioritizes DATA in IFLASH before SPIFI .ANY (+RO) ; remaining RO } - RW_IRAM1 0x100000E8 0x0000FF18-Stack_Size { ; RW data + RW_IRAM1 0x100000E8 0x0000FF18 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x100000E8+0x0000FF18) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x20000000 0x00004000 { .ANY (AHBSRAM0) } diff --git a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_GCC_ARM/LPC4088.ld b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_GCC_ARM/LPC4088.ld index a007f3fa45d..02cb7fc7e16 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_GCC_ARM/LPC4088.ld +++ b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_GCC_ARM/LPC4088.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC1768 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -151,7 +145,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf index 371129567ea..53324c750d3 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf +++ b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf @@ -11,11 +11,8 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000E7; define symbol __ICFEDIT_region_RAM_start__ = 0x100000E8; define symbol __ICFEDIT_region_RAM_end__ = 0x1000FFDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/64*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x4000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_ARM_STD/TARGET_LPC4330/LPC43xx.sct b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_ARM_STD/TARGET_LPC4330/LPC43xx.sct index 3825ff35995..8d39f7c817f 100644 --- a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_ARM_STD/TARGET_LPC4330/LPC43xx.sct +++ b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_ARM_STD/TARGET_LPC4330/LPC43xx.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x14000000 0x00400000 { ; load region size_region ER_IROM1 0x14000000 0x00400000 { ; load address = execution address @@ -14,11 +7,9 @@ LR_IROM1 0x14000000 0x00400000 { ; load region size_region } ; 8_byte_aligned(69 vect * 4 bytes) = 8_byte_aligned(0x0114) = 0x0118 ; 128KB - 0x0118 = 0x0001FEE8 - RW_IRAM1 0x10000118 0x1FEE8-Stack_Size { + RW_IRAM1 0x10000118 0x1FEE8 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x10000118+0x1FEE8) EMPTY -Stack_Size { ; stack - } RW_IRAM2 0x10080000 0x12000 { ; RW data .ANY (IRAM2) } diff --git a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_ARM_STD/TARGET_LPC4337/LPC4337.sct b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_ARM_STD/TARGET_LPC4337/LPC4337.sct index 2acea5e3003..faba17a302d 100644 --- a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_ARM_STD/TARGET_LPC4337/LPC4337.sct +++ b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_ARM_STD/TARGET_LPC4337/LPC4337.sct @@ -1,10 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE LR_IROM1 0x1A000000 0x00080000 { ; load region size_region ER_IROM1 0x1A000000 0x00080000 { ; load address = execution address @@ -17,12 +10,9 @@ LR_IROM1 0x1A000000 0x00080000 { ; load region size_region ; } ; 8_byte_aligned(69 vect * 4 bytes) = 8_byte_aligned(0x0114) = 0x0118 - RW_IRAM1 0x10000000+0x118 0x8000-0x118-Stack_Size { + RW_IRAM1 0x10000000+0x118 0x8000-0x118 { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x10000000+0x8000) EMPTY -Stack_Size { ; stack - } - ; RW_IRAM2 0x10080000 0xA000 { ; RW data ; .ANY (IRAM2) ; } diff --git a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_GCC_ARM/LPC4330.ld b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_GCC_ARM/LPC4330.ld index 5c6f2cc06c0..d8b3dac426a 100644 --- a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_GCC_ARM/LPC4330.ld +++ b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_GCC_ARM/LPC4330.ld @@ -1,11 +1,5 @@ /* Linker script for mbed LPC4330 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -153,7 +147,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM1) + LENGTH(RAM1); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf index 5ed1599b485..cc12f1bad07 100644 --- a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf +++ b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf @@ -20,11 +20,8 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_ define region AHB_RAM_region = mem:[from _AHB_RAM_start__ to _AHB_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_GCC_ARM/LPC812.ld b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_GCC_ARM/LPC812.ld index 91a19902dbe..0158f680b09 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_GCC_ARM/LPC812.ld +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_GCC_ARM/LPC812.ld @@ -1,17 +1,13 @@ /* Linker script for mbed LPC812-GCC-ARM based on LPC824.ld */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { /* Define each memory region */ FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x4000 /* 16K bytes */ RAM (rwx) : ORIGIN = 0x10000000+0xC0, LENGTH = 0x1000-0xC0 /* 4K bytes */ + + } /* Linker script to place sections and symbol values. Should be used together @@ -147,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf index 51713a8e07e..328cbc30c34 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf @@ -11,10 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10000FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_GCC_ARM/LPC810.ld b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_GCC_ARM/LPC810.ld index 2537d9e576f..57dd2f9a16f 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_GCC_ARM/LPC810.ld +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_GCC_ARM/LPC810.ld @@ -1,17 +1,13 @@ /* Linker script for mbed LPC810-GCC-ARM based on LPC824.ld */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { /* Define each memory region */ FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x1000 /* 4K bytes */ RAM (rwx) : ORIGIN = 0x10000000+0xC0, LENGTH = 0x400-0xC0 /* 1K bytes */ + + } /* Linker script to place sections and symbol values. Should be used together @@ -147,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf index 01a8eef37a1..4edf5683293 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf @@ -11,10 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x100003FF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x100; define symbol __ICFEDIT_size_heap__ = 0x200; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_GCC_ARM/LPC812.ld b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_GCC_ARM/LPC812.ld index 91a19902dbe..0158f680b09 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_GCC_ARM/LPC812.ld +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_GCC_ARM/LPC812.ld @@ -1,17 +1,13 @@ /* Linker script for mbed LPC812-GCC-ARM based on LPC824.ld */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { /* Define each memory region */ FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x4000 /* 16K bytes */ RAM (rwx) : ORIGIN = 0x10000000+0xC0, LENGTH = 0x1000-0xC0 /* 4K bytes */ + + } /* Linker script to place sections and symbol values. Should be used together @@ -147,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf index 51713a8e07e..328cbc30c34 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf @@ -11,10 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10000FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_ARM/LPC824.ld b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_ARM/LPC824.ld index 008625b3074..12b6df8ecf5 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_ARM/LPC824.ld +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_ARM/LPC824.ld @@ -1,17 +1,13 @@ /* Linker script for mbed LPC824-GCC-ARM based on LPC1114-GCC-ARM-LPC1114.ld */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { /* Define each memory region */ FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x8000 /* 32K bytes */ RAM (rwx) : ORIGIN = 0x10000000+0xC0, LENGTH = 0x2000-0xC0 /* 8K bytes */ + + } /* Linker script to place sections and symbol values. Should be used together @@ -147,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf index f5a90aace8e..16aac8518e6 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf @@ -11,10 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10001FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0xA00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_GCC_ARM/LPC824.ld b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_GCC_ARM/LPC824.ld index ce00f67d1f3..e85a372fee0 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_GCC_ARM/LPC824.ld +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_GCC_ARM/LPC824.ld @@ -1,17 +1,13 @@ /* Linker script for mbed LPC824-GCC-ARM based on LPC1114-GCC-ARM-LPC1114.ld */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { /* Define each memory region */ FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x8000 /* 32K bytes */ RAM (rwx) : ORIGIN = 0x10000000+0xC0, LENGTH = 0x2000-0xC0 /* 8K bytes */ + + } /* Linker script to place sections and symbol values. Should be used together @@ -148,7 +144,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct index 82e51500aaa..cfd54993bf2 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct @@ -76,14 +76,10 @@ #define m_sramx_size 0x00008000 /* Sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld index 178e173d344..6d63771bd05 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld @@ -80,11 +80,7 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x2000; __heap_size__ = 0x4000; HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf index f807c27d191..370570693be 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf @@ -45,11 +45,8 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +/* Heap 1/4 of ram and stack 1/8 */ +define symbol __stack_size__=0x2000; define symbol __heap_size__=0x4000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x000000E0 : 0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct index a26ffeb437b..f8bf889e7c9 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct @@ -68,14 +68,10 @@ /* USB BDT size */ #define usb_bdt_size 0x0 /* Sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld index 715e3a11907..66a5ff24282 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld @@ -48,11 +48,7 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x8000; __heap_size__ = 0xC000; HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf index b0cf9babb31..c0d6fba266b 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf @@ -43,11 +43,7 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=0x8000; define symbol __heap_size__=0xC000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct index 9ef79916618..5f6808f434f 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct @@ -96,15 +96,10 @@ #define m_data3_size 0x00040000 /* Sizes */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld index dce36027103..d621c610868 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld @@ -58,11 +58,7 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = 0x8000; __heap_size__ = 0x10000; HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf index a35ad49bdd8..f96e9c40ce9 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf @@ -91,14 +91,10 @@ define symbol m_boot_hdr_boot_data_start = 0x60001020; define symbol m_boot_hdr_dcd_data_start = 0x60001030; /* Sizes */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - if (isdefinedsymbol(__stack_size__)) { define symbol __size_cstack__ = __stack_size__; } else { - define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; + define symbol __size_cstack__ = 0x0400; } if (isdefinedsymbol(__heap_size__)) { diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_ARM/NCS36510.sct b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_ARM/NCS36510.sct index 14993975258..1ecc118de9f 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_ARM/NCS36510.sct +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_ARM/NCS36510.sct @@ -1,11 +1,5 @@ #! armcc -E -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00003000 0x0004F000 { ; load region size_region ER_IROM1 0x00003000 0x0004F000 { ; load address = execution address *.o (RESET, +First) @@ -17,8 +11,5 @@ LR_IROM1 0x00003000 0x0004F000 { ; load region size_region RW_IRAM1 0x3FFF4000 + 0x90 { ; 8_byte_aligned(35 vectors * 4 bytes each) = 0x90 .ANY(+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 8) ALIGN 8 EMPTY (0x3FFF4000 + 0xC000 - AlignExpr(ImageLimit(RW_IRAM1),8) ) {} - ARM_LIB_STACK (0x200000E0+0x00007F20) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld index d0abc01a8b6..7f3deede0fc 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_GCC_ARM/NCS36510.ld @@ -2,12 +2,6 @@ * NCS36510 ARM GCC linker script file */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FIB (rx) : ORIGIN = 0x00002000, LENGTH = 0x00000800 TRIM (rx) : ORIGIN = 0x00002800, LENGTH = 0x00000800 @@ -175,12 +169,12 @@ MEMORY { { __StackLimit = .; *(.stack*); - . += STACK_SIZE - (. - __StackLimit); + . += 0x800 - (. - __StackLimit); } > RAM /* Set stack top to end of RAM */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack); PROVIDE(__stack = __StackTop); } diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf index 4a4275752a2..6fd9f00fad1 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf @@ -29,10 +29,7 @@ define symbol __ICFEDIT_region_ERAM3_start__ = 0x0; define symbol __ICFEDIT_region_ERAM3_end__ = 0x0; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x200; define symbol __ICFEDIT_size_heap__ = 0x4000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_ARM_STD/TARGET_UNO_91H/RDA5981C.sct b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_ARM_STD/TARGET_UNO_91H/RDA5981C.sct index 5303aa1ce04..18794c81778 100644 --- a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_ARM_STD/TARGET_UNO_91H/RDA5981C.sct +++ b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_ARM_STD/TARGET_UNO_91H/RDA5981C.sct @@ -27,12 +27,6 @@ #define RDA_AHB1_BASE (0x40100000) #define RDA_MEMC_BASE (RDA_AHB1_BASE + 0x00000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; max code size: RDA_CODE_SIZE LR_IROM1 RDA_CODE_BASE RDA_CODE_SIZE { ; load region size_region ER_IROM0 RDA_CODE_BASE RDA_CODE_SIZE { ; load address = execution address @@ -43,11 +37,11 @@ LR_IROM1 RDA_CODE_BASE RDA_CODE_SIZE { ; load region size_region ; 8_byte_aligned(31 vect * 4 bytes) = 8_byte_aligned(0x7C) = 0x80 ER_IRAMVEC RDA_IRAM_BASE EMPTY 0x80 { ; Reserved for vectors } - ; IRAM Size: Total(128KB) - Vector(128B) - Stack(1KB) - RW_IRAM1 AlignExpr(+0, 8) (0x20000 - 0x80 - Stack_Size) { + ; IRAM Size: Total(128KB) - Vector(128B) - Stack(2KB) + RW_IRAM1 AlignExpr(+0, 8) (0x20000 - 0x80 - 0x800) { .ANY (+RW +ZI) } - ARM_LIB_STACK AlignExpr(+0, 8) EMPTY Stack_Size { + ARM_LIB_STACK AlignExpr(+0, 8) EMPTY (RDA_IRAM_BASE + RDA_IRAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 8)) { } ARM_LIB_HEAP RDA_DRAM_BASE EMPTY RDA_DRAM_SIZE { } diff --git a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/TARGET_UNO_91H/RDA5981C.ld b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/TARGET_UNO_91H/RDA5981C.ld index a0fc5b90355..0b482f81380 100644 --- a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/TARGET_UNO_91H/RDA5981C.ld +++ b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_GCC_ARM/TARGET_UNO_91H/RDA5981C.ld @@ -1,11 +1,5 @@ /* Linker script for mbed RDA5981C */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -154,7 +148,7 @@ SECTIONS /* Set stack top to end of IRAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(IRAM) + LENGTH(IRAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + stack exceeds RAM limit */ diff --git a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_IAR/TARGET_UNO_91H/RDA5981C.icf b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_IAR/TARGET_UNO_91H/RDA5981C.icf index 7ab0fe887cf..6972d29b3c4 100644 --- a/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_IAR/TARGET_UNO_91H/RDA5981C.icf +++ b/targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_IAR/TARGET_UNO_91H/RDA5981C.icf @@ -36,11 +36,7 @@ define symbol WLAN_BASE = RDA_MEMC_BASE + 0x19800; define symbol WLAN_END = RDA_MEMC_END; /* Stack Size & Heap Size*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol CSTACK_SIZE = MBED_BOOT_STACK_SIZE; +define symbol CSTACK_SIZE = 0x00400; define symbol HEAP_SIZE = RDA_DRAM_END - RDA_DRAM_BASE + 1; /*Memory regions*/ diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct index e76eeeb9749..835483f38d7 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Realtek Semiconductor Corp. ; ; RTL8195A ARMCC Scatter File @@ -11,12 +10,6 @@ ; DRAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M ; } -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IRAM 0x10007000 (0x70000 - 0x7000) { IMAGE2_TABLE 0x10007000 FIXED { @@ -50,7 +43,7 @@ LR_IRAM 0x10007000 (0x70000 - 0x7000) { *mbed_boot*.o (+ZI) } - ARM_LIB_STACK (0x10070000) EMPTY -Stack_Size { + ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 { } } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index 9b21748ec0b..7756a3b7c3e 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -25,12 +25,8 @@ MEMORY SRAM2 (rwx) : ORIGIN = 0x30000000, LENGTH = 2M } -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Stack sizes: */ -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = 0x1000; /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. @@ -225,7 +221,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); - __StackLimit = __StackTop - StackSize; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf index c0ae11b3cf5..abf86b9e16f 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf @@ -29,11 +29,7 @@ define region TCM_region = mem:[from __DTCM_start__ to __DTCM_end__]; define region RAM_region = mem:[from __SRAM_start__ to __SRAM_end__] | mem:[from __DRAM_start__ to __DRAM_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = 0x1000 { }; define block HEAP with alignment = 8, size = 0x19000 { }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Realtek/mbed_rtx.h b/targets/TARGET_Realtek/mbed_rtx.h index ce516af453b..96a8bc0756d 100644 --- a/targets/TARGET_Realtek/mbed_rtx.h +++ b/targets/TARGET_Realtek/mbed_rtx.h @@ -23,10 +23,21 @@ #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; - #define INITIAL_SP ((uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Base)) + extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; + #define ISR_STACK_START (unsigned char *)(Image$$ARM_LIB_STACK$$ZI$$Base) + #define ISR_STACK_SIZE (uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Length) + #define INITIAL_SP (uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Base) #elif defined(__GNUC__) - extern uint32_t __StackTop; - #define INITIAL_SP ((uint32_t)(&__StackTop)) + extern uint32_t __StackTop[]; + extern uint32_t __StackLimit[]; + extern uint32_t __HeapLimit[]; + #define INITIAL_SP (__StackTop) +#endif + +#if defined(__GNUC__) +#ifndef ISR_STACK_SIZE +#define ISR_STACK_SIZE (0x1000) +#endif #endif #endif diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct index 83042fdaf28..6470bf465f0 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F030R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000) LR_IROM1 0x08000000 0x10000 { ; load region size_region @@ -44,11 +37,9 @@ } ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x2000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld index b155897149b..320820dc39b 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_GCC_ARM/STM32F0xx.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64k @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct index 42c15faf21d..d073a4ee56c 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F030R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000) LR_IROM1 0x08000000 0x10000 { ; load region size_region @@ -44,11 +37,9 @@ } ; 45 vectors = 180 bytes (0xB4); 8-byte aligned = 0xB8 (0xB4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0xB8) (0x2000-0xB8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xB8) (0x2000-0xB8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x2000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld index bc5f51ce2c7..3264d751d23 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_GCC_ARM/STM32F030X8.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf index 5503abdb6d1..1c5f98b6f31 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf @@ -10,10 +10,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000B8; /* Add 4 more bytes after NVIC section to be aligned on 8 bytes */ define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct index 9f2dacbecca..e8afe05f150 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 32KB FLASH (0x8000) + 4KB RAM (0x1000) LR_IROM1 0x08000000 0x8000 { ; load region size_region @@ -44,11 +37,9 @@ } ; 44 vectors = 176 bytes (0xB0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xB0) (0x1000-0xB0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xB0) (0x1000-0xB0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x1000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld index 0486f7872a8..1cd304c7cd5 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_GCC_ARM/STM32F031X6.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf index e223d0e34f7..c0345cf3e83 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf @@ -9,10 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000B0; define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x200; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct index cadaefc3de4..1a52debd8a7 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_STD/stm32f0xx.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 32KB FLASH (0x8000) + 6KB RAM (0x1800) LR_IROM1 0x08000000 0x8000 { ; load region size_region @@ -44,11 +37,9 @@ } ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x1800-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x1800-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x1800) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld index 9c404b2a61a..8e3267f96ef 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_GCC_ARM/STM32F042X6.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf index 56e1098d16c..fc9e00ca528 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf @@ -9,10 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x200; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_STD/stm32f070xb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_STD/stm32f070xb.sct index 11beeead859..d6531bd0266 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_STD/stm32f070xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_STD/stm32f070xb.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F070RB: 128KB FLASH (0x20000) + 16KB RAM (0x4000) LR_IROM1 0x08000000 0x20000 { ; load region size_region @@ -44,11 +37,9 @@ } ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x4000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld index 392e842f62c..8ca1df2663a 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld @@ -1,11 +1,5 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -StackSize = MBED_BOOT_STACK_SIZE; - +StackSize = 0x400; MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128k @@ -129,7 +123,7 @@ SECTIONS *(.stack*); . += StackSize - (. - __StackLimit); } > RAM - __StackTop = ADDR(.stack) + StackSize; + __StackTop = ADDR(.stack) + SIZEOF(.stack); _estack = __StackTop; __StackLimit = ADDR(.stack); PROVIDE(__stack = __StackTop); diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf index c678211061c..32f9f4a40e5 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf @@ -9,10 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0xC00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_STD/stm32f072rb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_STD/stm32f072rb.sct index 68918057da5..e0e5a5f5aab 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_STD/stm32f072rb.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_STD/stm32f072rb.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F072RB: 128KB FLASH (0x20000) + 16KB RAM (0x4000) LR_IROM1 0x08000000 0x20000 { ; load region size_region @@ -44,11 +37,9 @@ } ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x4000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld index 392e842f62c..8ca1df2663a 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld @@ -1,11 +1,5 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -StackSize = MBED_BOOT_STACK_SIZE; - +StackSize = 0x400; MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128k @@ -129,7 +123,7 @@ SECTIONS *(.stack*); . += StackSize - (. - __StackLimit); } > RAM - __StackTop = ADDR(.stack) + StackSize; + __StackTop = ADDR(.stack) + SIZEOF(.stack); _estack = __StackTop; __StackLimit = ADDR(.stack); PROVIDE(__stack = __StackTop); diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf index 4686ab50b03..cf03740d059 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf @@ -9,10 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0xC00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_STD/stm32f091rc.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_STD/stm32f091rc.sct index 27dde4f3744..c0680f17a42 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_STD/stm32f091rc.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_STD/stm32f091rc.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F091RC: 256KB FLASH (0x40000) + 32KB RAM (0x8000) LR_IROM1 0x08000000 0x40000 { ; load region size_region @@ -44,11 +37,9 @@ } ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x8000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x8000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld index 67b46e7cc3e..6c8ba191cd5 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -StackSize = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - StackSize; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf index f781df880e0..2f8c627c702 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf @@ -9,10 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld index 54a7c34df09..cdcd68408f0 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld @@ -1,12 +1,5 @@ /* Linker script to configure memory regions. */ /* 0xEC reserved for vectors - 8byte aligned = 0xF0 */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_STD/stm32f100xb.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_STD/stm32f100xb.sct index 87c82ace310..1f5e03a2670 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_STD/stm32f100xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_STD/stm32f100xb.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) ER_IROM1 0x08000000 0x20000 { ; load address = execution address @@ -43,11 +36,9 @@ LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) } ; 77 vectors (16 core + 61 peripheral) * 4 bytes = 308 bytes to reserve (0x134) 8-byte aligned = 0x138 - RW_IRAM1 (0x20000000+0x138) (0x2000-0x138-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x138) (0x2000-0x138) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x2000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_GCC_ARM/STM32F100.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_GCC_ARM/STM32F100.ld index eee8a6cd333..4d31fd2e600 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_GCC_ARM/STM32F100.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_GCC_ARM/STM32F100.ld @@ -1,11 +1,5 @@ /* Linker script for STM32F407 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -153,7 +147,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_STD/stm32f103xb.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_STD/stm32f103xb.sct index 095042b3fa9..16e960ce80b 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_STD/stm32f103xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_STD/stm32f103xb.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) ER_IROM1 0x08000000 0x20000 { ; load address = execution address @@ -43,11 +36,9 @@ LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) } ; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0 - RW_IRAM1 (0x20000000+0xF0) (0x5000-0xF0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xF0) (0x5000-0xF0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld index 422fab01b54..4616ab17d8c 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld @@ -1,12 +1,5 @@ /* Linker script to configure memory regions. */ /* 0xEC reserved for vectors; 8-byte aligned = 0xF0 */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf index b7ff305bf21..ee8cee031e1 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf @@ -11,10 +11,8 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x200000F0 - 0x1; define symbol __ICFEDIT_region_RAM_start__ = 0x200000F0; /* 8-byte aligned (0xEC) = 0xF0 */ define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0xA00; define symbol __ICFEDIT_size_heap__ = 0x1400; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_STD/stm32f207xx.sct b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_STD/stm32f207xx.sct index cae669bfdf1..fafb7b0ef75 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_STD/stm32f207xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_STD/stm32f207xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) @@ -50,11 +44,8 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; 97 vectors * 4 bytes = 388 bytes to reserve (0x184) 8-byte aligned = 0x188 (0x184 + 0x4) - RW_IRAM1 (0x20000000+0x188) (0x00020000-0x188-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x188) (0x00020000-0x188) { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (0x20000000+0x00020000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld index a0ae3809f38..086d36a3945 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 1024k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ /* 97 vectors * 4 bytes = 388 bytes to reserve (0x184) */ /* 8-byte aligned(0x184) = 0x188 */ @@ -161,7 +155,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf index 35b8ea780eb..b82a5368cba 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf @@ -18,10 +18,9 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack: 1024B */ +/* Heap: 64kB */ +define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0xF000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_STD/stm32f302x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_STD/stm32f302x8.sct index 7557301e64d..ce981681261 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_STD/stm32f302x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_STD/stm32f302x8.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F302R8: 64KB FLASH + 16KB SRAM LR_IROM1 0x08000000 0x10000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x10000 { ; load region size_region } ; 98 vectors (16 core + 82 peripheral) * 4 bytes = 392 bytes to reserve (0x188) - RW_IRAM1 (0x20000000+0x188) (0x4000-0x188-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x188) (0x4000-0x188) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x4000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld index bd06dfafede..2df227f7531 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf index 8318b2e64ca..d1ac2d8927c 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf @@ -15,10 +15,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x800; define symbol __size_heap__ = 0x1000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_STD/stm32f303x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_STD/stm32f303x8.sct index 002d0e4f950..64a32c381d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_STD/stm32f303x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_STD/stm32f303x8.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F303K8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000) LR_IROM1 0x08000000 0x10000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x10000 { ; load region size_region } ; 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x3000-0x188-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x3000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld index 3c06bd12ca4..8c3bd23c734 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf index d0b4ec2db17..98af5cefcf8 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf @@ -19,10 +19,8 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_ define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x600; define symbol __size_heap__ = 0xC00; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_STD/stm32f303xc.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_STD/stm32f303xc.sct index 9ed05d4489e..34ec3266f7c 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_STD/stm32f303xc.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_STD/stm32f303xc.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F303VC: 256KB FLASH (0x40000) + 40KB SRAM (0xA000) LR_IROM1 0x08000000 0x40000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x40000 { ; load region size_region } ; 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0xA000-0x188-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x188) (0xA000-0x188) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0xA000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld index 4dd8ff9cd9b..fbd40b8a7f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf index 9b468b44953..a2f4b0cb49e 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf @@ -20,10 +20,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x1000; define symbol __size_heap__ = 0x2000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_STD/stm32f303xe.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_STD/stm32f303xe.sct index c1412b409fe..52790c755a8 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_STD/stm32f303xe.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_STD/stm32f303xe.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F303RE: 512KB FLASH (0x80000) + 64KB SRAM (0x10000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -52,11 +46,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x10000-0x198-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x198) (0x10000-0x198) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x10000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld index 23f4db2239f..1aa0181c2fa 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* 0x194 resevered for vectors; 8-byte aligned = 0x198 (0x194 + 0x4)*/ #ifndef MBED_APP_START #define MBED_APP_START 0x08000000 @@ -162,7 +155,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf index bce5012eced..5d04b1c5239 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf @@ -22,10 +22,8 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_ define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x2000; define symbol __size_heap__ = 0x5000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_STD/stm32f334x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_STD/stm32f334x8.sct index 43622fb79dc..ccc1af155dd 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_STD/stm32f334x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_STD/stm32f334x8.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F334x8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000) LR_IROM1 0x08000000 0x10000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x10000 { ; load region size_region } ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x3000-0x188-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x3000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld index 6d6fa44d7d4..2ab5d08c423 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf index 03dac21d287..07a3fe81f5d 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf @@ -18,10 +18,8 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x600; define symbol __size_heap__ = 0xC00; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_STD/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_STD/stm32f411re.sct index ac2e36d4e26..491087ba473 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_STD/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_STD/stm32f411re.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) ; FIRST 64 KB FLASH FOR BOOTLOADER ; REST 448 KB FLASH FOR APPLICATION @@ -46,11 +39,9 @@ LR_IROM1 0x08010000 0x70000 { ; load region size_region } ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x20000-0x198-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld index 57522772afb..2c1bc8e7972 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld @@ -1,11 +1,5 @@ /* Linker script for STM32F411 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -150,7 +144,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_IAR/stm32f411xe.icf index bf12247ac10..87e12d26bb3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_IAR/stm32f411xe.icf @@ -15,10 +15,9 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack: 4kB - 408B for vector table */ +/* Heap: 64kB */ +define symbol __size_cstack__ = 0xe68; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct index ac2e36d4e26..491087ba473 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) ; FIRST 64 KB FLASH FOR BOOTLOADER ; REST 448 KB FLASH FOR APPLICATION @@ -46,11 +39,9 @@ LR_IROM1 0x08010000 0x70000 { ; load region size_region } ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x20000-0x198-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld index 57522772afb..2c1bc8e7972 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld @@ -1,11 +1,5 @@ /* Linker script for STM32F411 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -150,7 +144,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf index bf12247ac10..87e12d26bb3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf @@ -15,10 +15,9 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack: 4kB - 408B for vector table */ +/* Heap: 64kB */ +define symbol __size_cstack__ = 0xe68; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_STD/stm32f405xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_STD/stm32f405xx.sct index 6fd79421077..c12b75bc266 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_STD/stm32f405xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_STD/stm32f405xx.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F405RG: 1024KB FLASH + 128KB SRAM LR_IROM1 0x08000000 0x100000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x100000 { ; load region size_region } ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x20000-0x188-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x188) (0x20000-0x188) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_GCC_ARM/STM32F405.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_GCC_ARM/STM32F405.ld index 6f7f90ce0fd..626ec3aafc7 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_GCC_ARM/STM32F405.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_GCC_ARM/STM32F405.ld @@ -1,11 +1,5 @@ /* Linker script for STM32F405 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -148,7 +142,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf index f1a99701aa2..24809f48a5f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf @@ -14,10 +14,8 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x4000; define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct index ac2e36d4e26..491087ba473 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) ; FIRST 64 KB FLASH FOR BOOTLOADER ; REST 448 KB FLASH FOR APPLICATION @@ -46,11 +39,9 @@ LR_IROM1 0x08010000 0x70000 { ; load region size_region } ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x20000-0x198-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld index bba863d911c..0b8beca26da 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { /* First 64kB of flash reserved for bootloader */ @@ -154,7 +147,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf index ab8a5e1a24b..1d635eea620 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf @@ -15,10 +15,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld index 78c8fe38ed4..21c36e95740 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/device/TOOLCHAIN_GCC_ARM/STM32F401XC.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_STD/stm32f401xe.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_STD/stm32f401xe.sct index 68298518b44..a79f55ed737 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_STD/stm32f401xe.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_STD/stm32f401xe.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F401RE: 512KB FLASH + 96KB SRAM LR_IROM1 0x08000000 0x80000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x80000 { ; load region size_region } ; Total: 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x18000-0x198-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x198) (0x18000-0x198) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x18000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld index d7768f84896..43dd44e1e13 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_GCC_ARM/STM32F401XE.ld @@ -1,12 +1,5 @@ /* Linker script to configure memory regions. */ /* 0x194 reserved for vectors 8-byte aligned = 0x198 (0x194 + 0x4) */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf index f1135fb8cdb..1e99eadc1e0 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf @@ -11,10 +11,8 @@ define symbol __NVIC_end__ = 0x20000197; /* to be aligned on 8 bytes define symbol __ICFEDIT_region_RAM_start__ = 0x20000198; define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x3000; define symbol __ICFEDIT_size_heap__ = 0x6000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_STD/STM32F407xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_STD/STM32F407xx.sct index c4f0bd2b4d7..7930116a814 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_STD/STM32F407xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_STD/STM32F407xx.sct @@ -1,27 +1,18 @@ -#! armcc -E ; ***************************************** ; *** Scatter-Loading Description File *** ; ***************************************** -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x08000000 0x00100000 { ; load region size_region ER_IROM1 0x08000000 0x00100000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000188 0x0001FE78-Stack_Size { + RW_IRAM1 0x20000188 0x0001FE78 { .ANY (+RW +ZI) } RW_IRAM2 0x10000000 0x00010000 { ; CCM .ANY (CCMRAM) } - ARM_LIB_STACK (0x20000188+0x0001FE78) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld index 3a7185382ff..77f8510f3bc 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_GCC_ARM/STM32F407XG.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K @@ -153,7 +146,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_IAR/stm32f407xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_IAR/stm32f407xx.icf index 74a8681bcac..a45f1590555 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_IAR/stm32f407xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_IAR/stm32f407xx.icf @@ -11,10 +11,7 @@ define symbol __NVIC_end__ = 0x20000187; define symbol __ICFEDIT_region_RAM_start__ = 0x20000188; define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x7000; define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_STD/stm32f410xb.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_STD/stm32f410xb.sct index a8cdad7637b..48df4941aea 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_STD/stm32f410xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_STD/stm32f410xb.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F410RB: 128 KB FLASH (0x20000) + 32 KB SRAM (0x8000) LR_IROM1 0x08000000 0x20000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x20000 { ; load region size_region } ; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C8) (0x8000-0x1C8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x1C8) (0x8000-0x1C8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld index 7e21b878323..5e6fc8688f4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_GCC_ARM/STM32F410xB.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf index 6f6c8ecdf8f..da9bca46226 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf @@ -15,10 +15,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x1000; define symbol __size_heap__ = 0x2000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct index 6bfeeaeae2d..a879adbb9f0 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x20000 #define MBED_VECTTABLE_RAM_START (MBED_RAM_START) @@ -64,11 +58,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld index f28ae12e22a..a206d6e250c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 512K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - M_CRASH_DATA_RAM_SIZE = 0x100; /* Linker script to configure memory regions. */ @@ -173,7 +167,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf index 1655e314dff..62f1fa3f3c9 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf @@ -25,10 +25,8 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 84kB and stack 1kB */ +define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0x15000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_STD/stm32f412xg.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_STD/stm32f412xg.sct index 2d38d9b9389..b51b0c4dfbc 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_STD/stm32f412xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_STD/stm32f412xg.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F412ZG: 1024 KB FLASH (0x100000) + 256 KB SRAM (0x40000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -52,11 +46,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 113 vectors = 452 bytes (0x1C4) 8-byte aligned = 0x1C8 (0x1C4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C8) (0x40000-0x1C8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x1C8) (0x40000-0x1C8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x40000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld index 6d4f1ca53b7..120d909daf6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_GCC_ARM/STM32F412xG.ld @@ -5,13 +5,6 @@ #if !defined(MBED_APP_SIZE) #define MBED_APP_SIZE 1024K #endif - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ /* 0x1C4 reserved for vectors; 8-byte aligned = 0x1C8 (0x1C4 + 0x4) */ MEMORY @@ -160,7 +153,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf index c4885f6c756..b50ccf7e61d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf @@ -18,10 +18,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 84kB and stack 1kB */ +define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0x15000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_STD/stm32f413xh.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_STD/stm32f413xh.sct index 61db87b1f42..927d555ac5e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_STD/stm32f413xh.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_STD/stm32f413xh.sct @@ -37,12 +37,6 @@ #define MBED_APP_SIZE 0x180000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address @@ -53,11 +47,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ; 320KB SRAM (0x50000) ; Total: 118 vectors = 472 bytes (0x1D8) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1D8) (0x50000-0x1D8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x1D8) (0x50000-0x1D8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x50000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld index fbb16e48e9f..18d5520eac6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_GCC_ARM/STM32F413xH.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 1536K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -159,7 +153,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf index 384bdb68094..ff5349b011b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf @@ -18,10 +18,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct index 0bd8941a1dc..c40a1b035ad 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x30000 #define MBED_VECTTABLE_RAM_START (MBED_RAM_START) @@ -64,15 +58,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } RW_IRAM2 (0x10000000) (0x10000) { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld index b061e3c5054..b3bb639dd70 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld @@ -1,11 +1,3 @@ -/* With the RTOS in use, this does not affect the main stack size. The size of - * the stack where main runs is determined via the RTOS. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - #if !defined(MBED_APP_START) #define MBED_APP_START 0x08000000 #endif @@ -177,7 +169,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf index a1cb68eb8a9..f62d3892c62 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf @@ -17,10 +17,8 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 89kB and stack 1kB */ +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x15C00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct index 8d39ae57ff0..a8a08b182bf 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct @@ -38,12 +38,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x30000 #define MBED_VECTTABLE_RAM_START (MBED_RAM_START) @@ -62,7 +56,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } @@ -76,7 +70,4 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region RW_IRAM3 0x40024000 4096 { ; 4 kbytes of Backup SRAM .ANY (BKPSRAM) } - - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld index ae84928bc21..4c478da2761 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld @@ -8,12 +8,6 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ /* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/ MEMORY @@ -176,7 +170,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf index c77a0759efe..34ffb23b9a1 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf @@ -19,10 +19,8 @@ define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; define symbol __ICFEDIT_region_BKPSRAM_start__ = 0x40024000; define symbol __ICFEDIT_region_BKPSRAM_end__ = 0x40024FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/2 of ram and ISR stack 4 kbytes*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x18000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct index 61527dd822b..c40a1b035ad 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x30000 #define MBED_VECTTABLE_RAM_START (MBED_RAM_START) @@ -63,16 +57,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - ; Total: 107 vectors = 428 bytes(0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data + ; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } RW_IRAM2 (0x10000000) (0x10000) { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld index d1d2f74d71c..b3bb639dd70 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld @@ -8,12 +8,6 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ /* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/ MEMORY @@ -175,7 +169,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf index d44279afd8e..abb0cf609ee 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf @@ -17,10 +17,8 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 89kB and stack 1kB */ +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x15C00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_STD/stm32f446xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_STD/stm32f446xx.sct index c0bba091f47..34db519641c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_STD/stm32f446xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_STD/stm32f446xx.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) LR_IROM1 0x08000000 0x80000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x80000 { ; load region size_region } ; Total: 113 vectors = 452 bytes (0x1C4) 8-byte aligned = 0x1C8 (0x1C4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C8) (0x20000-0x1C8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x1C8) (0x20000-0x1C8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld index 278a3a3368e..3e4a67867a1 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_GCC_ARM/STM32F446XE.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 512K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ /* 0x1C4 resevered for vectors; 8-byte aligned = 0x1C8 (0x1C4 + 0x4)*/ MEMORY @@ -160,7 +154,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_IAR/stm32f446xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_IAR/stm32f446xx.icf index 5a8d15a6feb..21f3d6be938 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_IAR/stm32f446xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_IAR/stm32f446xx.icf @@ -15,10 +15,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_STD/stm32f469xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_STD/stm32f469xx.sct index 0af41efd826..e52b92d4d54 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_STD/stm32f469xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_STD/stm32f469xx.sct @@ -35,11 +35,6 @@ #if !defined(MBED_APP_SIZE) #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE ; 2 MB FLASH (0x200000) + 320 KB SRAM (0x50000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -51,11 +46,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 109 vectors = 436 bytes (0x1B4) 8-byte aligned = 0x1B8 (0x1B4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1B8) (0x50000-0x1B8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x1B8) (0x50000-0x1B8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x50000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld index 2fdf0e4d78e..ac9dd962308 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_GCC_ARM/STM32F469XI.ld @@ -8,12 +8,6 @@ #define MBED_APP_SIZE 2M #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -160,7 +154,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_IAR/stm32f469xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_IAR/stm32f469xx.icf index 4306319ce44..548d7fa7aec 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_IAR/stm32f469xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_IAR/stm32f469xx.icf @@ -18,10 +18,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_STD/stm32f746xg.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_STD/stm32f746xg.sct index 8e9ba7becc1..2e889242075 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_STD/stm32f746xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_STD/stm32f746xg.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x50000 #define MBED_VECTTABLE_RAM_START (MBED_RAM_START) @@ -64,11 +58,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld index 75dfa94f7a8..d948e864ded 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld @@ -1,11 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - #if !defined(MBED_APP_START) #define MBED_APP_START 0x08000000 #endif @@ -174,7 +168,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf index 0eafd914168..7be08cdc485 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf @@ -29,10 +29,8 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/12 */ +define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x13000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_STD/stm32f756xg.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_STD/stm32f756xg.sct index 3c26927bf86..9a1931a564e 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_STD/stm32f756xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_STD/stm32f756xg.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32F756ZG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000) LR_IROM1 0x08000000 0x100000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x100000 { ; load region size_region } ; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C8) (0x50000-0x1C8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x1C8) (0x50000-0x1C8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x50000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld index c9f4e3064e5..442dfd6e4b9 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_GCC_ARM/STM32F756xG.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_IAR/stm32f756xg.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_IAR/stm32f756xg.icf index f94fa2e1b18..09800c02be2 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_IAR/stm32f756xg.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_IAR/stm32f756xg.icf @@ -19,10 +19,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_ITCMRAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_STD/stm32f767xi.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_STD/stm32f767xi.sct index c6f9d6583fb..c7cfd9e04a2 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_STD/stm32f767xi.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_STD/stm32f767xi.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x80000 #define MBED_VECTTABLE_RAM_START (MBED_RAM_START) @@ -64,11 +58,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld index 86784f10f9b..4d9ef183d7a 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld @@ -10,12 +10,6 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -174,7 +168,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf index 9b9ac5bba71..d405b4789dd 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf @@ -29,10 +29,7 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_STD/stm32f769xi.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_STD/stm32f769xi.sct index dfa3b23aa83..595ae7f8344 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_STD/stm32f769xi.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_STD/stm32f769xi.sct @@ -37,12 +37,6 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address @@ -53,11 +47,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ; 512KB SRAM (0x80000) ; Total: 126 vectors = 504 bytes (0x1F8 + 0 byte for 8-byte data alignment) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1F8) (0x80000-0x1F8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x1F8) (0x80000-0x1F8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x80000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld index d4d8f66db8b..2cbce701013 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_GCC_ARM/STM32F769xI.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 2048K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ /* Total: 126 vectors = 504 bytes (0x1F8 + 0 byte for 8-byte data alignment) to be reserved in RAM */ MEMORY @@ -160,7 +154,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_IAR/stm32f769xi.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_IAR/stm32f769xi.icf index 285a8f4c684..3d3437824d5 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_IAR/stm32f769xi.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_IAR/stm32f769xi.icf @@ -23,10 +23,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_ITCMRAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_STD/stm32h743xI.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_STD/stm32h743xI.sct index 6310a0cb427..044fa0353b1 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_STD/stm32h743xI.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_STD/stm32h743xI.sct @@ -39,12 +39,6 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x20000 #define MBED_VECTTABLE_RAM_START (MBED_RAM_START) @@ -65,10 +59,8 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld index 3d6a53660be..e0f9f63f362 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_GCC_ARM/STM32H743xI.ld @@ -8,12 +8,6 @@ #define MBED_APP_SIZE 2048K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - M_CRASH_DATA_RAM_SIZE = 0x100; MEMORY @@ -174,7 +168,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_IAR/stm32h743xI.icf b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_IAR/stm32h743xI.icf index 23cfdbc51cf..e9794c523ed 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_IAR/stm32h743xI.icf +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_IAR/stm32h743xI.icf @@ -1,7 +1,6 @@ // 2MB FLASH (0x200000) if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } define symbol __intvec_start__ = MBED_APP_START; define symbol __region_ROM_start__ = MBED_APP_START; @@ -28,7 +27,7 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; // Stack and Heap -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x400; // 1KB define symbol __size_heap__ = 0x10000; // 64KB define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_STD/stm32l031k6.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_STD/stm32l031k6.sct index cc8e340667b..dc8e7b2b03d 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_STD/stm32l031k6.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_STD/stm32l031k6.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32L031K6: 32KB FLASH (0x8000) + 8KB RAM (0x2000) LR_IROM1 0x08000000 0x8000 { ; load region size_region @@ -44,10 +37,8 @@ LR_IROM1 0x08000000 0x8000 { ; load region size_region } ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x2000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld index 7e248173681..bbd78791ad0 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_GCC_ARM/STM32L031K6.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_IAR/stm32l031xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_IAR/stm32l031xx.icf index c8737e27f4d..c2d7fcf1372 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_IAR/stm32l031xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_IAR/stm32l031xx.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_STD/stm32l073xz.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_STD/stm32l073xz.sct index bf38472ed79..c4e915ba952 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_STD/stm32l073xz.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_STD/stm32l073xz.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32L073RZ: 192KB FLASH (0x30000) + 20KB RAM (0x5000) LR_IROM1 0x08000000 0x30000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x30000 { ; load region size_region } ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld index 17d8f130195..615cdb4d278 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 192k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf index e59bd8f2d2c..65a11a2b35a 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x500; define symbol __size_heap__ = 0x1000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_STD/stm32l053x8.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_STD/stm32l053x8.sct index a8b89054c11..b805786e524 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_STD/stm32l053x8.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_STD/stm32l053x8.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 64KB FLASH (0x10000) + 8KB RAM (0x2000) LR_IROM1 0x08000000 0x10000 { ; load region size_region @@ -44,10 +37,8 @@ LR_IROM1 0x08000000 0x10000 { ; load region size_region } ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x2000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld index b8a6b0814ec..b1e6668376f 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf index 5fba864597e..96e6cf2b5d5 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_STD/stm32l072xz.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_STD/stm32l072xz.sct index 3d54e458802..384ce7e0754 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_STD/stm32l072xz.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_STD/stm32l072xz.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32L072CZ: 192KB FLASH (0x30000) + 20KB RAM (0x5000) LR_IROM1 0x08000000 0x30000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x30000 { ; load region size_region } ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld index 17d8f130195..615cdb4d278 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 192k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf index e59bd8f2d2c..65a11a2b35a 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x500; define symbol __size_heap__ = 0x1000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM_STD/stm32l082xZ.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM_STD/stm32l082xZ.sct index 2de88aff330..f9072ecd8b0 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM_STD/stm32l082xZ.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM_STD/stm32l082xZ.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ;192KB FLASH (0x30000) + 20KB RAM (0x5000) LR_IROM1 0x08000000 0x30000 { ; load region size_region @@ -44,10 +37,8 @@ LR_IROM1 0x08000000 0x30000 { ; load region size_region } ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld index 17d8f130195..615cdb4d278 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 192k @@ -152,7 +145,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_IAR/stm32l082xZ.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_IAR/stm32l082xZ.icf index 9308b366c47..487fd88b238 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_IAR/stm32l082xZ.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_IAR/stm32l082xZ.icf @@ -16,10 +16,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/stm32l152rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/stm32l152rc.sct index 227863ac5cd..11dc550c084 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/stm32l152rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/stm32l152rc.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32L152RC: 256KB FLASH + 32KB SRAM LR_IROM1 0x08000000 0x40000 { ; load region size_region @@ -44,11 +37,9 @@ LR_IROM1 0x08000000 0x40000 { ; load region size_region } ; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x8000-0x128-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x128) (0x8000-0x128) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld index ab8ad3f5071..09025e161f4 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { /* 256KB FLASH, 32KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292 @@ -156,7 +149,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf index 6af15b93f3a..aed878fb05b 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf @@ -15,10 +15,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x800; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct index 7d19f13b729..02a0808aac2 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct @@ -36,11 +36,6 @@ #define MBED_APP_SIZE 0x40000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE ; STM32L151RC: 256KB FLASH + 32KB SRAM LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -52,11 +47,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; 73 vectors = 292 bytes (0x124) + 0x4(8-byte aligned) to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x8000-0x128-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x128) (0x8000-0x128) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld index 42fe23dc21a..12fab7b9c0b 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld @@ -6,13 +6,6 @@ #if !defined(MBED_APP_SIZE) #define MBED_APP_SIZE 256k #endif - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { /* 256KB FLASH, 32KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292 @@ -163,7 +156,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_IAR/stm32l152xc.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_IAR/stm32l152xc.icf index 27b7a51140e..ebf7478802d 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_IAR/stm32l152xc.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_IAR/stm32l152xc.icf @@ -17,10 +17,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x800; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_STD/stm32l151cba.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_STD/stm32l151cba.sct index a542c6a2138..624f4e4c9a0 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_STD/stm32l151cba.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_STD/stm32l151cba.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32L151CB: 128KB FLASH + 32KB SRAM LR_IROM1 0x08000000 0x20000 { ; load region size_region @@ -44,10 +37,9 @@ LR_IROM1 0x08000000 0x20000 { ; load region size_region } ; 61 vectors = 244 bytes (0xF4) 8-byte aligned = 0xF8 (0xF4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0xF8) (0x8000-0xF8-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0xF8) (0x8000-0xF8) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } + } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld index 16fc655ca7a..b0eac7f0f0d 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_GCC_ARM/STM32L151XB-A.ld @@ -1,11 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { /* 128KB FLASH, 32KB RAM, Reserve up till 0xF4. There are 61 vectors = 244 @@ -155,7 +149,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_IAR/stm32l152xba.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_IAR/stm32l152xba.icf index bf7fd0bc684..39322043836 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_IAR/stm32l152xba.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_IAR/stm32l152xba.icf @@ -17,10 +17,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x800; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_STD/stm32l152re.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_STD/stm32l152re.sct index e2f425b5c5c..d3c24018fab 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_STD/stm32l152re.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_STD/stm32l152re.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32L152RE: 512KB FLASH + 80KB SRAM LR_IROM1 0x08000000 0x80000 { ; load region size_region @@ -44,10 +37,9 @@ LR_IROM1 0x08000000 0x80000 { ; load region size_region } ; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4)to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x14000-0x128-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x128) (0x14000-0x128) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x14000) EMPTY -Stack_Size { ; stack - } + } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld index 9ee4dacb462..eb8e838fefd 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { /* 512KB FLASH, 80KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292 @@ -156,7 +149,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf index 4e8a8b2c8ec..9e1721e17c0 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf @@ -15,10 +15,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __size_cstack__ = 0x2800; define symbol __size_heap__ = 0x5000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct index 9e55e1a4f6c..46d110fc096 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct @@ -1,4 +1,3 @@ -#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -28,12 +27,6 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; STM32L151RC: 256KB FLASH + 32KB SRAM LR_IROM1 0x08000000 0x40000 { ; load region size_region @@ -47,7 +40,6 @@ LR_IROM1 0x08000000 0x40000 { ; load region size_region RW_IRAM1 (0x20000000+0x128) (0x8000-0x128) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } + } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld index 416cf2ae25c..c7d7209517b 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld @@ -1,11 +1,5 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { /* 256KB FLASH, 32KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292 @@ -156,7 +150,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct index 61f3ebda2a2..3d94b6cfc61 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_STD/stm32l151rc.sct @@ -36,11 +36,6 @@ #define MBED_APP_SIZE 0x40000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE ; STM32L151RC: 256KB FLASH + 32KB SRAM LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -52,11 +47,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x8000-0x128-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x128) (0x8000-0x128) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld index 7b598b8ca72..d92d6f1e94d 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld @@ -6,13 +6,6 @@ #if !defined(MBED_APP_SIZE) #define MBED_APP_SIZE 256k #endif - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { /* 256KB FLASH, 32KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292 @@ -163,7 +156,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf index 27b7a51140e..ebf7478802d 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf @@ -17,10 +17,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x800; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_STD/stm32l471xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_STD/stm32l471xx.sct index e658a649009..a657759b32f 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_STD/stm32l471xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_STD/stm32l471xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -51,7 +45,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RO) } - RW_IRAM1 0x20000000 0x00018000-Stack_Size { ; RW data 96k L4-SRAM1 + RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1 .ANY (+RW +ZI) } ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM @@ -59,7 +53,5 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x00018000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld index b98d61b39c1..29e7cc1c29f 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 1024k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -165,7 +159,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM2) + LENGTH(SRAM2); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if stack exceeds RAM2 limit */ ASSERT((ORIGIN(SRAM2)+LENGTH(SRAM2)) >= __StackLimit, "SRAM2 overflow") diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_IAR/stm32l471xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_IAR/stm32l471xx.icf index c6abd82c7ef..5bbc6a9a428 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_IAR/stm32l471xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_IAR/stm32l471xx.icf @@ -21,11 +21,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack 1K of SRAM2 and Heap 1/3 of SRAM1 */ +define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_STD/stm32l432xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_STD/stm32l432xx.sct index dd4573a4305..53e420abbe4 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_STD/stm32l432xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_STD/stm32l432xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x40000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 256KB FLASH (0x40000) + 64KB SRAM (0x10000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -52,10 +46,8 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x00010000-0x188-Stack_Size) { + RW_IRAM1 (0x20000000+0x188) (0x00010000-0x188) { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x00010000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld index faca70fce77..34f44d070a8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 256k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -159,7 +153,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf index f3d08f6742b..af8181c9337 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf @@ -18,11 +18,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x2000; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_STD/stm32l433xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_STD/stm32l433xx.sct index dd4573a4305..53e420abbe4 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_STD/stm32l433xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_STD/stm32l433xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x40000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 256KB FLASH (0x40000) + 64KB SRAM (0x10000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -52,10 +46,8 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x00010000-0x188-Stack_Size) { + RW_IRAM1 (0x20000000+0x188) (0x00010000-0x188) { .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x00010000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld index faca70fce77..34f44d070a8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 256k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -159,7 +153,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf index f3d08f6742b..af8181c9337 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf @@ -18,11 +18,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x2000; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM_STD/stm32l443xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM_STD/stm32l443xx.sct index 333a9d22b35..782db80c8bc 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM_STD/stm32l443xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM_STD/stm32l443xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x40000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 256KB FLASH (0x40000) + 48KB SRAM (0xC000) + 16KB SRAM (0x4000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -51,7 +45,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RO) } - RW_IRAM1 0x20000000 0x0000C000-Stack_Size { ; RW data 48k L4-SRAM1 + RW_IRAM1 0x20000000 0x0000C000 { ; RW data 48k L4-SRAM1 .ANY (+RW +ZI) } @@ -59,6 +53,5 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region RW_IRAM2 (0x10000000+0x190) (0x04000-0x190) { ; RW data 16k L4-ECC-SRAM2 retained in standby .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x0000C000) EMPTY -Stack_Size { ; stack - } + } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld index 48a5645a461..41118c11a3d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 256k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ /* 0x18C resevered for vectors; 8-byte aligned = 0x190 (0x18C + 0x4)*/ MEMORY @@ -161,7 +155,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_IAR/stm32l443xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_IAR/stm32l443xx.icf index 5f1b0f29bf3..bb01f3f8d56 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_IAR/stm32l443xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_IAR/stm32l443xx.icf @@ -21,11 +21,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack 1/8 and Heap 1/4 of RAM */ +define symbol __size_cstack__ = 0x2000; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_STD/stm32l475xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_STD/stm32l475xx.sct index 6784b9754e5..c9cc382a289 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_STD/stm32l475xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_STD/stm32l475xx.sct @@ -43,11 +43,6 @@ #define MBED_RAM0_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) #define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE ; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -59,14 +54,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size { ; RW data 96k L4-SRAM1 + RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE { ; RW data 96k L4-SRAM1 .ANY (+RW +ZI) } ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } + } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld index 85a8427822a..f4f4573fad3 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 1024k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - M_CRASH_DATA_RAM_SIZE = 0x100; /* Linker script to configure memory regions. */ @@ -179,7 +173,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM2) + LENGTH(SRAM2); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if stack exceeds RAM2 limit */ ASSERT((ORIGIN(SRAM2)+LENGTH(SRAM2)) >= __StackLimit, "SRAM2 overflow") diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf index 864e944e7ba..91af035074a 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf @@ -28,11 +28,8 @@ define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__; define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack complete SRAM2 and Heap 2/3 of SRAM1 */ +define symbol __size_cstack__ = 0x7e00; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct index 19355d7e946..43ed3d0b1a2 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct @@ -43,12 +43,6 @@ #define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) #define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -61,7 +55,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size { ; RW data 96k L4-SRAM1 + RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE { ; RW data 96k L4-SRAM1 .ANY (+RW +ZI) } @@ -70,8 +64,5 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack - } - } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld index 14f1c4574a1..f3bbe032720 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld @@ -8,12 +8,6 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -179,7 +173,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM2) + LENGTH(SRAM2); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if stack exceeds RAM2 limit */ ASSERT((ORIGIN(SRAM2)+LENGTH(SRAM2)) >= __StackLimit, "SRAM2 overflow") diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf index 864e944e7ba..91af035074a 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf @@ -28,11 +28,8 @@ define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__; define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack complete SRAM2 and Heap 2/3 of SRAM1 */ +define symbol __size_cstack__ = 0x7e00; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_STD/stm32l486xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_STD/stm32l486xx.sct index e658a649009..a657759b32f 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_STD/stm32l486xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_STD/stm32l486xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -51,7 +45,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RO) } - RW_IRAM1 0x20000000 0x00018000-Stack_Size { ; RW data 96k L4-SRAM1 + RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1 .ANY (+RW +ZI) } ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM @@ -59,7 +53,5 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x00018000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld index d593270e7a5..e543d8a6bf6 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 1024k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -165,7 +159,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM2) + LENGTH(SRAM2); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if stack exceeds RAM2 limit */ ASSERT((ORIGIN(SRAM2)+LENGTH(SRAM2)) >= __StackLimit, "SRAM2 overflow") diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf index 26cd40fd8c2..d0c68bf6115 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf @@ -21,11 +21,8 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack complete SRAM2 and Heap 2/3 of SRAM1 */ +define symbol __size_cstack__ = 0x7e00; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_STD/stm32l496xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_STD/stm32l496xx.sct index 95c49775333..46326f0494f 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_STD/stm32l496xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_STD/stm32l496xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 1MB FLASH (0x100000) + 320KB SRAM (0x50000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -52,11 +46,8 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 107 vectors = 428 bytes (0x1AC); 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1B0) (0x50000-0x1B0-Stack_Size) { ; RW data 320k L4-SRAM1 + RW_IRAM1 (0x20000000+0x1B0) (0x50000-0x1B0) { ; RW data 320k L4-SRAM1 .ANY (+RW +ZI) } - - ARM_LIB_STACK (0x20000000+0x50000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld index cadf9e62b67..ba62f3f5eb5 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld @@ -8,12 +8,6 @@ #define MBED_APP_SIZE 1024k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -160,7 +154,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf index 64f21bb0e08..1476d296f1a 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf @@ -18,11 +18,8 @@ define memory mem with size = 4G; define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +/* Stack 1/8 and Heap 1/4 of RAM */ +define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0xa000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_STD/stm32l4r5xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_STD/stm32l4r5xx.sct index f0e40746b70..9e4682684e8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_STD/stm32l4r5xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_STD/stm32l4r5xx.sct @@ -36,12 +36,6 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; 2MB FLASH (0x200000) + 640KB SRAM (0xA0000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -52,9 +46,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region } ; Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C0) (0xA0000-0x1C0-Stack_Size) { ; RW data + RW_IRAM1 (0x20000000+0x1C0) (0xA0000-0x1C0) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0xA0000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld index 482b36373af..6f0e8a3663b 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld @@ -6,12 +6,6 @@ #define MBED_APP_SIZE 2048K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ /* Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM */ MEMORY @@ -160,7 +154,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf index e81823dd834..69eae322e83 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf @@ -20,10 +20,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = 0x400; /* 1KB */ define symbol __size_heap__ = 0x20000; /* 128KB */ define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct index 0e4e9274ecb..ce41a9ad0e5 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct @@ -11,23 +11,14 @@ #define MBED_APP_SIZE 0x00100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000E0 0x0001FF20-Stack_Size { ; RW data + RW_IRAM1 0x200000E0 0x0001FF20 { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (0x200000E0+0x0001FF20) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld index d18bab27390..e1c8092a463 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld @@ -9,6 +9,12 @@ /* Version 4.2.0 */ /* */ +/* With the RTOS in use, this does not affect the main stack size. The size of + * the stack where main runs is determined via the RTOS. */ +STACK_SIZE = 0x400; + +HEAP_SIZE = 0x6000; + #if !defined(MBED_APP_START) #define MBED_APP_START 0x00000000 #endif @@ -17,16 +23,6 @@ #define MBED_APP_SIZE 1048576 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -/* With the RTOS in use, this does not affect the main stack size. The size of - * the stack where main runs is determined via the RTOS. */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; - -HEAP_SIZE = 0x6000; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -224,7 +220,7 @@ SECTIONS __end__ = .; end = __end__; _end = __end__; - . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; + . += HEAP_SIZE; __HeapLimit = .; } > RAM diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf index 0865faf2f98..e57dada035e 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x200000DF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000E0; define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x4000; define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct index ac1f199c478..796307249bf 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct @@ -11,23 +11,14 @@ #define MBED_APP_SIZE 0x00200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000158 0x0007FEA8-Stack_Size { ; RW data + RW_IRAM1 0x20000158 0x0007FEA8 { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (0x20000158+0x0007FEA8) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld index 588b65e2d07..699f40b12ac 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -218,7 +212,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf index dd7b1ce3370..25d996e133a 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00200000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x20000157; define symbol __ICFEDIT_region_RAM_start__ = 0x20000158; define symbol __ICFEDIT_region_RAM_end__ = 0x2007FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x4000; define symbol __ICFEDIT_size_heap__ = 0x10000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld index 24fdde536a4..ffca89e3694 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_GCC_ARM/efm32hg.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 65536 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -219,7 +213,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf index caa587a1fc7..22c8439dfe4 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00010000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x20000097; define symbol __ICFEDIT_region_RAM_start__ = 0x20000098; define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32lg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32lg.sct index c192c445a2e..3f502bbc807 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32lg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32lg.sct @@ -11,22 +11,14 @@ #define MBED_APP_SIZE 0x00040000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000E0 0x00007F20-Stack_Size { ; RW data + RW_IRAM1 0x200000E0 0x00007F20 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x200000E0+0x00007F20) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld index 38f59ce7ccf..3ccec3d81f3 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32lg.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 262144 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -218,7 +212,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_IAR/efm32lg990f256.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_IAR/efm32lg990f256.icf index 6dd58b14c97..a21c1364c8a 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_IAR/efm32lg990f256.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_IAR/efm32lg990f256.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00040000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x200000DF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000E0; define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32pg1b.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32pg1b.sct index 3c18ce94aba..5019826e415 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32pg1b.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32pg1b.sct @@ -11,22 +11,14 @@ #define MBED_APP_SIZE 0x00040000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000C8 0x00007F38-Stack_Size { ; RW data + RW_IRAM1 0x200000C8 0x00007F38 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x200000C8+0x00007F38) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld index 75987e0ff35..cc78895a91d 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32pg1b.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 262144 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -218,7 +212,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_IAR/efm32pg1b200f256.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_IAR/efm32pg1b200f256.icf index 7e6d3c981ae..66e60ebbd60 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_IAR/efm32pg1b200f256.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_IAR/efm32pg1b200f256.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00040000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x200000C7; define symbol __ICFEDIT_region_RAM_start__ = 0x200000C8; define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_ARM_STD/efr32pg12b.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_ARM_STD/efr32pg12b.sct index 19e3a95f559..b06400e44d3 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_ARM_STD/efr32pg12b.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_ARM_STD/efr32pg12b.sct @@ -11,22 +11,14 @@ #define MBED_APP_SIZE 0x00100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000110 0x0003FEF0-Stack_Size { ; RW data + RW_IRAM1 0x20000110 0x0003FEF0 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000110+0x0003FEF0) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld index 5be3187ccbf..6ddce742880 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_GCC_ARM/efm32pg12b.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 1048576 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -218,7 +212,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf index c2f4d74faac..2a914564f2b 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf @@ -5,7 +5,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -19,7 +18,7 @@ define symbol __ICFEDIT_region_RAM_end__ = (0x20000000+0x00040000-1); /*-Sizes-*/ if ( !isdefinedsymbol( __ICFEDIT_size_cstack__ ) ) -{ define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; } +{ define symbol __ICFEDIT_size_cstack__ = 0x1000; } if ( !isdefinedsymbol( __ICFEDIT_size_heap__ ) ) { define symbol __ICFEDIT_size_heap__ = 0x4000; } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32wg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32wg.sct index c192c445a2e..3f502bbc807 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32wg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_STD/efm32wg.sct @@ -11,22 +11,14 @@ #define MBED_APP_SIZE 0x00040000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000E0 0x00007F20-Stack_Size { ; RW data + RW_IRAM1 0x200000E0 0x00007F20 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x200000E0+0x00007F20) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld index 7d1ceb1052f..61dd3871f32 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_GCC_ARM/efm32wg.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 262144 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -219,7 +213,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_IAR/efm32wg990f256.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_IAR/efm32wg990f256.icf index 6dd58b14c97..a21c1364c8a 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_IAR/efm32wg990f256.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_IAR/efm32wg990f256.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00040000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x200000DF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000E0; define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld index f114bb80cb3..22568ec19d9 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_GCC_ARM/efm32zg.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 32768 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -219,7 +213,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf index ae582b33f37..2ece65a90e8 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00008000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x2000008F; define symbol __ICFEDIT_region_RAM_start__ = 0x20000090; define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x200; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_ARM_STD/efr32mg1p.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_ARM_STD/efr32mg1p.sct index 9d81efe1619..c9854363ddc 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_ARM_STD/efr32mg1p.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_ARM_STD/efr32mg1p.sct @@ -11,22 +11,14 @@ #define MBED_APP_SIZE 0x00040000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000C8 0x00007B38-Stack_Size { ; RW data + RW_IRAM1 0x200000C8 0x00007B38 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x200000C8+0x00007B38) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld index 081ed72d8b3..ad8928f16da 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_GCC_ARM/efr32mg1p.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 262144 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -218,7 +212,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf index ea5153ba175..851459f5e95 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00040000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x200000C7; define symbol __ICFEDIT_region_RAM_start__ = 0x200000C8; define symbol __ICFEDIT_region_RAM_end__ = 0x20007BFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x1000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct index 19e3a95f559..b06400e44d3 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct @@ -11,22 +11,14 @@ #define MBED_APP_SIZE 0x00100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000110 0x0003FEF0-Stack_Size { ; RW data + RW_IRAM1 0x20000110 0x0003FEF0 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000110+0x0003FEF0) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld index 2b5adb147bf..8ab03636c68 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld @@ -17,12 +17,6 @@ #define MBED_APP_SIZE 1048576 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -218,7 +212,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf index 35d609b9b80..fd26aeb5729 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf @@ -4,7 +4,6 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +15,8 @@ define symbol __NVIC_end__ = 0x2000010F; define symbol __ICFEDIT_region_RAM_start__ = 0x20000110; define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x4000; define symbol __ICFEDIT_size_heap__ = 0x10000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_ARM_STD/tmpm066fwug.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_ARM_STD/tmpm066fwug.sct index 35409d4fa02..2fbf781aaa8 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_ARM_STD/tmpm066fwug.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_ARM_STD/tmpm066fwug.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;; TMPM066FWUG scatter file ;; Vector table starts at 0 @@ -15,12 +13,6 @@ ;; Compatible with ISSM model -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x20000 { ER_IROM1 0x00000000 0x20000 @@ -33,11 +25,8 @@ LR_IROM1 0x00000000 0x20000 } /* 8_byte_aligned(32 + 16 vect * 4 bytes) = 8_byte_aligned(0xC0) */ - RW_IRAM1 0x200000C0 (0x4000 - 0xC0 - Stack_Size) + RW_IRAM1 0x200000C0 (0x4000 - 0xC0) { .ANY (+RW, +ZI) } - - ARM_LIB_STACK (0x200000C0+0x4000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld index 0ed9efb0b17..6d5243259c7 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_GCC_ARM/tmpm066fwug.ld @@ -1,11 +1,5 @@ /* Linker script for Toshiba TMPM066 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -148,7 +142,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_IAR/tmpm066fwug.icf b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_IAR/tmpm066fwug.icf index f0868f8f665..901c3a86ecc 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_IAR/tmpm066fwug.icf +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_IAR/tmpm066fwug.icf @@ -9,10 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0001FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0xC00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_ARM_STD/tmpm3h6fwfg.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_ARM_STD/tmpm3h6fwfg.sct index c6f1a37059b..6727537c50f 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_ARM_STD/tmpm3h6fwfg.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_ARM_STD/tmpm3h6fwfg.sct @@ -1,5 +1,3 @@ -#! armcc -E - ;; TMPM3H6FWFG scatter file ;; Vector table starts at 0 @@ -15,12 +13,6 @@ ;; Compatible with ISSM model -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x20000 { ER_IROM1 0x00000000 0x20000 @@ -30,11 +22,8 @@ LR_IROM1 0x00000000 0x20000 .ANY (+RO) } ; 8_byte_aligned(117 + 16 vect * 4 bytes) = 8_byte_aligned(0x214) = 0x218 - RW_IRAM1 (0x20000000 + 0x218) (0x4000 - 0x218 - Stack_Size) + RW_IRAM1 (0x20000000 + 0x218) (0x4000 - 0x218) { .ANY (+RW, +ZI) } - - ARM_LIB_STACK (0x20000000+0x4000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld index 0a81b83f213..e9896929678 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_GCC_ARM/tmpm3h6fwfg.ld @@ -1,11 +1,5 @@ /* Linker script for Toshiba TMPM3H6 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -160,7 +154,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_IAR/tmpm3h6fwfg.icf b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_IAR/tmpm3h6fwfg.icf index 246835bf9bf..af636572aa4 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_IAR/tmpm3h6fwfg.icf +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3H6/device/TOOLCHAIN_IAR/tmpm3h6fwfg.icf @@ -9,10 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0001FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x20000218; /* 8_byte_aligned(117 + 16 vect * 4 bytes) */ define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0xC00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct index 41a573521d6..a4559005aa8 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct @@ -23,12 +23,6 @@ #define MBED_APP_SIZE 0x00080000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 MBED_APP_START MBED_APP_SIZE { ER_IROM1 MBED_APP_START MBED_APP_SIZE @@ -38,11 +32,8 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE .ANY (+RO) } - RW_IRAM1 0x200002D8 (0x10000 - 0x2D8 - Stack_Size) + RW_IRAM1 0x200002D8 (0x10000 - 0x2D8) { .ANY (+RW, +ZI) } - - ARM_LIB_STACK (0x200002D8+0x10000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld index e344d5a2690..9c31b0d5a0c 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld @@ -8,12 +8,6 @@ #define MBED_APP_SIZE 512K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ MEMORY { @@ -168,7 +162,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf b/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf index e1606455591..51b63e1d797 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM3HQ/device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf @@ -13,10 +13,7 @@ define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __ICFEDIT_region_RAM_start__ = 0x200002D8; define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; /*Heap 1/4 of ram and stack 1/8*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct index 0c4f778de90..8f0071a1c11 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct @@ -22,12 +22,6 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; TMPM46B: 1024 KB FLASH (0x100000) + 512 KB SRAM (0x80000) LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region @@ -39,12 +33,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region .ANY (+RO) } - RW_IRAM1 0x200001E0 (0x80000 - 0x1E0 - Stack_Size) + RW_IRAM1 0x200001E0 (0x80000 - 0x1E0) { tmpm46b_fc.o(+RO) .ANY (+RW, +ZI) } - - ARM_LIB_STACK (0x200001E0+0x80000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld index b8be45b1834..9f9d4ad6ca6 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld @@ -1,11 +1,5 @@ /* Linker script for Toshiba TMPM46B */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - /* Linker script to configure memory regions. */ #if !defined(MBED_APP_START) @@ -205,7 +199,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_IAR/tmpm46bf10fg.icf b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_IAR/tmpm46bf10fg.icf index 05f4aacdbed..dcc4f03fbdf 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_IAR/tmpm46bf10fg.icf +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_IAR/tmpm46bf10fg.icf @@ -13,10 +13,8 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2006FFFF; define symbol __ICFEDIT_region_BRAM_start__ = 0x20070000; define symbol __ICFEDIT_region_BRAM_end__ = 0x200807FF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x10000; define symbol __ICFEDIT_size_heap__ = 0x20000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct index 74f7394e479..83d49bdb2ef 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct @@ -22,12 +22,6 @@ #define MBED_APP_SIZE 0x000180000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; TMPM4G9: 1536 KB FLASH (0x180000) + 192 KB SRAM (0x30000) LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region @@ -39,12 +33,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region .ANY (+RO) } - RW_IRAM1 0x20000320 (0x30000 - 0x320 - Stack_Size) + RW_IRAM1 0x20000320 (0x30000 - 0x320) { tmpm4g9_fc.o (+RO) .ANY (+RW, +ZI) } - - ARM_LIB_STACK (0x20000320+0x30000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld index 477899397a1..d2489831844 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld @@ -10,12 +10,6 @@ #define MBED_APP_SIZE 0x180000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE @@ -205,7 +199,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf index 49be9c171b3..e79c3b90b34 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf @@ -13,10 +13,8 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; define symbol __ICFEDIT_region_BRAM_start__ = 0x20030000; define symbol __ICFEDIT_region_BRAM_end__ = 0x200307FF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x0400; define symbol __ICFEDIT_size_heap__ = 0x6000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct b/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct index d0e8c1b2a2b..007ecd61c10 100644 --- a/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct +++ b/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_ARM_STD/tmpm3hqfdfg.sct @@ -1,4 +1,3 @@ -#! armcc -E ;; TMPM3HQFDFG scatter file ;; Vector table starts at 0 @@ -14,12 +13,6 @@ ;; Compatible with ISSM model -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x80000 { ER_IROM1 0x00000000 0x80000 @@ -33,7 +26,4 @@ LR_IROM1 0x00000000 0x80000 { .ANY (+RW, +ZI) } - - ARM_LIB_STACK 0x200002D8+0x10000 EMPTY -Stack_Size { ; Stack region growing down - } } diff --git a/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld b/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld index 084c7af15f3..4ae0b047e08 100644 --- a/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld +++ b/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_GCC_ARM/tmpm3hqfdfg.ld @@ -7,10 +7,6 @@ MEMORY RAM (rwx) : ORIGIN = (0x20000000 + 0x2D8), LENGTH = (64K - 0x2D8) } -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: @@ -157,7 +153,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf b/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf index 0d58c53864a..6a61b3705ab 100644 --- a/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf +++ b/targets/TARGET_TT/TARGET_TT_M3HQ/device/TOOLCHAIN_IAR/tmpm3hqfdfg.icf @@ -9,10 +9,8 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0007FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x200002D8; define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*Heap 1/4 of ram and stack 1/8*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_STD/W7500.sct b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_STD/W7500.sct index eab548eb575..f9ead04667a 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_STD/W7500.sct +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_STD/W7500.sct @@ -1,11 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; ************************************************************* ; *** Scatter-Loading Description File generated by uVision *** ; ************************************************************* @@ -16,10 +8,8 @@ LR_IROM1 0x00000000 0x00020000 { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000000 0x00004000-Stack_Size { ; RW data + RW_IRAM1 0x20000000 0x00004000 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x00004000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld index db3e23872d0..29f5e3f80ad 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K */ @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_IAR/W7500_Flash.icf b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_IAR/W7500_Flash.icf index 0aac2ee3ee5..d8b9faab8ab 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_IAR/W7500_Flash.icf +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_IAR/W7500_Flash.icf @@ -8,10 +8,8 @@ define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; define symbol __ICFEDIT_region_ROM_end__ = 0x00020000; define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; define symbol __ICFEDIT_region_RAM_end__ = 0x20004000; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*-Heap 1/4 of ram and stack 1/8-*/ +define symbol __ICFEDIT_size_cstack__ = 0x00000400; define symbol __ICFEDIT_size_heap__ = 0x00000C00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_STD/W7500.sct b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_STD/W7500.sct index eab548eb575..f9ead04667a 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_STD/W7500.sct +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_STD/W7500.sct @@ -1,11 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; ************************************************************* ; *** Scatter-Loading Description File generated by uVision *** ; ************************************************************* @@ -16,10 +8,8 @@ LR_IROM1 0x00000000 0x00020000 { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000000 0x00004000-Stack_Size { ; RW data + RW_IRAM1 0x20000000 0x00004000 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x00004000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld index db3e23872d0..29f5e3f80ad 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K */ @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_IAR/W7500_Flash.icf b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_IAR/W7500_Flash.icf index 0aac2ee3ee5..d8b9faab8ab 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_IAR/W7500_Flash.icf +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_IAR/W7500_Flash.icf @@ -8,10 +8,8 @@ define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; define symbol __ICFEDIT_region_ROM_end__ = 0x00020000; define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; define symbol __ICFEDIT_region_RAM_end__ = 0x20004000; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*-Heap 1/4 of ram and stack 1/8-*/ +define symbol __ICFEDIT_size_cstack__ = 0x00000400; define symbol __ICFEDIT_size_heap__ = 0x00000C00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_STD/W7500.sct b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_STD/W7500.sct index eab548eb575..f9ead04667a 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_STD/W7500.sct +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_STD/W7500.sct @@ -1,11 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - ; ************************************************************* ; *** Scatter-Loading Description File generated by uVision *** ; ************************************************************* @@ -16,10 +8,8 @@ LR_IROM1 0x00000000 0x00020000 { ; load region size_region *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000000 0x00004000-Stack_Size { ; RW data + RW_IRAM1 0x20000000 0x00004000 { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000000+0x00004000) EMPTY -Stack_Size { ; stack - } } diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld index db3e23872d0..29f5e3f80ad 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_GCC_ARM/W7500.ld @@ -1,11 +1,4 @@ /* Linker script to configure memory regions. */ - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K */ @@ -150,7 +143,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_IAR/W7500_Flash.icf b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_IAR/W7500_Flash.icf index 0aac2ee3ee5..d8b9faab8ab 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_IAR/W7500_Flash.icf +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_IAR/W7500_Flash.icf @@ -8,10 +8,8 @@ define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; define symbol __ICFEDIT_region_ROM_end__ = 0x00020000; define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; define symbol __ICFEDIT_region_RAM_end__ = 0x20004000; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +/*-Heap 1/4 of ram and stack 1/8-*/ +define symbol __ICFEDIT_size_cstack__ = 0x00000400; define symbol __ICFEDIT_size_heap__ = 0x00000C00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_ARM_STD/hi2110.sct b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_ARM_STD/hi2110.sct index e6c403c0841..d7d9d472133 100644 --- a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_ARM_STD/hi2110.sct +++ b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_ARM_STD/hi2110.sct @@ -1,11 +1,3 @@ -#! armcc -E - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -#define Stack_Size MBED_BOOT_STACK_SIZE - LR_IROM1 0x00000000 0x20000 { ER_IROM1 0x00000000 0x20000 { *.o (RESET, +First) @@ -14,12 +6,10 @@ LR_IROM1 0x00000000 0x20000 { } RW_IRAM_VTABLE 0x01000000 EMPTY 128 { } - RW_IRAM1 +0 (0x5000 - 256 - Stack_Size) { + RW_IRAM1 +0 (0x5000 - 256) { .ANY (+RW +ZI) } RW_IPCRAM +0 256 { ipc.o (+RW) } - ARM_LIB_STACK (0x01000000+0x5000) EMPTY -Stack_Size { ; stack - } } \ No newline at end of file diff --git a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_GCC_ARM/hi2110.ld b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_GCC_ARM/hi2110.ld index 1e4e6beeaa9..d124a964419 100644 --- a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_GCC_ARM/hi2110.ld +++ b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_GCC_ARM/hi2110.ld @@ -4,13 +4,6 @@ OUTPUT_FORMAT("elf32-littlearm") OUTPUT_ARCH(arm) ENTRY(Reset_Handler) - -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 -#endif - -STACK_SIZE = MBED_BOOT_STACK_SIZE; - MEMORY { FLASH_VECTORS : ORIGIN = 0, LENGTH = 192 @@ -158,7 +151,7 @@ SECTIONS /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); /* Remember that LENGTH(RAM) is already reduced by the IPC block */ - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_IAR/hi2110.icf b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_IAR/hi2110.icf index e829ec8dc2a..356658423a0 100644 --- a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_IAR/hi2110.icf +++ b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_IAR/hi2110.icf @@ -8,14 +8,10 @@ define symbol __size_flash_vtable__ = 192; define symbol __size_ram_vtable__ = 128; /* Reserve space for dynamic vectors mapped to RAM (see cmsis_nvic.c) */ define symbol __size_ipc__ = 256; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; -} - if (isdefinedsymbol(__stack_size__)) { define symbol __size_cstack__ = __stack_size__; } else { - define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; + define symbol __size_cstack__ = 1024; } if (isdefinedsymbol(__heap_size__)) {