diff --git a/extras/STM32Cube_FW/0001-chore-clean-up-and-adapt-STM32Cube_FW-sources-for-ST.patch b/extras/STM32Cube_FW/0001-chore-clean-up-and-adapt-STM32Cube_FW-sources-for-ST.patch index 3ae29806..bbc8ba44 100644 --- a/extras/STM32Cube_FW/0001-chore-clean-up-and-adapt-STM32Cube_FW-sources-for-ST.patch +++ b/extras/STM32Cube_FW/0001-chore-clean-up-and-adapt-STM32Cube_FW-sources-for-ST.patch @@ -1,29 +1,28 @@ -From 6fcfc029ba21a3674456a12032720bff6ecfe27d Mon Sep 17 00:00:00 2001 +From 1c3ca9f22842e3ae283d3e979a5f38a195d8d4ee Mon Sep 17 00:00:00 2001 From: Alexandre Bourdiol -Date: Mon, 6 Dec 2021 11:08:32 +0100 -Subject: [PATCH 1/4] chore: clean up and adapt STM32Cube_FW sources for +Date: Tue, 30 Aug 2022 11:28:41 +0200 +Subject: [PATCH 1/3] chore: clean up and adapt STM32Cube_FW sources for STM32duino -Signed-off-by: Frederic Pillon Signed-off-by: Alexandre Bourdiol --- - src/utility/STM32Cube_FW/app_conf_default.h | 422 +------------------ + src/utility/STM32Cube_FW/app_conf_default.h | 428 +------------------ src/utility/STM32Cube_FW/ble_bufsize.h | 13 +- src/utility/STM32Cube_FW/hw.h | 28 +- src/utility/STM32Cube_FW/hw_ipcc.c | 184 +------- src/utility/STM32Cube_FW/mbox_def.h | 34 -- src/utility/STM32Cube_FW/shci.c | 40 +- - src/utility/STM32Cube_FW/shci.h | 47 +-- + src/utility/STM32Cube_FW/shci.h | 47 +- src/utility/STM32Cube_FW/shci_tl.c | 19 +- src/utility/STM32Cube_FW/stm32_wpan_common.h | 39 +- src/utility/STM32Cube_FW/stm_list.c | 11 +- src/utility/STM32Cube_FW/stm_list.h | 4 +- src/utility/STM32Cube_FW/tl.h | 33 -- src/utility/STM32Cube_FW/tl_mbox.c | 144 +------ - 13 files changed, 94 insertions(+), 924 deletions(-) + 13 files changed, 91 insertions(+), 933 deletions(-) diff --git a/src/utility/STM32Cube_FW/app_conf_default.h b/src/utility/STM32Cube_FW/app_conf_default.h -index 7ebc65a..4f300e0 100644 +index c63c66e..54f824a 100644 --- a/src/utility/STM32Cube_FW/app_conf_default.h +++ b/src/utility/STM32Cube_FW/app_conf_default.h @@ -1,4 +1,3 @@ @@ -53,21 +52,21 @@ index 7ebc65a..4f300e0 100644 -/** - * Define Secure Connections Support - */ --#define CFG_SECURE_NOT_SUPPORTED (0x00) --#define CFG_SECURE_OPTIONAL (0x01) --#define CFG_SECURE_MANDATORY (0x02) +-#define CFG_SECURE_NOT_SUPPORTED (0x00) +-#define CFG_SECURE_OPTIONAL (0x01) +-#define CFG_SECURE_MANDATORY (0x02) - --#define CFG_SC_SUPPORT CFG_SECURE_OPTIONAL +-#define CFG_SC_SUPPORT CFG_SECURE_OPTIONAL - -/** - * Define Keypress Notification Support - */ --#define CFG_KEYPRESS_NOT_SUPPORTED (0x00) --#define CFG_KEYPRESS_SUPPORTED (0x01) +-#define CFG_KEYPRESS_NOT_SUPPORTED (0x00) +-#define CFG_KEYPRESS_SUPPORTED (0x01) +/**< generic parameters ******************************************************/ +/* HCI related defines */ --#define CFG_KEYPRESS_NOTIFICATION_SUPPORT CFG_KEYPRESS_NOT_SUPPORTED +-#define CFG_KEYPRESS_NOTIFICATION_SUPPORT CFG_KEYPRESS_NOT_SUPPORTED +#define ACI_HAL_SET_TX_POWER_LEVEL 0xFC0F +#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C +#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D @@ -141,7 +140,7 @@ index 7ebc65a..4f300e0 100644 * BLE Stack @@ -152,13 +93,15 @@ * Prepare Write List size in terms of number of packet - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS is set to 1" + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ -#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) +// #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) @@ -149,7 +148,7 @@ index 7ebc65a..4f300e0 100644 /** * Number of allocated memory blocks - * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter when CFG_BLE_OPTIONS is set to 1 + * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ -#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) +// #define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) @@ -157,18 +156,18 @@ index 7ebc65a..4f300e0 100644 /** * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. -@@ -236,7 +179,7 @@ +@@ -241,7 +184,7 @@ * 0: LE Power Class 2-3 * other bits: reserved (shall be set to 0) */ --#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3) +-#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3) +#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY) #define CFG_BLE_MAX_COC_INITIATOR_NBR (32) -@@ -256,334 +199,5 @@ +@@ -291,340 +234,5 @@ - #define CFG_BLE_RX_MODEL_CONFIG SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY + #define CFG_BLE_RX_PATH_COMPENS (0) -/****************************************************************************** - * Transport Layer @@ -206,7 +205,7 @@ index 7ebc65a..4f300e0 100644 -/** - * Select UART interfaces - */ --#define CFG_UART_GUI hw_uart1 +-#define CFG_UART_GUI hw_uart1 -#define CFG_DEBUG_TRACE_UART 0 -/****************************************************************************** - * USB interface @@ -276,10 +275,10 @@ index 7ebc65a..4f300e0 100644 - * It divides the RTC CLK by 16 - */ - --#define CFG_RTCCLK_DIV (16) --#define CFG_RTC_WUCKSEL_DIVIDER (0) --#define CFG_RTC_ASYNCH_PRESCALER (0x0F) --#define CFG_RTC_SYNCH_PRESCALER (0x7FFF) +-#define CFG_RTCCLK_DIV (16) +-#define CFG_RTC_WUCKSEL_DIVIDER (0) +-#define CFG_RTC_ASYNCH_PRESCALER (0x0F) +-#define CFG_RTC_SYNCH_PRESCALER (0x7FFF) - -#else - @@ -370,7 +369,7 @@ index 7ebc65a..4f300e0 100644 -#if (CFG_DEBUG_TRACE != 0) -#undef CFG_LPM_SUPPORTED -#undef CFG_DEBUGGER_SUPPORTED --#define CFG_LPM_SUPPORTED 0 +-#define CFG_LPM_SUPPORTED 0 -#define CFG_DEBUGGER_SUPPORTED 1 -#endif - @@ -408,7 +407,7 @@ index 7ebc65a..4f300e0 100644 - * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined - */ -#define DBG_TRACE_MSG_QUEUE_SIZE 4096 --#define MAX_DBG_TRACE_MSG_SIZE 1024 +-#define MAX_DBG_TRACE_MSG_SIZE 1024 - -/* USER CODE BEGIN Defines */ -#define CFG_LED_SUPPORTED 1 @@ -433,31 +432,31 @@ index 7ebc65a..4f300e0 100644 -/**< Add in that list all tasks that may send a ACI/HCI command */ -typedef enum -{ -- CFG_TASK_BLE_HCI_CMD_ID, -- CFG_TASK_SYS_HCI_CMD_ID, -- CFG_TASK_HCI_ACL_DATA_ID, -- CFG_TASK_SYS_LOCAL_CMD_ID, -- CFG_TASK_TX_TO_HOST_ID, -- /* USER CODE BEGIN CFG_Task_Id_With_HCI_Cmd_t */ -- CFG_TASK_SW1_BUTTON_PUSHED_ID, -- CFG_TASK_SW2_BUTTON_PUSHED_ID, -- CFG_TASK_SW3_BUTTON_PUSHED_ID, -- /* USER CODE END CFG_Task_Id_With_HCI_Cmd_t */ -- CFG_LAST_TASK_ID_WITH_HCICMD, /**< Shall be LAST in the list */ +- CFG_TASK_BLE_HCI_CMD_ID, +- CFG_TASK_SYS_HCI_CMD_ID, +- CFG_TASK_HCI_ACL_DATA_ID, +- CFG_TASK_SYS_LOCAL_CMD_ID, +- CFG_TASK_TX_TO_HOST_ID, +- /* USER CODE BEGIN CFG_Task_Id_With_HCI_Cmd_t */ +- CFG_TASK_SW1_BUTTON_PUSHED_ID, +- CFG_TASK_SW2_BUTTON_PUSHED_ID, +- CFG_TASK_SW3_BUTTON_PUSHED_ID, +- /* USER CODE END CFG_Task_Id_With_HCI_Cmd_t */ +- CFG_LAST_TASK_ID_WITH_HCICMD, /**< Shall be LAST in the list */ -} CFG_Task_Id_With_HCI_Cmd_t; - -/**< Add in that list all tasks that never send a ACI/HCI command */ -typedef enum -{ -- CFG_FIRST_TASK_ID_WITH_NO_HCICMD = CFG_LAST_TASK_ID_WITH_HCICMD - 1, /**< Shall be FIRST in the list */ -- CFG_TASK_SYSTEM_HCI_ASYNCH_EVT_ID, -- /* USER CODE BEGIN CFG_Task_Id_With_NO_HCI_Cmd_t */ +- CFG_FIRST_TASK_ID_WITH_NO_HCICMD = CFG_LAST_TASK_ID_WITH_HCICMD - 1, /**< Shall be FIRST in the list */ +- CFG_TASK_SYSTEM_HCI_ASYNCH_EVT_ID, +- /* USER CODE BEGIN CFG_Task_Id_With_NO_HCI_Cmd_t */ - -- /* USER CODE END CFG_Task_Id_With_NO_HCI_Cmd_t */ -- CFG_LAST_TASK_ID_WITHO_NO_HCICMD /**< Shall be LAST in the list */ +- /* USER CODE END CFG_Task_Id_With_NO_HCI_Cmd_t */ +- CFG_LAST_TASK_ID_WITH_NO_HCICMD /**< Shall be LAST in the list */ -} CFG_Task_Id_With_NO_HCI_Cmd_t; - --#define CFG_TASK_NBR CFG_LAST_TASK_ID_WITHO_NO_HCICMD +-#define CFG_TASK_NBR CFG_LAST_TASK_ID_WITH_NO_HCICMD - -/** - * This is the list of priority required by the application @@ -465,8 +464,10 @@ index 7ebc65a..4f300e0 100644 - */ -typedef enum -{ -- CFG_SCH_PRIO_0, -- CFG_PRIO_NBR, +- CFG_SCH_PRIO_0, +- /* USER CODE BEGIN CFG_SCH_Prio_Id_t */ +- +- /* USER CODE END CFG_SCH_Prio_Id_t */ -} CFG_SCH_Prio_Id_t; - -/** @@ -474,7 +475,10 @@ index 7ebc65a..4f300e0 100644 - */ -typedef enum -{ -- CFG_IDLEEVT_SYSTEM_HCI_CMD_EVT_RSP_ID, +- CFG_IDLEEVT_SYSTEM_HCI_CMD_EVT_RSP_ID, +- /* USER CODE BEGIN CFG_IdleEvt_Id_t */ +- +- /* USER CODE END CFG_IdleEvt_Id_t */ -} CFG_IdleEvt_Id_t; - -/****************************************************************************** @@ -486,11 +490,11 @@ index 7ebc65a..4f300e0 100644 - */ -typedef enum -{ -- CFG_LPM_APP, -- CFG_LPM_APP_BLE, -- /* USER CODE BEGIN CFG_LPM_Id_t */ +- CFG_LPM_APP, +- CFG_LPM_APP_BLE, +- /* USER CODE BEGIN CFG_LPM_Id_t */ - -- /* USER CODE END CFG_LPM_Id_t */ +- /* USER CODE END CFG_LPM_Id_t */ -} CFG_LPM_Id_t; - -/****************************************************************************** @@ -499,10 +503,11 @@ index 7ebc65a..4f300e0 100644 -#define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE - -#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR - +- #endif /*APP_CONF_H */ + diff --git a/src/utility/STM32Cube_FW/ble_bufsize.h b/src/utility/STM32Cube_FW/ble_bufsize.h -index ba9c4d3..73b7887 100644 +index 0f0f419..247573b 100644 --- a/src/utility/STM32Cube_FW/ble_bufsize.h +++ b/src/utility/STM32Cube_FW/ble_bufsize.h @@ -75,17 +75,24 @@ @@ -586,7 +591,7 @@ index 503fa2c..fcf0451 100644 } #endif diff --git a/src/utility/STM32Cube_FW/hw_ipcc.c b/src/utility/STM32Cube_FW/hw_ipcc.c -index c5a941d..2f4f6cc 100644 +index fd620b8..7b9be81 100644 --- a/src/utility/STM32Cube_FW/hw_ipcc.c +++ b/src/utility/STM32Cube_FW/hw_ipcc.c @@ -18,8 +18,9 @@ @@ -701,7 +706,7 @@ index c5a941d..2f4f6cc 100644 /****************************************************************************** * GENERAL ******************************************************************************/ -@@ -263,8 +222,8 @@ static void HW_IPCC_BLE_AclDataEvtHandler( void ) +@@ -264,8 +223,8 @@ static void HW_IPCC_BLE_AclDataEvtHandler( void ) return; } @@ -712,7 +717,7 @@ index c5a941d..2f4f6cc 100644 /****************************************************************************** * SYSTEM -@@ -302,56 +261,8 @@ static void HW_IPCC_SYS_EvtHandler( void ) +@@ -303,56 +262,8 @@ static void HW_IPCC_SYS_EvtHandler( void ) return; } @@ -771,7 +776,7 @@ index c5a941d..2f4f6cc 100644 /****************************************************************************** * THREAD -@@ -423,9 +334,9 @@ static void HW_IPCC_THREAD_CliNotEvtHandler( void ) +@@ -424,9 +335,9 @@ static void HW_IPCC_THREAD_CliNotEvtHandler( void ) return; } @@ -784,7 +789,7 @@ index c5a941d..2f4f6cc 100644 #endif /* THREAD_WB */ -@@ -547,74 +458,6 @@ void HW_IPCC_LLD_BLE_SendRspAck( void ) +@@ -548,74 +459,6 @@ void HW_IPCC_LLD_BLE_SendRspAck( void ) #endif /* LLD_BLE_WB */ @@ -859,7 +864,7 @@ index c5a941d..2f4f6cc 100644 /****************************************************************************** * MEMORY MANAGER ******************************************************************************/ -@@ -665,4 +508,5 @@ static void HW_IPCC_TRACES_EvtHandler( void ) +@@ -666,4 +509,5 @@ static void HW_IPCC_TRACES_EvtHandler( void ) return; } @@ -867,10 +872,10 @@ index c5a941d..2f4f6cc 100644 +__WEAK void HW_IPCC_TRACES_EvtNot( void ){}; +#endif /* STM32WBxx */ diff --git a/src/utility/STM32Cube_FW/mbox_def.h b/src/utility/STM32Cube_FW/mbox_def.h -index 06536d3..c898e52 100644 +index 68b71f9..0c974f8 100644 --- a/src/utility/STM32Cube_FW/mbox_def.h +++ b/src/utility/STM32Cube_FW/mbox_def.h -@@ -105,12 +105,6 @@ extern "C" { +@@ -106,12 +106,6 @@ extern "C" { uint8_t *m0cmd_buffer; } MB_BleLldTable_t; @@ -883,7 +888,7 @@ index 06536d3..c898e52 100644 /** * msg * [0:7] = cmd/evt -@@ -138,13 +132,6 @@ extern "C" { +@@ -139,13 +133,6 @@ extern "C" { uint8_t *traces_queue; } MB_TracesTable_t; @@ -897,7 +902,7 @@ index 06536d3..c898e52 100644 typedef struct { MB_DeviceInfoTable_t *p_device_info_table; -@@ -153,8 +140,6 @@ extern "C" { +@@ -154,8 +141,6 @@ extern "C" { MB_SysTable_t *p_sys_table; MB_MemManagerTable_t *p_mem_manager_table; MB_TracesTable_t *p_traces_table; @@ -906,7 +911,7 @@ index 06536d3..c898e52 100644 MB_LldTestsTable_t *p_lld_tests_table; MB_BleLldTable_t *p_ble_lld_table; } MB_RefTable_t; -@@ -198,15 +183,6 @@ typedef struct +@@ -199,15 +184,6 @@ typedef struct * | | * |<---HW_IPCC_SYSTEM_EVENT_CHANNEL-----------------| * | | @@ -922,7 +927,7 @@ index 06536d3..c898e52 100644 * | (THREAD) | * |----HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL----------->| * | | -@@ -230,11 +206,6 @@ typedef struct +@@ -231,11 +207,6 @@ typedef struct * | | * |<---HW_IPCC_BLE_LLD_M0_CMD_CHANNEL---------------| * | | @@ -934,7 +939,7 @@ index 06536d3..c898e52 100644 * | (BUFFER) | * |----HW_IPCC_MM_RELEASE_BUFFER_CHANNE------------>| * | | -@@ -252,8 +223,6 @@ typedef struct +@@ -253,8 +224,6 @@ typedef struct #define HW_IPCC_BLE_CMD_CHANNEL LL_IPCC_CHANNEL_1 #define HW_IPCC_SYSTEM_CMD_RSP_CHANNEL LL_IPCC_CHANNEL_2 #define HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL LL_IPCC_CHANNEL_3 @@ -943,7 +948,7 @@ index 06536d3..c898e52 100644 #define HW_IPCC_MM_RELEASE_BUFFER_CHANNEL LL_IPCC_CHANNEL_4 #define HW_IPCC_THREAD_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 #define HW_IPCC_LLDTESTS_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 -@@ -265,8 +234,6 @@ typedef struct +@@ -266,8 +235,6 @@ typedef struct #define HW_IPCC_BLE_EVENT_CHANNEL LL_IPCC_CHANNEL_1 #define HW_IPCC_SYSTEM_EVENT_CHANNEL LL_IPCC_CHANNEL_2 #define HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL LL_IPCC_CHANNEL_3 @@ -952,7 +957,7 @@ index 06536d3..c898e52 100644 #define HW_IPCC_LLDTESTS_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 #define HW_IPCC_BLE_LLD_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 #define HW_IPCC_TRACES_CHANNEL LL_IPCC_CHANNEL_4 -@@ -274,6 +241,5 @@ typedef struct +@@ -275,6 +242,5 @@ typedef struct #define HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 #define HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 #define HW_IPCC_BLE_LLD_RSP_CHANNEL LL_IPCC_CHANNEL_5 @@ -960,7 +965,7 @@ index 06536d3..c898e52 100644 #endif /*__MBOX_H */ diff --git a/src/utility/STM32Cube_FW/shci.c b/src/utility/STM32Cube_FW/shci.c -index 301db76..bd7bb3a 100644 +index 472a108..a847522 100644 --- a/src/utility/STM32Cube_FW/shci.c +++ b/src/utility/STM32Cube_FW/shci.c @@ -16,7 +16,7 @@ @@ -1022,14 +1027,14 @@ index 301db76..bd7bb3a 100644 SHCI_CmdStatus_t SHCI_C2_Reinit( void ) { /** -@@ -739,3 +703,5 @@ SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) +@@ -739,4 +703,4 @@ SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) return (SHCI_Success); } +- +#endif /* STM32WBxx */ -+ diff --git a/src/utility/STM32Cube_FW/shci.h b/src/utility/STM32Cube_FW/shci.h -index c08f056..9449c22 100644 +index 102089e..6b6ffd1 100644 --- a/src/utility/STM32Cube_FW/shci.h +++ b/src/utility/STM32Cube_FW/shci.h @@ -49,7 +49,6 @@ extern "C" { @@ -1049,7 +1054,7 @@ index c08f056..9449c22 100644 * section could be written in Flash/NVM * StartAddress : Start address of the section that has been modified * Size : Size (in bytes) of the section that has been modified -@@ -214,9 +213,7 @@ extern "C" { +@@ -216,9 +215,7 @@ extern "C" { SHCI_OCF_C2_FLASH_STORE_DATA, SHCI_OCF_C2_FLASH_ERASE_DATA, SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER, @@ -1059,7 +1064,7 @@ index c08f056..9449c22 100644 SHCI_OCF_C2_LLD_TESTS_INIT, SHCI_OCF_C2_EXTPA_CONFIG, SHCI_OCF_C2_SET_FLASH_ACTIVITY_CONTROL, -@@ -614,8 +611,6 @@ extern "C" { +@@ -648,8 +645,6 @@ extern "C" { { uint8_t thread_config; uint8_t ble_config; @@ -1068,7 +1073,7 @@ index c08f056..9449c22 100644 } SHCI_C2_DEBUG_TracesConfig_t; typedef PACKED_STRUCT -@@ -674,8 +669,6 @@ extern "C" { +@@ -713,8 +708,6 @@ extern "C" { { BLE_ENABLE, THREAD_ENABLE, @@ -1077,7 +1082,7 @@ index c08f056..9449c22 100644 } SHCI_C2_CONCURRENT_Mode_Param_t; /** No response parameters*/ -@@ -698,18 +691,13 @@ extern "C" { +@@ -737,18 +730,13 @@ extern "C" { { BLE_IP, THREAD_IP, @@ -1096,7 +1101,7 @@ index c08f056..9449c22 100644 #define SHCI_OPCODE_C2_LLD_TESTS_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_LLD_TESTS_INIT) #define SHCI_OPCODE_C2_BLE_LLD_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_BLE_LLD_INIT) -@@ -817,7 +805,7 @@ extern "C" { +@@ -856,7 +844,7 @@ extern "C" { #define FUS_DEVICE_INFO_TABLE_VALIDITY_KEYWORD (0xA94656B9) /* @@ -1105,8 +1110,8 @@ index c08f056..9449c22 100644 * MB_WirelessFwInfoTable_t.This structure contains 4 fields (Version,MemorySize, Stack_info and a reserved part) * each of those coded on 32 bits as shown on the table below: * -@@ -870,9 +858,6 @@ extern "C" { - #define INFO_STACK_TYPE_BLE_BEACON 0x04 +@@ -912,9 +900,6 @@ extern "C" { + #define INFO_STACK_TYPE_BLE_HCI_EXT_ADV 0x07 #define INFO_STACK_TYPE_THREAD_FTD 0x10 #define INFO_STACK_TYPE_THREAD_MTD 0x11 -#define INFO_STACK_TYPE_ZIGBEE_FFD 0x30 @@ -1115,7 +1120,7 @@ index c08f056..9449c22 100644 #define INFO_STACK_TYPE_BLE_THREAD_FTD_STATIC 0x50 #define INFO_STACK_TYPE_BLE_THREAD_FTD_DYAMIC 0x51 #define INFO_STACK_TYPE_802154_LLD_TESTS 0x60 -@@ -881,12 +866,7 @@ extern "C" { +@@ -923,12 +908,7 @@ extern "C" { #define INFO_STACK_TYPE_BLE_LLD_TESTS 0x63 #define INFO_STACK_TYPE_BLE_RLV 0x64 #define INFO_STACK_TYPE_802154_RLV 0x65 @@ -1128,7 +1133,7 @@ index c08f056..9449c22 100644 typedef struct { /** -@@ -1060,7 +1040,7 @@ typedef struct { +@@ -1102,7 +1082,7 @@ typedef struct { * @brief Starts the LLD tests CLI * * @param param_size : Nb of bytes @@ -1137,7 +1142,7 @@ index c08f056..9449c22 100644 * @retval Status */ SHCI_CmdStatus_t SHCI_C2_LLDTESTS_Init( uint8_t param_size, uint8_t * p_param ); -@@ -1070,19 +1050,10 @@ typedef struct { +@@ -1112,19 +1092,10 @@ typedef struct { * @brief Starts the LLD tests BLE * * @param param_size : Nb of bytes @@ -1146,7 +1151,7 @@ index c08f056..9449c22 100644 * @retval Status */ SHCI_CmdStatus_t SHCI_C2_BLE_LLD_Init( uint8_t param_size, uint8_t * p_param ); -- +- - /** - * SHCI_C2_ZIGBEE_Init - * @brief Starts the Zigbee Stack @@ -1155,10 +1160,10 @@ index c08f056..9449c22 100644 - * @retval Status - */ - SHCI_CmdStatus_t SHCI_C2_ZIGBEE_Init( void ); - + /** * SHCI_C2_DEBUG_Init -@@ -1158,16 +1129,6 @@ typedef struct { +@@ -1200,16 +1171,6 @@ typedef struct { */ SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower( SHCI_C2_FLASH_Ip_t Ip,uint8_t FlagRadioLowPowerOn); @@ -1176,7 +1181,7 @@ index c08f056..9449c22 100644 * SHCI_GetWirelessFwInfo * @brief This function read back the informations relative to the wireless binary loaded. diff --git a/src/utility/STM32Cube_FW/shci_tl.c b/src/utility/STM32Cube_FW/shci_tl.c -index 449b8b1..ef403aa 100644 +index ddb3a02..d1a448d 100644 --- a/src/utility/STM32Cube_FW/shci_tl.c +++ b/src/utility/STM32Cube_FW/shci_tl.c @@ -16,12 +16,13 @@ @@ -1215,12 +1220,12 @@ index 449b8b1..ef403aa 100644 /* Private functions ---------------------------------------------------------*/ static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) { -@@ -252,3 +267,5 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) +@@ -252,4 +267,4 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) return; } +- +#endif /* STM32WBxx */ -+ diff --git a/src/utility/STM32Cube_FW/stm32_wpan_common.h b/src/utility/STM32Cube_FW/stm32_wpan_common.h index b47b804..5a2b2a5 100644 --- a/src/utility/STM32Cube_FW/stm32_wpan_common.h @@ -1280,7 +1285,7 @@ index b47b804..5a2b2a5 100644 #ifdef __cplusplus } diff --git a/src/utility/STM32Cube_FW/stm_list.c b/src/utility/STM32Cube_FW/stm_list.c -index 69c8c06..3dea751 100644 +index 4c92864..77dec64 100644 --- a/src/utility/STM32Cube_FW/stm_list.c +++ b/src/utility/STM32Cube_FW/stm_list.c @@ -16,13 +16,13 @@ @@ -1299,7 +1304,7 @@ index 69c8c06..3dea751 100644 +#include "stm32_wpan_common.h" /****************************************************************************** - * Function Definitions + * Function Definitions @@ -33,10 +33,10 @@ void LST_init_head (tListNode * listHead) listHead->prev = listHead; } @@ -1313,12 +1318,11 @@ index 69c8c06..3dea751 100644 primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ -@@ -205,3 +205,4 @@ void LST_get_prev_node (tListNode * ref_node, tListNode ** node) +@@ -204,3 +204,4 @@ void LST_get_prev_node (tListNode * ref_node, tListNode ** node) + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ } - +#endif /* STM32WBxx */ -\ No newline at end of file diff --git a/src/utility/STM32Cube_FW/stm_list.h b/src/utility/STM32Cube_FW/stm_list.h index b7c3254..769c211 100644 --- a/src/utility/STM32Cube_FW/stm_list.h @@ -1342,10 +1346,10 @@ index b7c3254..769c211 100644 void LST_insert_head (tListNode * listHead, tListNode * node); diff --git a/src/utility/STM32Cube_FW/tl.h b/src/utility/STM32Cube_FW/tl.h -index cb27246..16de7f1 100644 +index 2124d26..678769c 100644 --- a/src/utility/STM32Cube_FW/tl.h +++ b/src/utility/STM32Cube_FW/tl.h -@@ -198,19 +198,6 @@ typedef struct +@@ -199,19 +199,6 @@ typedef struct uint8_t *p_BleLldM0CmdBuffer; } TL_BLE_LLD_Config_t; @@ -1365,7 +1369,7 @@ index cb27246..16de7f1 100644 /** * @brief Contain the BLE HCI Init Configuration * @{ -@@ -304,26 +291,6 @@ void TL_MM_EvtDone( TL_EvtPacket_t * hcievt ); +@@ -305,26 +292,6 @@ void TL_MM_EvtDone( TL_EvtPacket_t * hcievt ); void TL_TRACES_Init( void ); void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt ); @@ -1393,7 +1397,7 @@ index cb27246..16de7f1 100644 } /* extern "C" */ #endif diff --git a/src/utility/STM32Cube_FW/tl_mbox.c b/src/utility/STM32Cube_FW/tl_mbox.c -index 148bcb1..709f5d2 100644 +index 4112429..a9abb18 100644 --- a/src/utility/STM32Cube_FW/tl_mbox.c +++ b/src/utility/STM32Cube_FW/tl_mbox.c @@ -16,6 +16,7 @@ @@ -1431,7 +1435,7 @@ index 148bcb1..709f5d2 100644 HW_IPCC_Init(); return; -@@ -451,139 +448,6 @@ void TL_BLE_LLD_SendRspAck( void ) +@@ -452,139 +449,6 @@ void TL_BLE_LLD_SendRspAck( void ) } #endif /* BLE_LLD_WB */ @@ -1571,12 +1575,12 @@ index 148bcb1..709f5d2 100644 /****************************************************************************** * MEMORY MANAGER ******************************************************************************/ -@@ -845,3 +709,5 @@ static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) +@@ -846,4 +710,4 @@ static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) return; } -+ +- +#endif /* STM32WBxx */ -- -2.31.1.windows.1 +2.33.0.windows.1 diff --git a/extras/STM32Cube_FW/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch b/extras/STM32Cube_FW/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch index c4a83d6e..326b767e 100644 --- a/extras/STM32Cube_FW/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch +++ b/extras/STM32Cube_FW/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch @@ -1,16 +1,15 @@ -From ac18897f0f9b87bb3196efb93ef47ccaaa0eff64 Mon Sep 17 00:00:00 2001 +From 979f153a4e6d5d616ddea616bcd732e32cb1773c Mon Sep 17 00:00:00 2001 From: Alexandre Bourdiol -Date: Mon, 6 Dec 2021 11:18:02 +0100 -Subject: [PATCH 2/4] fix: include a timeout when waiting for the cmd_resp +Date: Tue, 30 Aug 2022 13:19:36 +0200 +Subject: [PATCH 2/3] fix: include a timeout when waiting for the cmd_resp -Signed-off-by: Francois Ramu Signed-off-by: Alexandre Bourdiol --- src/utility/STM32Cube_FW/shci_tl.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/utility/STM32Cube_FW/shci_tl.c b/src/utility/STM32Cube_FW/shci_tl.c -index ef403aa..6cccc5d 100644 +index d1a448d..678de84 100644 --- a/src/utility/STM32Cube_FW/shci_tl.c +++ b/src/utility/STM32Cube_FW/shci_tl.c @@ -20,6 +20,8 @@ @@ -40,5 +39,5 @@ index ef403aa..6cccc5d 100644 } -- -2.31.1.windows.1 +2.33.0.windows.1 diff --git a/extras/STM32Cube_FW/0003-Added-support-for-custom-app_conf.h-35.patch b/extras/STM32Cube_FW/0003-Added-support-for-custom-app_conf.h.patch similarity index 61% rename from extras/STM32Cube_FW/0003-Added-support-for-custom-app_conf.h-35.patch rename to extras/STM32Cube_FW/0003-Added-support-for-custom-app_conf.h.patch index 268523d5..33b69e55 100644 --- a/extras/STM32Cube_FW/0003-Added-support-for-custom-app_conf.h-35.patch +++ b/extras/STM32Cube_FW/0003-Added-support-for-custom-app_conf.h.patch @@ -1,14 +1,15 @@ -From a771c9e9a12d085fc240a45f68ca5aafb8b42006 Mon Sep 17 00:00:00 2001 +From d3ae98b9073e5f1e48efb32b1ef4d318814228fe Mon Sep 17 00:00:00 2001 From: Alexandre Bourdiol -Date: Mon, 6 Dec 2021 18:59:38 +0100 -Subject: [PATCH 3/4] Added support for custom app_conf.h (#35) +Date: Tue, 30 Aug 2022 13:31:31 +0200 +Subject: [PATCH 3/3] Added support for custom app_conf.h +Signed-off-by: Alexandre Bourdiol --- - src/utility/STM32Cube_FW/app_conf_default.h | 75 ++++++++++++++------- - 1 file changed, 49 insertions(+), 26 deletions(-) + src/utility/STM32Cube_FW/app_conf_default.h | 71 ++++++++++++++------- + 1 file changed, 47 insertions(+), 24 deletions(-) diff --git a/src/utility/STM32Cube_FW/app_conf_default.h b/src/utility/STM32Cube_FW/app_conf_default.h -index 4f300e0..9f8e085 100644 +index 54f824a..91672ac 100644 --- a/src/utility/STM32Cube_FW/app_conf_default.h +++ b/src/utility/STM32Cube_FW/app_conf_default.h @@ -1,8 +1,8 @@ @@ -47,34 +48,29 @@ index 4f300e0..9f8e085 100644 /****************************************************************************** * BLE Stack -@@ -53,32 +52,41 @@ +@@ -53,13 +52,17 @@ * Maximum number of simultaneous connections that the device will support. * Valid values are from 1 to 8 */ --#define CFG_BLE_NUM_LINK 2 +-#define CFG_BLE_NUM_LINK 8 +#ifndef CFG_BLE_NUM_LINK -+ #define CFG_BLE_NUM_LINK 2 ++ #define CFG_BLE_NUM_LINK 8 +#endif /** * Maximum number of Services that can be stored in the GATT database. -- * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services -+ * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user -+ * services + * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services */ +-#define CFG_BLE_NUM_GATT_SERVICES 8 +#ifndef CFG_BLE_NUM_GATT_SERVICES - #define CFG_BLE_NUM_GATT_SERVICES 8 ++ #define CFG_BLE_NUM_GATT_SERVICES 8 +#endif /** * Maximum number of Attributes -- * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services) -- * that can be stored in the GATT database. -- * Note that certain characteristics and relative descriptors are added automatically during device initialization -- * so this parameters should be 9 plus the number of user Attributes -+ * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the -+ * services) that can be stored in the GATT database. Note that certain characteristics and relative descriptors are -+ * added automatically during device initialization so this parameters should be 9 plus the number of user Attributes +@@ -68,13 +71,17 @@ + * Note that certain characteristics and relative descriptors are added automatically during device initialization + * so this parameters should be 9 plus the number of user Attributes */ -#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 +#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES @@ -83,7 +79,7 @@ index 4f300e0..9f8e085 100644 /** * Maximum supported ATT_MTU size - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS is set to 1" + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ -#define CFG_BLE_MAX_ATT_MTU (156) +#ifndef CFG_BLE_MAX_ATT_MTU @@ -92,23 +88,18 @@ index 4f300e0..9f8e085 100644 /** * Size of the storage area for Attribute values -- * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute: -+ * This value depends on the number of attributes used by application. In particular the sum of the following -+ * quantities (in octets) should be made for each attribute: - * - attribute value length - * - 5, if UUID is 16 bit; 19, if UUID is 128 bit - * - 2, if server configuration descriptor is used -@@ -87,14 +95,18 @@ +@@ -87,14 +94,18 @@ * The total amount of memory needed is the sum of the above quantities for each attribute. - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS is set to 1" + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ +-#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) +#ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE - #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) ++ #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) +#endif /** * Prepare Write List size in terms of number of packet - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS is set to 1" + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ // #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) -#define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) @@ -118,7 +109,7 @@ index 4f300e0..9f8e085 100644 /** * Number of allocated memory blocks -@@ -106,12 +118,16 @@ +@@ -106,12 +117,16 @@ /** * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. */ @@ -137,7 +128,7 @@ index 4f300e0..9f8e085 100644 /** * Sleep clock accuracy in Master mode -@@ -124,24 +140,32 @@ +@@ -124,7 +139,9 @@ * 6 : 21 ppm to 30 ppm * 7 : 0 ppm to 20 ppm */ @@ -147,14 +138,22 @@ index 4f300e0..9f8e085 100644 +#endif /** - * Source for the low speed clock for RF wake-up - * 1 : external high speed crystal HSE/32/32 - * 0 : external low speed crystal ( no calibration ) + * LsSource +@@ -132,21 +149,27 @@ + * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source + * - bit 1: 1: STM32W5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module */ --#define CFG_BLE_LSE_SOURCE 0 +-#if defined(STM32WB5Mxx) +- #define CFG_BLE_LSE_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LSE_MOD5MM_DEV) +-#else +- #define CFG_BLE_LSE_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LSE_OTHER_DEV) +#ifndef CFG_BLE_LSE_SOURCE -+ #define CFG_BLE_LSE_SOURCE 0 -+#endif ++ #if defined(STM32WB5Mxx) ++ #define CFG_BLE_LSE_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LSE_MOD5MM_DEV) ++ #else ++ #define CFG_BLE_LSE_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LSE_OTHER_DEV) ++ #endif + #endif /** * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) @@ -174,13 +173,13 @@ index 4f300e0..9f8e085 100644 /** * Viterbi Mode -@@ -199,5 +223,4 @@ +@@ -234,5 +257,5 @@ - #define CFG_BLE_RX_MODEL_CONFIG SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY + #define CFG_BLE_RX_PATH_COMPENS (0) -- -#endif /*APP_CONF_H */ +#endif /* APP_CONF_DEFAULT_H */ + -- -2.31.1.windows.1 +2.33.0.windows.1 diff --git a/extras/STM32Cube_FW/0004-Stub-OutputDbgTrace-function.patch b/extras/STM32Cube_FW/0004-Stub-OutputDbgTrace-function.patch deleted file mode 100644 index 6f844f7a..00000000 --- a/extras/STM32Cube_FW/0004-Stub-OutputDbgTrace-function.patch +++ /dev/null @@ -1,209 +0,0 @@ -From a015490bdd861f421addd761ee4164358dc07c19 Mon Sep 17 00:00:00 2001 -From: Alexandre Bourdiol -Date: Tue, 7 Dec 2021 14:27:27 +0100 -Subject: [PATCH 4/4] Stub OutputDbgTrace() function - -Signed-off-by: Alexandre Bourdiol ---- - src/utility/STM32Cube_FW/tl_mbox.c | 178 +---------------------------- - 1 file changed, 3 insertions(+), 175 deletions(-) - -diff --git a/src/utility/STM32Cube_FW/tl_mbox.c b/src/utility/STM32Cube_FW/tl_mbox.c -index 709f5d2..db192c4 100644 ---- a/src/utility/STM32Cube_FW/tl_mbox.c -+++ b/src/utility/STM32Cube_FW/tl_mbox.c -@@ -24,7 +24,6 @@ - #include "stm_list.h" - #include "tl.h" - #include "mbox_def.h" --#include "tl_dbg_conf.h" - - /* Private typedef -----------------------------------------------------------*/ - typedef enum -@@ -532,180 +531,9 @@ __WEAK void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt ) - ******************************************************************************/ - static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) - { -- TL_EvtPacket_t *p_evt_packet; -- TL_CmdPacket_t *p_cmd_packet; -- -- switch(packet_type) -- { -- case TL_MB_MM_RELEASE_BUFFER: -- p_evt_packet = (TL_EvtPacket_t*)buffer; -- switch(p_evt_packet->evtserial.evt.evtcode) -- { -- case TL_BLEEVT_CS_OPCODE: -- TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_MM_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); -- TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); -- break; -- -- case TL_BLEEVT_CC_OPCODE: -- TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_MM_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); -- TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); -- break; -- -- case TL_BLEEVT_VS_OPCODE: -- TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_MM_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); -- TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); -- break; -- -- default: -- TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); -- break; -- } -- -- TL_MM_DBG_MSG("\r\n"); -- break; -- -- case TL_MB_BLE_CMD: -- p_cmd_packet = (TL_CmdPacket_t*)buffer; -- TL_HCI_CMD_DBG_MSG("ble cmd: 0x%04X", p_cmd_packet->cmdserial.cmd.cmdcode); -- if(p_cmd_packet->cmdserial.cmd.plen != 0) -- { -- TL_HCI_CMD_DBG_MSG(" payload:"); -- TL_HCI_CMD_DBG_BUF(p_cmd_packet->cmdserial.cmd.payload, p_cmd_packet->cmdserial.cmd.plen, ""); -- } -- TL_HCI_CMD_DBG_MSG("\r\n"); -- -- TL_HCI_CMD_DBG_RAW(&p_cmd_packet->cmdserial, p_cmd_packet->cmdserial.cmd.plen+TL_CMD_HDR_SIZE); -- break; -- -- case TL_MB_BLE_CMD_RSP: -- p_evt_packet = (TL_EvtPacket_t*)buffer; -- switch(p_evt_packet->evtserial.evt.evtcode) -- { -- case TL_BLEEVT_CS_OPCODE: -- TL_HCI_CMD_DBG_MSG("ble rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_HCI_CMD_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); -- TL_HCI_CMD_DBG_MSG(" numhci: 0x%02X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->numcmd); -- TL_HCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->status); -- break; -- -- case TL_BLEEVT_CC_OPCODE: -- TL_HCI_CMD_DBG_MSG("ble rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_HCI_CMD_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); -- TL_HCI_CMD_DBG_MSG(" numhci: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->numcmd); -- TL_HCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[0]); -- if((p_evt_packet->evtserial.evt.plen-4) != 0) -- { -- TL_HCI_CMD_DBG_MSG(" payload:"); -- TL_HCI_CMD_DBG_BUF(&((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[1], p_evt_packet->evtserial.evt.plen-4, ""); -- } -- break; -- -- default: -- TL_HCI_CMD_DBG_MSG("unknown ble rsp received: %02X", p_evt_packet->evtserial.evt.evtcode); -- break; -- } -- -- TL_HCI_CMD_DBG_MSG("\r\n"); -- -- TL_HCI_CMD_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); -- break; -- -- case TL_MB_BLE_ASYNCH_EVT: -- p_evt_packet = (TL_EvtPacket_t*)buffer; -- if(p_evt_packet->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) -- { -- TL_HCI_EVT_DBG_MSG("ble evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- if((p_evt_packet->evtserial.evt.plen) != 0) -- { -- TL_HCI_EVT_DBG_MSG(" payload:"); -- TL_HCI_EVT_DBG_BUF(p_evt_packet->evtserial.evt.payload, p_evt_packet->evtserial.evt.plen, ""); -- } -- } -- else -- { -- TL_HCI_EVT_DBG_MSG("ble evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_HCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); -- if((p_evt_packet->evtserial.evt.plen-2) != 0) -- { -- TL_HCI_EVT_DBG_MSG(" payload:"); -- TL_HCI_EVT_DBG_BUF(((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload, p_evt_packet->evtserial.evt.plen-2, ""); -- } -- } -- -- TL_HCI_EVT_DBG_MSG("\r\n"); -- -- TL_HCI_EVT_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); -- break; -- -- case TL_MB_SYS_CMD: -- p_cmd_packet = (TL_CmdPacket_t*)buffer; -- -- TL_SHCI_CMD_DBG_MSG("sys cmd: 0x%04X", p_cmd_packet->cmdserial.cmd.cmdcode); -- -- if(p_cmd_packet->cmdserial.cmd.plen != 0) -- { -- TL_SHCI_CMD_DBG_MSG(" payload:"); -- TL_SHCI_CMD_DBG_BUF(p_cmd_packet->cmdserial.cmd.payload, p_cmd_packet->cmdserial.cmd.plen, ""); -- } -- TL_SHCI_CMD_DBG_MSG("\r\n"); -- -- TL_SHCI_CMD_DBG_RAW(&p_cmd_packet->cmdserial, p_cmd_packet->cmdserial.cmd.plen+TL_CMD_HDR_SIZE); -- break; -- -- case TL_MB_SYS_CMD_RSP: -- p_evt_packet = (TL_EvtPacket_t*)buffer; -- switch(p_evt_packet->evtserial.evt.evtcode) -- { -- case TL_BLEEVT_CC_OPCODE: -- TL_SHCI_CMD_DBG_MSG("sys rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_SHCI_CMD_DBG_MSG(" cmd opcode: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); -- TL_SHCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[0]); -- if((p_evt_packet->evtserial.evt.plen-4) != 0) -- { -- TL_SHCI_CMD_DBG_MSG(" payload:"); -- TL_SHCI_CMD_DBG_BUF(&((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[1], p_evt_packet->evtserial.evt.plen-4, ""); -- } -- break; -- -- default: -- TL_SHCI_CMD_DBG_MSG("unknown sys rsp received: %02X", p_evt_packet->evtserial.evt.evtcode); -- break; -- } -- -- TL_SHCI_CMD_DBG_MSG("\r\n"); -- -- TL_SHCI_CMD_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); -- break; -- -- case TL_MB_SYS_ASYNCH_EVT: -- p_evt_packet = (TL_EvtPacket_t*)buffer; -- if(p_evt_packet->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) -- { -- TL_SHCI_EVT_DBG_MSG("unknown sys evt received: %02X", p_evt_packet->evtserial.evt.evtcode); -- } -- else -- { -- TL_SHCI_EVT_DBG_MSG("sys evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); -- TL_SHCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); -- if((p_evt_packet->evtserial.evt.plen-2) != 0) -- { -- TL_SHCI_EVT_DBG_MSG(" payload:"); -- TL_SHCI_EVT_DBG_BUF(((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload, p_evt_packet->evtserial.evt.plen-2, ""); -- } -- } -- -- TL_SHCI_EVT_DBG_MSG("\r\n"); -- -- TL_SHCI_EVT_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); -- break; -- -- default: -- break; -- } -+ /* Function stubbed */ -+ UNUSED(packet_type); -+ UNUSED(buffer); - - return; - } --- -2.31.1.windows.1 - diff --git a/src/utility/HCISharedMemTransport.cpp b/src/utility/HCISharedMemTransport.cpp index c8de8c56..0b46bda4 100644 --- a/src/utility/HCISharedMemTransport.cpp +++ b/src/utility/HCISharedMemTransport.cpp @@ -25,7 +25,7 @@ /* Private variables ---------------------------------------------------------*/ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static TL_CmdPacket_t BleCmdBuffer; -PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t EvtPool[POOL_SIZE]; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static uint8_t EvtPool[POOL_SIZE]; PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t SystemCmdBuffer; PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t SystemSpareEvtBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + 255]; @@ -740,7 +740,12 @@ int HCISharedMemTransportClass::stm32wb_start_ble(void) CFG_BLE_MAX_COC_INITIATOR_NBR, CFG_BLE_MIN_TX_POWER, CFG_BLE_MAX_TX_POWER, - CFG_BLE_RX_MODEL_CONFIG + CFG_BLE_RX_MODEL_CONFIG, + CFG_BLE_MAX_ADV_SET_NBR, + CFG_BLE_MAX_ADV_DATA_LEN, + CFG_BLE_TX_PATH_COMPENS, + CFG_BLE_RX_PATH_COMPENS + }; /** * Starts the BLE Stack on CPU2 diff --git a/src/utility/STM32Cube_FW/README.md b/src/utility/STM32Cube_FW/README.md index dc03bb92..2cd8302a 100644 --- a/src/utility/STM32Cube_FW/README.md +++ b/src/utility/STM32Cube_FW/README.md @@ -1,6 +1,6 @@ ## Source -[STMicroelectronics/STM32CubeWB Release v1.13.3](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.13.3) -- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.13.3/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode) +[STMicroelectronics/STM32CubeWB Release 1.14.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/1.14.0) +- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/1.14.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode) diff --git a/src/utility/STM32Cube_FW/app_conf_default.h b/src/utility/STM32Cube_FW/app_conf_default.h index 9f8e085d..91672ac9 100644 --- a/src/utility/STM32Cube_FW/app_conf_default.h +++ b/src/utility/STM32Cube_FW/app_conf_default.h @@ -53,23 +53,23 @@ * Valid values are from 1 to 8 */ #ifndef CFG_BLE_NUM_LINK - #define CFG_BLE_NUM_LINK 2 + #define CFG_BLE_NUM_LINK 8 #endif /** * Maximum number of Services that can be stored in the GATT database. - * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user - * services + * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services */ #ifndef CFG_BLE_NUM_GATT_SERVICES -#define CFG_BLE_NUM_GATT_SERVICES 8 + #define CFG_BLE_NUM_GATT_SERVICES 8 #endif /** * Maximum number of Attributes - * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the - * services) that can be stored in the GATT database. Note that certain characteristics and relative descriptors are - * added automatically during device initialization so this parameters should be 9 plus the number of user Attributes + * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services) + * that can be stored in the GATT database. + * Note that certain characteristics and relative descriptors are added automatically during device initialization + * so this parameters should be 9 plus the number of user Attributes */ #ifndef CFG_BLE_NUM_GATT_ATTRIBUTES #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 @@ -77,7 +77,7 @@ /** * Maximum supported ATT_MTU size - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS is set to 1" + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ #ifndef CFG_BLE_MAX_ATT_MTU #define CFG_BLE_MAX_ATT_MTU (156) @@ -85,23 +85,22 @@ /** * Size of the storage area for Attribute values - * This value depends on the number of attributes used by application. In particular the sum of the following - * quantities (in octets) should be made for each attribute: + * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute: * - attribute value length * - 5, if UUID is 16 bit; 19, if UUID is 128 bit * - 2, if server configuration descriptor is used * - 2*DTM_NUM_LINK, if client configuration descriptor is used * - 2, if extended properties is used * The total amount of memory needed is the sum of the above quantities for each attribute. - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS is set to 1" + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ #ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE -#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) + #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) #endif /** * Prepare Write List size in terms of number of packet - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS is set to 1" + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ // #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) #ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE @@ -110,7 +109,7 @@ /** * Number of allocated memory blocks - * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter when CFG_BLE_OPTIONS is set to 1 + * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set */ // #define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) #define CFG_BLE_MBLOCK_COUNT (0x79) @@ -145,12 +144,17 @@ #endif /** - * Source for the low speed clock for RF wake-up - * 1 : external high speed crystal HSE/32/32 - * 0 : external low speed crystal ( no calibration ) + * LsSource + * Some information for Low speed clock mapped in bits field + * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source + * - bit 1: 1: STM32W5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module */ #ifndef CFG_BLE_LSE_SOURCE - #define CFG_BLE_LSE_SOURCE 0 + #if defined(STM32WB5Mxx) + #define CFG_BLE_LSE_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LSE_MOD5MM_DEV) + #else + #define CFG_BLE_LSE_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LSE_OTHER_DEV) + #endif #endif /** @@ -195,8 +199,8 @@ * 0: with service change desc. * (bit 2): 1: device name Read-Only * 0: device name R/W - * (bit 3): 1: extended advertizing supported [NOT SUPPORTED] - * 0: extended advertizing not supported [NOT SUPPORTED] + * (bit 3): 1: extended advertizing supported + * 0: extended advertizing not supported * (bit 4): 1: CS Algo #2 supported * 0: CS Algo #2 not supported * (bit 7): 1: LE Power Class 1 @@ -207,9 +211,9 @@ #define CFG_BLE_MAX_COC_INITIATOR_NBR (32) -#define CFG_BLE_MIN_TX_POWER (0) +#define CFG_BLE_MIN_TX_POWER (-40) -#define CFG_BLE_MAX_TX_POWER (0) +#define CFG_BLE_MAX_TX_POWER (6) /** * BLE Rx model configuration flags to be configured with: @@ -221,6 +225,37 @@ * other bits: reserved (shall be set to 0) */ -#define CFG_BLE_RX_MODEL_CONFIG SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY +#define CFG_BLE_RX_MODEL_CONFIG (SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY) + +/* Maximum number of advertising sets. + * Range: 1 .. 8 with limitation: + * This parameter is linked to CFG_BLE_MAX_ADV_DATA_LEN such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + +#define CFG_BLE_MAX_ADV_SET_NBR (8) + + /* Maximum advertising data length (in bytes) + * Range: 31 .. 1650 with limitation: + * This parameter is linked to CFG_BLE_MAX_ADV_SET_NBR such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + +#define CFG_BLE_MAX_ADV_DATA_LEN (207) + + /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + +#define CFG_BLE_TX_PATH_COMPENS (0) + + /* RF RX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + +#define CFG_BLE_RX_PATH_COMPENS (0) #endif /* APP_CONF_DEFAULT_H */ + diff --git a/src/utility/STM32Cube_FW/ble_bufsize.h b/src/utility/STM32Cube_FW/ble_bufsize.h index 12b5fdb9..247573be 100644 --- a/src/utility/STM32Cube_FW/ble_bufsize.h +++ b/src/utility/STM32Cube_FW/ble_bufsize.h @@ -98,14 +98,16 @@ */ #if (BEACON_ONLY != 0) #define BLE_FIXED_BUFFER_SIZE_BYTES 4076 /* Beacon only */ +#elif (LL_ONLY_BASIC != 0) +#define BLE_FIXED_BUFFER_SIZE_BYTES 5692 /* LL only Basic*/ #elif (LL_ONLY != 0) -#define BLE_FIXED_BUFFER_SIZE_BYTES 5936 /* LL only */ +#define BLE_FIXED_BUFFER_SIZE_BYTES 5940 /* LL only Full */ #elif (SLAVE_ONLY != 0) #define BLE_FIXED_BUFFER_SIZE_BYTES 6204 /* Peripheral only */ #elif (BASIC_FEATURES != 0) #define BLE_FIXED_BUFFER_SIZE_BYTES 6532 /* Basic Features */ #else -#define BLE_FIXED_BUFFER_SIZE_BYTES 7052 /* Full stack */ +#define BLE_FIXED_BUFFER_SIZE_BYTES 7056 /* Full stack */ #endif /* @@ -113,8 +115,10 @@ */ #if (BEACON_ONLY != 0) #define BLE_PER_LINK_SIZE_BYTES 128 /* Beacon only */ +#elif (LL_ONLY_BASIC != 0) +#define BLE_PER_LINK_SIZE_BYTES 260 /* LL only Basic */ #elif (LL_ONLY != 0) -#define BLE_PER_LINK_SIZE_BYTES 260 /* LL only */ +#define BLE_PER_LINK_SIZE_BYTES 260 /* LL only Full */ #elif (SLAVE_ONLY != 0) #define BLE_PER_LINK_SIZE_BYTES 392 /* Peripheral only */ #elif (BASIC_FEATURES != 0) diff --git a/src/utility/STM32Cube_FW/hw_ipcc.c b/src/utility/STM32Cube_FW/hw_ipcc.c index 2f4f6cc2..7b9be81a 100644 --- a/src/utility/STM32Cube_FW/hw_ipcc.c +++ b/src/utility/STM32Cube_FW/hw_ipcc.c @@ -140,15 +140,16 @@ void HW_IPCC_Enable( void ) { /** * Such as IPCC IP available to the CPU2, it is required to keep the IPCC clock running - when FUS is running on CPU2 and CPU1 enters deep sleep mode + * when FUS is running on CPU2 and CPU1 enters deep sleep mode */ LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_IPCC); - /** - * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2 - */ - LL_C2_EXTI_EnableEvent_32_63( LL_EXTI_LINE_41 ); + /** + * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2 + */ LL_EXTI_EnableRisingTrig_32_63( LL_EXTI_LINE_41 ); + /* It is required to have at least a system clock cycle before a SEV after LL_EXTI_EnableRisingTrig_32_63() */ + LL_C2_EXTI_EnableEvent_32_63( LL_EXTI_LINE_41 ); /** * In case the SBSFU is implemented, it may have already set the C2BOOT bit to startup the CPU2. diff --git a/src/utility/STM32Cube_FW/mbox_def.h b/src/utility/STM32Cube_FW/mbox_def.h index c898e52a..0c974f8f 100644 --- a/src/utility/STM32Cube_FW/mbox_def.h +++ b/src/utility/STM32Cube_FW/mbox_def.h @@ -91,6 +91,7 @@ extern "C" { uint8_t *notack_buffer; uint8_t *clicmdrsp_buffer; uint8_t *otcmdrsp_buffer; + uint8_t *clinot_buffer; } MB_ThreadTable_t; typedef struct diff --git a/src/utility/STM32Cube_FW/shci.c b/src/utility/STM32Cube_FW/shci.c index bd7bb3a1..a8475222 100644 --- a/src/utility/STM32Cube_FW/shci.c +++ b/src/utility/STM32Cube_FW/shci.c @@ -704,4 +704,3 @@ SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) return (SHCI_Success); } #endif /* STM32WBxx */ - diff --git a/src/utility/STM32Cube_FW/shci.h b/src/utility/STM32Cube_FW/shci.h index d965ec84..6b6ffd1a 100644 --- a/src/utility/STM32Cube_FW/shci.h +++ b/src/utility/STM32Cube_FW/shci.h @@ -162,9 +162,11 @@ extern "C" { { SHCI_Success = 0x00, SHCI_UNKNOWN_CMD = 0x01, + SHCI_MEMORY_CAPACITY_EXCEEDED_ERR_CODE= 0x07, SHCI_ERR_UNSUPPORTED_FEATURE = 0x11, SHCI_ERR_INVALID_HCI_CMD_PARAMS = 0x12, - SHCI_ERR_INVALID_PARAMS = 0x42, + SHCI_ERR_INVALID_PARAMS = 0x42, /* only used for release < v1.13.0 */ + SHCI_ERR_INVALID_PARAMS_V2 = 0x92, /* available for release >= v1.13.0 */ SHCI_FUS_CMD_NOT_SUPPORTED = 0xFF, } SHCI_CmdStatus_t; @@ -487,10 +489,9 @@ extern "C" { /** * LsSource - * Source for the 32 kHz slow speed clock. - * - External crystal LSE: 0 - No calibration - * - Others:1 - As the accuracy of this oscillator can vary depending upon external conditions (temperature), - * it is calibrated every second to ensure correct behavior of timing sensitive BLE operations + * Some information for Low speed clock mapped in bits field + * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source + * - bit 1: 1: STM32W5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module */ uint8_t LsSource; @@ -564,6 +565,32 @@ extern "C" { */ uint8_t rx_model_config; + /* Maximum number of advertising sets. + * Range: 1 .. 8 with limitation: + * This parameter is linked to max_adv_data_len such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when Options has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + uint8_t max_adv_set_nbr; + + /* Maximum advertising data length (in bytes) + * Range: 31 .. 1650 with limitation: + * This parameter is linked to max_adv_set_nbr such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when Options has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + uint16_t max_adv_data_len; + + /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + int16_t tx_path_compens; + + /* RF RX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + int16_t rx_path_compens; + } SHCI_C2_Ble_Init_Cmd_Param_t; typedef PACKED_STRUCT{ @@ -600,6 +627,13 @@ extern "C" { #define SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY (0<<0) #define SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_BLOCKER (1<<0) + /** + * LsSource information + */ +#define SHCI_C2_BLE_INIT_CFG_BLE_LSE_NOCALIB (0<<0) +#define SHCI_C2_BLE_INIT_CFG_BLE_LSE_CALIB (1<<0) +#define SHCI_C2_BLE_INIT_CFG_BLE_LSE_OTHER_DEV (0<<1) +#define SHCI_C2_BLE_INIT_CFG_BLE_LSE_MOD5MM_DEV (1<<1) #define SHCI_OPCODE_C2_THREAD_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_THREAD_INIT) /** No command parameters */ @@ -624,6 +658,11 @@ extern "C" { */ uint8_t sys_dbg_cfg1; uint8_t reserved[2]; + uint16_t STBY_DebugGpioaPinList; + uint16_t STBY_DebugGpiobPinList; + uint16_t STBY_DebugGpiocPinList; + uint16_t STBY_DtbGpioaPinList; + uint16_t STBY_DtbGpiobPinList; } SHCI_C2_DEBUG_GeneralConfig_t; typedef PACKED_STRUCT{ @@ -1057,7 +1096,7 @@ typedef struct { * @retval Status */ SHCI_CmdStatus_t SHCI_C2_BLE_LLD_Init( uint8_t param_size, uint8_t * p_param ); - + /** * SHCI_C2_DEBUG_Init * @brief Starts the Traces @@ -1219,7 +1258,7 @@ typedef struct { * When set to 0, data are kept in internal SRAM on CPU2 * Otherwise, data are copied in the cache pointed by ThreadNvmRamAddress * The size of the buffer shall be THREAD_NVM_SRAM_SIZE (number of 32bits) - * The buffer shall be allocated in SRAM2 + * The buffer shall be allocated in SRAM1 * * Please check macro definition to be used for this function * They are defined in this file next to the definition of SHCI_OPCODE_C2_CONFIG diff --git a/src/utility/STM32Cube_FW/shci_tl.c b/src/utility/STM32Cube_FW/shci_tl.c index 6cccc5dd..678de84d 100644 --- a/src/utility/STM32Cube_FW/shci_tl.c +++ b/src/utility/STM32Cube_FW/shci_tl.c @@ -271,4 +271,3 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) } #endif /* STM32WBxx */ - diff --git a/src/utility/STM32Cube_FW/stm_list.c b/src/utility/STM32Cube_FW/stm_list.c index d8c9e093..77dec64f 100644 --- a/src/utility/STM32Cube_FW/stm_list.c +++ b/src/utility/STM32Cube_FW/stm_list.c @@ -1,208 +1,207 @@ -/** - ****************************************************************************** - * @file stm_list.c - * @author MCD Application Team - * @brief TCircular Linked List Implementation. - ****************************************************************************** - * @attention - * - * Copyright (c) 2018-2021 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -#if defined(STM32WBxx) -/****************************************************************************** - * Include Files - ******************************************************************************/ -#include "stm_list.h" -#include "cmsis_gcc.h" -#include "stm32_wpan_common.h" - -/****************************************************************************** - * Function Definitions - ******************************************************************************/ -void LST_init_head (tListNode * listHead) -{ - listHead->next = listHead; - listHead->prev = listHead; -} - -bool LST_is_empty (tListNode * listHead) -{ - uint32_t primask_bit; - bool return_value; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - if(listHead->next == listHead) - { - return_value = TRUE; - } - else - { - return_value = FALSE; - } - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ - - return return_value; -} - -void LST_insert_head (tListNode * listHead, tListNode * node) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - node->next = listHead->next; - node->prev = listHead; - listHead->next = node; - (node->next)->prev = node; - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - - -void LST_insert_tail (tListNode * listHead, tListNode * node) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - node->next = listHead; - node->prev = listHead->prev; - listHead->prev = node; - (node->prev)->next = node; - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - - -void LST_remove_node (tListNode * node) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - (node->prev)->next = node->next; - (node->next)->prev = node->prev; - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - - -void LST_remove_head (tListNode * listHead, tListNode ** node ) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - *node = listHead->next; - LST_remove_node (listHead->next); - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - - -void LST_remove_tail (tListNode * listHead, tListNode ** node ) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - *node = listHead->prev; - LST_remove_node (listHead->prev); - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - - -void LST_insert_node_after (tListNode * node, tListNode * ref_node) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - node->next = ref_node->next; - node->prev = ref_node; - ref_node->next = node; - (node->next)->prev = node; - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - - -void LST_insert_node_before (tListNode * node, tListNode * ref_node) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - node->next = ref_node; - node->prev = ref_node->prev; - ref_node->prev = node; - (node->prev)->next = node; - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - - -int LST_get_size (tListNode * listHead) -{ - int size = 0; - tListNode * temp; - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - temp = listHead->next; - while (temp != listHead) - { - size++; - temp = temp->next; - } - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ - - return (size); -} - -void LST_get_next_node (tListNode * ref_node, tListNode ** node) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - *node = ref_node->next; - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - - -void LST_get_prev_node (tListNode * ref_node, tListNode ** node) -{ - uint32_t primask_bit; - - primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ - __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - - *node = ref_node->prev; - - __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ -} - -#endif /* STM32WBxx */ \ No newline at end of file +/** + ****************************************************************************** + * @file stm_list.c + * @author MCD Application Team + * @brief TCircular Linked List Implementation. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +#if defined(STM32WBxx) +/****************************************************************************** + * Include Files + ******************************************************************************/ +#include "stm_list.h" +#include "cmsis_gcc.h" +#include "stm32_wpan_common.h" + +/****************************************************************************** + * Function Definitions + ******************************************************************************/ +void LST_init_head (tListNode * listHead) +{ + listHead->next = listHead; + listHead->prev = listHead; +} + +bool LST_is_empty (tListNode * listHead) +{ + uint32_t primask_bit; + bool return_value; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + if(listHead->next == listHead) + { + return_value = TRUE; + } + else + { + return_value = FALSE; + } + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ + + return return_value; +} + +void LST_insert_head (tListNode * listHead, tListNode * node) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + node->next = listHead->next; + node->prev = listHead; + listHead->next = node; + (node->next)->prev = node; + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} + + +void LST_insert_tail (tListNode * listHead, tListNode * node) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + node->next = listHead; + node->prev = listHead->prev; + listHead->prev = node; + (node->prev)->next = node; + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} + + +void LST_remove_node (tListNode * node) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + (node->prev)->next = node->next; + (node->next)->prev = node->prev; + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} + + +void LST_remove_head (tListNode * listHead, tListNode ** node ) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + *node = listHead->next; + LST_remove_node (listHead->next); + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} + + +void LST_remove_tail (tListNode * listHead, tListNode ** node ) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + *node = listHead->prev; + LST_remove_node (listHead->prev); + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} + + +void LST_insert_node_after (tListNode * node, tListNode * ref_node) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + node->next = ref_node->next; + node->prev = ref_node; + ref_node->next = node; + (node->next)->prev = node; + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} + + +void LST_insert_node_before (tListNode * node, tListNode * ref_node) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + node->next = ref_node; + node->prev = ref_node->prev; + ref_node->prev = node; + (node->prev)->next = node; + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} + + +int LST_get_size (tListNode * listHead) +{ + int size = 0; + tListNode * temp; + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + temp = listHead->next; + while (temp != listHead) + { + size++; + temp = temp->next; + } + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ + + return (size); +} + +void LST_get_next_node (tListNode * ref_node, tListNode ** node) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + *node = ref_node->next; + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} + + +void LST_get_prev_node (tListNode * ref_node, tListNode ** node) +{ + uint32_t primask_bit; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + + *node = ref_node->prev; + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ +} +#endif /* STM32WBxx */ diff --git a/src/utility/STM32Cube_FW/tl.h b/src/utility/STM32Cube_FW/tl.h index 16de7f16..678769cb 100644 --- a/src/utility/STM32Cube_FW/tl.h +++ b/src/utility/STM32Cube_FW/tl.h @@ -184,6 +184,7 @@ typedef struct uint8_t *p_ThreadOtCmdRspBuffer; uint8_t *p_ThreadCliRspBuffer; uint8_t *p_ThreadNotAckBuffer; + uint8_t *p_ThreadCliNotBuffer; } TL_TH_Config_t; typedef struct diff --git a/src/utility/STM32Cube_FW/tl_dbg_conf.h b/src/utility/STM32Cube_FW/tl_dbg_conf.h new file mode 100644 index 00000000..841d1968 --- /dev/null +++ b/src/utility/STM32Cube_FW/tl_dbg_conf.h @@ -0,0 +1,140 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : tl_dbg_conf.h + * Description : Debug configuration file for stm32wpan transport layer interface. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef TL_DBG_CONF_H +#define TL_DBG_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* USER CODE BEGIN Tl_Conf */ + +/* Includes ------------------------------------------------------------------*/ +#include "core_debug.h" + +/** + * Enable or Disable traces + * The raw data output is the hci binary packet format as specified by the BT specification * + */ +#ifndef TL_SHCI_CMD_DBG_EN +#define TL_SHCI_CMD_DBG_EN 1 /* Reports System commands sent to CPU2 and the command response */ +#endif + +#ifndef TL_SHCI_EVT_DBG_EN +#define TL_SHCI_EVT_DBG_EN 1 /* Reports System Asynchronous Events received from CPU2 */ +#endif + +#ifndef TL_HCI_CMD_DBG_EN +#define TL_HCI_CMD_DBG_EN 1 /* Reports BLE command sent to CPU2 and the command response */ +#endif + +#ifndef TL_HCI_EVT_DBG_EN +#define TL_HCI_EVT_DBG_EN 1 /* Reports BLE Asynchronous Events received from CPU2 */ +#endif + +#ifndef TL_MM_DBG_EN +#define TL_MM_DBG_EN 1 /* Reports the information of the buffer released to CPU2 */ +#endif + +/** + * Macro definition + */ + +/** + * System Transport Layer + */ +#if (TL_SHCI_CMD_DBG_EN != 0) +#define TL_SHCI_CMD_DBG_MSG core_debug +#define TL_SHCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG +#else +#define TL_SHCI_CMD_DBG_MSG(...) +#define TL_SHCI_CMD_DBG_BUF(...) +#endif + +#define TL_SHCI_CMD_DBG_RAW(...) + +#if (TL_SHCI_EVT_DBG_EN != 0) +#define TL_SHCI_EVT_DBG_MSG core_debug +#define TL_SHCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG +#else +#define TL_SHCI_EVT_DBG_MSG(...) +#define TL_SHCI_EVT_DBG_BUF(...) +#endif + +#define TL_SHCI_EVT_DBG_RAW(...) + +/** + * BLE Transport Layer + */ +#if (TL_HCI_CMD_DBG_EN != 0) +#define TL_HCI_CMD_DBG_MSG core_debug +#define TL_HCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG +#else +#define TL_HCI_CMD_DBG_MSG(...) +#define TL_HCI_CMD_DBG_BUF(...) +#endif + +#define TL_HCI_CMD_DBG_RAW(...) + +#if (TL_HCI_EVT_DBG_EN != 0) +#define TL_HCI_EVT_DBG_MSG core_debug +#define TL_HCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG +#else +#define TL_HCI_EVT_DBG_MSG(...) +#define TL_HCI_EVT_DBG_BUF(...) +#endif + +#define TL_HCI_EVT_DBG_RAW(...) + +/** + * Memory Manager - Released buffer tracing + */ +#if (TL_MM_DBG_EN != 0) +#define TL_MM_DBG_MSG core_debug +#else +#define TL_MM_DBG_MSG(...) +#endif + + +#define PRINT_LOG_BUFF_DBG(...) DbgTraceBuffer(__VA_ARGS__) + +void DbgTraceBuffer(const void *pBuffer, uint32_t u32Length, const char *strFormat, ...) +{ + va_list vaArgs; + uint32_t u32Index; + va_start(vaArgs, strFormat); + vprintf(strFormat, vaArgs); + va_end(vaArgs); + for (u32Index = 0; u32Index < u32Length; u32Index ++) + { + core_debug(" %02X", ((const uint8_t *) pBuffer)[u32Index]); + } +} + +/* USER CODE END Tl_Conf */ + +#ifdef __cplusplus +} +#endif + +#endif /* TL_DBG_CONF_H */ + diff --git a/src/utility/STM32Cube_FW/tl_mbox.c b/src/utility/STM32Cube_FW/tl_mbox.c index db192c4f..a9abb181 100644 --- a/src/utility/STM32Cube_FW/tl_mbox.c +++ b/src/utility/STM32Cube_FW/tl_mbox.c @@ -24,6 +24,7 @@ #include "stm_list.h" #include "tl.h" #include "mbox_def.h" +#include "tl_dbg_conf.h" /* Private typedef -----------------------------------------------------------*/ typedef enum @@ -256,6 +257,7 @@ void TL_THREAD_Init( TL_TH_Config_t *p_Config ) p_thread_table->clicmdrsp_buffer = p_Config->p_ThreadCliRspBuffer; p_thread_table->otcmdrsp_buffer = p_Config->p_ThreadOtCmdRspBuffer; p_thread_table->notack_buffer = p_Config->p_ThreadNotAckBuffer; + p_thread_table->clinot_buffer = p_Config->p_ThreadCliNotBuffer; HW_IPCC_THREAD_Init(); @@ -314,7 +316,7 @@ void HW_IPCC_THREAD_EvtNot( void ) void HW_IPCC_THREAD_CliEvtNot( void ) { - TL_THREAD_CliNotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_thread_table->clicmdrsp_buffer) ); + TL_THREAD_CliNotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_thread_table->clinot_buffer) ); return; } @@ -531,11 +533,181 @@ __WEAK void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt ) ******************************************************************************/ static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) { - /* Function stubbed */ - UNUSED(packet_type); - UNUSED(buffer); + TL_EvtPacket_t *p_evt_packet; + TL_CmdPacket_t *p_cmd_packet; + + switch(packet_type) + { + case TL_MB_MM_RELEASE_BUFFER: + p_evt_packet = (TL_EvtPacket_t*)buffer; + switch(p_evt_packet->evtserial.evt.evtcode) + { + case TL_BLEEVT_CS_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + case TL_BLEEVT_CC_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + case TL_BLEEVT_VS_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + default: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + } + + TL_MM_DBG_MSG("\r\n"); + break; + + case TL_MB_BLE_CMD: + p_cmd_packet = (TL_CmdPacket_t*)buffer; + TL_HCI_CMD_DBG_MSG("ble cmd: 0x%04X", p_cmd_packet->cmdserial.cmd.cmdcode); + if(p_cmd_packet->cmdserial.cmd.plen != 0) + { + TL_HCI_CMD_DBG_MSG(" payload:"); + TL_HCI_CMD_DBG_BUF(p_cmd_packet->cmdserial.cmd.payload, p_cmd_packet->cmdserial.cmd.plen, ""); + } + TL_HCI_CMD_DBG_MSG("\r\n"); + + TL_HCI_CMD_DBG_RAW(&p_cmd_packet->cmdserial, p_cmd_packet->cmdserial.cmd.plen+TL_CMD_HDR_SIZE); + break; + + case TL_MB_BLE_CMD_RSP: + p_evt_packet = (TL_EvtPacket_t*)buffer; + switch(p_evt_packet->evtserial.evt.evtcode) + { + case TL_BLEEVT_CS_OPCODE: + TL_HCI_CMD_DBG_MSG("ble rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_CMD_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_HCI_CMD_DBG_MSG(" numhci: 0x%02X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->numcmd); + TL_HCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->status); + break; + + case TL_BLEEVT_CC_OPCODE: + TL_HCI_CMD_DBG_MSG("ble rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_CMD_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_HCI_CMD_DBG_MSG(" numhci: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->numcmd); + TL_HCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[0]); + if((p_evt_packet->evtserial.evt.plen-4) != 0) + { + TL_HCI_CMD_DBG_MSG(" payload:"); + TL_HCI_CMD_DBG_BUF(&((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[1], p_evt_packet->evtserial.evt.plen-4, ""); + } + break; + + default: + TL_HCI_CMD_DBG_MSG("unknown ble rsp received: %02X", p_evt_packet->evtserial.evt.evtcode); + break; + } + + TL_HCI_CMD_DBG_MSG("\r\n"); + + TL_HCI_CMD_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_BLE_ASYNCH_EVT: + p_evt_packet = (TL_EvtPacket_t*)buffer; + if(p_evt_packet->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) + { + TL_HCI_EVT_DBG_MSG("ble evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + if((p_evt_packet->evtserial.evt.plen) != 0) + { + TL_HCI_EVT_DBG_MSG(" payload:"); + TL_HCI_EVT_DBG_BUF(p_evt_packet->evtserial.evt.payload, p_evt_packet->evtserial.evt.plen, ""); + } + } + else + { + TL_HCI_EVT_DBG_MSG("ble evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + if((p_evt_packet->evtserial.evt.plen-2) != 0) + { + TL_HCI_EVT_DBG_MSG(" payload:"); + TL_HCI_EVT_DBG_BUF(((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload, p_evt_packet->evtserial.evt.plen-2, ""); + } + } + + TL_HCI_EVT_DBG_MSG("\r\n"); + + TL_HCI_EVT_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_SYS_CMD: + p_cmd_packet = (TL_CmdPacket_t*)buffer; + + TL_SHCI_CMD_DBG_MSG("sys cmd: 0x%04X", p_cmd_packet->cmdserial.cmd.cmdcode); + + if(p_cmd_packet->cmdserial.cmd.plen != 0) + { + TL_SHCI_CMD_DBG_MSG(" payload:"); + TL_SHCI_CMD_DBG_BUF(p_cmd_packet->cmdserial.cmd.payload, p_cmd_packet->cmdserial.cmd.plen, ""); + } + TL_SHCI_CMD_DBG_MSG("\r\n"); + + TL_SHCI_CMD_DBG_RAW(&p_cmd_packet->cmdserial, p_cmd_packet->cmdserial.cmd.plen+TL_CMD_HDR_SIZE); + break; + + case TL_MB_SYS_CMD_RSP: + p_evt_packet = (TL_EvtPacket_t*)buffer; + switch(p_evt_packet->evtserial.evt.evtcode) + { + case TL_BLEEVT_CC_OPCODE: + TL_SHCI_CMD_DBG_MSG("sys rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_SHCI_CMD_DBG_MSG(" cmd opcode: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_SHCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[0]); + if((p_evt_packet->evtserial.evt.plen-4) != 0) + { + TL_SHCI_CMD_DBG_MSG(" payload:"); + TL_SHCI_CMD_DBG_BUF(&((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[1], p_evt_packet->evtserial.evt.plen-4, ""); + } + break; + + default: + TL_SHCI_CMD_DBG_MSG("unknown sys rsp received: %02X", p_evt_packet->evtserial.evt.evtcode); + break; + } + + TL_SHCI_CMD_DBG_MSG("\r\n"); + + TL_SHCI_CMD_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_SYS_ASYNCH_EVT: + p_evt_packet = (TL_EvtPacket_t*)buffer; + if(p_evt_packet->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) + { + TL_SHCI_EVT_DBG_MSG("unknown sys evt received: %02X", p_evt_packet->evtserial.evt.evtcode); + } + else + { + TL_SHCI_EVT_DBG_MSG("sys evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_SHCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + if((p_evt_packet->evtserial.evt.plen-2) != 0) + { + TL_SHCI_EVT_DBG_MSG(" payload:"); + TL_SHCI_EVT_DBG_BUF(((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload, p_evt_packet->evtserial.evt.plen-2, ""); + } + } + + TL_SHCI_EVT_DBG_MSG("\r\n"); + + TL_SHCI_EVT_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + default: + break; + } return; } - #endif /* STM32WBxx */