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Update Derecho Port #501

Merged
merged 1 commit into from
Sep 27, 2024
Merged

Update Derecho Port #501

merged 1 commit into from
Sep 27, 2024

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apcraig
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@apcraig apcraig commented Sep 26, 2024

PR checklist

  • Short (1 sentence) summary of your PR:
    Update derecho port

  • Developer(s):
    apcraig

  • Suggest PR reviewers from list in the column to the right.

  • Please copy the PR test results link or provide a summary of testing completed below.
    Test results largely as expected. Updated cray compiler generates an error in the snow physics that needs to be reviewed further. https://github.com/CICE-Consortium/Test-Results/wiki/icepack_by_hash_forks#05ac0ec3ea666080eed36e67f6cf8ce1255b243f

  • How much do the PR code changes differ from the unmodified code?

    • bit for bit except inteloneapi and cray compiler versions
    • different at roundoff level
    • more substantial
  • Does this PR create or have dependencies on CICE or any other models?

    • Yes
    • No
  • Does this PR add any new test cases?

    • Yes
    • No
  • Is the documentation being updated? ("Documentation" includes information on the wiki or in the .rst files from doc/source/, which are used to create the online technical docs at https://readthedocs.org/projects/cice-consortium-cice/.)

    • Yes
    • No, does the documentation need to be updated at a later time?
      • Yes
      • No
  • Please document the changes in detail, including why the changes are made. This will become part of the PR commit log.

  • Update inteloneapi, cray, intel, nvhpc modules/compiler. Changes answers for inteloneapi and cray.

  • Switch default Derecho queue from main to develop to support quicker turn around and lower costs. Develop is a shared queue.

  • Error in the snow physics with the cray compiler needs further assessment, but suggest we merge this now as is. That error does not present itself in CICE with snow physics with the same cray compiler.

Update inteloneapi, cray, intel, nvhpc modules/compiler.
Changes answers for inteloneapi and cray.

Switch default Derecho queue from main to develop to support
quicker turn around and lower costs.  Develop is a shared queue.
@apcraig apcraig merged commit ba0bc0b into CICE-Consortium:main Sep 27, 2024
2 checks passed
dabail10 pushed a commit to ESCOMP/Icepack that referenced this pull request Oct 25, 2024

Update inteloneapi, cray, intel, nvhpc modules/compiler. Changes answers for inteloneapi and cray.

Switch default Derecho queue from main to develop to support quicker turn around and lower costs. Develop is a shared queue.

Error in the snow physics with the cray compiler needs further assessment, but suggest we merge this now as is. That error does not present itself in CICE with snow physics with the same cray compiler.
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2 participants