From d2762acb8ce945670ee2249149a5757991591e85 Mon Sep 17 00:00:00 2001 From: Andre Richter Date: Wed, 18 Sep 2019 15:38:02 +0200 Subject: [PATCH] Differentiate AArch64 bare-metal targets between hf and non-hf. Following up on [1] and [2], this PR adds differntiation for aarch64 bare-metal targets between versions with and without hardware floating point enabled. This streamlines the target naming with other existing ARM targets and provides the user clear indication if he is getting float or non-float for his bare-metal target. [1] https://github.com/rust-lang/rust/pull/60135#issuecomment-485851356 [2] https://github.com/rust-embedded/wg/issues/230 Closes: rust-embedded/wg#230 --- .../spec/aarch64_unknown_none.rs | 4 +- .../spec/aarch64_unknown_none_softfloat.rs | 37 +++++++++++++++++++ src/librustc_target/spec/mod.rs | 1 + 3 files changed, 40 insertions(+), 2 deletions(-) create mode 100644 src/librustc_target/spec/aarch64_unknown_none_softfloat.rs diff --git a/src/librustc_target/spec/aarch64_unknown_none.rs b/src/librustc_target/spec/aarch64_unknown_none.rs index 8c02bc61088b4..b9549ec2120dd 100644 --- a/src/librustc_target/spec/aarch64_unknown_none.rs +++ b/src/librustc_target/spec/aarch64_unknown_none.rs @@ -1,4 +1,4 @@ -// Generic AArch64 target for bare-metal code +// Generic AArch64 target for bare-metal code - Floating point enabled // // Can be used in conjunction with the `target-feature` and // `target-cpu` compiler flags to opt-in more hardware-specific @@ -11,7 +11,7 @@ use super::{LldFlavor, LinkerFlavor, Target, TargetOptions, PanicStrategy}; pub fn target() -> Result { let opts = TargetOptions { linker: Some("rust-lld".to_owned()), - features: "+strict-align".to_string(), + features: "+strict-align,+neon,+fp-armv8".to_string(), executables: true, relocation_model: "static".to_string(), disable_redzone: true, diff --git a/src/librustc_target/spec/aarch64_unknown_none_softfloat.rs b/src/librustc_target/spec/aarch64_unknown_none_softfloat.rs new file mode 100644 index 0000000000000..b91f2af68ecb8 --- /dev/null +++ b/src/librustc_target/spec/aarch64_unknown_none_softfloat.rs @@ -0,0 +1,37 @@ +// Generic AArch64 target for bare-metal code - Floating point disabled +// +// Can be used in conjunction with the `target-feature` and +// `target-cpu` compiler flags to opt-in more hardware-specific +// features. +// +// For example, `-C target-cpu=cortex-a53`. + +use super::{LldFlavor, LinkerFlavor, Target, TargetOptions, PanicStrategy}; + +pub fn target() -> Result { + let opts = TargetOptions { + linker: Some("rust-lld".to_owned()), + features: "+strict-align,-neon,-fp-armv8".to_string(), + executables: true, + relocation_model: "static".to_string(), + disable_redzone: true, + linker_is_gnu: true, + max_atomic_width: Some(128), + panic_strategy: PanicStrategy::Abort, + abi_blacklist: super::arm_base::abi_blacklist(), + .. Default::default() + }; + Ok(Target { + llvm_target: "aarch64-unknown-none".to_string(), + target_endian: "little".to_string(), + target_pointer_width: "64".to_string(), + target_c_int_width: "32".to_string(), + target_os: "none".to_string(), + target_env: String::new(), + target_vendor: String::new(), + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".to_string(), + arch: "aarch64".to_string(), + linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld), + options: opts, + }) +} diff --git a/src/librustc_target/spec/mod.rs b/src/librustc_target/spec/mod.rs index 626fa374a1bd4..25add0cc6a4be 100644 --- a/src/librustc_target/spec/mod.rs +++ b/src/librustc_target/spec/mod.rs @@ -489,6 +489,7 @@ supported_targets! { ("riscv64gc-unknown-none-elf", riscv64gc_unknown_none_elf), ("aarch64-unknown-none", aarch64_unknown_none), + ("aarch64-unknown-none-softfloat", aarch64_unknown_none_softfloat), ("x86_64-fortanix-unknown-sgx", x86_64_fortanix_unknown_sgx),