From e08ea8e459e0812f52ca1f35064ef1b1f27703b1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Olivier=20B=C3=A9gassat?= Date: Mon, 25 Nov 2024 20:56:15 +0700 Subject: [PATCH] ras: formatting --- .../precompiles/common/success_IDENTITY.lisp | 30 +++++++++---------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/hub/constraints/instruction-handling/call/precompiles/common/success_IDENTITY.lisp b/hub/constraints/instruction-handling/call/precompiles/common/success_IDENTITY.lisp index 4890ffe2..387aaee9 100644 --- a/hub/constraints/instruction-handling/call/precompiles/common/success_IDENTITY.lisp +++ b/hub/constraints/instruction-handling/call/precompiles/common/success_IDENTITY.lisp @@ -30,21 +30,21 @@ (defconstraint precompile-processing---IDENTITY-success---2nd-misc-row---setting-MMU-instruction (:guard (precompile-processing---IDENTITY---success-precondition)) (if-not-zero (shift misc/MMU_FLAG precompile-processing---IDENTITY---2nd-misc-row---row-offset) - (set-MMU-instruction---ram-to-ram-sans-padding precompile-processing---IDENTITY---2nd-misc-row---row-offset ;; offset - (+ 1 HUB_STAMP) ;; source ID - CONTEXT_NUMBER - ;; aux_id ;; auxiliary ID - ;; src_offset_hi ;; source offset high - 0 ;; source offset low - ;; tgt_offset_lo ;; target offset low - (precompile-processing---dup-cds) ;; size - (precompile-processing---dup-r@o) ;; reference offset - (precompile-processing---dup-r@c) ;; reference size - ;; success_bit ;; success bit - ;; limb_1 ;; limb 1 - ;; limb_2 ;; limb 2 - ;; exo_sum ;; weighted exogenous module flag sum - ;; phase ;; phase + (set-MMU-instruction---ram-to-ram-sans-padding precompile-processing---IDENTITY---2nd-misc-row---row-offset ;; offset + (+ 1 HUB_STAMP) ;; source ID + CONTEXT_NUMBER ;; target ID + ;; aux_id ;; auxiliary ID + ;; src_offset_hi ;; source offset high + 0 ;; source offset low + ;; tgt_offset_lo ;; target offset low + (precompile-processing---dup-cds) ;; size + (precompile-processing---dup-r@o) ;; reference offset + (precompile-processing---dup-r@c) ;; reference size + ;; success_bit ;; success bit + ;; limb_1 ;; limb 1 + ;; limb_2 ;; limb 2 + ;; exo_sum ;; weighted exogenous module flag sum + ;; phase ;; phase ) ))