diff --git a/new/board_files/netfpga-1g-cml/F.0/board.xml b/new/board_files/netfpga-1g-cml/F.0/board.xml
new file mode 100644
index 0000000..0c28fdc
--- /dev/null
+++ b/new/board_files/netfpga-1g-cml/F.0/board.xml
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+
+
+
+
+ NetFPGA 1G CML Board File Image
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+
+
+0.1
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+ F.0
+
+NetFPGA 1G-CML Development Board
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+ 3.3V low-jitter 200 MHz differential output oscillator
+
+
+ LEDs 3 to 0
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+
+ Push Buttons 3 to 0
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+
+ 512 MB on-board DDR3
+
+
+ System Reset Button
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+
+ PMOD USB UART on PMOD connector JB top row
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+
+ Ethernet PHY 1 on the board not including reset/interrupt
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+ Ethernet PHY 2 on the board not including reset/interrupt
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+ Ethernet PHY 3 on the board not including reset/interrupt
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+ Ethernet PHY 4 on the board not including reset/interrupt
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diff --git a/new/board_files/netfpga-1g-cml/F.0/mig.prj b/new/board_files/netfpga-1g-cml/F.0/mig.prj
new file mode 100644
index 0000000..d0fb57c
--- /dev/null
+++ b/new/board_files/netfpga-1g-cml/F.0/mig.prj
@@ -0,0 +1,128 @@
+
+
+
+ system_mig_7series_0_0
+ 1
+ 1
+ OFF
+ 1024
+ ON
+ Enabled
+ xc7k325t-ffg676/-1
+ 4.0
+ Differential
+ Use System Clock
+ ACTIVE LOW
+ FALSE
+ 0
+ 50 Ohms
+ 0
+
+ DDR3_SDRAM/Components/MT41K512M8XX-125
+ 2500
+ 1.8V
+ 4:1
+ 200
+ 0
+ 800
+ 1.000
+ 1
+ 1
+ 1
+ 1
+ 8
+ 1
+ 1
+ Disabled
+ Normal
+ FALSE
+
+ 16
+ 10
+ 3
+ 1.5V
+ 536870912
+ BANK_ROW_COLUMN
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+ 8 - Fixed
+ Sequential
+ 6
+ Normal
+ No
+ Slow Exit
+ Enable
+ RZQ/7
+ Disable
+ Enable
+ RZQ/4
+ 0
+ Disabled
+ Enabled
+ Output Buffer Enabled
+ Full Array
+ 5
+ Enabled
+ Normal
+ Dynamic ODT off
+ AXI
+
+ RD_PRI_REG
+ 29
+ 64
+ 4
+ 0
+
+
+
+
diff --git a/new/board_files/netfpga-1g-cml/F.0/netfpga-1g-cml.png b/new/board_files/netfpga-1g-cml/F.0/netfpga-1g-cml.png
new file mode 100644
index 0000000..0f32014
Binary files /dev/null and b/new/board_files/netfpga-1g-cml/F.0/netfpga-1g-cml.png differ
diff --git a/new/board_files/netfpga-1g-cml/F.0/part0_pins.xml b/new/board_files/netfpga-1g-cml/F.0/part0_pins.xml
new file mode 100644
index 0000000..5269987
--- /dev/null
+++ b/new/board_files/netfpga-1g-cml/F.0/part0_pins.xml
@@ -0,0 +1,77 @@
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diff --git a/new/board_files/netfpga-1g-cml/F.0/preset.xml b/new/board_files/netfpga-1g-cml/F.0/preset.xml
new file mode 100644
index 0000000..8b1dd01
--- /dev/null
+++ b/new/board_files/netfpga-1g-cml/F.0/preset.xml
@@ -0,0 +1,34 @@
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