From 3bfb96438e590136057b6f5ff713f08f159de289 Mon Sep 17 00:00:00 2001
From: Edmund Grimley Evans <Edmund.Grimley-Evans@arm.com>
Date: Fri, 27 Jan 2017 09:11:08 +0000
Subject: [PATCH] i#1569 AArch64: Port and enable api/samples/opcodes.c.

Review-URL: https://codereview.appspot.com/314340043
---
 api/samples/CMakeLists.txt | 4 +---
 api/samples/opcodes.c      | 9 ++++++++-
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/api/samples/CMakeLists.txt b/api/samples/CMakeLists.txt
index 49bd7ad7d05..46d88517e35 100644
--- a/api/samples/CMakeLists.txt
+++ b/api/samples/CMakeLists.txt
@@ -240,9 +240,7 @@ add_sample_client(signal      "signal.c"        "drmgr")
 add_sample_client(syscall     "syscall.c"       "drmgr")
 add_sample_client(inline      "inline.c"        "")
 add_sample_client(inscount    "inscount.c"      "drmgr")
-if (NOT AARCH64) # FIXME i#1569: port to AArch64
-  add_sample_client(opcodes     "opcodes.c"       "drx")
-endif ()
+add_sample_client(opcodes     "opcodes.c"       "drx")
 add_sample_client(stl_test    "stl_test.cpp"    "")
 # add utils.h for installation  # NON-PUBLIC
 set(srcs ${srcs} "utils.h")     # NON-PUBLIC
diff --git a/api/samples/opcodes.c b/api/samples/opcodes.c
index 5556b060861..073fd9a0ae3 100644
--- a/api/samples/opcodes.c
+++ b/api/samples/opcodes.c
@@ -64,6 +64,8 @@ enum {
 #elif defined(ARM)
     ISA_ARM_A32,
     ISA_ARM_THUMB,
+#elif defined(AARCH64)
+    ISA_ARM_A64,
 #endif
     NUM_ISA_MODE,
 };
@@ -130,6 +132,8 @@ get_isa_mode_name(uint isa_mode)
     return (isa_mode == ISA_X86_32) ? "32-bit X86" : "64-bit AMD64";
 #elif defined(ARM)
     return (isa_mode == ISA_ARM_A32) ? "32-bit ARM" : "32-bit Thumb";
+#elif defined(AARCH64)
+    return "64-bit AArch64";
 #else
     return "unknown";
 #endif
@@ -188,6 +192,9 @@ get_count_isa_idx(void *drcontext)
         break;
     case DR_ISA_ARM_THUMB:
         return ISA_ARM_THUMB;
+#elif defined (AARCH64)
+    case DR_ISA_ARM_A64:
+        return ISA_ARM_A64;
 #endif
     default:
         DR_ASSERT(false); /* NYI */
@@ -217,7 +224,7 @@ event_basic_block(void *drcontext, void *tag, instrlist_t *bb,
          * optimize the spills and restores.
          */
         drx_insert_counter_update(drcontext, bb, first,
-                                  SPILL_SLOT_1, IF_ARM_(SPILL_SLOT_2)
+                                  SPILL_SLOT_1, IF_AARCHXX_(SPILL_SLOT_2)
                                   &count[isa_idx][instr_get_opcode(instr)], 1,
                                   /* DRX_COUNTER_LOCK is not yet supported on ARM */
                                   IF_X86_ELSE(DRX_COUNTER_LOCK, 0));