diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index 2ee946af32bf197..8d2b60dd75acfee 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -790,6 +790,9 @@ Bug Fixes to C++ Support completes (except deduction guides). Fixes: (`#59827 `_) +- Fix crash when parsing nested requirement. Fixes: + (`#73112 `_) + Bug Fixes to AST Handling ^^^^^^^^^^^^^^^^^^^^^^^^^ - Fixed an import failure of recursive friend class template. diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 2d73f42772a29dc..d2b8fea2e9b8e62 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -5756,6 +5756,18 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, if (CM == "large" && RelocationModel != llvm::Reloc::Static) D.Diag(diag::err_drv_argument_only_allowed_with) << A->getAsString(Args) << "-fno-pic"; + } else if (Triple.isLoongArch()) { + if (CM == "extreme" && + Args.hasFlagNoClaim(options::OPT_fplt, options::OPT_fno_plt, false)) + D.Diag(diag::err_drv_argument_not_allowed_with) + << A->getAsString(Args) << "-fplt"; + Ok = CM == "normal" || CM == "medium" || CM == "extreme"; + // Convert to LLVM recognizable names. + if (Ok) + CM = llvm::StringSwitch(CM) + .Case("normal", "small") + .Case("extreme", "large") + .Default(CM); } else if (Triple.isPPC64() || Triple.isOSAIX()) { Ok = CM == "small" || CM == "medium" || CM == "large"; } else if (Triple.isRISCV()) { diff --git a/clang/lib/Parse/ParseExprCXX.cpp b/clang/lib/Parse/ParseExprCXX.cpp index 79db094e098f8e6..8b86db1bb8fc5d5 100644 --- a/clang/lib/Parse/ParseExprCXX.cpp +++ b/clang/lib/Parse/ParseExprCXX.cpp @@ -3635,10 +3635,12 @@ ExprResult Parser::ParseRequiresExpression() { auto Res = TryParseParameterDeclarationClause(); if (Res != TPResult::False) { // Skip to the closing parenthesis - // FIXME: Don't traverse these tokens twice (here and in - // TryParseParameterDeclarationClause). unsigned Depth = 1; while (Depth != 0) { + bool FoundParen = SkipUntil(tok::l_paren, tok::r_paren, + SkipUntilFlags::StopBeforeMatch); + if (!FoundParen) + break; if (Tok.is(tok::l_paren)) Depth++; else if (Tok.is(tok::r_paren)) diff --git a/clang/test/Driver/mcmodel.c b/clang/test/Driver/mcmodel.c index d8a41b0f5abd9aa..1eb6ae16ff472d9 100644 --- a/clang/test/Driver/mcmodel.c +++ b/clang/test/Driver/mcmodel.c @@ -15,6 +15,14 @@ // RUN: not %clang -### -c --target=aarch64 -mcmodel=medium %s 2>&1 | FileCheck --check-prefix=ERR-MEDIUM %s // RUN: not %clang -### -c --target=aarch64 -mcmodel=kernel %s 2>&1 | FileCheck --check-prefix=ERR-KERNEL %s // RUN: not %clang --target=aarch64_32-linux -### -S -mcmodel=small %s 2>&1 | FileCheck --check-prefix=ERR-AARCH64_32 %s +// RUN: %clang --target=loongarch64 -### -S -mcmodel=normal %s 2>&1 | FileCheck --check-prefix=SMALL %s +// RUN: %clang --target=loongarch64 -### -S -mcmodel=medium %s 2>&1 | FileCheck --check-prefix=MEDIUM %s +// RUN: %clang --target=loongarch64 -### -S -mcmodel=extreme %s 2>&1 | FileCheck --check-prefix=LARGE %s +// RUN: not %clang --target=loongarch64 -### -S -mcmodel=tiny %s 2>&1 | FileCheck --check-prefix=ERR-TINY %s +// RUN: not %clang --target=loongarch64 -### -S -mcmodel=small %s 2>&1 | FileCheck --check-prefix=ERR-SMALL %s +// RUN: not %clang --target=loongarch64 -### -S -mcmodel=kernel %s 2>&1 | FileCheck --check-prefix=ERR-KERNEL %s +// RUN: not %clang --target=loongarch64 -### -S -mcmodel=large %s 2>&1 | FileCheck --check-prefix=ERR-LARGE %s +// RUN: not %clang --target=loongarch64 -### -S -mcmodel=extreme -fplt %s 2>&1 | FileCheck --check-prefix=ERR-LOONGARCH64-PLT-EXTREME %s // TINY: "-mcmodel=tiny" // SMALL: "-mcmodel=small" @@ -25,9 +33,14 @@ // INVALID: error: unsupported argument 'lager' to option '-mcmodel=' for target '{{.*}}' +// ERR-TINY: error: unsupported argument 'tiny' to option '-mcmodel=' for target '{{.*}}' +// ERR-SMALL: error: unsupported argument 'small' to option '-mcmodel=' for target '{{.*}}' // ERR-MEDIUM: error: unsupported argument 'medium' to option '-mcmodel=' for target '{{.*}}' // ERR-KERNEL: error: unsupported argument 'kernel' to option '-mcmodel=' for target '{{.*}}' // ERR-LARGE: error: unsupported argument 'large' to option '-mcmodel=' for target '{{.*}}' // AARCH64-PIC-LARGE: error: invalid argument '-mcmodel=large' only allowed with '-fno-pic' // ERR-AARCH64_32: error: unsupported argument 'small' to option '-mcmodel=' for target 'aarch64_32-unknown-linux' + +// ERR-LOONGARCH64-PLT-LARGE: error: invalid argument '-mcmodel=large' not allowed with '-fplt' +// ERR-LOONGARCH64-PLT-EXTREME: error: invalid argument '-mcmodel=extreme' not allowed with '-fplt' diff --git a/clang/test/Parser/cxx2a-concepts-requires-expr.cpp b/clang/test/Parser/cxx2a-concepts-requires-expr.cpp index a18a54c7fad0690..971591afb08dba2 100644 --- a/clang/test/Parser/cxx2a-concepts-requires-expr.cpp +++ b/clang/test/Parser/cxx2a-concepts-requires-expr.cpp @@ -160,3 +160,11 @@ template requires requires { typename BitInt; // ok } using r44 = void; + +namespace GH73112 { +void f() { + requires { requires(int; } // expected-error {{expected ')'}} \ + // expected-error {{expected expression}} \ + // expected-note {{to match this '('}} +} +} diff --git a/flang/lib/Semantics/check-directive-structure.h b/flang/lib/Semantics/check-directive-structure.h index 7965fb595ff1bab..84240b87f47ec4b 100644 --- a/flang/lib/Semantics/check-directive-structure.h +++ b/flang/lib/Semantics/check-directive-structure.h @@ -79,7 +79,17 @@ template class NoBranchingEnforce { break; } } else if constexpr (std::is_same_v) { - return; // OpenACC construct do not need check for unlabelled CYCLES + switch ((llvm::acc::Directive)currentDirective_) { + // exclude loop directives which do not need a check for unlabelled + // CYCLES + case llvm::acc::Directive::ACCD_loop: + case llvm::acc::Directive::ACCD_kernels_loop: + case llvm::acc::Directive::ACCD_parallel_loop: + case llvm::acc::Directive::ACCD_serial_loop: + return; + default: + break; + } } CheckConstructNameBranching("CYCLE"); } diff --git a/flang/test/Driver/pass-plugin-not-found.f90 b/flang/test/Driver/pass-plugin-not-found.f90 index 08dd29e5dab0683..fc1e690a0cc72bb 100644 --- a/flang/test/Driver/pass-plugin-not-found.f90 +++ b/flang/test/Driver/pass-plugin-not-found.f90 @@ -6,4 +6,4 @@ ! RUN: not %flang_fc1 -emit-llvm -o /dev/null -fpass-plugin=X.Y %s 2>&1 | FileCheck %s --check-prefix=ERROR ! The exact wording of the error message depends on the system dlerror. -! ERROR: error: unable to load plugin 'X.Y': 'Could not load library 'X.Y': {{.*}}: {{.*}}{{[Nn]}}o such file{{.*}}' +! ERROR: error: unable to load plugin 'X.Y': 'Could not load library 'X.Y': {{.*}}{{[[:space:]].*}}{{.*}}: {{.*}}{{[Nn]}}o such file{{.*}}' diff --git a/flang/test/Driver/underscoring.f90 b/flang/test/Driver/underscoring.f90 index 7c03d040504ea54..8a9ed80ea4daba1 100644 --- a/flang/test/Driver/underscoring.f90 +++ b/flang/test/Driver/underscoring.f90 @@ -21,4 +21,4 @@ subroutine test() ! NO-UNDERSCORING-NOT: ext_sub_ ! NO-UNDERSCORING: {{ext_sub[^_]*$}} ! NO-UNDERSCORING-NOT: comblk_ -! NO-UNDERSCORING: comblk, +! NO-UNDERSCORING: {{comblk[^_]*$}} diff --git a/flang/test/Semantics/OpenACC/acc-data.f90 b/flang/test/Semantics/OpenACC/acc-data.f90 index 8d801ebb30f4eca..84eb72825b34cd3 100644 --- a/flang/test/Semantics/OpenACC/acc-data.f90 +++ b/flang/test/Semantics/OpenACC/acc-data.f90 @@ -187,6 +187,19 @@ program openacc_data_validity !$acc data copy(aa) device_type(default) wait !$acc end data + do i = 1, 100 + !$acc data copy(aa) + !ERROR: CYCLE to construct outside of DATA construct is not allowed + if (i == 10) cycle + !$acc end data + end do + + !$acc data copy(aa) + do i = 1, 100 + if (i == 10) cycle + end do + !$acc end data + end program openacc_data_validity module mod1 diff --git a/flang/test/Semantics/OpenACC/acc-kernels.f90 b/flang/test/Semantics/OpenACC/acc-kernels.f90 index de220f7c7ddf7cf..8a209040a779361 100644 --- a/flang/test/Semantics/OpenACC/acc-kernels.f90 +++ b/flang/test/Semantics/OpenACC/acc-kernels.f90 @@ -144,4 +144,17 @@ program openacc_kernels_validity end do !$acc end kernels + do i = 1, 100 + !$acc kernels + !ERROR: CYCLE to construct outside of KERNELS construct is not allowed + if (i == 10) cycle + !$acc end kernels + end do + + !$acc kernels + do i = 1, 100 + if (i == 10) cycle + end do + !$acc end kernels + end program openacc_kernels_validity diff --git a/flang/test/Semantics/OpenACC/acc-parallel.f90 b/flang/test/Semantics/OpenACC/acc-parallel.f90 index 0e8d240d019983f..c87d321593ddf3d 100644 --- a/flang/test/Semantics/OpenACC/acc-parallel.f90 +++ b/flang/test/Semantics/OpenACC/acc-parallel.f90 @@ -142,4 +142,17 @@ program openacc_parallel_validity end do !$acc end parallel + do i = 1, 100 + !$acc parallel + !ERROR: CYCLE to construct outside of PARALLEL construct is not allowed + if (i == 10) cycle + !$acc end parallel + end do + + !$acc parallel + do i = 1, 100 + if (i == 10) cycle + end do + !$acc end parallel + end program openacc_parallel_validity diff --git a/flang/test/Semantics/OpenACC/acc-serial.f90 b/flang/test/Semantics/OpenACC/acc-serial.f90 index db4cd7689435c7f..a23daecce8dd350 100644 --- a/flang/test/Semantics/OpenACC/acc-serial.f90 +++ b/flang/test/Semantics/OpenACC/acc-serial.f90 @@ -166,4 +166,17 @@ program openacc_serial_validity end do !$acc end serial + do i = 1, 100 + !$acc serial + !ERROR: CYCLE to construct outside of SERIAL construct is not allowed + if (i == 10) cycle + !$acc end serial + end do + + !$acc serial + do i = 1, 100 + if (i == 10) cycle + end do + !$acc end serial + end program openacc_serial_validity diff --git a/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp b/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp index 4d7d27b64e4c7f2..c3b22f889c2f472 100644 --- a/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp +++ b/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp @@ -980,8 +980,9 @@ ConvertDWARFCallingConventionToClang(const ParsedDWARFTypeAttributes &attrs) { return clang::CC_C; } -TypeSP DWARFASTParserClang::ParseSubroutine(const DWARFDIE &die, - ParsedDWARFTypeAttributes &attrs) { +TypeSP +DWARFASTParserClang::ParseSubroutine(const DWARFDIE &die, + const ParsedDWARFTypeAttributes &attrs) { Log *log = GetLog(DWARFLog::TypeCompletion | DWARFLog::Lookups); SymbolFileDWARF *dwarf = die.GetDWARF(); @@ -1090,16 +1091,10 @@ TypeSP DWARFASTParserClang::ParseSubroutine(const DWARFDIE &die, } if (class_opaque_type) { - // If accessibility isn't set to anything valid, assume public - // for now... - if (attrs.accessibility == eAccessNone) - attrs.accessibility = eAccessPublic; - clang::ObjCMethodDecl *objc_method_decl = m_ast.AddMethodToObjCObjectType( class_opaque_type, attrs.name.GetCString(), clang_type, - attrs.accessibility, attrs.is_artificial, is_variadic, - attrs.is_objc_direct_call); + attrs.is_artificial, is_variadic, attrs.is_objc_direct_call); type_handled = objc_method_decl != nullptr; if (type_handled) { LinkDeclContextToDIE(objc_method_decl, die); @@ -1206,14 +1201,15 @@ TypeSP DWARFASTParserClang::ParseSubroutine(const DWARFDIE &die, // Neither GCC 4.2 nor clang++ currently set a valid // accessibility in the DWARF for C++ methods... // Default to public for now... - if (attrs.accessibility == eAccessNone) - attrs.accessibility = eAccessPublic; + const auto accessibility = attrs.accessibility == eAccessNone + ? eAccessPublic + : attrs.accessibility; clang::CXXMethodDecl *cxx_method_decl = m_ast.AddMethodToCXXRecordType( class_opaque_type.GetOpaqueQualType(), attrs.name.GetCString(), attrs.mangled_name, - clang_type, attrs.accessibility, attrs.is_virtual, + clang_type, accessibility, attrs.is_virtual, is_static, attrs.is_inline, attrs.is_explicit, is_attr_used, attrs.is_artificial); diff --git a/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h b/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h index 81b705a036189eb..7b495419cf3241b 100644 --- a/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h +++ b/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h @@ -368,7 +368,7 @@ class DWARFASTParserClang : public lldb_private::plugin::dwarf::DWARFASTParser { const lldb_private::plugin::dwarf::DWARFDIE &die, ParsedDWARFTypeAttributes &attrs); lldb::TypeSP ParseSubroutine(const lldb_private::plugin::dwarf::DWARFDIE &die, - ParsedDWARFTypeAttributes &attrs); + const ParsedDWARFTypeAttributes &attrs); lldb::TypeSP ParseArrayType(const lldb_private::plugin::dwarf::DWARFDIE &die, const ParsedDWARFTypeAttributes &attrs); lldb::TypeSP diff --git a/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp b/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp index 6f65587c4acedd1..7c28935f5741c54 100644 --- a/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp +++ b/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp @@ -8110,8 +8110,8 @@ clang::ObjCMethodDecl *TypeSystemClang::AddMethodToObjCObjectType( const char *name, // the full symbol name as seen in the symbol table // (lldb::opaque_compiler_type_t type, "-[NString // stringWithCString:]") - const CompilerType &method_clang_type, lldb::AccessType access, - bool is_artificial, bool is_variadic, bool is_objc_direct_call) { + const CompilerType &method_clang_type, bool is_artificial, bool is_variadic, + bool is_objc_direct_call) { if (!type || !method_clang_type.IsValid()) return nullptr; diff --git a/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h b/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h index 0ec2d026e996105..19f267396e0f0e5 100644 --- a/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h +++ b/lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h @@ -985,8 +985,8 @@ class TypeSystemClang : public TypeSystem { const char *name, // the full symbol name as seen in the symbol table // (lldb::opaque_compiler_type_t type, "-[NString // stringWithCString:]") - const CompilerType &method_compiler_type, lldb::AccessType access, - bool is_artificial, bool is_variadic, bool is_objc_direct_call); + const CompilerType &method_compiler_type, bool is_artificial, + bool is_variadic, bool is_objc_direct_call); static bool SetHasExternalStorage(lldb::opaque_compiler_type_t type, bool has_extern); diff --git a/lldb/unittests/Symbol/TestTypeSystemClang.cpp b/lldb/unittests/Symbol/TestTypeSystemClang.cpp index c83e6ed1d418922..30d20b9587f9130 100644 --- a/lldb/unittests/Symbol/TestTypeSystemClang.cpp +++ b/lldb/unittests/Symbol/TestTypeSystemClang.cpp @@ -941,8 +941,7 @@ TEST_F(TestTypeSystemClang, AddMethodToObjCObjectType) { bool artificial = false; bool objc_direct = false; clang::ObjCMethodDecl *method = TypeSystemClang::AddMethodToObjCObjectType( - c, "-[A foo]", func_type, lldb::eAccessPublic, artificial, variadic, - objc_direct); + c, "-[A foo]", func_type, artificial, variadic, objc_direct); ASSERT_NE(method, nullptr); // The interface decl should still have external lexical storage. diff --git a/llvm/include/llvm/Config/llvm-config.h.cmake b/llvm/include/llvm/Config/llvm-config.h.cmake index 6a8bac66084700b..4100ca467ca8c92 100644 --- a/llvm/include/llvm/Config/llvm-config.h.cmake +++ b/llvm/include/llvm/Config/llvm-config.h.cmake @@ -16,7 +16,7 @@ /* Indicate that this is LLVM compiled from the amd-gfx branch. */ #define LLVM_HAVE_BRANCH_AMD_GFX -#define LLVM_MAIN_REVISION 482212 +#define LLVM_MAIN_REVISION 482223 /* Define if LLVM_ENABLE_DUMP is enabled */ #cmakedefine LLVM_ENABLE_DUMP diff --git a/llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll b/llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll index 16c2617b3564931..cc32a76b22c2872 100644 --- a/llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll +++ b/llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll @@ -1,50 +1,843 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 -; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr7 < %s | FileCheck %s -; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr8 < %s | FileCheck --check-prefix=PWR8 %s - -define <2 x i64> @build_v2i64(ptr nocapture noundef readonly %p, <2 x i64> noundef %a) { -; CHECK-LABEL: build_v2i64: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: lwz 3, 0(3) -; CHECK-NEXT: li 4, 0 -; CHECK-NEXT: std 4, -8(1) -; CHECK-NEXT: std 3, -16(1) -; CHECK-NEXT: addi 3, 1, -16 -; CHECK-NEXT: lxvd2x 34, 0, 3 -; CHECK-NEXT: blr -; -; PWR8-LABEL: build_v2i64: -; PWR8: # %bb.0: # %entry -; PWR8-NEXT: lwz 3, 0(3) -; PWR8-NEXT: li 4, 0 -; PWR8-NEXT: mtfprd 0, 4 -; PWR8-NEXT: mtfprd 1, 3 -; PWR8-NEXT: xxmrghd 34, 1, 0 -; PWR8-NEXT: blr +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr7 < %s | FileCheck --check-prefix=PWR7-BE %s +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr8 < %s | FileCheck --check-prefix=PWR8-BE %s +; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- -mcpu=pwr7 < %s | FileCheck --check-prefix=PWR7-LE %s +; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- -mcpu=pwr8 < %s | FileCheck --check-prefix=PWR8-LE %s + +define <2 x i64> @build_v2i64_extload_0(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v2i64_extload_0: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: std 4, -8(1) +; PWR7-BE-NEXT: std 3, -16(1) +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvd2x 34, 0, 3 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v2i64_extload_0: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lwz 3, 0(3) +; PWR8-BE-NEXT: li 4, 0 +; PWR8-BE-NEXT: mtfprd 0, 4 +; PWR8-BE-NEXT: mtfprd 1, 3 +; PWR8-BE-NEXT: xxmrghd 34, 1, 0 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v2i64_extload_0: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -16(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI0_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI0_0@toc@l +; PWR7-LE-NEXT: stw 3, -32(1) +; PWR7-LE-NEXT: addi 3, 1, -32 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -16 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 3, 4, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v2i64_extload_0: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lwz 3, 0(3) +; PWR8-LE-NEXT: li 4, 0 +; PWR8-LE-NEXT: rldimi 3, 4, 32, 0 +; PWR8-LE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-LE-NEXT: mtfprd 0, 3 +; PWR8-LE-NEXT: mtfprd 1, 4 +; PWR8-LE-NEXT: xxmrghd 34, 1, 0 +; PWR8-LE-NEXT: blr entry: %0 = load i32, ptr %p, align 4 %conv = zext i32 %0 to i64 - %vecinit1 = insertelement <2 x i64> , i64 %conv, i64 0 + %vecinit1 = insertelement <2 x i64> , i64 %conv, i64 0 ret <2 x i64> %vecinit1 } -define <2 x double> @build_v2f64(ptr nocapture noundef readonly %p, <2 x double> noundef %a) { -; CHECK-LABEL: build_v2f64: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: lfs 0, 0(3) -; CHECK-NEXT: xxlxor 1, 1, 1 -; CHECK-NEXT: xxmrghd 34, 0, 1 -; CHECK-NEXT: blr +define <2 x i64> @build_v2i64_extload_1(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v2i64_extload_1: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: std 4, -16(1) +; PWR7-BE-NEXT: std 3, -8(1) +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvd2x 34, 0, 3 +; PWR7-BE-NEXT: blr ; -; PWR8-LABEL: build_v2f64: -; PWR8: # %bb.0: # %entry -; PWR8-NEXT: lfs 0, 0(3) -; PWR8-NEXT: xxlxor 1, 1, 1 -; PWR8-NEXT: xxmrghd 34, 0, 1 -; PWR8-NEXT: blr +; PWR8-BE-LABEL: build_v2i64_extload_1: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lwz 3, 0(3) +; PWR8-BE-NEXT: li 4, 0 +; PWR8-BE-NEXT: mtfprd 0, 4 +; PWR8-BE-NEXT: mtfprd 1, 3 +; PWR8-BE-NEXT: xxmrghd 34, 0, 1 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v2i64_extload_1: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: std 4, -16(1) +; PWR7-LE-NEXT: std 3, -8(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v2i64_extload_1: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lwz 3, 0(3) +; PWR8-LE-NEXT: li 4, 0 +; PWR8-LE-NEXT: mtfprd 0, 4 +; PWR8-LE-NEXT: mtfprd 1, 3 +; PWR8-LE-NEXT: xxmrghd 34, 1, 0 +; PWR8-LE-NEXT: blr +entry: + %0 = load i32, ptr %p, align 4 + %conv = zext i32 %0 to i64 + %vecinit1 = insertelement <2 x i64> , i64 %conv, i64 1 + ret <2 x i64> %vecinit1 +} + +define <2 x double> @build_v2f64_extload_0(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v2f64_extload_0: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lfs 0, 0(3) +; PWR7-BE-NEXT: xxlxor 1, 1, 1 +; PWR7-BE-NEXT: xxmrghd 34, 0, 1 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v2f64_extload_0: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lfs 0, 0(3) +; PWR8-BE-NEXT: xxlxor 1, 1, 1 +; PWR8-BE-NEXT: xxmrghd 34, 0, 1 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v2f64_extload_0: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: lfs 0, 0(3) +; PWR7-LE-NEXT: xxlxor 1, 1, 1 +; PWR7-LE-NEXT: xxmrghd 34, 1, 0 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v2f64_extload_0: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lfs 0, 0(3) +; PWR8-LE-NEXT: xxlxor 1, 1, 1 +; PWR8-LE-NEXT: xxmrghd 34, 1, 0 +; PWR8-LE-NEXT: blr entry: %0 = load float, ptr %p, align 4 %conv = fpext float %0 to double - %vecinit1 = insertelement <2 x double> , double %conv, i64 0 + %vecinit1 = insertelement <2 x double> , double %conv, i64 0 + ret <2 x double> %vecinit1 +} + +define <2 x double> @build_v2f64_extload_1(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v2f64_extload_1: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lfs 0, 0(3) +; PWR7-BE-NEXT: xxlxor 1, 1, 1 +; PWR7-BE-NEXT: xxmrghd 34, 1, 0 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v2f64_extload_1: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lfs 0, 0(3) +; PWR8-BE-NEXT: xxlxor 1, 1, 1 +; PWR8-BE-NEXT: xxmrghd 34, 1, 0 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v2f64_extload_1: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: lfs 0, 0(3) +; PWR7-LE-NEXT: xxlxor 1, 1, 1 +; PWR7-LE-NEXT: xxmrghd 34, 0, 1 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v2f64_extload_1: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lfs 0, 0(3) +; PWR8-LE-NEXT: xxlxor 1, 1, 1 +; PWR8-LE-NEXT: xxmrghd 34, 0, 1 +; PWR8-LE-NEXT: blr +entry: + %0 = load float, ptr %p, align 4 + %conv = fpext float %0 to double + %vecinit1 = insertelement <2 x double> , double %conv, i64 1 + ret <2 x double> %vecinit1 +} + +define <2 x double> @build_v2f64_load_0(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v2f64_load_0: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lfd 0, 0(3) +; PWR7-BE-NEXT: xxlxor 1, 1, 1 +; PWR7-BE-NEXT: xxmrghd 34, 0, 1 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v2f64_load_0: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lfd 0, 0(3) +; PWR8-BE-NEXT: xxlxor 1, 1, 1 +; PWR8-BE-NEXT: xxmrghd 34, 0, 1 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v2f64_load_0: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: lfd 0, 0(3) +; PWR7-LE-NEXT: xxlxor 1, 1, 1 +; PWR7-LE-NEXT: xxmrghd 34, 1, 0 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v2f64_load_0: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lfd 0, 0(3) +; PWR8-LE-NEXT: xxlxor 1, 1, 1 +; PWR8-LE-NEXT: xxmrghd 34, 1, 0 +; PWR8-LE-NEXT: blr +entry: + %0 = load double, ptr %p, align 8 + %vecinit1 = insertelement <2 x double> , double %0, i64 0 + ret <2 x double> %vecinit1 +} + +define <2 x double> @build_v2f64_load_1(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v2f64_load_1: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lfd 0, 0(3) +; PWR7-BE-NEXT: xxlxor 1, 1, 1 +; PWR7-BE-NEXT: xxmrghd 34, 1, 0 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v2f64_load_1: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lfd 0, 0(3) +; PWR8-BE-NEXT: xxlxor 1, 1, 1 +; PWR8-BE-NEXT: xxmrghd 34, 1, 0 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v2f64_load_1: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: lfd 0, 0(3) +; PWR7-LE-NEXT: xxlxor 1, 1, 1 +; PWR7-LE-NEXT: xxmrghd 34, 0, 1 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v2f64_load_1: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lfd 0, 0(3) +; PWR8-LE-NEXT: xxlxor 1, 1, 1 +; PWR8-LE-NEXT: xxmrghd 34, 0, 1 +; PWR8-LE-NEXT: blr +entry: + %0 = load double, ptr %p, align 8 + %vecinit1 = insertelement <2 x double> , double %0, i64 1 ret <2 x double> %vecinit1 } + +define <2 x i64> @build_v2i64_load_0(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v2i64_load_0: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: ld 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: std 4, -8(1) +; PWR7-BE-NEXT: std 3, -16(1) +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvd2x 34, 0, 3 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v2i64_load_0: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: ld 3, 0(3) +; PWR8-BE-NEXT: li 4, 0 +; PWR8-BE-NEXT: mtfprd 0, 4 +; PWR8-BE-NEXT: mtfprd 1, 3 +; PWR8-BE-NEXT: xxmrghd 34, 1, 0 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v2i64_load_0: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: ld 3, 0(3) +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: std 4, -8(1) +; PWR7-LE-NEXT: std 3, -16(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v2i64_load_0: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: ld 3, 0(3) +; PWR8-LE-NEXT: li 4, 0 +; PWR8-LE-NEXT: mtfprd 0, 4 +; PWR8-LE-NEXT: mtfprd 1, 3 +; PWR8-LE-NEXT: xxmrghd 34, 0, 1 +; PWR8-LE-NEXT: blr +entry: + %0 = load i64, ptr %p, align 8 + %vecinit1 = insertelement <2 x i64> , i64 %0, i64 0 + ret <2 x i64> %vecinit1 +} + +define <2 x i64> @build_v2i64_load_1(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v2i64_load_1: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: ld 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: std 4, -16(1) +; PWR7-BE-NEXT: std 3, -8(1) +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvd2x 34, 0, 3 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v2i64_load_1: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: ld 3, 0(3) +; PWR8-BE-NEXT: li 4, 0 +; PWR8-BE-NEXT: mtfprd 0, 4 +; PWR8-BE-NEXT: mtfprd 1, 3 +; PWR8-BE-NEXT: xxmrghd 34, 0, 1 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v2i64_load_1: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: ld 3, 0(3) +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: std 4, -16(1) +; PWR7-LE-NEXT: std 3, -8(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v2i64_load_1: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: ld 3, 0(3) +; PWR8-LE-NEXT: li 4, 0 +; PWR8-LE-NEXT: mtfprd 0, 4 +; PWR8-LE-NEXT: mtfprd 1, 3 +; PWR8-LE-NEXT: xxmrghd 34, 1, 0 +; PWR8-LE-NEXT: blr +entry: + %0 = load i64, ptr %p, align 8 + %vecinit1 = insertelement <2 x i64> , i64 %0, i64 1 + ret <2 x i64> %vecinit1 +} + +define <4 x i32> @build_v4i32_load_0(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v4i32_load_0: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: stw 4, -16(1) +; PWR7-BE-NEXT: stw 3, -32(1) +; PWR7-BE-NEXT: addis 3, 2, .LCPI8_0@toc@ha +; PWR7-BE-NEXT: addi 3, 3, .LCPI8_0@toc@l +; PWR7-BE-NEXT: lxvw4x 34, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvw4x 35, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -32 +; PWR7-BE-NEXT: lxvw4x 36, 0, 3 +; PWR7-BE-NEXT: vperm 2, 4, 3, 2 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v4i32_load_0: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lwz 3, 0(3) +; PWR8-BE-NEXT: li 4, 0 +; PWR8-BE-NEXT: li 5, 0 +; PWR8-BE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-BE-NEXT: rldimi 5, 3, 32, 0 +; PWR8-BE-NEXT: mtfprd 1, 4 +; PWR8-BE-NEXT: mtfprd 0, 5 +; PWR8-BE-NEXT: xxmrghd 34, 0, 1 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v4i32_load_0: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -16(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI8_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI8_0@toc@l +; PWR7-LE-NEXT: stw 3, -32(1) +; PWR7-LE-NEXT: addi 3, 1, -32 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -16 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 3, 4, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v4i32_load_0: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lwz 3, 0(3) +; PWR8-LE-NEXT: li 4, 0 +; PWR8-LE-NEXT: rldimi 3, 4, 32, 0 +; PWR8-LE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-LE-NEXT: mtfprd 0, 3 +; PWR8-LE-NEXT: mtfprd 1, 4 +; PWR8-LE-NEXT: xxmrghd 34, 1, 0 +; PWR8-LE-NEXT: blr +entry: + %0 = load i32, ptr %p, align 4 + %vecinit1 = insertelement <4 x i32> , i32 %0, i32 0 + ret <4 x i32> %vecinit1 +} + +define <4 x i32> @build_v4i32_load_1(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v4i32_load_1: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: stw 4, -32(1) +; PWR7-BE-NEXT: stw 3, -16(1) +; PWR7-BE-NEXT: addis 3, 2, .LCPI9_0@toc@ha +; PWR7-BE-NEXT: addi 3, 3, .LCPI9_0@toc@l +; PWR7-BE-NEXT: lxvw4x 34, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -32 +; PWR7-BE-NEXT: lxvw4x 35, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvw4x 36, 0, 3 +; PWR7-BE-NEXT: vperm 2, 3, 4, 2 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v4i32_load_1: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lwz 3, 0(3) +; PWR8-BE-NEXT: li 4, 0 +; PWR8-BE-NEXT: rldimi 3, 4, 32, 0 +; PWR8-BE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-BE-NEXT: mtfprd 0, 3 +; PWR8-BE-NEXT: mtfprd 1, 4 +; PWR8-BE-NEXT: xxmrghd 34, 0, 1 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v4i32_load_1: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -32(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI9_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI9_0@toc@l +; PWR7-LE-NEXT: stw 3, -16(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -32 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 4, 3, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v4i32_load_1: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lwz 3, 0(3) +; PWR8-LE-NEXT: li 4, 0 +; PWR8-LE-NEXT: li 5, 0 +; PWR8-LE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-LE-NEXT: rldimi 5, 3, 32, 0 +; PWR8-LE-NEXT: mtfprd 1, 4 +; PWR8-LE-NEXT: mtfprd 0, 5 +; PWR8-LE-NEXT: xxmrghd 34, 1, 0 +; PWR8-LE-NEXT: blr +entry: + %0 = load i32, ptr %p, align 4 + %vecinit1 = insertelement <4 x i32> , i32 %0, i32 1 + ret <4 x i32> %vecinit1 +} + +define <4 x i32> @build_v4i32_load_2(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v4i32_load_2: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: stw 4, -32(1) +; PWR7-BE-NEXT: stw 3, -16(1) +; PWR7-BE-NEXT: addis 3, 2, .LCPI10_0@toc@ha +; PWR7-BE-NEXT: addi 3, 3, .LCPI10_0@toc@l +; PWR7-BE-NEXT: lxvw4x 34, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -32 +; PWR7-BE-NEXT: lxvw4x 35, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvw4x 36, 0, 3 +; PWR7-BE-NEXT: vperm 2, 3, 4, 2 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v4i32_load_2: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lwz 3, 0(3) +; PWR8-BE-NEXT: li 4, 0 +; PWR8-BE-NEXT: li 5, 0 +; PWR8-BE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-BE-NEXT: rldimi 5, 3, 32, 0 +; PWR8-BE-NEXT: mtfprd 1, 4 +; PWR8-BE-NEXT: mtfprd 0, 5 +; PWR8-BE-NEXT: xxmrghd 34, 1, 0 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v4i32_load_2: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -32(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI10_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI10_0@toc@l +; PWR7-LE-NEXT: stw 3, -16(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -32 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 4, 3, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v4i32_load_2: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lwz 3, 0(3) +; PWR8-LE-NEXT: li 4, 0 +; PWR8-LE-NEXT: rldimi 3, 4, 32, 0 +; PWR8-LE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-LE-NEXT: mtfprd 0, 3 +; PWR8-LE-NEXT: mtfprd 1, 4 +; PWR8-LE-NEXT: xxmrghd 34, 0, 1 +; PWR8-LE-NEXT: blr +entry: + %0 = load i32, ptr %p, align 4 + %vecinit1 = insertelement <4 x i32> , i32 %0, i32 2 + ret <4 x i32> %vecinit1 +} + +define <4 x i32> @build_v4i32_load_3(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v4i32_load_3: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: stw 4, -32(1) +; PWR7-BE-NEXT: stw 3, -16(1) +; PWR7-BE-NEXT: addis 3, 2, .LCPI11_0@toc@ha +; PWR7-BE-NEXT: addi 3, 3, .LCPI11_0@toc@l +; PWR7-BE-NEXT: lxvw4x 34, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -32 +; PWR7-BE-NEXT: lxvw4x 35, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvw4x 36, 0, 3 +; PWR7-BE-NEXT: vperm 2, 3, 4, 2 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v4i32_load_3: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lwz 3, 0(3) +; PWR8-BE-NEXT: li 4, 0 +; PWR8-BE-NEXT: rldimi 3, 4, 32, 0 +; PWR8-BE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-BE-NEXT: mtfprd 0, 3 +; PWR8-BE-NEXT: mtfprd 1, 4 +; PWR8-BE-NEXT: xxmrghd 34, 1, 0 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v4i32_load_3: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -32(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI11_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI11_0@toc@l +; PWR7-LE-NEXT: stw 3, -16(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -32 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 4, 3, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v4i32_load_3: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lwz 3, 0(3) +; PWR8-LE-NEXT: li 4, 0 +; PWR8-LE-NEXT: li 5, 0 +; PWR8-LE-NEXT: rldimi 4, 4, 32, 0 +; PWR8-LE-NEXT: rldimi 5, 3, 32, 0 +; PWR8-LE-NEXT: mtfprd 1, 4 +; PWR8-LE-NEXT: mtfprd 0, 5 +; PWR8-LE-NEXT: xxmrghd 34, 0, 1 +; PWR8-LE-NEXT: blr +entry: + %0 = load i32, ptr %p, align 4 + %vecinit1 = insertelement <4 x i32> , i32 %0, i32 3 + ret <4 x i32> %vecinit1 +} + +define <4 x float> @build_v4f32_load_0(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v4f32_load_0: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: stw 4, -16(1) +; PWR7-BE-NEXT: stw 3, -32(1) +; PWR7-BE-NEXT: addis 3, 2, .LCPI12_0@toc@ha +; PWR7-BE-NEXT: addi 3, 3, .LCPI12_0@toc@l +; PWR7-BE-NEXT: lxvw4x 34, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvw4x 35, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -32 +; PWR7-BE-NEXT: lxvw4x 36, 0, 3 +; PWR7-BE-NEXT: vperm 2, 4, 3, 2 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v4f32_load_0: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lfs 0, 0(3) +; PWR8-BE-NEXT: xxlxor 1, 1, 1 +; PWR8-BE-NEXT: xxmrghd 0, 0, 1 +; PWR8-BE-NEXT: xxspltd 1, 1, 0 +; PWR8-BE-NEXT: xvcvdpsp 34, 0 +; PWR8-BE-NEXT: xvcvdpsp 35, 1 +; PWR8-BE-NEXT: vmrgew 2, 2, 3 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v4f32_load_0: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -16(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI12_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI12_0@toc@l +; PWR7-LE-NEXT: stw 3, -32(1) +; PWR7-LE-NEXT: addi 3, 1, -32 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -16 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 3, 4, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v4f32_load_0: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lfs 0, 0(3) +; PWR8-LE-NEXT: xxlxor 1, 1, 1 +; PWR8-LE-NEXT: xxmrghd 0, 1, 0 +; PWR8-LE-NEXT: xxspltd 1, 1, 0 +; PWR8-LE-NEXT: xvcvdpsp 34, 0 +; PWR8-LE-NEXT: xvcvdpsp 35, 1 +; PWR8-LE-NEXT: vmrgew 2, 3, 2 +; PWR8-LE-NEXT: blr +entry: + %0 = load float, ptr %p, align 4 + %vecinit1 = insertelement <4 x float> , float %0, i32 0 + ret <4 x float> %vecinit1 +} + +define <4 x float> @build_v4f32_load_1(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v4f32_load_1: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: stw 4, -32(1) +; PWR7-BE-NEXT: stw 3, -16(1) +; PWR7-BE-NEXT: addis 3, 2, .LCPI13_0@toc@ha +; PWR7-BE-NEXT: addi 3, 3, .LCPI13_0@toc@l +; PWR7-BE-NEXT: lxvw4x 34, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -32 +; PWR7-BE-NEXT: lxvw4x 35, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvw4x 36, 0, 3 +; PWR7-BE-NEXT: vperm 2, 3, 4, 2 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v4f32_load_1: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lfs 0, 0(3) +; PWR8-BE-NEXT: xxlxor 1, 1, 1 +; PWR8-BE-NEXT: xxmrghd 0, 0, 1 +; PWR8-BE-NEXT: xxspltd 1, 1, 0 +; PWR8-BE-NEXT: xvcvdpsp 34, 0 +; PWR8-BE-NEXT: xvcvdpsp 35, 1 +; PWR8-BE-NEXT: vmrgew 2, 3, 2 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v4f32_load_1: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -32(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI13_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI13_0@toc@l +; PWR7-LE-NEXT: stw 3, -16(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -32 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 4, 3, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v4f32_load_1: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lfs 0, 0(3) +; PWR8-LE-NEXT: xxlxor 1, 1, 1 +; PWR8-LE-NEXT: xxmrghd 0, 1, 0 +; PWR8-LE-NEXT: xxspltd 1, 1, 0 +; PWR8-LE-NEXT: xvcvdpsp 34, 0 +; PWR8-LE-NEXT: xvcvdpsp 35, 1 +; PWR8-LE-NEXT: vmrgew 2, 2, 3 +; PWR8-LE-NEXT: blr +entry: + %0 = load float, ptr %p, align 4 + %vecinit1 = insertelement <4 x float> , float %0, i32 1 + ret <4 x float> %vecinit1 +} + +define <4 x float> @build_v4f32_load_2(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v4f32_load_2: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: stw 4, -32(1) +; PWR7-BE-NEXT: stw 3, -16(1) +; PWR7-BE-NEXT: addis 3, 2, .LCPI14_0@toc@ha +; PWR7-BE-NEXT: addi 3, 3, .LCPI14_0@toc@l +; PWR7-BE-NEXT: lxvw4x 34, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -32 +; PWR7-BE-NEXT: lxvw4x 35, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvw4x 36, 0, 3 +; PWR7-BE-NEXT: vperm 2, 3, 4, 2 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v4f32_load_2: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lfs 0, 0(3) +; PWR8-BE-NEXT: xxlxor 1, 1, 1 +; PWR8-BE-NEXT: xxmrghd 0, 1, 0 +; PWR8-BE-NEXT: xxspltd 1, 1, 0 +; PWR8-BE-NEXT: xvcvdpsp 34, 0 +; PWR8-BE-NEXT: xvcvdpsp 35, 1 +; PWR8-BE-NEXT: vmrgew 2, 2, 3 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v4f32_load_2: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -32(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI14_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI14_0@toc@l +; PWR7-LE-NEXT: stw 3, -16(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -32 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 4, 3, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v4f32_load_2: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lfs 0, 0(3) +; PWR8-LE-NEXT: xxlxor 1, 1, 1 +; PWR8-LE-NEXT: xxmrghd 0, 0, 1 +; PWR8-LE-NEXT: xxspltd 1, 1, 0 +; PWR8-LE-NEXT: xvcvdpsp 34, 0 +; PWR8-LE-NEXT: xvcvdpsp 35, 1 +; PWR8-LE-NEXT: vmrgew 2, 3, 2 +; PWR8-LE-NEXT: blr +entry: + %0 = load float, ptr %p, align 4 + %vecinit1 = insertelement <4 x float> , float %0, i32 2 + ret <4 x float> %vecinit1 +} + +define <4 x float> @build_v4f32_load_3(ptr nocapture noundef readonly %p) { +; PWR7-BE-LABEL: build_v4f32_load_3: +; PWR7-BE: # %bb.0: # %entry +; PWR7-BE-NEXT: lwz 3, 0(3) +; PWR7-BE-NEXT: li 4, 0 +; PWR7-BE-NEXT: stw 4, -32(1) +; PWR7-BE-NEXT: stw 3, -16(1) +; PWR7-BE-NEXT: addis 3, 2, .LCPI15_0@toc@ha +; PWR7-BE-NEXT: addi 3, 3, .LCPI15_0@toc@l +; PWR7-BE-NEXT: lxvw4x 34, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -32 +; PWR7-BE-NEXT: lxvw4x 35, 0, 3 +; PWR7-BE-NEXT: addi 3, 1, -16 +; PWR7-BE-NEXT: lxvw4x 36, 0, 3 +; PWR7-BE-NEXT: vperm 2, 3, 4, 2 +; PWR7-BE-NEXT: blr +; +; PWR8-BE-LABEL: build_v4f32_load_3: +; PWR8-BE: # %bb.0: # %entry +; PWR8-BE-NEXT: lfs 0, 0(3) +; PWR8-BE-NEXT: xxlxor 1, 1, 1 +; PWR8-BE-NEXT: xxmrghd 0, 1, 0 +; PWR8-BE-NEXT: xxspltd 1, 1, 0 +; PWR8-BE-NEXT: xvcvdpsp 34, 0 +; PWR8-BE-NEXT: xvcvdpsp 35, 1 +; PWR8-BE-NEXT: vmrgew 2, 3, 2 +; PWR8-BE-NEXT: blr +; +; PWR7-LE-LABEL: build_v4f32_load_3: +; PWR7-LE: # %bb.0: # %entry +; PWR7-LE-NEXT: li 4, 0 +; PWR7-LE-NEXT: lwz 3, 0(3) +; PWR7-LE-NEXT: stw 4, -32(1) +; PWR7-LE-NEXT: addis 4, 2, .LCPI15_0@toc@ha +; PWR7-LE-NEXT: addi 4, 4, .LCPI15_0@toc@l +; PWR7-LE-NEXT: stw 3, -16(1) +; PWR7-LE-NEXT: addi 3, 1, -16 +; PWR7-LE-NEXT: lxvd2x 0, 0, 4 +; PWR7-LE-NEXT: addi 4, 1, -32 +; PWR7-LE-NEXT: lxvd2x 1, 0, 4 +; PWR7-LE-NEXT: xxswapd 34, 0 +; PWR7-LE-NEXT: lxvd2x 0, 0, 3 +; PWR7-LE-NEXT: xxswapd 35, 1 +; PWR7-LE-NEXT: xxswapd 36, 0 +; PWR7-LE-NEXT: vperm 2, 4, 3, 2 +; PWR7-LE-NEXT: blr +; +; PWR8-LE-LABEL: build_v4f32_load_3: +; PWR8-LE: # %bb.0: # %entry +; PWR8-LE-NEXT: lfs 0, 0(3) +; PWR8-LE-NEXT: xxlxor 1, 1, 1 +; PWR8-LE-NEXT: xxmrghd 0, 0, 1 +; PWR8-LE-NEXT: xxspltd 1, 1, 0 +; PWR8-LE-NEXT: xvcvdpsp 34, 0 +; PWR8-LE-NEXT: xvcvdpsp 35, 1 +; PWR8-LE-NEXT: vmrgew 2, 2, 3 +; PWR8-LE-NEXT: blr +entry: + %0 = load float, ptr %p, align 4 + %vecinit1 = insertelement <4 x float> , float %0, i32 3 + ret <4 x float> %vecinit1 +} diff --git a/llvm/test/CodeGen/RISCV/imm.ll b/llvm/test/CodeGen/RISCV/imm.ll index cafcf72c022ff4a..9e356a93526cdd2 100644 --- a/llvm/test/CodeGen/RISCV/imm.ll +++ b/llvm/test/CodeGen/RISCV/imm.ll @@ -1558,7 +1558,6 @@ define i64 @imm_2reg_1() nounwind { ret i64 -1152921504301427080 ; 0xF000_0000_1234_5678 } -; FIXME: This should use a single ADDI for the immediate. define void @imm_store_i16_neg1(ptr %p) nounwind { ; RV32I-LABEL: imm_store_i16_neg1: ; RV32I: # %bb.0: @@ -1611,7 +1610,6 @@ define void @imm_store_i16_neg1(ptr %p) nounwind { ret void } -; FIXME: This should use a single ADDI for the immediate. define void @imm_store_i32_neg1(ptr %p) nounwind { ; RV32I-LABEL: imm_store_i32_neg1: ; RV32I: # %bb.0: diff --git a/utils/bazel/llvm-project-overlay/mlir/BUILD.bazel b/utils/bazel/llvm-project-overlay/mlir/BUILD.bazel index 8896b94c1927017..6ecf28424ba4a5c 100644 --- a/utils/bazel/llvm-project-overlay/mlir/BUILD.bazel +++ b/utils/bazel/llvm-project-overlay/mlir/BUILD.bazel @@ -601,8 +601,8 @@ mlir_c_api_cc_library( ":Support", ":ToLLVMIRTranslation", ":ToLLVMIRTranslationRegistration", - "//third_party/llvm/llvm-project/llvm:Core", - "//third_party/llvm/llvm-project/llvm:Support", + "//llvm:Core", + "//llvm:Support", ], ) @@ -5717,6 +5717,7 @@ cc_library( ":AsyncToLLVM", ":ControlFlowToLLVM", ":ConversionPassIncGen", + ":ConvertToLLVM", ":FuncToLLVM", ":GPUDialect", ":GPUTransforms",