From 48d57a312f33e5c05e27450677a0a05474887b76 Mon Sep 17 00:00:00 2001 From: Catherine Date: Mon, 15 Apr 2024 06:25:41 +0000 Subject: [PATCH] access.direct.multiplexer: add stream interfaces to FIFO ports. --- software/glasgow/access/direct/multiplexer.py | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/software/glasgow/access/direct/multiplexer.py b/software/glasgow/access/direct/multiplexer.py index 121fbfc89..67e838200 100644 --- a/software/glasgow/access/direct/multiplexer.py +++ b/software/glasgow/access/direct/multiplexer.py @@ -1,6 +1,8 @@ import logging from amaranth import * +from amaranth.lib import wiring +from ...gateware import stream from .. import AccessMultiplexer, AccessMultiplexerInterface @@ -31,6 +33,11 @@ def __init__(self, fifo): self.r_rdy = Signal() self.r_data = fifo.r_data + self.r_stream = stream.Signature(8).create() + self.r_stream.payload = self.r_data + self.r_stream.valid = self.r_rdy + self.r_stream.ready = self.r_en + def elaborate(self, platform): fifo = self._fifo @@ -70,6 +77,11 @@ def __init__(self, fifo): self.w_data = fifo.w_data self.flush = fifo.flush + self.w_stream = stream.Signature(8).flip().create() + self.w_stream.payload = self.w_data + self.w_stream.valid = self.w_en + self.w_stream.ready = self.w_rdy + def elaborate(self, platform): fifo = self._fifo