diff --git a/src/core/memory/mmu.rs b/src/core/memory/mmu.rs
index b52a277..901da27 100644
--- a/src/core/memory/mmu.rs
+++ b/src/core/memory/mmu.rs
@@ -94,7 +94,9 @@ impl MmuArm9Inner {
     }
 
     fn update_wram_no_tcm(&mut self, emu: &Emu) {
-        let shm = &get_mem!(emu).shm;
+        let mem = get_mem!(emu);
+        let shm = &mem.shm;
+        let wram = &mem.wram;
 
         for addr in (SHARED_WRAM_OFFSET..IO_PORTS_OFFSET).step_by(MMU_PAGE_SIZE) {
             self.vmem.destroy_map(addr as usize, MMU_PAGE_SIZE);
@@ -102,7 +104,7 @@ impl MmuArm9Inner {
             let mmu_read = &mut self.mmu_read[(addr as usize) >> MMU_PAGE_SHIFT];
             let mmu_write = &mut self.mmu_write[(addr as usize) >> MMU_PAGE_SHIFT];
 
-            let shm_offset = get_mem!(emu).wram.get_shm_offset::<{ ARM9 }>(addr);
+            let shm_offset = wram.get_shm_offset::<{ ARM9 }>(addr);
             if shm_offset != usize::MAX {
                 self.vmem.create_map(shm, shm_offset, addr as usize, MMU_PAGE_SIZE, true, true, false).unwrap();
                 *mmu_read = shm_offset;
@@ -118,6 +120,7 @@ impl MmuArm9Inner {
     fn update_tcm(&mut self, start: u32, end: u32, emu: &Emu) {
         let shm = &get_mem!(emu).shm;
 
+        let cp15 = get_cp15!(emu, ARM9);
         for addr in (start..end).step_by(MMU_PAGE_SIZE) {
             self.vmem_tcm.destroy_map(addr as usize, MMU_PAGE_SIZE);
 
@@ -177,7 +180,6 @@ impl MmuArm9Inner {
                 _ => {}
             }
 
-            let cp15 = get_cp15!(emu, ARM9);
             if addr < cp15.itcm_size {
                 if cp15.itcm_state == TcmState::RW {
                     let addr_offset = (addr as usize) & (ITCM_REGION.size - 1);
@@ -198,7 +200,6 @@ impl MmuArm9Inner {
             }
         }
 
-        let cp15 = get_cp15!(emu, ARM9);
         self.current_itcm_size = cp15.itcm_size;
         self.current_dtcm_addr = cp15.dtcm_addr;
         self.current_dtcm_size = cp15.dtcm_size;
diff --git a/src/jit/assembler/block_reg_allocator.rs b/src/jit/assembler/block_reg_allocator.rs
index b0f5f24..7fe8939 100644
--- a/src/jit/assembler/block_reg_allocator.rs
+++ b/src/jit/assembler/block_reg_allocator.rs
@@ -16,7 +16,7 @@ const SCRATCH_REGS: RegReserve = reg_reserve!(Reg::R0, Reg::R1, Reg::R2, Reg::R3
 pub struct BlockRegAllocator {
     pub global_mapping: NoHashMap<u16, Reg>,
     stored_mapping: HeapMem<Reg, { ANY_REG_LIMIT as usize }>, // mappings to real registers
-    stored_mapping_reverse: [Option<u16>; Reg::SP as usize],
+    stored_mapping_reverse: [Option<u16>; Reg::PC as usize],
     spilled: BlockRegSet,
     pub dirty_regs: RegReserve,
     pub pre_allocate_insts: Vec<BlockInst>,
@@ -27,7 +27,7 @@ impl BlockRegAllocator {
         BlockRegAllocator {
             global_mapping: NoHashMap::default(),
             stored_mapping: HeapMem::new(),
-            stored_mapping_reverse: [None; Reg::SP as usize],
+            stored_mapping_reverse: [None; Reg::PC as usize],
             spilled: BlockRegSet::new(),
             dirty_regs: RegReserve::new(),
             pre_allocate_insts: Vec::new(),
diff --git a/src/jit/jit_asm.rs b/src/jit/jit_asm.rs
index dd8aae9..0d7ae5f 100644
--- a/src/jit/jit_asm.rs
+++ b/src/jit/jit_asm.rs
@@ -200,21 +200,25 @@ fn emit_code_block_internal<const CPU: CpuType, const THUMB: bool>(asm: &mut Jit
             asm.jit_buf.current_pc = guest_pc + (i << if THUMB { 1 } else { 2 }) as u32;
             debug_println!("{CPU:?} emitting {:?} at pc: {:x}", asm.jit_buf.current_inst(), asm.jit_buf.current_pc);
 
-            // if asm.jit_buf.current_pc == 0x20018cc {
+            // if asm.jit_buf.current_pc == 0x2019766 {
             //     block_asm.bkpt(1);
             // }
 
+            if asm.jit_buf.current_pc == 0x201972c {
+                block_asm.bkpt(1);
+            }
+
             if THUMB {
                 asm.emit_thumb(&mut block_asm);
             } else {
                 asm.emit(&mut block_asm);
             }
 
-            if DEBUG_LOG {
-                block_asm.save_context();
-                block_asm.call2(debug_after_exec_op::<CPU> as *const (), asm.jit_buf.current_pc, asm.jit_buf.current_inst().opcode);
-                block_asm.restore_reg(Reg::CPSR);
-            }
+            // if DEBUG_LOG {
+            //     block_asm.save_context();
+            //     block_asm.call2(debug_after_exec_op::<CPU> as *const (), asm.jit_buf.current_pc, asm.jit_buf.current_inst().opcode);
+            //     block_asm.restore_reg(Reg::CPSR);
+            // }
         }
 
         let opcodes_len = block_asm.emit_opcodes(guest_pc, THUMB);