diff --git a/allowlists/al_06_2D b/allowlists/al_06_2D index f421c71..4b332c1 100644 --- a/allowlists/al_06_2D +++ b/allowlists/al_06_2D @@ -166,57 +166,57 @@ # 0x0000041A 0x0000000000000000 # "IA32_MC6_ADDR (Table: 2-23)" # 0x0000041B 0x0000000000000000 # "IA32_MC6_MISC (Table: 2-23)" # 0x0000041C 0x0000000000000000 # "IA32_MC7_CTL (Table: 2-23)" -# 0x0000041D 0x0000000000000000 # "IA32_MC7_STATUS (Table: 2-23)" -# 0x0000041E 0x0000000000000000 # "IA32_MC7_ADDR (Table: 2-23)" -# 0x0000041F 0x0000000000000000 # "IA32_MC7_MISC (Table: 2-23)" -# 0x00000420 0x0000000000000000 # "IA32_MC8_CTL (Table: 2-23)" -# 0x00000421 0x0000000000000000 # "IA32_MC8_STATUS (Table: 2-23)" -# 0x00000422 0x0000000000000000 # "IA32_MC8_ADDR (Table: 2-23)" -# 0x00000423 0x0000000000000000 # "IA32_MC8_MISC (Table: 2-23)" -# 0x00000424 0x0000000000000000 # "IA32_MC9_CTL (Table: 2-23)" -# 0x00000425 0x0000000000000000 # "IA32_MC9_STATUS (Table: 2-23)" -# 0x00000426 0x0000000000000000 # "IA32_MC9_ADDR (Table: 2-23)" -# 0x00000427 0x0000000000000000 # "IA32_MC9_MISC (Table: 2-23)" -# 0x00000428 0x0000000000000000 # "IA32_MC10_CTL (Table: 2-23)" -# 0x00000429 0x0000000000000000 # "IA32_MC10_STATUS (Table: 2-23)" -# 0x0000042A 0x0000000000000000 # "IA32_MC10_ADDR (Table: 2-23)" -# 0x0000042B 0x0000000000000000 # "IA32_MC10_MISC (Table: 2-23)" -# 0x0000042C 0x0000000000000000 # "IA32_MC11_CTL (Table: 2-23)" -# 0x0000042D 0x0000000000000000 # "IA32_MC11_STATUS (Table: 2-23)" -# 0x0000042E 0x0000000000000000 # "IA32_MC11_ADDR (Table: 2-23)" -# 0x0000042F 0x0000000000000000 # "IA32_MC11_MISC (Table: 2-23)" -# 0x00000430 0x0000000000000000 # "IA32_MC12_CTL (Table: 2-23)" -# 0x00000431 0x0000000000000000 # "IA32_MC12_STATUS (Table: 2-23)" -# 0x00000432 0x0000000000000000 # "IA32_MC12_ADDR (Table: 2-23)" -# 0x00000433 0x0000000000000000 # "IA32_MC12_MISC (Table: 2-23)" -# 0x00000434 0x0000000000000000 # "IA32_MC13_CTL (Table: 2-23)" -# 0x00000435 0x0000000000000000 # "IA32_MC13_STATUS (Table: 2-23)" -# 0x00000436 0x0000000000000000 # "IA32_MC13_ADDR (Table: 2-23)" -# 0x00000437 0x0000000000000000 # "IA32_MC13_MISC (Table: 2-23)" -# 0x00000438 0x0000000000000000 # "IA32_MC14_CTL (Table: 2-23)" -# 0x00000439 0x0000000000000000 # "IA32_MC14_STATUS (Table: 2-23)" -# 0x0000043A 0x0000000000000000 # "IA32_MC14_ADDR (Table: 2-23)" -# 0x0000043B 0x0000000000000000 # "IA32_MC14_MISC (Table: 2-23)" -# 0x0000043C 0x0000000000000000 # "IA32_MC15_CTL (Table: 2-23)" -# 0x0000043D 0x0000000000000000 # "IA32_MC15_STATUS (Table: 2-23)" -# 0x0000043E 0x0000000000000000 # "IA32_MC15_ADDR (Table: 2-23)" -# 0x0000043F 0x0000000000000000 # "IA32_MC15_MISC (Table: 2-23)" -# 0x00000440 0x0000000000000000 # "IA32_MC16_CTL (Table: 2-23)" -# 0x00000441 0x0000000000000000 # "IA32_MC16_STATUS (Table: 2-23)" -# 0x00000442 0x0000000000000000 # "IA32_MC16_ADDR (Table: 2-23)" -# 0x00000443 0x0000000000000000 # "IA32_MC16_MISC (Table: 2-23)" -# 0x00000444 0x0000000000000000 # "IA32_MC17_CTL (Table: 2-23)" -# 0x00000445 0x0000000000000000 # "IA32_MC17_STATUS (Table: 2-23)" -# 0x00000446 0x0000000000000000 # "IA32_MC17_ADDR (Table: 2-23)" -# 0x00000447 0x0000000000000000 # "IA32_MC17_MISC (Table: 2-23)" -# 0x00000448 0x0000000000000000 # "IA32_MC18_CTL (Table: 2-23)" -# 0x00000449 0x0000000000000000 # "IA32_MC18_STATUS (Table: 2-23)" -# 0x0000044A 0x0000000000000000 # "IA32_MC18_ADDR (Table: 2-23)" -# 0x0000044B 0x0000000000000000 # "IA32_MC18_MISC (Table: 2-23)" -# 0x0000044C 0x0000000000000000 # "IA32_MC19_CTL (Table: 2-23)" -# 0x0000044D 0x0000000000000000 # "IA32_MC19_STATUS (Table: 2-23)" -# 0x0000044E 0x0000000000000000 # "IA32_MC19_ADDR (Table: 2-23)" -# 0x0000044F 0x0000000000000000 # "IA32_MC19_MISC (Table: 2-23)" +# 0x0000041D 0x0000000000000000 # "IA32_MC7_STATUS (Table: 2-24)" +# 0x0000041E 0x0000000000000000 # "IA32_MC7_ADDR (Table: 2-24)" +# 0x0000041F 0x0000000000000000 # "IA32_MC7_MISC (Table: 2-24)" +# 0x00000420 0x0000000000000000 # "IA32_MC8_CTL (Table: 2-24)" +# 0x00000421 0x0000000000000000 # "IA32_MC8_STATUS (Table: 2-24)" +# 0x00000422 0x0000000000000000 # "IA32_MC8_ADDR (Table: 2-24)" +# 0x00000423 0x0000000000000000 # "IA32_MC8_MISC (Table: 2-24)" +# 0x00000424 0x0000000000000000 # "IA32_MC9_CTL (Table: 2-24)" +# 0x00000425 0x0000000000000000 # "IA32_MC9_STATUS (Table: 2-24)" +# 0x00000426 0x0000000000000000 # "IA32_MC9_ADDR (Table: 2-24)" +# 0x00000427 0x0000000000000000 # "IA32_MC9_MISC (Table: 2-24)" +# 0x00000428 0x0000000000000000 # "IA32_MC10_CTL (Table: 2-24)" +# 0x00000429 0x0000000000000000 # "IA32_MC10_STATUS (Table: 2-24)" +# 0x0000042A 0x0000000000000000 # "IA32_MC10_ADDR (Table: 2-24)" +# 0x0000042B 0x0000000000000000 # "IA32_MC10_MISC (Table: 2-24)" +# 0x0000042C 0x0000000000000000 # "IA32_MC11_CTL (Table: 2-24)" +# 0x0000042D 0x0000000000000000 # "IA32_MC11_STATUS (Table: 2-24)" +# 0x0000042E 0x0000000000000000 # "IA32_MC11_ADDR (Table: 2-24)" +# 0x0000042F 0x0000000000000000 # "IA32_MC11_MISC (Table: 2-24)" +# 0x00000430 0x0000000000000000 # "IA32_MC12_CTL (Table: 2-24)" +# 0x00000431 0x0000000000000000 # "IA32_MC12_STATUS (Table: 2-24)" +# 0x00000432 0x0000000000000000 # "IA32_MC12_ADDR (Table: 2-24)" +# 0x00000433 0x0000000000000000 # "IA32_MC12_MISC (Table: 2-24)" +# 0x00000434 0x0000000000000000 # "IA32_MC13_CTL (Table: 2-24)" +# 0x00000435 0x0000000000000000 # "IA32_MC13_STATUS (Table: 2-24)" +# 0x00000436 0x0000000000000000 # "IA32_MC13_ADDR (Table: 2-24)" +# 0x00000437 0x0000000000000000 # "IA32_MC13_MISC (Table: 2-24)" +# 0x00000438 0x0000000000000000 # "IA32_MC14_CTL (Table: 2-24)" +# 0x00000439 0x0000000000000000 # "IA32_MC14_STATUS (Table: 2-24)" +# 0x0000043A 0x0000000000000000 # "IA32_MC14_ADDR (Table: 2-24)" +# 0x0000043B 0x0000000000000000 # "IA32_MC14_MISC (Table: 2-24)" +# 0x0000043C 0x0000000000000000 # "IA32_MC15_CTL (Table: 2-24)" +# 0x0000043D 0x0000000000000000 # "IA32_MC15_STATUS (Table: 2-24)" +# 0x0000043E 0x0000000000000000 # "IA32_MC15_ADDR (Table: 2-24)" +# 0x0000043F 0x0000000000000000 # "IA32_MC15_MISC (Table: 2-24)" +# 0x00000440 0x0000000000000000 # "IA32_MC16_CTL (Table: 2-24)" +# 0x00000441 0x0000000000000000 # "IA32_MC16_STATUS (Table: 2-24)" +# 0x00000442 0x0000000000000000 # "IA32_MC16_ADDR (Table: 2-24)" +# 0x00000443 0x0000000000000000 # "IA32_MC16_MISC (Table: 2-24)" +# 0x00000444 0x0000000000000000 # "IA32_MC17_CTL (Table: 2-24)" +# 0x00000445 0x0000000000000000 # "IA32_MC17_STATUS (Table: 2-24)" +# 0x00000446 0x0000000000000000 # "IA32_MC17_ADDR (Table: 2-24)" +# 0x00000447 0x0000000000000000 # "IA32_MC17_MISC (Table: 2-24)" +# 0x00000448 0x0000000000000000 # "IA32_MC18_CTL (Table: 2-24)" +# 0x00000449 0x0000000000000000 # "IA32_MC18_STATUS (Table: 2-24)" +# 0x0000044A 0x0000000000000000 # "IA32_MC18_ADDR (Table: 2-24)" +# 0x0000044B 0x0000000000000000 # "IA32_MC18_MISC (Table: 2-24)" +# 0x0000044C 0x0000000000000000 # "IA32_MC19_CTL (Table: 2-24)" +# 0x0000044D 0x0000000000000000 # "IA32_MC19_STATUS (Table: 2-24)" +# 0x0000044E 0x0000000000000000 # "IA32_MC19_ADDR (Table: 2-24)" +# 0x0000044F 0x0000000000000000 # "IA32_MC19_MISC (Table: 2-24)" # 0x00000480 0x0000000000000000 # "IA32_VMX_BASIC (Table: 2-20)" # 0x00000481 0x0000000000000000 # "IA32_VMX_PINBASED_CTLS (Table: 2-20)" # 0x00000482 0x0000000000000000 # "IA32_VMX_PROCBASED_CTLS (Table: 2-20)" @@ -249,14 +249,14 @@ # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" # 0x00000611 0x0000000000000000 # "MSR_PKG_ENERGY_STATUS (Table: 2-20)" -# 0x00000613 0x0000000000000000 # "MSR_PKG_PERF_STATUS (Table: 2-23)" +# 0x00000613 0x0000000000000000 # "MSR_PKG_PERF_STATUS (Table: 2-24)" # 0x00000614 0x0000000000000000 # "MSR_PKG_POWER_INFO (Table: 2-20)" -# 0x00000618 0x0000000000000000 # "MSR_DRAM_POWER_LIMIT (Table: 2-23)" -# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-23)" -# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-23)" -# 0x0000061C 0x0000000000000000 # "MSR_DRAM_POWER_INFO (Table: 2-23)" +# 0x00000618 0x0000000000000000 # "MSR_DRAM_POWER_LIMIT (Table: 2-24)" +# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-24)" +# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-24)" +# 0x0000061C 0x0000000000000000 # "MSR_DRAM_POWER_INFO (Table: 2-24)" # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" -# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-23)" +# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-24)" # 0x00000680 0x0000000000000000 # "MSR_LASTBRANCH_0_FROM_IP (Table: 2-20)" # 0x00000681 0x0000000000000000 # "MSR_LASTBRANCH_1_FROM_IP (Table: 2-20)" # 0x00000682 0x0000000000000000 # "MSR_LASTBRANCH_2_FROM_IP (Table: 2-20)" diff --git a/allowlists/al_06_3A b/allowlists/al_06_3A index dd85e1a..a2ef92a 100644 --- a/allowlists/al_06_3A +++ b/allowlists/al_06_3A @@ -25,8 +25,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-25)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-25)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -184,7 +184,7 @@ # 0x00000611 0x0000000000000000 # "MSR_PKG_ENERGY_STATUS (Table: 2-20)" # 0x00000614 0x0000000000000000 # "MSR_PKG_POWER_INFO (Table: 2-20)" # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" -# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-21)" +# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-25)" # 0x0000063A 0x0000000000000000 # "MSR_PP0_POLICY (Table: 2-21)" # 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-21)" # 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-21)" diff --git a/allowlists/al_06_3C b/allowlists/al_06_3C index 72a0d5f..b6ea81a 100644 --- a/allowlists/al_06_3C +++ b/allowlists/al_06_3C @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-30)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -39,10 +39,10 @@ # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-30)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -58,13 +58,13 @@ # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" # 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)" -# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-21)" +# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-30)" # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,15 +116,15 @@ # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-20)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-20)" -# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-22)" -# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-22)" -# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-22)" -# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-22)" -# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-22)" -# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-22)" -# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-22)" -# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-22)" -# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-22)" +# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-30)" +# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-30)" +# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-30)" +# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-30)" +# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-30)" +# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-30)" +# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-30)" +# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-30)" +# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-30)" # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" @@ -181,11 +181,9 @@ # 0x000004E2 0x0000000000000000 # "MSR_SMM_DELAYED (Table: 2-30)" # 0x000004E3 0x0000000000000000 # "MSR_SMM_BLOCKED (Table: 2-30)" # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" -# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" +# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-30)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -195,11 +193,11 @@ # 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-29)" # 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-29)" # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" -# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-21)" +# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-30)" # 0x0000063A 0x0000000000000000 # "MSR_PP0_POLICY (Table: 2-21)" -# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-21)" -# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-21)" -# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-21)" +# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-30)" +# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-30)" +# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-30)" # 0x00000648 0x0000000000000000 # "MSR_CONFIG_TDP_NOMINAL (Table: 2-29)" # 0x00000649 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL1 (Table: 2-29)" # 0x0000064A 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL2 (Table: 2-29)" @@ -241,40 +239,40 @@ # 0x000006CE 0x0000000000000000 # "MSR_LASTBRANCH_14_TO_IP (Table: 2-20)" # 0x000006CF 0x0000000000000000 # "MSR_LASTBRANCH_15_TO_IP (Table: 2-20)" # 0x000006E0 0x0000000000000000 # "IA32_TSC_DEADLINE (Table: 2-20)" -# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-22)" -# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-22)" +# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-30)" +# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-30)" # 0x00000702 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL2 (Table: 2-22)" # 0x00000703 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL3 (Table: 2-22)" # 0x00000705 0x0000000000000000 # "MSR_UNC_CBO_0_UNIT_STATUS (Table: 2-22)" -# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-22)" -# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-22)" +# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-30)" +# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-30)" # 0x00000708 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR2 (Table: 2-22)" # 0x00000709 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR3 (Table: 2-22)" -# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-22)" -# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-22)" +# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-30)" +# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-30)" # 0x00000712 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL2 (Table: 2-22)" # 0x00000713 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL3 (Table: 2-22)" # 0x00000715 0x0000000000000000 # "MSR_UNC_CBO_1_UNIT_STATUS (Table: 2-22)" -# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-22)" -# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-22)" +# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-30)" +# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-30)" # 0x00000718 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR2 (Table: 2-22)" # 0x00000719 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR3 (Table: 2-22)" -# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-22)" -# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-22)" +# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-30)" +# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-30)" # 0x00000722 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL2 (Table: 2-22)" # 0x00000723 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL3 (Table: 2-22)" # 0x00000725 0x0000000000000000 # "MSR_UNC_CBO_2_UNIT_STATUS (Table: 2-22)" -# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-22)" -# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-22)" +# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-30)" +# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-30)" # 0x00000728 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000729 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" -# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-22)" -# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-22)" +# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-30)" +# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-30)" # 0x00000732 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL2 (Table: 2-22)" # 0x00000733 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL3 (Table: 2-22)" # 0x00000735 0x0000000000000000 # "MSR_UNC_CBO_3_UNIT_STATUS (Table: 2-22)" -# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-22)" -# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-22)" +# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-30)" +# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-30)" # 0x00000738 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000739 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" # 0x00000740 0x0000000000000000 # "MSR_UNC_CBO_4_PERFEVTSEL0 (Table: 2-22)" diff --git a/allowlists/al_06_3D b/allowlists/al_06_3D index 1b76eb3..e5fa3fd 100644 --- a/allowlists/al_06_3D +++ b/allowlists/al_06_3D @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -39,10 +39,10 @@ # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-30)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -62,9 +62,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -113,18 +113,18 @@ # 0x0000030B 0x0000000000000000 # "IA32_FIXED_CTR2 (Table: 2-20)" # 0x00000345 0x0000000000000000 # "IA32_PERF_CAPABILITIES (Table: 2-20)" # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" -# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-20)" +# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-34)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-20)" -# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-22)" -# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-22)" -# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-22)" -# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-22)" -# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-22)" -# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-22)" -# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-22)" -# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-22)" -# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-22)" +# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-34)" +# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-30)" +# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-30)" +# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-30)" +# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-30)" +# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-30)" +# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-30)" +# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-30)" +# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-30)" +# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-30)" # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" @@ -186,11 +186,9 @@ # 0x00000571 0x0000000000000000 # "IA32_RTIT_STATUS (Table: 2-34)" # 0x00000572 0x0000000000000000 # "IA32_RTIT_CR3_MATCH (Table: 2-34)" # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" -# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" +# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-30)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -203,9 +201,9 @@ # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" # 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-35)" # 0x0000063A 0x0000000000000000 # "MSR_PP0_POLICY (Table: 2-21)" -# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-21)" -# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-21)" -# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-21)" +# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-30)" +# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-30)" +# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-30)" # 0x00000648 0x0000000000000000 # "MSR_CONFIG_TDP_NOMINAL (Table: 2-29)" # 0x00000649 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL1 (Table: 2-29)" # 0x0000064A 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL2 (Table: 2-29)" @@ -247,40 +245,40 @@ # 0x000006CE 0x0000000000000000 # "MSR_LASTBRANCH_14_TO_IP (Table: 2-20)" # 0x000006CF 0x0000000000000000 # "MSR_LASTBRANCH_15_TO_IP (Table: 2-20)" # 0x000006E0 0x0000000000000000 # "IA32_TSC_DEADLINE (Table: 2-20)" -# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-22)" -# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-22)" +# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-30)" +# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-30)" # 0x00000702 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL2 (Table: 2-22)" # 0x00000703 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL3 (Table: 2-22)" # 0x00000705 0x0000000000000000 # "MSR_UNC_CBO_0_UNIT_STATUS (Table: 2-22)" -# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-22)" -# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-22)" +# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-30)" +# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-30)" # 0x00000708 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR2 (Table: 2-22)" # 0x00000709 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR3 (Table: 2-22)" -# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-22)" -# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-22)" +# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-30)" +# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-30)" # 0x00000712 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL2 (Table: 2-22)" # 0x00000713 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL3 (Table: 2-22)" # 0x00000715 0x0000000000000000 # "MSR_UNC_CBO_1_UNIT_STATUS (Table: 2-22)" -# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-22)" -# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-22)" +# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-30)" +# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-30)" # 0x00000718 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR2 (Table: 2-22)" # 0x00000719 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR3 (Table: 2-22)" -# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-22)" -# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-22)" +# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-30)" +# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-30)" # 0x00000722 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL2 (Table: 2-22)" # 0x00000723 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL3 (Table: 2-22)" # 0x00000725 0x0000000000000000 # "MSR_UNC_CBO_2_UNIT_STATUS (Table: 2-22)" -# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-22)" -# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-22)" +# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-30)" +# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-30)" # 0x00000728 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000729 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" -# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-22)" -# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-22)" +# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-30)" +# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-30)" # 0x00000732 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL2 (Table: 2-22)" # 0x00000733 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL3 (Table: 2-22)" # 0x00000735 0x0000000000000000 # "MSR_UNC_CBO_3_UNIT_STATUS (Table: 2-22)" -# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-22)" -# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-22)" +# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-30)" +# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-30)" # 0x00000738 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000739 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" # 0x00000740 0x0000000000000000 # "MSR_UNC_CBO_4_PERFEVTSEL0 (Table: 2-22)" diff --git a/allowlists/al_06_3E b/allowlists/al_06_3E index 431fd57..08d6104 100644 --- a/allowlists/al_06_3E +++ b/allowlists/al_06_3E @@ -14,7 +14,7 @@ # 0x00000017 0x0000000000000000 # "IA32_PLATFORM_ID (Table: 2-20)" # 0x0000001B 0x0000000000000000 # "IA32_APIC_BASE (Table: 2-20)" # 0x00000034 0x0000000000000000 # "MSR_SMI_COUNT (Table: 2-20)" -# 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-20)" +# 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-27)" # 0x0000004E 0x0000000000000000 # "IA32_PPIN_CTL (Table: 2-26)" # 0x0000004F 0x0000000000000000 # "IA32_PPIN (Table: 2-26)" # 0x00000079 0x0000000000000000 # "IA32_BIOS_UPDT_TRIG (Table: 2-20)" @@ -27,8 +27,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-26)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-26)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,7 +38,7 @@ # 0x00000175 0x0000000000000000 # "IA32_SYSENTER_ESP (Table: 2-20)" # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-27)" -# 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" +# 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-27)" # 0x0000017F 0x0000000000000000 # "MSR_ERROR_CONTROL (Table: 2-26)" # 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" # 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" @@ -54,7 +54,7 @@ # 0x0000019B 0x0000000000000000 # "IA32_THERM_INTERRUPT (Table: 2-20)" # 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-20)" # 0x000001A0 0x0000000000000000 # "IA32_MISC_ENABLE (Table: 2-20)" -# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-20)" +# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-26)" # 0x000001A4 0x0000000000000000 # "MSR_MISC_FEATURE_CONTROL (Table: 2-20)" # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" @@ -144,7 +144,7 @@ # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-20)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-20)" -# 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" +# 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-27)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" # 0x000003F9 0x0000000000000000 # "MSR_PKG_C6_RESIDENCY (Table: 2-20)" @@ -179,57 +179,57 @@ # 0x0000041A 0x0000000000000000 # "IA32_MC6_ADDR (Table: 2-26)" # 0x0000041B 0x0000000000000000 # "IA32_MC6_MISC (Table: 2-27)" # 0x0000041C 0x0000000000000000 # "IA32_MC7_CTL (Table: 2-26)" -# 0x0000041D 0x0000000000000000 # "IA32_MC7_STATUS (Table: 2-24)" -# 0x0000041E 0x0000000000000000 # "IA32_MC7_ADDR (Table: 2-24)" -# 0x0000041F 0x0000000000000000 # "IA32_MC7_MISC (Table: 2-24)" -# 0x00000420 0x0000000000000000 # "IA32_MC8_CTL (Table: 2-24)" -# 0x00000421 0x0000000000000000 # "IA32_MC8_STATUS (Table: 2-24)" -# 0x00000422 0x0000000000000000 # "IA32_MC8_ADDR (Table: 2-24)" -# 0x00000423 0x0000000000000000 # "IA32_MC8_MISC (Table: 2-24)" -# 0x00000424 0x0000000000000000 # "IA32_MC9_CTL (Table: 2-24)" -# 0x00000425 0x0000000000000000 # "IA32_MC9_STATUS (Table: 2-24)" -# 0x00000426 0x0000000000000000 # "IA32_MC9_ADDR (Table: 2-24)" -# 0x00000427 0x0000000000000000 # "IA32_MC9_MISC (Table: 2-24)" -# 0x00000428 0x0000000000000000 # "IA32_MC10_CTL (Table: 2-24)" -# 0x00000429 0x0000000000000000 # "IA32_MC10_STATUS (Table: 2-24)" -# 0x0000042A 0x0000000000000000 # "IA32_MC10_ADDR (Table: 2-24)" -# 0x0000042B 0x0000000000000000 # "IA32_MC10_MISC (Table: 2-24)" -# 0x0000042C 0x0000000000000000 # "IA32_MC11_CTL (Table: 2-24)" -# 0x0000042D 0x0000000000000000 # "IA32_MC11_STATUS (Table: 2-24)" -# 0x0000042E 0x0000000000000000 # "IA32_MC11_ADDR (Table: 2-24)" -# 0x0000042F 0x0000000000000000 # "IA32_MC11_MISC (Table: 2-24)" -# 0x00000430 0x0000000000000000 # "IA32_MC12_CTL (Table: 2-24)" -# 0x00000431 0x0000000000000000 # "IA32_MC12_STATUS (Table: 2-24)" -# 0x00000432 0x0000000000000000 # "IA32_MC12_ADDR (Table: 2-24)" -# 0x00000433 0x0000000000000000 # "IA32_MC12_MISC (Table: 2-24)" -# 0x00000434 0x0000000000000000 # "IA32_MC13_CTL (Table: 2-24)" -# 0x00000435 0x0000000000000000 # "IA32_MC13_STATUS (Table: 2-24)" -# 0x00000436 0x0000000000000000 # "IA32_MC13_ADDR (Table: 2-24)" -# 0x00000437 0x0000000000000000 # "IA32_MC13_MISC (Table: 2-24)" -# 0x00000438 0x0000000000000000 # "IA32_MC14_CTL (Table: 2-24)" -# 0x00000439 0x0000000000000000 # "IA32_MC14_STATUS (Table: 2-24)" -# 0x0000043A 0x0000000000000000 # "IA32_MC14_ADDR (Table: 2-24)" -# 0x0000043B 0x0000000000000000 # "IA32_MC14_MISC (Table: 2-24)" -# 0x0000043C 0x0000000000000000 # "IA32_MC15_CTL (Table: 2-24)" -# 0x0000043D 0x0000000000000000 # "IA32_MC15_STATUS (Table: 2-24)" -# 0x0000043E 0x0000000000000000 # "IA32_MC15_ADDR (Table: 2-24)" -# 0x0000043F 0x0000000000000000 # "IA32_MC15_MISC (Table: 2-24)" -# 0x00000440 0x0000000000000000 # "IA32_MC16_CTL (Table: 2-24)" -# 0x00000441 0x0000000000000000 # "IA32_MC16_STATUS (Table: 2-24)" -# 0x00000442 0x0000000000000000 # "IA32_MC16_ADDR (Table: 2-24)" -# 0x00000443 0x0000000000000000 # "IA32_MC16_MISC (Table: 2-24)" -# 0x00000444 0x0000000000000000 # "IA32_MC17_CTL (Table: 2-24)" -# 0x00000445 0x0000000000000000 # "IA32_MC17_STATUS (Table: 2-24)" -# 0x00000446 0x0000000000000000 # "IA32_MC17_ADDR (Table: 2-24)" -# 0x00000447 0x0000000000000000 # "IA32_MC17_MISC (Table: 2-24)" -# 0x00000448 0x0000000000000000 # "IA32_MC18_CTL (Table: 2-24)" -# 0x00000449 0x0000000000000000 # "IA32_MC18_STATUS (Table: 2-24)" -# 0x0000044A 0x0000000000000000 # "IA32_MC18_ADDR (Table: 2-24)" -# 0x0000044B 0x0000000000000000 # "IA32_MC18_MISC (Table: 2-24)" -# 0x0000044C 0x0000000000000000 # "IA32_MC19_CTL (Table: 2-24)" -# 0x0000044D 0x0000000000000000 # "IA32_MC19_STATUS (Table: 2-24)" -# 0x0000044E 0x0000000000000000 # "IA32_MC19_ADDR (Table: 2-24)" -# 0x0000044F 0x0000000000000000 # "IA32_MC19_MISC (Table: 2-24)" +# 0x0000041D 0x0000000000000000 # "IA32_MC7_STATUS (Table: 2-26)" +# 0x0000041E 0x0000000000000000 # "IA32_MC7_ADDR (Table: 2-26)" +# 0x0000041F 0x0000000000000000 # "IA32_MC7_MISC (Table: 2-26)" +# 0x00000420 0x0000000000000000 # "IA32_MC8_CTL (Table: 2-26)" +# 0x00000421 0x0000000000000000 # "IA32_MC8_STATUS (Table: 2-26)" +# 0x00000422 0x0000000000000000 # "IA32_MC8_ADDR (Table: 2-26)" +# 0x00000423 0x0000000000000000 # "IA32_MC8_MISC (Table: 2-26)" +# 0x00000424 0x0000000000000000 # "IA32_MC9_CTL (Table: 2-26)" +# 0x00000425 0x0000000000000000 # "IA32_MC9_STATUS (Table: 2-26)" +# 0x00000426 0x0000000000000000 # "IA32_MC9_ADDR (Table: 2-26)" +# 0x00000427 0x0000000000000000 # "IA32_MC9_MISC (Table: 2-26)" +# 0x00000428 0x0000000000000000 # "IA32_MC10_CTL (Table: 2-26)" +# 0x00000429 0x0000000000000000 # "IA32_MC10_STATUS (Table: 2-26)" +# 0x0000042A 0x0000000000000000 # "IA32_MC10_ADDR (Table: 2-26)" +# 0x0000042B 0x0000000000000000 # "IA32_MC10_MISC (Table: 2-26)" +# 0x0000042C 0x0000000000000000 # "IA32_MC11_CTL (Table: 2-26)" +# 0x0000042D 0x0000000000000000 # "IA32_MC11_STATUS (Table: 2-26)" +# 0x0000042E 0x0000000000000000 # "IA32_MC11_ADDR (Table: 2-26)" +# 0x0000042F 0x0000000000000000 # "IA32_MC11_MISC (Table: 2-26)" +# 0x00000430 0x0000000000000000 # "IA32_MC12_CTL (Table: 2-26)" +# 0x00000431 0x0000000000000000 # "IA32_MC12_STATUS (Table: 2-26)" +# 0x00000432 0x0000000000000000 # "IA32_MC12_ADDR (Table: 2-26)" +# 0x00000433 0x0000000000000000 # "IA32_MC12_MISC (Table: 2-26)" +# 0x00000434 0x0000000000000000 # "IA32_MC13_CTL (Table: 2-26)" +# 0x00000435 0x0000000000000000 # "IA32_MC13_STATUS (Table: 2-26)" +# 0x00000436 0x0000000000000000 # "IA32_MC13_ADDR (Table: 2-26)" +# 0x00000437 0x0000000000000000 # "IA32_MC13_MISC (Table: 2-26)" +# 0x00000438 0x0000000000000000 # "IA32_MC14_CTL (Table: 2-26)" +# 0x00000439 0x0000000000000000 # "IA32_MC14_STATUS (Table: 2-26)" +# 0x0000043A 0x0000000000000000 # "IA32_MC14_ADDR (Table: 2-26)" +# 0x0000043B 0x0000000000000000 # "IA32_MC14_MISC (Table: 2-26)" +# 0x0000043C 0x0000000000000000 # "IA32_MC15_CTL (Table: 2-26)" +# 0x0000043D 0x0000000000000000 # "IA32_MC15_STATUS (Table: 2-26)" +# 0x0000043E 0x0000000000000000 # "IA32_MC15_ADDR (Table: 2-26)" +# 0x0000043F 0x0000000000000000 # "IA32_MC15_MISC (Table: 2-26)" +# 0x00000440 0x0000000000000000 # "IA32_MC16_CTL (Table: 2-26)" +# 0x00000441 0x0000000000000000 # "IA32_MC16_STATUS (Table: 2-26)" +# 0x00000442 0x0000000000000000 # "IA32_MC16_ADDR (Table: 2-26)" +# 0x00000443 0x0000000000000000 # "IA32_MC16_MISC (Table: 2-26)" +# 0x00000444 0x0000000000000000 # "IA32_MC17_CTL (Table: 2-26)" +# 0x00000445 0x0000000000000000 # "IA32_MC17_STATUS (Table: 2-26)" +# 0x00000446 0x0000000000000000 # "IA32_MC17_ADDR (Table: 2-26)" +# 0x00000447 0x0000000000000000 # "IA32_MC17_MISC (Table: 2-26)" +# 0x00000448 0x0000000000000000 # "IA32_MC18_CTL (Table: 2-26)" +# 0x00000449 0x0000000000000000 # "IA32_MC18_STATUS (Table: 2-26)" +# 0x0000044A 0x0000000000000000 # "IA32_MC18_ADDR (Table: 2-26)" +# 0x0000044B 0x0000000000000000 # "IA32_MC18_MISC (Table: 2-26)" +# 0x0000044C 0x0000000000000000 # "IA32_MC19_CTL (Table: 2-26)" +# 0x0000044D 0x0000000000000000 # "IA32_MC19_STATUS (Table: 2-26)" +# 0x0000044E 0x0000000000000000 # "IA32_MC19_ADDR (Table: 2-26)" +# 0x0000044F 0x0000000000000000 # "IA32_MC19_MISC (Table: 2-26)" # 0x00000450 0x0000000000000000 # "IA32_MC20_CTL (Table: 2-26)" # 0x00000451 0x0000000000000000 # "IA32_MC20_STATUS (Table: 2-26)" # 0x00000452 0x0000000000000000 # "IA32_MC20_ADDR (Table: 2-26)" @@ -310,14 +310,14 @@ # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" # 0x00000611 0x0000000000000000 # "MSR_PKG_ENERGY_STATUS (Table: 2-20)" -# 0x00000613 0x0000000000000000 # "MSR_PKG_PERF_STATUS (Table: 2-24)" +# 0x00000613 0x0000000000000000 # "MSR_PKG_PERF_STATUS (Table: 2-26)" # 0x00000614 0x0000000000000000 # "MSR_PKG_POWER_INFO (Table: 2-20)" -# 0x00000618 0x0000000000000000 # "MSR_DRAM_POWER_LIMIT (Table: 2-24)" -# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-24)" -# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-24)" -# 0x0000061C 0x0000000000000000 # "MSR_DRAM_POWER_INFO (Table: 2-24)" +# 0x00000618 0x0000000000000000 # "MSR_DRAM_POWER_LIMIT (Table: 2-26)" +# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-26)" +# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-26)" +# 0x0000061C 0x0000000000000000 # "MSR_DRAM_POWER_INFO (Table: 2-26)" # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" -# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-24)" +# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-26)" # 0x00000680 0x0000000000000000 # "MSR_LASTBRANCH_0_FROM_IP (Table: 2-20)" # 0x00000681 0x0000000000000000 # "MSR_LASTBRANCH_1_FROM_IP (Table: 2-20)" # 0x00000682 0x0000000000000000 # "MSR_LASTBRANCH_2_FROM_IP (Table: 2-20)" diff --git a/allowlists/al_06_3F b/allowlists/al_06_3F index d334a18..3be077a 100644 --- a/allowlists/al_06_3F +++ b/allowlists/al_06_3F @@ -28,7 +28,7 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" # 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-32)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" @@ -42,10 +42,10 @@ # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-32)" # 0x0000017F 0x0000000000000000 # "MSR_ERROR_CONTROL (Table: 2-32)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -67,9 +67,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -244,8 +244,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-32)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_45 b/allowlists/al_06_45 index b2f3136..1b6c9d5 100644 --- a/allowlists/al_06_45 +++ b/allowlists/al_06_45 @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-31)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -39,10 +39,10 @@ # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-30)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -59,13 +59,13 @@ # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" # 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)" # 0x000001AC 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT3 (Table: 2-38)" -# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-21)" +# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-30)" # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -134,15 +134,15 @@ # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-20)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-20)" -# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-22)" -# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-22)" -# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-22)" -# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-22)" -# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-22)" -# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-22)" -# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-22)" -# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-22)" -# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-22)" +# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-30)" +# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-30)" +# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-30)" +# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-30)" +# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-30)" +# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-30)" +# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-30)" +# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-30)" +# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-30)" # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" @@ -267,11 +267,9 @@ # 0x000004E2 0x0000000000000000 # "MSR_SMM_DELAYED (Table: 2-30)" # 0x000004E3 0x0000000000000000 # "MSR_SMM_BLOCKED (Table: 2-30)" # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" -# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" +# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-30)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -284,11 +282,11 @@ # 0x00000631 0x0000000000000000 # "MSR_PKG_C9_RESIDENCY (Table: 2-31)" # 0x00000632 0x0000000000000000 # "MSR_PKG_C10_RESIDENCY (Table: 2-31)" # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" -# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-21)" +# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-30)" # 0x0000063A 0x0000000000000000 # "MSR_PP0_POLICY (Table: 2-21)" -# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-21)" -# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-21)" -# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-21)" +# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-30)" +# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-30)" +# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-30)" # 0x00000648 0x0000000000000000 # "MSR_CONFIG_TDP_NOMINAL (Table: 2-29)" # 0x00000649 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL1 (Table: 2-29)" # 0x0000064A 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL2 (Table: 2-29)" @@ -330,40 +328,40 @@ # 0x000006CE 0x0000000000000000 # "MSR_LASTBRANCH_14_TO_IP (Table: 2-20)" # 0x000006CF 0x0000000000000000 # "MSR_LASTBRANCH_15_TO_IP (Table: 2-20)" # 0x000006E0 0x0000000000000000 # "IA32_TSC_DEADLINE (Table: 2-20)" -# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-22)" -# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-22)" +# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-30)" +# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-30)" # 0x00000702 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL2 (Table: 2-22)" # 0x00000703 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL3 (Table: 2-22)" # 0x00000705 0x0000000000000000 # "MSR_UNC_CBO_0_UNIT_STATUS (Table: 2-22)" -# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-22)" -# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-22)" +# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-30)" +# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-30)" # 0x00000708 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR2 (Table: 2-22)" # 0x00000709 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR3 (Table: 2-22)" -# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-22)" -# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-22)" +# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-30)" +# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-30)" # 0x00000712 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL2 (Table: 2-22)" # 0x00000713 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL3 (Table: 2-22)" # 0x00000715 0x0000000000000000 # "MSR_UNC_CBO_1_UNIT_STATUS (Table: 2-22)" -# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-22)" -# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-22)" +# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-30)" +# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-30)" # 0x00000718 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR2 (Table: 2-22)" # 0x00000719 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR3 (Table: 2-22)" -# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-22)" -# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-22)" +# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-30)" +# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-30)" # 0x00000722 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL2 (Table: 2-22)" # 0x00000723 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL3 (Table: 2-22)" # 0x00000725 0x0000000000000000 # "MSR_UNC_CBO_2_UNIT_STATUS (Table: 2-22)" -# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-22)" -# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-22)" +# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-30)" +# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-30)" # 0x00000728 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000729 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" -# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-22)" -# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-22)" +# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-30)" +# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-30)" # 0x00000732 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL2 (Table: 2-22)" # 0x00000733 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL3 (Table: 2-22)" # 0x00000735 0x0000000000000000 # "MSR_UNC_CBO_3_UNIT_STATUS (Table: 2-22)" -# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-22)" -# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-22)" +# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-30)" +# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-30)" # 0x00000738 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000739 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" # 0x00000740 0x0000000000000000 # "MSR_UNC_CBO_4_PERFEVTSEL0 (Table: 2-22)" diff --git a/allowlists/al_06_46 b/allowlists/al_06_46 index ca59dee..c0b0f93 100644 --- a/allowlists/al_06_46 +++ b/allowlists/al_06_46 @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-30)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -39,10 +39,10 @@ # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-30)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -58,13 +58,13 @@ # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" # 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)" -# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-21)" +# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-30)" # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,15 +116,15 @@ # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-20)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-20)" -# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-22)" -# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-22)" -# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-22)" -# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-22)" -# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-22)" -# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-22)" -# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-22)" -# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-22)" -# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-22)" +# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-30)" +# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-30)" +# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-30)" +# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-30)" +# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-30)" +# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-30)" +# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-30)" +# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-30)" +# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-30)" # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" @@ -181,11 +181,9 @@ # 0x000004E2 0x0000000000000000 # "MSR_SMM_DELAYED (Table: 2-30)" # 0x000004E3 0x0000000000000000 # "MSR_SMM_BLOCKED (Table: 2-30)" # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" -# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" +# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-30)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -195,11 +193,11 @@ # 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-29)" # 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-29)" # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" -# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-21)" +# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-30)" # 0x0000063A 0x0000000000000000 # "MSR_PP0_POLICY (Table: 2-21)" -# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-21)" -# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-21)" -# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-21)" +# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-30)" +# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-30)" +# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-30)" # 0x00000648 0x0000000000000000 # "MSR_CONFIG_TDP_NOMINAL (Table: 2-29)" # 0x00000649 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL1 (Table: 2-29)" # 0x0000064A 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL2 (Table: 2-29)" @@ -241,40 +239,40 @@ # 0x000006CE 0x0000000000000000 # "MSR_LASTBRANCH_14_TO_IP (Table: 2-20)" # 0x000006CF 0x0000000000000000 # "MSR_LASTBRANCH_15_TO_IP (Table: 2-20)" # 0x000006E0 0x0000000000000000 # "IA32_TSC_DEADLINE (Table: 2-20)" -# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-22)" -# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-22)" +# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-30)" +# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-30)" # 0x00000702 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL2 (Table: 2-22)" # 0x00000703 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL3 (Table: 2-22)" # 0x00000705 0x0000000000000000 # "MSR_UNC_CBO_0_UNIT_STATUS (Table: 2-22)" -# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-22)" -# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-22)" +# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-30)" +# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-30)" # 0x00000708 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR2 (Table: 2-22)" # 0x00000709 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR3 (Table: 2-22)" -# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-22)" -# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-22)" +# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-30)" +# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-30)" # 0x00000712 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL2 (Table: 2-22)" # 0x00000713 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL3 (Table: 2-22)" # 0x00000715 0x0000000000000000 # "MSR_UNC_CBO_1_UNIT_STATUS (Table: 2-22)" -# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-22)" -# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-22)" +# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-30)" +# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-30)" # 0x00000718 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR2 (Table: 2-22)" # 0x00000719 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR3 (Table: 2-22)" -# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-22)" -# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-22)" +# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-30)" +# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-30)" # 0x00000722 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL2 (Table: 2-22)" # 0x00000723 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL3 (Table: 2-22)" # 0x00000725 0x0000000000000000 # "MSR_UNC_CBO_2_UNIT_STATUS (Table: 2-22)" -# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-22)" -# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-22)" +# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-30)" +# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-30)" # 0x00000728 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000729 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" -# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-22)" -# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-22)" +# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-30)" +# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-30)" # 0x00000732 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL2 (Table: 2-22)" # 0x00000733 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL3 (Table: 2-22)" # 0x00000735 0x0000000000000000 # "MSR_UNC_CBO_3_UNIT_STATUS (Table: 2-22)" -# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-22)" -# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-22)" +# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-30)" +# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-30)" # 0x00000738 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000739 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" # 0x00000740 0x0000000000000000 # "MSR_UNC_CBO_4_PERFEVTSEL0 (Table: 2-22)" diff --git a/allowlists/al_06_47 b/allowlists/al_06_47 index 082b564..6f56a26 100644 --- a/allowlists/al_06_47 +++ b/allowlists/al_06_47 @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -39,10 +39,10 @@ # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-30)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -62,9 +62,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -113,18 +113,18 @@ # 0x0000030B 0x0000000000000000 # "IA32_FIXED_CTR2 (Table: 2-20)" # 0x00000345 0x0000000000000000 # "IA32_PERF_CAPABILITIES (Table: 2-20)" # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" -# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-20)" +# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-34)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-20)" -# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-22)" -# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-22)" -# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-22)" -# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-22)" -# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-22)" -# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-22)" -# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-22)" -# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-22)" -# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-22)" +# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-34)" +# 0x00000391 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_CTRL (Table: 2-30)" +# 0x00000392 0x0000000000000000 # "MSR_UNC_PERF_GLOBAL_STATUS (Table: 2-30)" +# 0x00000394 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTRL (Table: 2-30)" +# 0x00000395 0x0000000000000000 # "MSR_UNC_PERF_FIXED_CTR (Table: 2-30)" +# 0x00000396 0x0000000000000000 # "MSR_UNC_CBO_CONFIG (Table: 2-30)" +# 0x000003B0 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR0 (Table: 2-30)" +# 0x000003B1 0x0000000000000000 # "MSR_UNC_ARB_PERFCTR1 (Table: 2-30)" +# 0x000003B2 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL0 (Table: 2-30)" +# 0x000003B3 0x0000000000000000 # "MSR_UNC_ARB_PERFEVTSEL1 (Table: 2-30)" # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" @@ -186,11 +186,9 @@ # 0x00000571 0x0000000000000000 # "IA32_RTIT_STATUS (Table: 2-34)" # 0x00000572 0x0000000000000000 # "IA32_RTIT_CR3_MATCH (Table: 2-34)" # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" -# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" +# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-30)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -203,9 +201,9 @@ # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" # 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-35)" # 0x0000063A 0x0000000000000000 # "MSR_PP0_POLICY (Table: 2-21)" -# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-21)" -# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-21)" -# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-21)" +# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-30)" +# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-30)" +# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-30)" # 0x00000648 0x0000000000000000 # "MSR_CONFIG_TDP_NOMINAL (Table: 2-29)" # 0x00000649 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL1 (Table: 2-29)" # 0x0000064A 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL2 (Table: 2-29)" @@ -247,40 +245,40 @@ # 0x000006CE 0x0000000000000000 # "MSR_LASTBRANCH_14_TO_IP (Table: 2-20)" # 0x000006CF 0x0000000000000000 # "MSR_LASTBRANCH_15_TO_IP (Table: 2-20)" # 0x000006E0 0x0000000000000000 # "IA32_TSC_DEADLINE (Table: 2-20)" -# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-22)" -# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-22)" +# 0x00000700 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL0 (Table: 2-30)" +# 0x00000701 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL1 (Table: 2-30)" # 0x00000702 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL2 (Table: 2-22)" # 0x00000703 0x0000000000000000 # "MSR_UNC_CBO_0_PERFEVTSEL3 (Table: 2-22)" # 0x00000705 0x0000000000000000 # "MSR_UNC_CBO_0_UNIT_STATUS (Table: 2-22)" -# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-22)" -# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-22)" +# 0x00000706 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR0 (Table: 2-30)" +# 0x00000707 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR1 (Table: 2-30)" # 0x00000708 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR2 (Table: 2-22)" # 0x00000709 0x0000000000000000 # "MSR_UNC_CBO_0_PERFCTR3 (Table: 2-22)" -# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-22)" -# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-22)" +# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-30)" +# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-30)" # 0x00000712 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL2 (Table: 2-22)" # 0x00000713 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL3 (Table: 2-22)" # 0x00000715 0x0000000000000000 # "MSR_UNC_CBO_1_UNIT_STATUS (Table: 2-22)" -# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-22)" -# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-22)" +# 0x00000716 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-30)" +# 0x00000717 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-30)" # 0x00000718 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR2 (Table: 2-22)" # 0x00000719 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR3 (Table: 2-22)" -# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-22)" -# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-22)" +# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-30)" +# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-30)" # 0x00000722 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL2 (Table: 2-22)" # 0x00000723 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL3 (Table: 2-22)" # 0x00000725 0x0000000000000000 # "MSR_UNC_CBO_2_UNIT_STATUS (Table: 2-22)" -# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-22)" -# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-22)" +# 0x00000726 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-30)" +# 0x00000727 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-30)" # 0x00000728 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000729 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" -# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-22)" -# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-22)" +# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-30)" +# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-30)" # 0x00000732 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL2 (Table: 2-22)" # 0x00000733 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL3 (Table: 2-22)" # 0x00000735 0x0000000000000000 # "MSR_UNC_CBO_3_UNIT_STATUS (Table: 2-22)" -# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-22)" -# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-22)" +# 0x00000736 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-30)" +# 0x00000737 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-30)" # 0x00000738 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR2 (Table: 2-22)" # 0x00000739 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR3 (Table: 2-22)" # 0x00000740 0x0000000000000000 # "MSR_UNC_CBO_4_PERFEVTSEL0 (Table: 2-22)" diff --git a/allowlists/al_06_4E b/allowlists/al_06_4E index c66ee13..f0353c2 100644 --- a/allowlists/al_06_4E +++ b/allowlists/al_06_4E @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,10 +38,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -61,9 +61,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,7 +116,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -193,9 +192,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_4F b/allowlists/al_06_4F index d62206d..e00c562 100644 --- a/allowlists/al_06_4F +++ b/allowlists/al_06_4F @@ -29,7 +29,7 @@ # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" # 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-36)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-36)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,13 +38,13 @@ # 0x00000174 0x0000000000000000 # "IA32_SYSENTER_CS (Table: 2-20)" # 0x00000175 0x0000000000000000 # "IA32_SYSENTER_ESP (Table: 2-20)" # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" -# 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" +# 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-36)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-36)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -53,22 +53,22 @@ # 0x00000199 0x0000000000000000 # "IA32_PERF_CTL (Table: 2-20)" # 0x0000019A 0x0000000000000000 # "IA32_CLOCK_MODULATION (Table: 2-20)" # 0x0000019B 0x0000000000000000 # "IA32_THERM_INTERRUPT (Table: 2-20)" -# 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-20)" +# 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-36)" # 0x000001A0 0x0000000000000000 # "IA32_MISC_ENABLE (Table: 2-20)" -# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-20)" +# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-36)" # 0x000001A4 0x0000000000000000 # "MSR_MISC_FEATURE_CONTROL (Table: 2-20)" # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" # 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)" -# 0x000001AC 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT3 (Table: 2-37)" +# 0x000001AC 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT3 (Table: 2-38)" # 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-36)" # 0x000001AE 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT1 (Table: 2-36)" # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -112,20 +112,20 @@ # 0x00000283 0x0000000000000000 # "IA32_MC3_CTL2 (Table: 2-20)" # 0x00000284 0x0000000000000000 # "IA32_MC4_CTL2 (Table: 2-20)" # 0x00000285 0x0000000000000000 # "IA32_MC5_CTL2 (Table: 2-38)" -# 0x00000286 0x0000000000000000 # "IA32_MC6_CTL2 (Table: 2-37)" -# 0x00000287 0x0000000000000000 # "IA32_MC7_CTL2 (Table: 2-37)" +# 0x00000286 0x0000000000000000 # "IA32_MC6_CTL2 (Table: 2-38)" +# 0x00000287 0x0000000000000000 # "IA32_MC7_CTL2 (Table: 2-38)" # 0x00000288 0x0000000000000000 # "IA32_MC8_CTL2 (Table: 2-38)" -# 0x00000289 0x0000000000000000 # "IA32_MC9_CTL2 (Table: 2-37)" -# 0x0000028A 0x0000000000000000 # "IA32_MC10_CTL2 (Table: 2-37)" +# 0x00000289 0x0000000000000000 # "IA32_MC9_CTL2 (Table: 2-38)" +# 0x0000028A 0x0000000000000000 # "IA32_MC10_CTL2 (Table: 2-38)" # 0x0000028B 0x0000000000000000 # "IA32_MC11_CTL2 (Table: 2-38)" # 0x0000028C 0x0000000000000000 # "IA32_MC12_CTL2 (Table: 2-38)" # 0x0000028D 0x0000000000000000 # "IA32_MC13_CTL2 (Table: 2-38)" # 0x0000028E 0x0000000000000000 # "IA32_MC14_CTL2 (Table: 2-38)" # 0x0000028F 0x0000000000000000 # "IA32_MC15_CTL2 (Table: 2-38)" # 0x00000290 0x0000000000000000 # "IA32_MC16_CTL2 (Table: 2-38)" -# 0x00000291 0x0000000000000000 # "IA32_MC17_CTL2 (Table: 2-37)" -# 0x00000292 0x0000000000000000 # "IA32_MC18_CTL2 (Table: 2-37)" -# 0x00000293 0x0000000000000000 # "IA32_MC19_CTL2 (Table: 2-37)" +# 0x00000291 0x0000000000000000 # "IA32_MC17_CTL2 (Table: 2-38)" +# 0x00000292 0x0000000000000000 # "IA32_MC18_CTL2 (Table: 2-38)" +# 0x00000293 0x0000000000000000 # "IA32_MC19_CTL2 (Table: 2-38)" # 0x00000294 0x0000000000000000 # "IA32_MC20_CTL2 (Table: 2-38)" # 0x00000295 0x0000000000000000 # "IA32_MC21_CTL2 (Table: 2-38)" # 0x000002FF 0x0000000000000000 # "IA32_MTRR_DEF_TYPE (Table: 2-20)" @@ -134,9 +134,9 @@ # 0x0000030B 0x0000000000000000 # "IA32_FIXED_CTR2 (Table: 2-20)" # 0x00000345 0x0000000000000000 # "IA32_PERF_CAPABILITIES (Table: 2-20)" # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" -# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-20)" +# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-34)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-20)" +# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-34)" # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" @@ -167,26 +167,26 @@ # 0x00000415 0x0000000000000000 # "IA32_MC5_STATUS (Table: 2-38)" # 0x00000416 0x0000000000000000 # "IA32_MC5_ADDR (Table: 2-38)" # 0x00000417 0x0000000000000000 # "IA32_MC5_MISC (Table: 2-38)" -# 0x00000418 0x0000000000000000 # "IA32_MC6_CTL (Table: 2-37)" -# 0x00000419 0x0000000000000000 # "IA32_MC6_STATUS (Table: 2-37)" -# 0x0000041A 0x0000000000000000 # "IA32_MC6_ADDR (Table: 2-37)" -# 0x0000041B 0x0000000000000000 # "IA32_MC6_MISC (Table: 2-37)" -# 0x0000041C 0x0000000000000000 # "IA32_MC7_CTL (Table: 2-37)" -# 0x0000041D 0x0000000000000000 # "IA32_MC7_STATUS (Table: 2-37)" -# 0x0000041E 0x0000000000000000 # "IA32_MC7_ADDR (Table: 2-37)" -# 0x0000041F 0x0000000000000000 # "IA32_MC7_MISC (Table: 2-37)" +# 0x00000418 0x0000000000000000 # "IA32_MC6_CTL (Table: 2-38)" +# 0x00000419 0x0000000000000000 # "IA32_MC6_STATUS (Table: 2-38)" +# 0x0000041A 0x0000000000000000 # "IA32_MC6_ADDR (Table: 2-38)" +# 0x0000041B 0x0000000000000000 # "IA32_MC6_MISC (Table: 2-38)" +# 0x0000041C 0x0000000000000000 # "IA32_MC7_CTL (Table: 2-38)" +# 0x0000041D 0x0000000000000000 # "IA32_MC7_STATUS (Table: 2-38)" +# 0x0000041E 0x0000000000000000 # "IA32_MC7_ADDR (Table: 2-38)" +# 0x0000041F 0x0000000000000000 # "IA32_MC7_MISC (Table: 2-38)" # 0x00000420 0x0000000000000000 # "IA32_MC8_CTL (Table: 2-38)" # 0x00000421 0x0000000000000000 # "IA32_MC8_STATUS (Table: 2-38)" # 0x00000422 0x0000000000000000 # "IA32_MC8_ADDR (Table: 2-38)" # 0x00000423 0x0000000000000000 # "IA32_MC8_MISC (Table: 2-38)" -# 0x00000424 0x0000000000000000 # "IA32_MC9_CTL (Table: 2-37)" -# 0x00000425 0x0000000000000000 # "IA32_MC9_STATUS (Table: 2-37)" -# 0x00000426 0x0000000000000000 # "IA32_MC9_ADDR (Table: 2-37)" -# 0x00000427 0x0000000000000000 # "IA32_MC9_MISC (Table: 2-37)" -# 0x00000428 0x0000000000000000 # "IA32_MC10_CTL (Table: 2-37)" -# 0x00000429 0x0000000000000000 # "IA32_MC10_STATUS (Table: 2-37)" -# 0x0000042A 0x0000000000000000 # "IA32_MC10_ADDR (Table: 2-37)" -# 0x0000042B 0x0000000000000000 # "IA32_MC10_MISC (Table: 2-37)" +# 0x00000424 0x0000000000000000 # "IA32_MC9_CTL (Table: 2-38)" +# 0x00000425 0x0000000000000000 # "IA32_MC9_STATUS (Table: 2-38)" +# 0x00000426 0x0000000000000000 # "IA32_MC9_ADDR (Table: 2-38)" +# 0x00000427 0x0000000000000000 # "IA32_MC9_MISC (Table: 2-38)" +# 0x00000428 0x0000000000000000 # "IA32_MC10_CTL (Table: 2-38)" +# 0x00000429 0x0000000000000000 # "IA32_MC10_STATUS (Table: 2-38)" +# 0x0000042A 0x0000000000000000 # "IA32_MC10_ADDR (Table: 2-38)" +# 0x0000042B 0x0000000000000000 # "IA32_MC10_MISC (Table: 2-38)" # 0x0000042C 0x0000000000000000 # "IA32_MC11_CTL (Table: 2-38)" # 0x0000042D 0x0000000000000000 # "IA32_MC11_STATUS (Table: 2-38)" # 0x0000042E 0x0000000000000000 # "IA32_MC11_ADDR (Table: 2-38)" @@ -211,18 +211,18 @@ # 0x00000441 0x0000000000000000 # "IA32_MC16_STATUS (Table: 2-38)" # 0x00000442 0x0000000000000000 # "IA32_MC16_ADDR (Table: 2-38)" # 0x00000443 0x0000000000000000 # "IA32_MC16_MISC (Table: 2-38)" -# 0x00000444 0x0000000000000000 # "IA32_MC17_CTL (Table: 2-37)" -# 0x00000445 0x0000000000000000 # "IA32_MC17_STATUS (Table: 2-37)" -# 0x00000446 0x0000000000000000 # "IA32_MC17_ADDR (Table: 2-37)" -# 0x00000447 0x0000000000000000 # "IA32_MC17_MISC (Table: 2-37)" -# 0x00000448 0x0000000000000000 # "IA32_MC18_CTL (Table: 2-37)" -# 0x00000449 0x0000000000000000 # "IA32_MC18_STATUS (Table: 2-37)" -# 0x0000044A 0x0000000000000000 # "IA32_MC18_ADDR (Table: 2-37)" -# 0x0000044B 0x0000000000000000 # "IA32_MC18_MISC (Table: 2-37)" -# 0x0000044C 0x0000000000000000 # "IA32_MC19_CTL (Table: 2-37)" -# 0x0000044D 0x0000000000000000 # "IA32_MC19_STATUS (Table: 2-37)" -# 0x0000044E 0x0000000000000000 # "IA32_MC19_ADDR (Table: 2-37)" -# 0x0000044F 0x0000000000000000 # "IA32_MC19_MISC (Table: 2-37)" +# 0x00000444 0x0000000000000000 # "IA32_MC17_CTL (Table: 2-38)" +# 0x00000445 0x0000000000000000 # "IA32_MC17_STATUS (Table: 2-38)" +# 0x00000446 0x0000000000000000 # "IA32_MC17_ADDR (Table: 2-38)" +# 0x00000447 0x0000000000000000 # "IA32_MC17_MISC (Table: 2-38)" +# 0x00000448 0x0000000000000000 # "IA32_MC18_CTL (Table: 2-38)" +# 0x00000449 0x0000000000000000 # "IA32_MC18_STATUS (Table: 2-38)" +# 0x0000044A 0x0000000000000000 # "IA32_MC18_ADDR (Table: 2-38)" +# 0x0000044B 0x0000000000000000 # "IA32_MC18_MISC (Table: 2-38)" +# 0x0000044C 0x0000000000000000 # "IA32_MC19_CTL (Table: 2-38)" +# 0x0000044D 0x0000000000000000 # "IA32_MC19_STATUS (Table: 2-38)" +# 0x0000044E 0x0000000000000000 # "IA32_MC19_ADDR (Table: 2-38)" +# 0x0000044F 0x0000000000000000 # "IA32_MC19_MISC (Table: 2-38)" # 0x00000450 0x0000000000000000 # "IA32_MC20_CTL (Table: 2-38)" # 0x00000451 0x0000000000000000 # "IA32_MC20_STATUS (Table: 2-38)" # 0x00000452 0x0000000000000000 # "IA32_MC20_ADDR (Table: 2-38)" @@ -263,11 +263,9 @@ # 0x00000571 0x0000000000000000 # "IA32_RTIT_STATUS (Table: 2-34)" # 0x00000572 0x0000000000000000 # "IA32_RTIT_CR3_MATCH (Table: 2-34)" # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" -# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" +# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-36)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_55 b/allowlists/al_06_55 index d1b5572..cd42457 100644 --- a/allowlists/al_06_55 +++ b/allowlists/al_06_55 @@ -14,7 +14,7 @@ # 0x00000017 0x0000000000000000 # "IA32_PLATFORM_ID (Table: 2-20)" # 0x0000001B 0x0000000000000000 # "IA32_APIC_BASE (Table: 2-20)" # 0x00000034 0x0000000000000000 # "MSR_SMI_COUNT (Table: 2-20)" -# 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-39)" +# 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-50)" # 0x0000003B 0x0000000000000000 # "IA32_TSC_ADJUST (Table: 2-29)" # 0x0000004E 0x0000000000000000 # "IA32_PPIN_CTL (Table: 2-50)" # 0x0000004F 0x0000000000000000 # "IA32_PPIN (Table: 2-50)" @@ -28,8 +28,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-50)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-50)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,13 +38,13 @@ # 0x00000174 0x0000000000000000 # "IA32_SYSENTER_CS (Table: 2-20)" # 0x00000175 0x0000000000000000 # "IA32_SYSENTER_ESP (Table: 2-20)" # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" -# 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" +# 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-50)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-50)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -53,21 +53,21 @@ # 0x00000199 0x0000000000000000 # "IA32_PERF_CTL (Table: 2-20)" # 0x0000019A 0x0000000000000000 # "IA32_CLOCK_MODULATION (Table: 2-20)" # 0x0000019B 0x0000000000000000 # "IA32_THERM_INTERRUPT (Table: 2-20)" -# 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-39)" +# 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-50)" # 0x000001A0 0x0000000000000000 # "IA32_MISC_ENABLE (Table: 2-20)" -# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-20)" +# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-50)" # 0x000001A4 0x0000000000000000 # "MSR_MISC_FEATURE_CONTROL (Table: 2-20)" # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" # 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)" -# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-39)" +# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-50)" # 0x000001AE 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT_CORES (Table: 2-50)" # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -105,11 +105,11 @@ # 0x0000026E 0x0000000000000000 # "IA32_MTRR_FIX4K_F0000 (Table: 2-20)" # 0x0000026F 0x0000000000000000 # "IA32_MTRR_FIX4K_F8000 (Table: 2-20)" # 0x00000277 0x0000000000000000 # "IA32_PAT (Table: 2-20)" -# 0x00000280 0x0000000000000000 # "IA32_MC0_CTL2 (Table: 2-20)" -# 0x00000281 0x0000000000000000 # "IA32_MC1_CTL2 (Table: 2-20)" -# 0x00000282 0x0000000000000000 # "IA32_MC2_CTL2 (Table: 2-20)" -# 0x00000283 0x0000000000000000 # "IA32_MC3_CTL2 (Table: 2-20)" -# 0x00000284 0x0000000000000000 # "IA32_MC4_CTL2 (Table: 2-20)" +# 0x00000280 0x0000000000000000 # "IA32_MC0_CTL2 (Table: 2-50)" +# 0x00000281 0x0000000000000000 # "IA32_MC1_CTL2 (Table: 2-50)" +# 0x00000282 0x0000000000000000 # "IA32_MC2_CTL2 (Table: 2-50)" +# 0x00000283 0x0000000000000000 # "IA32_MC3_CTL2 (Table: 2-50)" +# 0x00000284 0x0000000000000000 # "IA32_MC4_CTL2 (Table: 2-50)" # 0x00000285 0x0000000000000000 # "IA32_MC5_CTL2 (Table: 2-50)" # 0x00000286 0x0000000000000000 # "IA32_MC6_CTL2 (Table: 2-50)" # 0x00000287 0x0000000000000000 # "IA32_MC7_CTL2 (Table: 2-50)" @@ -135,7 +135,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -148,24 +147,24 @@ # 0x000003FC 0x0000000000000000 # "MSR_CORE_C3_RESIDENCY (Table: 2-20)" # 0x000003FD 0x0000000000000000 # "MSR_CORE_C6_RESIDENCY (Table: 2-20)" # 0x000003FE 0x0000000000000000 # "MSR_CORE_C7_RESIDENCY (Table: 2-20)" -# 0x00000400 0x0000000000000000 # "IA32_MC0_CTL (Table: 2-20)" -# 0x00000401 0x0000000000000000 # "IA32_MC0_STATUS (Table: 2-20)" -# 0x00000402 0x0000000000000000 # "IA32_MC0_ADDR (Table: 2-20)" -# 0x00000403 0x0000000000000000 # "IA32_MC0_MISC (Table: 2-20)" -# 0x00000404 0x0000000000000000 # "IA32_MC1_CTL (Table: 2-20)" -# 0x00000405 0x0000000000000000 # "IA32_MC1_STATUS (Table: 2-20)" -# 0x00000406 0x0000000000000000 # "IA32_MC1_ADDR (Table: 2-20)" -# 0x00000407 0x0000000000000000 # "IA32_MC1_MISC (Table: 2-20)" -# 0x00000408 0x0000000000000000 # "IA32_MC2_CTL (Table: 2-20)" -# 0x00000409 0x0000000000000000 # "IA32_MC2_STATUS (Table: 2-20)" -# 0x0000040A 0x0000000000000000 # "IA32_MC2_ADDR (Table: 2-20)" -# 0x0000040B 0x0000000000000000 # "IA32_MC2_MISC (Table: 2-20)" -# 0x0000040C 0x0000000000000000 # "IA32_MC3_CTL (Table: 2-20)" -# 0x0000040D 0x0000000000000000 # "IA32_MC3_STATUS (Table: 2-20)" -# 0x0000040E 0x0000000000000000 # "IA32_MC3_ADDR (Table: 2-20)" -# 0x0000040F 0x0000000000000000 # "IA32_MC3_MISC (Table: 2-20)" -# 0x00000410 0x0000000000000000 # "IA32_MC4_CTL (Table: 2-20)" -# 0x00000411 0x0000000000000000 # "IA32_MC4_STATUS (Table: 2-20)" +# 0x00000400 0x0000000000000000 # "IA32_MC0_CTL (Table: 2-50)" +# 0x00000401 0x0000000000000000 # "IA32_MC0_STATUS (Table: 2-50)" +# 0x00000402 0x0000000000000000 # "IA32_MC0_ADDR (Table: 2-50)" +# 0x00000403 0x0000000000000000 # "IA32_MC0_MISC (Table: 2-50)" +# 0x00000404 0x0000000000000000 # "IA32_MC1_CTL (Table: 2-50)" +# 0x00000405 0x0000000000000000 # "IA32_MC1_STATUS (Table: 2-50)" +# 0x00000406 0x0000000000000000 # "IA32_MC1_ADDR (Table: 2-50)" +# 0x00000407 0x0000000000000000 # "IA32_MC1_MISC (Table: 2-50)" +# 0x00000408 0x0000000000000000 # "IA32_MC2_CTL (Table: 2-50)" +# 0x00000409 0x0000000000000000 # "IA32_MC2_STATUS (Table: 2-50)" +# 0x0000040A 0x0000000000000000 # "IA32_MC2_ADDR (Table: 2-50)" +# 0x0000040B 0x0000000000000000 # "IA32_MC2_MISC (Table: 2-50)" +# 0x0000040C 0x0000000000000000 # "IA32_MC3_CTL (Table: 2-50)" +# 0x0000040D 0x0000000000000000 # "IA32_MC3_STATUS (Table: 2-50)" +# 0x0000040E 0x0000000000000000 # "IA32_MC3_ADDR (Table: 2-50)" +# 0x0000040F 0x0000000000000000 # "IA32_MC3_MISC (Table: 2-50)" +# 0x00000410 0x0000000000000000 # "IA32_MC4_CTL (Table: 2-50)" +# 0x00000411 0x0000000000000000 # "IA32_MC4_STATUS (Table: 2-50)" # 0x00000412 0x0000000000000000 # "IA32_MC4_ADDR (Table: 2-50)" # 0x00000413 0x0000000000000000 # "IA32_MC4_MISC (Table: 2-50)" # 0x00000414 0x0000000000000000 # "IA32_MC5_CTL (Table: 2-50)" @@ -265,11 +264,9 @@ # 0x00000582 0x0000000000000000 # "IA32_RTIT_ADDR1_A (Table: 2-39)" # 0x00000583 0x0000000000000000 # "IA32_RTIT_ADDR1_B (Table: 2-39)" # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" -# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" +# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-50)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -277,12 +274,12 @@ # 0x00000613 0x0000000000000000 # "MSR_PKG_PERF_STATUS (Table: 2-29)" # 0x00000614 0x0000000000000000 # "MSR_PKG_POWER_INFO (Table: 2-20)" # 0x00000618 0x0000000000000000 # "MSR_DRAM_POWER_LIMIT (Table: 2-50)" -# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-29)" -# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-29)" +# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-50)" +# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-50)" # 0x0000061C 0x0000000000000000 # "MSR_DRAM_POWER_INFO (Table: 2-50)" # 0x00000620 0x0000000000000000 # "MSR_UNCORE_RATIO_LIMIT (Table: 2-50)" # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" -# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-39)" +# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-50)" # 0x0000063A 0x0000000000000000 # "MSR_PP0_POLICY (Table: 2-21)" # 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-21)" # 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-21)" diff --git a/allowlists/al_06_56 b/allowlists/al_06_56 index bae83ed..98c7df3 100644 --- a/allowlists/al_06_56 +++ b/allowlists/al_06_56 @@ -29,7 +29,7 @@ # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" # 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-36)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-36)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,13 +38,13 @@ # 0x00000174 0x0000000000000000 # "IA32_SYSENTER_CS (Table: 2-20)" # 0x00000175 0x0000000000000000 # "IA32_SYSENTER_ESP (Table: 2-20)" # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" -# 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" +# 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-36)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" # 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-36)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -53,9 +53,9 @@ # 0x00000199 0x0000000000000000 # "IA32_PERF_CTL (Table: 2-20)" # 0x0000019A 0x0000000000000000 # "IA32_CLOCK_MODULATION (Table: 2-20)" # 0x0000019B 0x0000000000000000 # "IA32_THERM_INTERRUPT (Table: 2-20)" -# 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-20)" +# 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-36)" # 0x000001A0 0x0000000000000000 # "IA32_MISC_ENABLE (Table: 2-20)" -# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-20)" +# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-36)" # 0x000001A4 0x0000000000000000 # "MSR_MISC_FEATURE_CONTROL (Table: 2-20)" # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" @@ -66,9 +66,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -124,9 +124,9 @@ # 0x0000030B 0x0000000000000000 # "IA32_FIXED_CTR2 (Table: 2-20)" # 0x00000345 0x0000000000000000 # "IA32_PERF_CAPABILITIES (Table: 2-20)" # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" -# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-20)" +# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-34)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-20)" +# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-34)" # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" @@ -213,10 +213,9 @@ # 0x00000571 0x0000000000000000 # "IA32_RTIT_STATUS (Table: 2-34)" # 0x00000572 0x0000000000000000 # "IA32_RTIT_CR3_MATCH (Table: 2-34)" # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" -# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" +# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-36)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_5E b/allowlists/al_06_5E index 57d3857..ec84f3a 100644 --- a/allowlists/al_06_5E +++ b/allowlists/al_06_5E @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,10 +38,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -61,9 +61,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,7 +116,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -193,9 +192,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_66 b/allowlists/al_06_66 index 9422abe..31d7a79 100644 --- a/allowlists/al_06_66 +++ b/allowlists/al_06_66 @@ -14,7 +14,7 @@ # 0x00000017 0x0000000000000000 # "IA32_PLATFORM_ID (Table: 2-20)" # 0x0000001B 0x0000000000000000 # "IA32_APIC_BASE (Table: 2-20)" # 0x00000034 0x0000000000000000 # "MSR_SMI_COUNT (Table: 2-20)" -# 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-39)" +# 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-42)" # 0x0000003B 0x0000000000000000 # "IA32_TSC_ADJUST (Table: 2-29)" # 0x00000079 0x0000000000000000 # "IA32_BIOS_UPDT_TRIG (Table: 2-20)" # 0x0000008B 0x0000000000000000 # "IA32_BIOS_SIGN_ID (Table: 2-20)" @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,10 +38,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -61,9 +61,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -120,7 +120,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -134,7 +133,7 @@ # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" # 0x000003F7 0x0000000000000000 # "MSR_PEBS_FRONTEND (Table: 2-39)" -# 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" +# 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-42)" # 0x000003F9 0x0000000000000000 # "MSR_PKG_C6_RESIDENCY (Table: 2-20)" # 0x000003FA 0x0000000000000000 # "MSR_PKG_C7_RESIDENCY (Table: 2-20)" # 0x000003FC 0x0000000000000000 # "MSR_CORE_C3_RESIDENCY (Table: 2-20)" @@ -197,9 +196,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -311,9 +308,7 @@ # 0x00000709 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-43)" # 0x0000070A 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR0 (Table: 2-43)" # 0x0000070B 0x0000000000000000 # "MSR_UNC_CBO_1_PERFCTR1 (Table: 2-43)" -# 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL0 (Table: 2-43)" # 0x00000710 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-43)" -# 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_1_PERFEVTSEL1 (Table: 2-43)" # 0x00000711 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-43)" # 0x00000712 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR0 (Table: 2-43)" # 0x00000713 0x0000000000000000 # "MSR_UNC_CBO_2_PERFCTR1 (Table: 2-43)" @@ -323,9 +318,7 @@ # 0x00000719 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-43)" # 0x0000071A 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR0 (Table: 2-43)" # 0x0000071B 0x0000000000000000 # "MSR_UNC_CBO_3_PERFCTR1 (Table: 2-43)" -# 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL0 (Table: 2-43)" # 0x00000720 0x0000000000000000 # "MSR_UNC_CBO_4_PERFEVTSEL0 (Table: 2-43)" -# 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_2_PERFEVTSEL1 (Table: 2-43)" # 0x00000721 0x0000000000000000 # "MSR_UNC_CBO_4_PERFEVTSEL1 (Table: 2-43)" # 0x00000722 0x0000000000000000 # "MSR_UNC_CBO_4_PERFCTR0 (Table: 2-43)" # 0x00000723 0x0000000000000000 # "MSR_UNC_CBO_4_PERFCTR1 (Table: 2-43)" @@ -335,9 +328,7 @@ # 0x00000729 0x0000000000000000 # "MSR_UNC_CBO_5_PERFEVTSEL1 (Table: 2-43)" # 0x0000072A 0x0000000000000000 # "MSR_UNC_CBO_5_PERFCTR0 (Table: 2-43)" # 0x0000072B 0x0000000000000000 # "MSR_UNC_CBO_5_PERFCTR1 (Table: 2-43)" -# 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL0 (Table: 2-43)" # 0x00000730 0x0000000000000000 # "MSR_UNC_CBO_6_PERFEVTSEL0 (Table: 2-43)" -# 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_3_PERFEVTSEL1 (Table: 2-43)" # 0x00000731 0x0000000000000000 # "MSR_UNC_CBO_6_PERFEVTSEL1 (Table: 2-43)" # 0x00000732 0x0000000000000000 # "MSR_UNC_CBO_6_PERFCTR0 (Table: 2-43)" # 0x00000733 0x0000000000000000 # "MSR_UNC_CBO_6_PERFCTR1 (Table: 2-43)" diff --git a/allowlists/al_06_6A b/allowlists/al_06_6A index 2249b01..9c44dc7 100644 --- a/allowlists/al_06_6A +++ b/allowlists/al_06_6A @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,10 +38,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -61,9 +61,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,7 +116,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -186,9 +185,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -197,8 +194,8 @@ # 0x00000613 0x0000000000000000 # "MSR_PKG_PERF_STATUS (Table: 2-29)" # 0x00000614 0x0000000000000000 # "MSR_PKG_POWER_INFO (Table: 2-20)" # 0x00000618 0x0000000000000000 # "MSR_DRAM_POWER_LIMIT (Table: 2-51)" -# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-29)" -# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-29)" +# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-51)" +# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-51)" # 0x0000061C 0x0000000000000000 # "MSR_DRAM_POWER_INFO (Table: 2-51)" # 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)" # 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-39)" diff --git a/allowlists/al_06_6C b/allowlists/al_06_6C index 2eea49c..1566da6 100644 --- a/allowlists/al_06_6C +++ b/allowlists/al_06_6C @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,10 +38,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -61,9 +61,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,7 +116,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -186,9 +185,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_7D b/allowlists/al_06_7D index 09cad78..01feb0a 100644 --- a/allowlists/al_06_7D +++ b/allowlists/al_06_7D @@ -35,8 +35,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -49,10 +49,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -72,9 +72,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F1 0x0000000000000000 # "MSR_CRASHLOG_CONTROL (Table: 2-44)" @@ -131,7 +131,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -203,9 +202,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -309,11 +306,11 @@ # 0x000006E0 0x0000000000000000 # "IA32_TSC_DEADLINE (Table: 2-20)" # 0x00000770 0x0000000000000000 # "IA32_PM_ENABLE (Table: 2-39)" # 0x00000771 0x0000000000000000 # "IA32_HWP_CAPABILITIES (Table: 2-39)" -# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-39)" +# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-44)" # 0x00000773 0x0000000000000000 # "IA32_HWP_INTERRUPT (Table: 2-39)" # 0x00000774 0x0000000000000000 # "IA32_HWP_REQUEST (Table: 2-39)" # 0x00000775 0x0000000000000000 # "IA32_PECI_HWP_REQUEST_INFO (Table: 2-44)" -# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-39)" +# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-44)" # 0x00000802 0x0000000000000000 # "IA32_X2APIC_APICID (Table: 2-20)" # 0x00000803 0x0000000000000000 # "IA32_X2APIC_VERSION (Table: 2-20)" # 0x00000808 0x0000000000000000 # "IA32_X2APIC_TPR (Table: 2-20)" diff --git a/allowlists/al_06_7E b/allowlists/al_06_7E index b437927..9d64a25 100644 --- a/allowlists/al_06_7E +++ b/allowlists/al_06_7E @@ -35,8 +35,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -49,10 +49,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -72,9 +72,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F1 0x0000000000000000 # "MSR_CRASHLOG_CONTROL (Table: 2-44)" @@ -131,7 +131,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -203,9 +202,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -309,11 +306,11 @@ # 0x000006E0 0x0000000000000000 # "IA32_TSC_DEADLINE (Table: 2-20)" # 0x00000770 0x0000000000000000 # "IA32_PM_ENABLE (Table: 2-39)" # 0x00000771 0x0000000000000000 # "IA32_HWP_CAPABILITIES (Table: 2-39)" -# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-39)" +# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-44)" # 0x00000773 0x0000000000000000 # "IA32_HWP_INTERRUPT (Table: 2-39)" # 0x00000774 0x0000000000000000 # "IA32_HWP_REQUEST (Table: 2-39)" # 0x00000775 0x0000000000000000 # "IA32_PECI_HWP_REQUEST_INFO (Table: 2-44)" -# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-39)" +# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-44)" # 0x00000802 0x0000000000000000 # "IA32_X2APIC_APICID (Table: 2-20)" # 0x00000803 0x0000000000000000 # "IA32_X2APIC_VERSION (Table: 2-20)" # 0x00000808 0x0000000000000000 # "IA32_X2APIC_TPR (Table: 2-20)" diff --git a/allowlists/al_06_8C b/allowlists/al_06_8C index a9453a6..a26064d 100644 --- a/allowlists/al_06_8C +++ b/allowlists/al_06_8C @@ -28,9 +28,9 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" # 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-45)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -41,10 +41,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -64,9 +64,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -119,7 +119,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -191,9 +190,7 @@ # 0x00000601 0x0000000000000000 # "MSR_VR_CURRENT_CONFIG (Table: 2-45)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_8D b/allowlists/al_06_8D index 38a1e29..ab954bb 100644 --- a/allowlists/al_06_8D +++ b/allowlists/al_06_8D @@ -28,9 +28,9 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" # 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-45)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -41,10 +41,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -64,9 +64,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -119,7 +119,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -191,9 +190,7 @@ # 0x00000601 0x0000000000000000 # "MSR_VR_CURRENT_CONFIG (Table: 2-45)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_8E b/allowlists/al_06_8E index 1f19c14..3ddb1c5 100644 --- a/allowlists/al_06_8E +++ b/allowlists/al_06_8E @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,10 +38,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -61,9 +61,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,7 +116,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -193,9 +192,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_97 b/allowlists/al_06_97 index dc3f9da..1b05912 100644 --- a/allowlists/al_06_97 +++ b/allowlists/al_06_97 @@ -13,7 +13,7 @@ # 0x00000010 0x0000000000000000 # "IA32_TIME_STAMP_COUNTER (Table: 2-20)" # 0x00000017 0x0000000000000000 # "IA32_PLATFORM_ID (Table: 2-20)" # 0x0000001B 0x0000000000000000 # "IA32_APIC_BASE (Table: 2-20)" -# 0x00000033 0x0000000000000000 # "MSR_MEMORY_CTRL (Table: 2-44)" +# 0x00000033 0x0000000000000000 # "MSR_MEMORY_CTRL (Table: 2-46)" # 0x00000034 0x0000000000000000 # "MSR_SMI_COUNT (Table: 2-20)" # 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-39)" # 0x0000003B 0x0000000000000000 # "IA32_TSC_ADJUST (Table: 2-29)" @@ -25,7 +25,7 @@ # 0x0000008D 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH1 (Table: 2-44)" # 0x0000008E 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH2 (Table: 2-44)" # 0x0000008F 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH3 (Table: 2-44)" -# 0x000000A0 0x0000000000000000 # "MSR_BIOS_MCU_ERRORCODE (Table: 2-44)" +# 0x000000A0 0x0000000000000000 # "MSR_BIOS_MCU_ERRORCODE (Table: 2-45)" # 0x000000A5 0x0000000000000000 # "MSR_FIT_BIOS_ERROR (Table: 2-44)" # 0x000000A7 0x0000000000000000 # "MSR_BIOS_DEBUG (Table: 2-45)" # 0x000000BC 0x0000000000000000 # "IA32_MISC_PACKAGE_CTLS (Table: 2-46)" @@ -35,12 +35,12 @@ # 0x000000C4 0x0000000000000000 # "IA32_PMC3 (Table: 2-20)" # 0x000000C5 0x0000000000000000 # "IA32_PMC4 (Table: 2-20)" # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" -# 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" -# 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-45)" +# 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-46)" +# 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-46)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-46)" # 0x000000E1 0x0000000000000000 # "IA32_UMWAIT_CONTROL (Table: 2-46)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -54,14 +54,14 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" -# 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" -# 0x0000018D 0x0000000000000000 # "IA32_PERFEVTSEL7 (Table: 2-20)" +# 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-46)" +# 0x0000018D 0x0000000000000000 # "IA32_PERFEVTSEL7 (Table: 2-46)" # 0x00000195 0x0000000000000000 # "IA32_OVERCLOCKING_STATUS (Table: 2-46)" # 0x00000198 0x0000000000000000 # "MSR_PERF_STATUS (Table: 2-20)" # 0x00000199 0x0000000000000000 # "IA32_PERF_CTL (Table: 2-20)" @@ -70,19 +70,17 @@ # 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-39)" # 0x000001A0 0x0000000000000000 # "IA32_MISC_ENABLE (Table: 2-20)" # 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-20)" -# 0x000001A4 0x0000000000000000 # "MSR_MISC_FEATURE_CONTROL (Table: 2-20)" -# 0x000001A4 0x0000000000000000 # "MSR_PREFETCH_CONTROL (Table: 2-20)" +# 0x000001A4 0x0000000000000000 # "MSR_PREFETCH_CONTROL (Table: 2-47)" # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" # 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)" -# 0x000001AD 0x0000000000000000 # "MSR_PRIMARY_TURBO_RATIO_LIMIT (Table: 2-39)" -# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-39)" +# 0x000001AD 0x0000000000000000 # "MSR_PRIMARY_TURBO_RATIO_LIMIT (Table: 2-46)" # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F1 0x0000000000000000 # "MSR_CRASHLOG_CONTROL (Table: 2-44)" @@ -139,7 +137,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -147,7 +144,7 @@ # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F2 0x0000000000000000 # "MSR_PEBS_DATA_CFG (Table: 2-44)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" -# 0x000003F7 0x0000000000000000 # "MSR_PEBS_FRONTEND (Table: 2-39)" +# 0x000003F7 0x0000000000000000 # "MSR_PEBS_FRONTEND (Table: 2-47)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" # 0x000003F9 0x0000000000000000 # "MSR_PKG_C6_RESIDENCY (Table: 2-20)" # 0x000003FA 0x0000000000000000 # "MSR_PKG_C7_RESIDENCY (Table: 2-20)" @@ -198,11 +195,11 @@ # 0x000004C4 0x0000000000000000 # "IA32_A_PMC3 (Table: 2-20)" # 0x000004C5 0x0000000000000000 # "IA32_A_PMC4 (Table: 2-20)" # 0x000004C6 0x0000000000000000 # "IA32_A_PMC5 (Table: 2-20)" -# 0x000004C7 0x0000000000000000 # "IA32_A_PMC6 (Table: 2-20)" -# 0x000004C8 0x0000000000000000 # "IA32_A_PMC7 (Table: 2-20)" +# 0x000004C7 0x0000000000000000 # "IA32_A_PMC6 (Table: 2-46)" +# 0x000004C8 0x0000000000000000 # "IA32_A_PMC7 (Table: 2-46)" # 0x00000500 0x0000000000000000 # "IA32_SGX_SVN_STATUS (Table: 2-39)" # 0x00000540 0x0000000000000000 # "MSR_THREAD_UARCH_CTL (Table: 2-47)" -# 0x00000541 0x0000000000000000 # "MSR_CORE_UARCH_CTL (Table: 2-44)" +# 0x00000541 0x0000000000000000 # "MSR_CORE_UARCH_CTL (Table: 2-47)" # 0x00000560 0x0000000000000000 # "IA32_RTIT_OUTPUT_BASE (Table: 2-39)" # 0x00000561 0x0000000000000000 # "IA32_RTIT_OUTPUT_MASK_PTRS (Table: 2-39)" # 0x00000570 0x0000000000000000 # "IA32_RTIT_CTL (Table: 2-39)" @@ -216,9 +213,7 @@ # 0x00000601 0x0000000000000000 # "MSR_VR_CURRENT_CONFIG (Table: 2-45)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -332,12 +327,12 @@ # 0x000006E1 0x0000000000000000 # "IA32_PKRS (Table: 2-46)" # 0x00000770 0x0000000000000000 # "IA32_PM_ENABLE (Table: 2-39)" # 0x00000771 0x0000000000000000 # "IA32_HWP_CAPABILITIES (Table: 2-39)" -# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-39)" +# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-44)" # 0x00000773 0x0000000000000000 # "IA32_HWP_INTERRUPT (Table: 2-39)" # 0x00000774 0x0000000000000000 # "IA32_HWP_REQUEST (Table: 2-39)" # 0x00000775 0x0000000000000000 # "IA32_PECI_HWP_REQUEST_INFO (Table: 2-44)" # 0x00000776 0x0000000000000000 # "IA32_HWP_CTL (Table: 2-46)" -# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-39)" +# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-44)" # 0x00000802 0x0000000000000000 # "IA32_X2APIC_APICID (Table: 2-20)" # 0x00000803 0x0000000000000000 # "IA32_X2APIC_VERSION (Table: 2-20)" # 0x00000808 0x0000000000000000 # "IA32_X2APIC_TPR (Table: 2-20)" @@ -381,7 +376,7 @@ # 0x00000838 0x0000000000000000 # "IA32_X2APIC_INIT_COUNT (Table: 2-20)" # 0x00000839 0x0000000000000000 # "IA32_X2APIC_CUR_COUNT (Table: 2-20)" # 0x0000083F 0x0000000000000000 # "IA32_X2APIC_SELF_IPI (Table: 2-20)" -# 0x00000981 0x0000000000000000 # "IA32_TME_CAPABILITY (Table: 2-45)" +# 0x00000981 0x0000000000000000 # "IA32_TME_CAPABILITY (Table: 2-46)" # 0x00000982 0x0000000000000000 # "IA32_TME_ACTIVATE (Table: 2-45)" # 0x00000983 0x0000000000000000 # "IA32_TME_EXCLUDE_MASK (Table: 2-45)" # 0x00000984 0x0000000000000000 # "IA32_TME_EXCLUDE_BASE (Table: 2-45)" @@ -389,14 +384,14 @@ # 0x00000991 0x0000000000000000 # "IA32_IWKEYBACKUP_STATUS1 (Table: 2-45)" # 0x00000C80 0x0000000000000000 # "IA32_DEBUG_INTERFACE (Table: 2-29)" # 0x00000C82 0x0000000000000000 # "IA32_L2_QOS_CFG (Table: 2-45)" -# 0x00000D10 0x0000000000000000 # "IA32_L2_QOS_MASK_0 (Table: 2-45)" -# 0x00000D11 0x0000000000000000 # "IA32_L2_QOS_MASK_1 (Table: 2-45)" -# 0x00000D12 0x0000000000000000 # "IA32_L2_QOS_MASK_2 (Table: 2-45)" -# 0x00000D13 0x0000000000000000 # "IA32_L2_QOS_MASK_3 (Table: 2-45)" -# 0x00000D14 0x0000000000000000 # "IA32_L2_QOS_MASK_4 (Table: 2-45)" -# 0x00000D15 0x0000000000000000 # "IA32_L2_QOS_MASK_5 (Table: 2-45)" -# 0x00000D16 0x0000000000000000 # "IA32_L2_QOS_MASK_6 (Table: 2-45)" -# 0x00000D17 0x0000000000000000 # "IA32_L2_QOS_MASK_7 (Table: 2-45)" +# 0x00000D10 0x0000000000000000 # "IA32_L2_QOS_MASK_0 (Table: 2-48)" +# 0x00000D11 0x0000000000000000 # "IA32_L2_QOS_MASK_1 (Table: 2-48)" +# 0x00000D12 0x0000000000000000 # "IA32_L2_QOS_MASK_2 (Table: 2-48)" +# 0x00000D13 0x0000000000000000 # "IA32_L2_QOS_MASK_3 (Table: 2-48)" +# 0x00000D14 0x0000000000000000 # "IA32_L2_QOS_MASK_4 (Table: 2-48)" +# 0x00000D15 0x0000000000000000 # "IA32_L2_QOS_MASK_5 (Table: 2-48)" +# 0x00000D16 0x0000000000000000 # "IA32_L2_QOS_MASK_6 (Table: 2-48)" +# 0x00000D17 0x0000000000000000 # "IA32_L2_QOS_MASK_7 (Table: 2-48)" # 0x00000D18 0x0000000000000000 # "IA32_L2_QOS_MASK_8 (Table: 2-48)" # 0x00000D19 0x0000000000000000 # "IA32_L2_QOS_MASK_9 (Table: 2-48)" # 0x00000D1A 0x0000000000000000 # "IA32_L2_QOS_MASK_10 (Table: 2-48)" diff --git a/allowlists/al_06_9A b/allowlists/al_06_9A index 0ecab53..dd13844 100644 --- a/allowlists/al_06_9A +++ b/allowlists/al_06_9A @@ -13,7 +13,7 @@ # 0x00000010 0x0000000000000000 # "IA32_TIME_STAMP_COUNTER (Table: 2-20)" # 0x00000017 0x0000000000000000 # "IA32_PLATFORM_ID (Table: 2-20)" # 0x0000001B 0x0000000000000000 # "IA32_APIC_BASE (Table: 2-20)" -# 0x00000033 0x0000000000000000 # "MSR_MEMORY_CTRL (Table: 2-44)" +# 0x00000033 0x0000000000000000 # "MSR_MEMORY_CTRL (Table: 2-46)" # 0x00000034 0x0000000000000000 # "MSR_SMI_COUNT (Table: 2-20)" # 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-39)" # 0x0000003B 0x0000000000000000 # "IA32_TSC_ADJUST (Table: 2-29)" @@ -25,7 +25,7 @@ # 0x0000008D 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH1 (Table: 2-44)" # 0x0000008E 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH2 (Table: 2-44)" # 0x0000008F 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH3 (Table: 2-44)" -# 0x000000A0 0x0000000000000000 # "MSR_BIOS_MCU_ERRORCODE (Table: 2-44)" +# 0x000000A0 0x0000000000000000 # "MSR_BIOS_MCU_ERRORCODE (Table: 2-45)" # 0x000000A5 0x0000000000000000 # "MSR_FIT_BIOS_ERROR (Table: 2-44)" # 0x000000A7 0x0000000000000000 # "MSR_BIOS_DEBUG (Table: 2-45)" # 0x000000BC 0x0000000000000000 # "IA32_MISC_PACKAGE_CTLS (Table: 2-46)" @@ -35,12 +35,12 @@ # 0x000000C4 0x0000000000000000 # "IA32_PMC3 (Table: 2-20)" # 0x000000C5 0x0000000000000000 # "IA32_PMC4 (Table: 2-20)" # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" -# 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" -# 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-45)" +# 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-46)" +# 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-46)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-46)" # 0x000000E1 0x0000000000000000 # "IA32_UMWAIT_CONTROL (Table: 2-46)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -54,14 +54,14 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" -# 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" -# 0x0000018D 0x0000000000000000 # "IA32_PERFEVTSEL7 (Table: 2-20)" +# 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-46)" +# 0x0000018D 0x0000000000000000 # "IA32_PERFEVTSEL7 (Table: 2-46)" # 0x00000195 0x0000000000000000 # "IA32_OVERCLOCKING_STATUS (Table: 2-46)" # 0x00000198 0x0000000000000000 # "MSR_PERF_STATUS (Table: 2-20)" # 0x00000199 0x0000000000000000 # "IA32_PERF_CTL (Table: 2-20)" @@ -70,19 +70,17 @@ # 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-39)" # 0x000001A0 0x0000000000000000 # "IA32_MISC_ENABLE (Table: 2-20)" # 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-20)" -# 0x000001A4 0x0000000000000000 # "MSR_MISC_FEATURE_CONTROL (Table: 2-20)" -# 0x000001A4 0x0000000000000000 # "MSR_PREFETCH_CONTROL (Table: 2-20)" +# 0x000001A4 0x0000000000000000 # "MSR_PREFETCH_CONTROL (Table: 2-47)" # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" # 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)" -# 0x000001AD 0x0000000000000000 # "MSR_PRIMARY_TURBO_RATIO_LIMIT (Table: 2-39)" -# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-39)" +# 0x000001AD 0x0000000000000000 # "MSR_PRIMARY_TURBO_RATIO_LIMIT (Table: 2-46)" # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F1 0x0000000000000000 # "MSR_CRASHLOG_CONTROL (Table: 2-44)" @@ -139,7 +137,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -147,7 +144,7 @@ # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F2 0x0000000000000000 # "MSR_PEBS_DATA_CFG (Table: 2-44)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" -# 0x000003F7 0x0000000000000000 # "MSR_PEBS_FRONTEND (Table: 2-39)" +# 0x000003F7 0x0000000000000000 # "MSR_PEBS_FRONTEND (Table: 2-47)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" # 0x000003F9 0x0000000000000000 # "MSR_PKG_C6_RESIDENCY (Table: 2-20)" # 0x000003FA 0x0000000000000000 # "MSR_PKG_C7_RESIDENCY (Table: 2-20)" @@ -198,11 +195,11 @@ # 0x000004C4 0x0000000000000000 # "IA32_A_PMC3 (Table: 2-20)" # 0x000004C5 0x0000000000000000 # "IA32_A_PMC4 (Table: 2-20)" # 0x000004C6 0x0000000000000000 # "IA32_A_PMC5 (Table: 2-20)" -# 0x000004C7 0x0000000000000000 # "IA32_A_PMC6 (Table: 2-20)" -# 0x000004C8 0x0000000000000000 # "IA32_A_PMC7 (Table: 2-20)" +# 0x000004C7 0x0000000000000000 # "IA32_A_PMC6 (Table: 2-46)" +# 0x000004C8 0x0000000000000000 # "IA32_A_PMC7 (Table: 2-46)" # 0x00000500 0x0000000000000000 # "IA32_SGX_SVN_STATUS (Table: 2-39)" # 0x00000540 0x0000000000000000 # "MSR_THREAD_UARCH_CTL (Table: 2-47)" -# 0x00000541 0x0000000000000000 # "MSR_CORE_UARCH_CTL (Table: 2-44)" +# 0x00000541 0x0000000000000000 # "MSR_CORE_UARCH_CTL (Table: 2-47)" # 0x00000560 0x0000000000000000 # "IA32_RTIT_OUTPUT_BASE (Table: 2-39)" # 0x00000561 0x0000000000000000 # "IA32_RTIT_OUTPUT_MASK_PTRS (Table: 2-39)" # 0x00000570 0x0000000000000000 # "IA32_RTIT_CTL (Table: 2-39)" @@ -216,9 +213,7 @@ # 0x00000601 0x0000000000000000 # "MSR_VR_CURRENT_CONFIG (Table: 2-45)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -332,12 +327,12 @@ # 0x000006E1 0x0000000000000000 # "IA32_PKRS (Table: 2-46)" # 0x00000770 0x0000000000000000 # "IA32_PM_ENABLE (Table: 2-39)" # 0x00000771 0x0000000000000000 # "IA32_HWP_CAPABILITIES (Table: 2-39)" -# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-39)" +# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-44)" # 0x00000773 0x0000000000000000 # "IA32_HWP_INTERRUPT (Table: 2-39)" # 0x00000774 0x0000000000000000 # "IA32_HWP_REQUEST (Table: 2-39)" # 0x00000775 0x0000000000000000 # "IA32_PECI_HWP_REQUEST_INFO (Table: 2-44)" # 0x00000776 0x0000000000000000 # "IA32_HWP_CTL (Table: 2-46)" -# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-39)" +# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-44)" # 0x00000802 0x0000000000000000 # "IA32_X2APIC_APICID (Table: 2-20)" # 0x00000803 0x0000000000000000 # "IA32_X2APIC_VERSION (Table: 2-20)" # 0x00000808 0x0000000000000000 # "IA32_X2APIC_TPR (Table: 2-20)" @@ -381,7 +376,7 @@ # 0x00000838 0x0000000000000000 # "IA32_X2APIC_INIT_COUNT (Table: 2-20)" # 0x00000839 0x0000000000000000 # "IA32_X2APIC_CUR_COUNT (Table: 2-20)" # 0x0000083F 0x0000000000000000 # "IA32_X2APIC_SELF_IPI (Table: 2-20)" -# 0x00000981 0x0000000000000000 # "IA32_TME_CAPABILITY (Table: 2-45)" +# 0x00000981 0x0000000000000000 # "IA32_TME_CAPABILITY (Table: 2-46)" # 0x00000982 0x0000000000000000 # "IA32_TME_ACTIVATE (Table: 2-45)" # 0x00000983 0x0000000000000000 # "IA32_TME_EXCLUDE_MASK (Table: 2-45)" # 0x00000984 0x0000000000000000 # "IA32_TME_EXCLUDE_BASE (Table: 2-45)" @@ -389,14 +384,14 @@ # 0x00000991 0x0000000000000000 # "IA32_IWKEYBACKUP_STATUS1 (Table: 2-45)" # 0x00000C80 0x0000000000000000 # "IA32_DEBUG_INTERFACE (Table: 2-29)" # 0x00000C82 0x0000000000000000 # "IA32_L2_QOS_CFG (Table: 2-45)" -# 0x00000D10 0x0000000000000000 # "IA32_L2_QOS_MASK_0 (Table: 2-45)" -# 0x00000D11 0x0000000000000000 # "IA32_L2_QOS_MASK_1 (Table: 2-45)" -# 0x00000D12 0x0000000000000000 # "IA32_L2_QOS_MASK_2 (Table: 2-45)" -# 0x00000D13 0x0000000000000000 # "IA32_L2_QOS_MASK_3 (Table: 2-45)" -# 0x00000D14 0x0000000000000000 # "IA32_L2_QOS_MASK_4 (Table: 2-45)" -# 0x00000D15 0x0000000000000000 # "IA32_L2_QOS_MASK_5 (Table: 2-45)" -# 0x00000D16 0x0000000000000000 # "IA32_L2_QOS_MASK_6 (Table: 2-45)" -# 0x00000D17 0x0000000000000000 # "IA32_L2_QOS_MASK_7 (Table: 2-45)" +# 0x00000D10 0x0000000000000000 # "IA32_L2_QOS_MASK_0 (Table: 2-48)" +# 0x00000D11 0x0000000000000000 # "IA32_L2_QOS_MASK_1 (Table: 2-48)" +# 0x00000D12 0x0000000000000000 # "IA32_L2_QOS_MASK_2 (Table: 2-48)" +# 0x00000D13 0x0000000000000000 # "IA32_L2_QOS_MASK_3 (Table: 2-48)" +# 0x00000D14 0x0000000000000000 # "IA32_L2_QOS_MASK_4 (Table: 2-48)" +# 0x00000D15 0x0000000000000000 # "IA32_L2_QOS_MASK_5 (Table: 2-48)" +# 0x00000D16 0x0000000000000000 # "IA32_L2_QOS_MASK_6 (Table: 2-48)" +# 0x00000D17 0x0000000000000000 # "IA32_L2_QOS_MASK_7 (Table: 2-48)" # 0x00000D18 0x0000000000000000 # "IA32_L2_QOS_MASK_8 (Table: 2-48)" # 0x00000D19 0x0000000000000000 # "IA32_L2_QOS_MASK_9 (Table: 2-48)" # 0x00000D1A 0x0000000000000000 # "IA32_L2_QOS_MASK_10 (Table: 2-48)" diff --git a/allowlists/al_06_9E b/allowlists/al_06_9E index 76f9a02..d1812e8 100644 --- a/allowlists/al_06_9E +++ b/allowlists/al_06_9E @@ -27,8 +27,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -39,10 +39,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -62,9 +62,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -122,7 +122,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -199,9 +198,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_A5 b/allowlists/al_06_A5 index dd008de..a168e9c 100644 --- a/allowlists/al_06_A5 +++ b/allowlists/al_06_A5 @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,10 +38,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -61,9 +61,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,7 +116,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -186,9 +185,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_A6 b/allowlists/al_06_A6 index 6d8c7b2..98eaeab 100644 --- a/allowlists/al_06_A6 +++ b/allowlists/al_06_A6 @@ -26,8 +26,8 @@ # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" # 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" # 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -38,10 +38,10 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" # 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" @@ -61,9 +61,9 @@ # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)" @@ -116,7 +116,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -186,9 +185,7 @@ # 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" diff --git a/allowlists/al_06_BF b/allowlists/al_06_BF index f6d9161..c6600da 100644 --- a/allowlists/al_06_BF +++ b/allowlists/al_06_BF @@ -13,7 +13,7 @@ # 0x00000010 0x0000000000000000 # "IA32_TIME_STAMP_COUNTER (Table: 2-20)" # 0x00000017 0x0000000000000000 # "IA32_PLATFORM_ID (Table: 2-20)" # 0x0000001B 0x0000000000000000 # "IA32_APIC_BASE (Table: 2-20)" -# 0x00000033 0x0000000000000000 # "MSR_MEMORY_CTRL (Table: 2-44)" +# 0x00000033 0x0000000000000000 # "MSR_MEMORY_CTRL (Table: 2-46)" # 0x00000034 0x0000000000000000 # "MSR_SMI_COUNT (Table: 2-20)" # 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-39)" # 0x0000003B 0x0000000000000000 # "IA32_TSC_ADJUST (Table: 2-29)" @@ -25,7 +25,7 @@ # 0x0000008D 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH1 (Table: 2-44)" # 0x0000008E 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH2 (Table: 2-44)" # 0x0000008F 0x0000000000000000 # "IA32_SGXLEPUBKEYHASH3 (Table: 2-44)" -# 0x000000A0 0x0000000000000000 # "MSR_BIOS_MCU_ERRORCODE (Table: 2-44)" +# 0x000000A0 0x0000000000000000 # "MSR_BIOS_MCU_ERRORCODE (Table: 2-45)" # 0x000000A5 0x0000000000000000 # "MSR_FIT_BIOS_ERROR (Table: 2-44)" # 0x000000A7 0x0000000000000000 # "MSR_BIOS_DEBUG (Table: 2-45)" # 0x000000BC 0x0000000000000000 # "IA32_MISC_PACKAGE_CTLS (Table: 2-46)" @@ -35,12 +35,12 @@ # 0x000000C4 0x0000000000000000 # "IA32_PMC3 (Table: 2-20)" # 0x000000C5 0x0000000000000000 # "IA32_PMC4 (Table: 2-20)" # 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)" -# 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)" -# 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)" -# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-20)" -# 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-45)" +# 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-46)" +# 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-46)" +# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-29)" +# 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-46)" # 0x000000E1 0x0000000000000000 # "IA32_UMWAIT_CONTROL (Table: 2-46)" -# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-20)" +# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-35)" # 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)" # 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)" # 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)" @@ -54,14 +54,14 @@ # 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)" # 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-20)" # 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)" -# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-20)" -# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-20)" -# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-20)" -# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-20)" +# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)" +# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)" +# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)" +# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)" # 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)" # 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)" -# 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)" -# 0x0000018D 0x0000000000000000 # "IA32_PERFEVTSEL7 (Table: 2-20)" +# 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-46)" +# 0x0000018D 0x0000000000000000 # "IA32_PERFEVTSEL7 (Table: 2-46)" # 0x00000195 0x0000000000000000 # "IA32_OVERCLOCKING_STATUS (Table: 2-46)" # 0x00000198 0x0000000000000000 # "MSR_PERF_STATUS (Table: 2-20)" # 0x00000199 0x0000000000000000 # "IA32_PERF_CTL (Table: 2-20)" @@ -70,19 +70,17 @@ # 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-39)" # 0x000001A0 0x0000000000000000 # "IA32_MISC_ENABLE (Table: 2-20)" # 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-20)" -# 0x000001A4 0x0000000000000000 # "MSR_MISC_FEATURE_CONTROL (Table: 2-20)" -# 0x000001A4 0x0000000000000000 # "MSR_PREFETCH_CONTROL (Table: 2-20)" +# 0x000001A4 0x0000000000000000 # "MSR_PREFETCH_CONTROL (Table: 2-47)" # 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)" # 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)" # 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)" -# 0x000001AD 0x0000000000000000 # "MSR_PRIMARY_TURBO_RATIO_LIMIT (Table: 2-39)" -# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-39)" +# 0x000001AD 0x0000000000000000 # "MSR_PRIMARY_TURBO_RATIO_LIMIT (Table: 2-46)" # 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)" # 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)" # 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)" -# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-20)" +# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)" # 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-39)" -# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-20)" +# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)" # 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)" # 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)" # 0x000001F1 0x0000000000000000 # "MSR_CRASHLOG_CONTROL (Table: 2-44)" @@ -139,7 +137,6 @@ # 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)" # 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-39)" # 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)" -# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-39)" # 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_RESET (Table: 2-39)" # 0x00000391 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS_SET (Table: 2-39)" # 0x00000392 0x0000000000000000 # "IA32_PERF_GLOBAL_INUSE (Table: 2-39)" @@ -147,7 +144,7 @@ # 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)" # 0x000003F2 0x0000000000000000 # "MSR_PEBS_DATA_CFG (Table: 2-44)" # 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)" -# 0x000003F7 0x0000000000000000 # "MSR_PEBS_FRONTEND (Table: 2-39)" +# 0x000003F7 0x0000000000000000 # "MSR_PEBS_FRONTEND (Table: 2-47)" # 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)" # 0x000003F9 0x0000000000000000 # "MSR_PKG_C6_RESIDENCY (Table: 2-20)" # 0x000003FA 0x0000000000000000 # "MSR_PKG_C7_RESIDENCY (Table: 2-20)" @@ -198,11 +195,11 @@ # 0x000004C4 0x0000000000000000 # "IA32_A_PMC3 (Table: 2-20)" # 0x000004C5 0x0000000000000000 # "IA32_A_PMC4 (Table: 2-20)" # 0x000004C6 0x0000000000000000 # "IA32_A_PMC5 (Table: 2-20)" -# 0x000004C7 0x0000000000000000 # "IA32_A_PMC6 (Table: 2-20)" -# 0x000004C8 0x0000000000000000 # "IA32_A_PMC7 (Table: 2-20)" +# 0x000004C7 0x0000000000000000 # "IA32_A_PMC6 (Table: 2-46)" +# 0x000004C8 0x0000000000000000 # "IA32_A_PMC7 (Table: 2-46)" # 0x00000500 0x0000000000000000 # "IA32_SGX_SVN_STATUS (Table: 2-39)" # 0x00000540 0x0000000000000000 # "MSR_THREAD_UARCH_CTL (Table: 2-47)" -# 0x00000541 0x0000000000000000 # "MSR_CORE_UARCH_CTL (Table: 2-44)" +# 0x00000541 0x0000000000000000 # "MSR_CORE_UARCH_CTL (Table: 2-47)" # 0x00000560 0x0000000000000000 # "IA32_RTIT_OUTPUT_BASE (Table: 2-39)" # 0x00000561 0x0000000000000000 # "IA32_RTIT_OUTPUT_MASK_PTRS (Table: 2-39)" # 0x00000570 0x0000000000000000 # "IA32_RTIT_CTL (Table: 2-39)" @@ -216,9 +213,7 @@ # 0x00000601 0x0000000000000000 # "MSR_VR_CURRENT_CONFIG (Table: 2-45)" # 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-20)" # 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC6_IRTL (Table: 2-20)" -# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-20)" -# 0x0000060C 0x0000000000000000 # "MSR_PKGC7_IRTL (Table: 2-29)" +# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)" # 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)" # 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)" # 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)" @@ -332,12 +327,12 @@ # 0x000006E1 0x0000000000000000 # "IA32_PKRS (Table: 2-46)" # 0x00000770 0x0000000000000000 # "IA32_PM_ENABLE (Table: 2-39)" # 0x00000771 0x0000000000000000 # "IA32_HWP_CAPABILITIES (Table: 2-39)" -# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-39)" +# 0x00000772 0x0000000000000000 # "IA32_HWP_REQUEST_PKG (Table: 2-44)" # 0x00000773 0x0000000000000000 # "IA32_HWP_INTERRUPT (Table: 2-39)" # 0x00000774 0x0000000000000000 # "IA32_HWP_REQUEST (Table: 2-39)" # 0x00000775 0x0000000000000000 # "IA32_PECI_HWP_REQUEST_INFO (Table: 2-44)" # 0x00000776 0x0000000000000000 # "IA32_HWP_CTL (Table: 2-46)" -# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-39)" +# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-44)" # 0x00000802 0x0000000000000000 # "IA32_X2APIC_APICID (Table: 2-20)" # 0x00000803 0x0000000000000000 # "IA32_X2APIC_VERSION (Table: 2-20)" # 0x00000808 0x0000000000000000 # "IA32_X2APIC_TPR (Table: 2-20)" @@ -381,7 +376,7 @@ # 0x00000838 0x0000000000000000 # "IA32_X2APIC_INIT_COUNT (Table: 2-20)" # 0x00000839 0x0000000000000000 # "IA32_X2APIC_CUR_COUNT (Table: 2-20)" # 0x0000083F 0x0000000000000000 # "IA32_X2APIC_SELF_IPI (Table: 2-20)" -# 0x00000981 0x0000000000000000 # "IA32_TME_CAPABILITY (Table: 2-45)" +# 0x00000981 0x0000000000000000 # "IA32_TME_CAPABILITY (Table: 2-46)" # 0x00000982 0x0000000000000000 # "IA32_TME_ACTIVATE (Table: 2-45)" # 0x00000983 0x0000000000000000 # "IA32_TME_EXCLUDE_MASK (Table: 2-45)" # 0x00000984 0x0000000000000000 # "IA32_TME_EXCLUDE_BASE (Table: 2-45)" @@ -389,14 +384,14 @@ # 0x00000991 0x0000000000000000 # "IA32_IWKEYBACKUP_STATUS1 (Table: 2-45)" # 0x00000C80 0x0000000000000000 # "IA32_DEBUG_INTERFACE (Table: 2-29)" # 0x00000C82 0x0000000000000000 # "IA32_L2_QOS_CFG (Table: 2-45)" -# 0x00000D10 0x0000000000000000 # "IA32_L2_QOS_MASK_0 (Table: 2-45)" -# 0x00000D11 0x0000000000000000 # "IA32_L2_QOS_MASK_1 (Table: 2-45)" -# 0x00000D12 0x0000000000000000 # "IA32_L2_QOS_MASK_2 (Table: 2-45)" -# 0x00000D13 0x0000000000000000 # "IA32_L2_QOS_MASK_3 (Table: 2-45)" -# 0x00000D14 0x0000000000000000 # "IA32_L2_QOS_MASK_4 (Table: 2-45)" -# 0x00000D15 0x0000000000000000 # "IA32_L2_QOS_MASK_5 (Table: 2-45)" -# 0x00000D16 0x0000000000000000 # "IA32_L2_QOS_MASK_6 (Table: 2-45)" -# 0x00000D17 0x0000000000000000 # "IA32_L2_QOS_MASK_7 (Table: 2-45)" +# 0x00000D10 0x0000000000000000 # "IA32_L2_QOS_MASK_0 (Table: 2-48)" +# 0x00000D11 0x0000000000000000 # "IA32_L2_QOS_MASK_1 (Table: 2-48)" +# 0x00000D12 0x0000000000000000 # "IA32_L2_QOS_MASK_2 (Table: 2-48)" +# 0x00000D13 0x0000000000000000 # "IA32_L2_QOS_MASK_3 (Table: 2-48)" +# 0x00000D14 0x0000000000000000 # "IA32_L2_QOS_MASK_4 (Table: 2-48)" +# 0x00000D15 0x0000000000000000 # "IA32_L2_QOS_MASK_5 (Table: 2-48)" +# 0x00000D16 0x0000000000000000 # "IA32_L2_QOS_MASK_6 (Table: 2-48)" +# 0x00000D17 0x0000000000000000 # "IA32_L2_QOS_MASK_7 (Table: 2-48)" # 0x00000D18 0x0000000000000000 # "IA32_L2_QOS_MASK_8 (Table: 2-48)" # 0x00000D19 0x0000000000000000 # "IA32_L2_QOS_MASK_9 (Table: 2-48)" # 0x00000D1A 0x0000000000000000 # "IA32_L2_QOS_MASK_10 (Table: 2-48)"