From 6b55e4aa3895924e31bcd151f2f0ab840836fa07 Mon Sep 17 00:00:00 2001 From: Scott Mabin Date: Thu, 29 Apr 2021 12:14:37 +0100 Subject: [PATCH] Quick bodge to remove registers not on the esp32c3, these should be checked before calling, see: 'https://github.com/riscv/riscv-tests/blob/1b05661baa79f03830f5ddefa999dc7aaf7b1ce1/debug/programs/entry.S#L33-L50' --- asm.S | 4 ++-- bin/riscv32i-unknown-none-elf.a | Bin 8070 -> 7978 bytes bin/riscv32ic-unknown-none-elf.a | Bin 7930 -> 7838 bytes bin/riscv32im-unknown-none-elf.a | Bin 7758 -> 7666 bytes bin/riscv32imc-unknown-none-elf.a | Bin 7626 -> 7534 bytes bin/riscv64i-unknown-none-elf.a | Bin 12974 -> 12814 bytes bin/riscv64ic-unknown-none-elf.a | Bin 12830 -> 12662 bytes bin/riscv64im-unknown-none-elf.a | Bin 12446 -> 12294 bytes bin/riscv64imc-unknown-none-elf.a | Bin 12326 -> 12166 bytes 9 files changed, 2 insertions(+), 2 deletions(-) diff --git a/asm.S b/asm.S index 7165ddf..f489370 100644 --- a/asm.S +++ b/asm.S @@ -46,8 +46,8 @@ _abs_start: .cfi_startproc .cfi_undefined ra - csrw mie, 0 - csrw mip, 0 + // csrw mie, 0 + // csrw mip, 0 li x1, 0 li x2, 0 diff --git a/bin/riscv32i-unknown-none-elf.a b/bin/riscv32i-unknown-none-elf.a index 928edbec266d815647485337dbecd0a354ee5136..c3144615a8356633a4e4f0e6c30779d6fb03b1c3 100644 GIT binary patch delta 1146 zcmYk*Pe>F|90&0C#vK{W#a+^Nb$4eMM`nr+?)qnS^Iud4A&j7d)J03nKmA*^%v@`Q z%uIunpLB>Q4^p8X76$52LMf4y1b`!|AuF> zRtf)vZ*ocYL0XARKMcD%A?Z2-9+z&X3f80)V5pt40fyBRp^y+_WN@^1Ovs%`b!4or zcCa=X6`CyG0Wnp#mBMia<}{C7fO)M3-f9uK4j;8O`*G2VBHzQ|l6IIV^1%I)9;YvM zXXG@z&;sRNTyPT)ZmRGhUfSQ?OH$6kRH?6Gf@fUV)iH$!d+!WnO5^Eiq>l==Sv>qH zhhhP{%A0xTE?vSXkj=@td>QS#g$3I(9=Uu4?VrSgjhxG$qAO=bnsPyd+{8LMKu>~= zoXa1ey)%>wk-@`r&7s&JUuSP)=e^DDAkVY+U?&UN-4fl*?oeDf=&`?g9=Z;6;Y3v* zPms+f_7LSQd7Igbla#k|PBvTY&GL9b>wX3E)0~sdZuT+CPv&j*u#Z!IDr;!2Fw(u0 zoZ*CQ_Oj^>bDr&7dx1^Y8W*$Qga%f2!dWQE zC(%O2aNbrnk6`A zf5^hEbQkMBc#icbd zh^FKbQOuTR)YP{&d1Mxsiy!hU}-Rva$-Z$U8nVs3mzCJqL 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