diff --git a/CHANGELOG.md b/CHANGELOG.md index 4a31d3a94..d3c9fe257 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,8 +1,56 @@ # Changelog All notable changes to this project are documented in this file. -## [3.1.0] - 2023-06-28 +## [3.2.0] - 2023-10-02 +### Added +- Added multi-instance support for the GPIOTE driver. +- Added the nrfx_ram_ctrl helper layer to facilitate developing generic code that controls the power and retention settings of RAM blocks. +- Introduced the NRFX_TIMER_BASE_FREQUENCY_GET() and NRFX_SPIM_BASE_FREQUENCY_GET() macros for getting base frequencies in Hz for the specified TIMER and SPIM instances. +- Added a function for checking whether the specified voltage regulator is enabled in the REGULATORS HAL. +- Added a function for checking whether an inductor is connected to the DCC pin in the REGULATORS HAL. +- Added a function for checking if the detected voltage is below or above the threshold of VPOF (POF Comparator's threshold voltage) in the REGULATORS HAL. +- Added a function for powering on all RAM blocks in the VMC HAL. +- Added missing entries in enumerators for RAM sections in the VMC HAL. +- Added the new nrfx_wdt_stop() function to the WDT driver that stops the watchdog. +- Added the new nrfx_wdt_uninit() function to the WDT driver that uninitializes the watchdog. +- Added the new nrfy_wdt_task_stop_enable_set() function to the WDT HALY that enables or disables stopping the watchdog. +- Added functions for retrieving pointers to the receive and transmit buffers in the TWIS HAL. +- Added functions for checking whether given instance is initialized to all of the drivers. +- Added individual functions for setting reference selection, external reference, detection type and enabling hysteresis in the LPCOMP HAL. Now they are supposed to be used instead of nrf_lpcomp_configure() function. +- Added a blocking mode to the CLOCK driver. The mode is initialized when a user handler is set to NULL. +- Added a new member to the configuration structure of the QSPI driver. The new configuration member determines time in milliseconds when a timeout of the QSPI operation occurs. +- Added the new nrfx_qspi_timeout_signal() function to the QSPI driver that signals premature QSPI operation timeout. + +### Changed +- Updated MDK to version 8.58.0. +- Overhauled the UARTE driver. Extended the UARTE driver with various modes of operations including: mixing of blocking and non-blocking transfers, linking transfers, continuous reception, low power operation. +- Changed all functions' parameters in the GPIOTE driver. A pointer to nrfx_gpiote_t structure was added as the first parameter in all functions. Now functions without the pointer to nrfx_gpiote_t structure as the first argument are deprecated. +- Changed functions for setting and reading the GPREGRET registers in the POWER HAL. Now there are only two functions, nrf_power_gpregret_set() for setting and nrf_power_gpregret_get() for reading. A new `reg_num` argument was added to both of them. +- Replaced nrf_regulators_dcdcen_set() and nrf_regulators_dcdcen_vddh_set() functions with nrf_regulators_vreg_enable_set(). +- Replaced nrf_regulators_pofcon_set() and nrf_regulators_pofcon_vddh_set() functions with nrf_regulators_config_set(). +- Replaced nrf_regulators_pofcon_get() function with nrf_regulators_pof_config_get(). +- Renamed nrf_regulators_mainregstatus_get() function to nrf_regulators_main_status_get(). +- Renamed NRF_REGULATORS_POTHR_V{XY} macros to NRF_REGULATORS_POF_THR_{X}V{Y}. +- Renamed NRF_REGULATORS_PORTHRVDDH_V{XY} macros to NRF_REGULATORS_POF_THR_VDDH_{X}V{Y}. +- Renamed nrf_regulators_pof_thrvddh_t structure to nrf_regulators_pof_thr_vddh_t. +- Renamed macros indicating features presence in the REGULATORS HAL. +- Changed a default value of the source reference structure member from 1.8V to 1.2V in the COMP driver configuration structure. +- Changed a prototype of an event handler in the WDT driver. The new prototype accepts an event type, requests and a pointer to the context. A previous version is deprecated. +- Changed a prototype of the nrfx_wdt_init() function in the WDT driver. The new prototype accepts a pointer to the instance, a pointer to the configuration, an event handler and a pointer to the context. A previous version is deprecated. +- Replaced the nrf_wdt_task_stop_enable() function with nrf_wdt_task_stop_enable_set(). Now it takes a boolean parameter. +- Replaced the deprecated NRFX_ERROR_ALREADY_INITIALIZED error code with the new NRFX_ERROR_ALREADY one. +- Changed the organization of configuration structure members in the LPCOMP driver. +- Changed the definition of nrf_saadc_value_t type in the SAADC HAL. Now pointer to the buffer holding conversion results is a void* instead of int16_t*. +- Changed the return value in all drivers in case initialization functions have already been executed. Now the NRFX_ERROR_ALREADY error code will be returned instead of NRFX_ERROR_INVALID_STATE. +- Changed the way that the QSPI peripheral is activated. Now the driver activates the peripheral instance before the first transfer or when the nrfx_qspi_activate() function is called. +### Fixed +- Fixed the device failing to reconnect to the host after USB cable being reconnected in the USBD driver. +- Fixed configuration of the external reference in nrfx_comp_init() and nrfx_comp_reconfigure() functions. Now the differential mode can be enabled in the COMP driver. +- Fixed support for P0.18, P0.20, and P0.28-P0.30 pins in the GPIOTE driver for nRF52820 SoC. +- Fixed events being forwarded to the user callback despite having their interrupts disabled in the QDEC driver. + +## [3.1.0] - 2023-06-28 ### Added - Added the HALY layer for the NFCT. HALY is an extension of the HAL layer that aggregates basic hardware use cases within single functions. Now it is used instead of HAL in the NFCT drivers. - Added the NRFX_IN_RANGE() macro for checking if a given value is in a given range. diff --git a/doc/main_page.dox b/doc/main_page.dox index 3bf7afd25..94f5d5532 100644 --- a/doc/main_page.dox +++ b/doc/main_page.dox @@ -82,6 +82,15 @@ included through a common nrfx_config.h file, according to the selected SoC. Refer to the "driver configuration" section in the API reference for a given driver for more information regarding configuration options available for it. +@section nrfx_api_change_procedure API change procedure + +Starting from 3.0 release, nrfx API can no longer be considered as stable for minor version updates. +Taking into account the potential impact on the end users, APIs are changed in a few stages. +Every deprecated API is completely removed from the code base after two minor releases, +counting from the one making the functionality obsolete. +Refer to the API change procedure +for more details regarding the process. + @section nrfx_additional_reqs Additional requirements Nordic SoCs are based on ARM® Cortex™-M series processors. Before you can diff --git a/doc/nrfx.doxyfile b/doc/nrfx.doxyfile index c41e75689..03eda0df1 100644 --- a/doc/nrfx.doxyfile +++ b/doc/nrfx.doxyfile @@ -50,7 +50,7 @@ PROJECT_NAME = "nrfx" ### EDIT THIS ### -PROJECT_NUMBER = "3.1" +PROJECT_NUMBER = "3.2" # Using the PROJECT_BRIEF tag one can provide an optional one line description # for a project that appears at the top of each page and should give viewer a diff --git a/doc/sphinx/nrfx_api/ram_ctrl.rst b/doc/sphinx/nrfx_api/ram_ctrl.rst new file mode 100644 index 000000000..5bdf1bdf5 --- /dev/null +++ b/doc/sphinx/nrfx_api/ram_ctrl.rst @@ -0,0 +1,6 @@ +Generic RAM control layer +========================= + +.. doxygengroup:: nrfx_ram_ctrl + :project: nrfx + :members: diff --git a/drivers/include/nrf_bitmask.h b/drivers/include/nrf_bitmask.h index 757ec080f..cb8539255 100644 --- a/drivers/include/nrf_bitmask.h +++ b/drivers/include/nrf_bitmask.h @@ -60,7 +60,7 @@ extern "C" { #define BITMASK_BYTE_GET(abs_bit) ((abs_bit)/8) /** @brief Macro for getting relative index of bit in byte. */ -#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x00000007) +#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x7UL) /** * @brief Function for checking if bit in the multi-byte bit mask is set. @@ -90,7 +90,7 @@ __STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask) uint8_t * p_mask8 = (uint8_t *)p_mask; uint32_t byte_idx = BITMASK_BYTE_GET(bit); bit = BITMASK_RELBIT_GET(bit); - p_mask8[byte_idx] |= (1 << bit); + p_mask8[byte_idx] |= (uint8_t)(1U << bit); } /** @@ -104,7 +104,7 @@ __STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask) uint8_t * p_mask8 = (uint8_t *)p_mask; uint32_t byte_idx = BITMASK_BYTE_GET(bit); bit = BITMASK_RELBIT_GET(bit); - p_mask8[byte_idx] &= ~(1 << bit); + p_mask8[byte_idx] &= (uint8_t)~(1U << bit); } /** diff --git a/drivers/include/nrfx_adc.h b/drivers/include/nrfx_adc.h index 4665519bb..d9b290be7 100644 --- a/drivers/include/nrfx_adc.h +++ b/drivers/include/nrfx_adc.h @@ -148,7 +148,9 @@ typedef void (*nrfx_adc_event_handler_t)(nrfx_adc_evt_t const * p_event); * @param[in] event_handler Event handler provided by the user. * * @retval NRFX_SUCCESS Initialization was successful. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config, nrfx_adc_event_handler_t event_handler); @@ -160,6 +162,14 @@ nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config, */ void nrfx_adc_uninit(void); +/** + * @brief Function for checking if the ADC driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_adc_init_check(void); + /** * @brief Function for enabling an ADC channel. * diff --git a/drivers/include/nrfx_clock.h b/drivers/include/nrfx_clock.h index f5c6655da..8b0ef9df1 100644 --- a/drivers/include/nrfx_clock.h +++ b/drivers/include/nrfx_clock.h @@ -74,10 +74,10 @@ typedef void (*nrfx_clock_event_handler_t)(nrfx_clock_evt_type_t event); * After initialization, the module is in power off state (clocks are not started). * * @param[in] event_handler Event handler provided by the user. - * Must not be NULL. + * If not provided, driver works in blocking mode. * - * @retval NRFX_SUCCESS The procedure is successful. - * @retval NRFX_ERROR_ALREADY_INITIALIZED The driver is already initialized. + * @retval NRFX_SUCCESS The procedure is successful. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. */ nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler); @@ -90,6 +90,14 @@ void nrfx_clock_disable(void); /** @brief Function for uninitializing the clock module. */ void nrfx_clock_uninit(void); +/** + * @brief Function for checking if the clock driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_clock_init_check(void); + /** * @brief Function for starting the specified clock domain. * @@ -220,9 +228,10 @@ NRFX_STATIC_INLINE void nrfx_clock_hfclkaudio_config_set(uint16_t freq_value); * @return Current value of FREQ_VALUE for HFCLKAUDIO. */ NRFX_STATIC_INLINE uint16_t nrfx_clock_hfclkaudio_config_get(void); - #endif +#if (NRF_CLOCK_HAS_CALIBRATION && NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)) || \ + defined(__NRFX_DOXYGEN__) /** * @brief Function for starting the calibration of internal LFCLK. * @@ -245,6 +254,8 @@ nrfx_err_t nrfx_clock_calibration_start(void); */ nrfx_err_t nrfx_clock_is_calibrating(void); +#if (NRF_CLOCK_HAS_CALIBRATION_TIMER && NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED)) || \ + defined(__NRFX_DOXYGEN__) /** * @brief Function for starting calibration timer. * @@ -254,6 +265,9 @@ void nrfx_clock_calibration_timer_start(uint8_t interval); /** @brief Function for stopping the calibration timer. */ void nrfx_clock_calibration_timer_stop(void); +#endif +#endif /* (NRF_CLOCK_HAS_CALIBRATION && NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)) || \ + defined(__NRFX_DOXYGEN__) */ /** * @brief Function for returning a requested task address for the clock driver module. diff --git a/drivers/include/nrfx_comp.h b/drivers/include/nrfx_comp.h index 16d9b3d5d..3c166a9c6 100644 --- a/drivers/include/nrfx_comp.h +++ b/drivers/include/nrfx_comp.h @@ -122,7 +122,7 @@ typedef struct */ #define NRFX_COMP_DEFAULT_CONFIG(_input) \ { \ - .reference = NRF_COMP_REF_INT_1V8, \ + .reference = NRF_COMP_REF_INT_1V2, \ .main_mode = NRF_COMP_MAIN_MODE_SE, \ .threshold = NRFX_COMP_CONFIG_TH, \ .speed_mode = NRF_COMP_SP_MODE_HIGH, \ @@ -143,7 +143,9 @@ typedef struct * Must not be NULL. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The driver has already been initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_BUSY The LPCOMP peripheral is already in use. * This is possible only if @ref nrfx_prs module * is enabled. @@ -173,6 +175,14 @@ nrfx_err_t nrfx_comp_reconfigure(nrfx_comp_config_t const * p_config); */ void nrfx_comp_uninit(void); +/** + * @brief Function for checking if the COMP driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_comp_init_check(void); + /** * @brief Function for setting the analog input. * diff --git a/drivers/include/nrfx_egu.h b/drivers/include/nrfx_egu.h index fad9f352e..7458dc54b 100644 --- a/drivers/include/nrfx_egu.h +++ b/drivers/include/nrfx_egu.h @@ -89,7 +89,9 @@ typedef void (*nrfx_egu_event_handler_t)(uint8_t event_idx, void * p_context); * @param[in] p_context Context passed to the event handler. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE Driver is already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ nrfx_err_t nrfx_egu_init(nrfx_egu_t const * p_instance, uint8_t interrupt_priority, @@ -149,6 +151,16 @@ void nrfx_egu_trigger(nrfx_egu_t const * p_instance, uint8_t event_idx); */ void nrfx_egu_uninit(nrfx_egu_t const * p_instance); +/** + * @brief Function for checking if the EGU driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_egu_init_check(nrfx_egu_t const * p_instance); + /** * @brief Macro returning EGU interrupt handler. * @@ -181,11 +193,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_egu_event_address_get(nrfx_egu_t const * p_inst * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_EGU_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_EGU_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_EGU_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_EGU_INST_GET(\)), \, - * NRFX_EGU_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_EGU_INST_GET(\)), \, + * NRFX_EGU_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(EGU, egu) diff --git a/drivers/include/nrfx_gpiote.h b/drivers/include/nrfx_gpiote.h index 6873584f6..494466748 100644 --- a/drivers/include/nrfx_gpiote.h +++ b/drivers/include/nrfx_gpiote.h @@ -42,6 +42,11 @@ extern "C" { #endif +/* On devices with single instance (with no ID) use instance 0. */ +#if defined(NRF_GPIOTE) && defined(NRFX_GPIOTE_ENABLED) && !defined(NRFX_GPIOTE0_ENABLED) +#define NRFX_GPIOTE0_ENABLED 1 +#endif + /** * @defgroup nrfx_gpiote GPIOTE driver * @{ @@ -49,6 +54,28 @@ extern "C" { * @brief GPIO Task Event (GPIOTE) peripheral driver. */ +/** @brief Data structure of the GPIO tasks and events (GPIOTE) driver instance. */ +typedef struct +{ + NRF_GPIOTE_Type * p_reg; ///< Pointer to a structure containing GPIOTE registers. + uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only. +} nrfx_gpiote_t; + +#ifndef __NRFX_DOXYGEN__ +enum { + /* List all enabled driver instances (in the format NRFX_\_INST_IDX). */ + NRFX_INSTANCE_ENUM_LIST(GPIOTE) + NRFX_GPIOTE_ENABLED_COUNT +}; +#endif + +/** @brief Macro for creating an instance of the GPIOTE driver. */ +#define NRFX_GPIOTE_INSTANCE(id) \ +{ \ + .p_reg = NRFX_CONCAT(NRF_, GPIOTE, id), \ + .drv_inst_idx = NRFX_CONCAT(NRFX_GPIOTE, id, _INST_IDX), \ +} + /** @brief Pin. */ typedef uint32_t nrfx_gpiote_pin_t; @@ -98,12 +125,6 @@ typedef struct * drive configurations D0 and D1. */ } nrfx_gpiote_output_config_t; -/** @brief Structure for configuring an input pin. */ -typedef struct -{ - nrf_gpio_pin_pull_t pull; ///< Pull configuration. -} nrfx_gpiote_input_config_t; - /** @brief Structure for configuring pin interrupt/event. */ typedef struct { @@ -121,6 +142,20 @@ typedef struct void * p_context; ///< Context passed to the event handler. } nrfx_gpiote_handler_config_t; +/** @brief @deprecated Structure for configuring an input pin. */ +typedef struct +{ + nrf_gpio_pin_pull_t pull; ///< Pull configuration. +} nrfx_gpiote_input_config_t; + +/** @brief Structure for configuring an input pin. */ +typedef struct +{ + nrf_gpio_pin_pull_t const * p_pull_config; ///< Pull configuration. If NULL, the current configuration is untouched. + nrfx_gpiote_trigger_config_t const * p_trigger_config; ///< Interrupt/event configuration. If NULL, the current configuration is untouched. + nrfx_gpiote_handler_config_t const * p_handler_config; ///< Handler configuration. If NULL it is untouched. +} nrfx_gpiote_input_pin_config_t; + /** @brief Output pin default configuration. */ #define NRFX_GPIOTE_DEFAULT_OUTPUT_CONFIG \ { \ @@ -129,43 +164,71 @@ typedef struct .pull = NRF_GPIO_PIN_NOPULL \ } -/** @brief Input pin default configuration. */ -#define NRFX_GPIOTE_DEFAULT_INPUT_CONFIG \ -{ \ - .pull = NRF_GPIO_PIN_NOPULL \ -} +/** @brief Bitfield representing all GPIOTE channels available to the application + * for the specified GPIOTE instance. + * + * @param[in] idx GPIOTE instance index. + */ +#define NRFX_GPIOTE_APP_CHANNELS_MASK(idx) \ + (NRFX_BIT_MASK(NRFX_CONCAT_3(GPIOTE, idx, _CH_NUM)) & \ + ~(NRFX_CONCAT_3(NRFX_GPIOTE, idx, _CHANNELS_USED))) -#if !defined (NRFX_GPIOTE_CHANNELS_USED) && !defined(__NRFX_DOXYGEN__) -/* Bitmask that defines GPIOTE channels that are reserved for use outside of the nrfx library. */ -#define NRFX_GPIOTE_CHANNELS_USED 0 -#endif +/** + * @brief Macro returning GPIOTE interrupt handler. + * + * @param[in] idx GPIOTE index. + * + * @return Interrupt handler. + */ +#define NRFX_GPIOTE_INST_HANDLER_GET(idx) NRFX_CONCAT_3(nrfx_gpiote_, idx, _irq_handler) + +/** + * @brief Function for checking if a GPIOTE input pin is set. + * + * @param[in] pin Pin. + * + * @retval true The input pin is set. + * @retval false The input pin is not set. + */ +bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin); -/** @brief Bitfield representing all GPIOTE channels available to the application. */ -#define NRFX_GPIOTE_APP_CHANNELS_MASK (NRFX_BIT_MASK(GPIOTE_CH_NUM) & ~NRFX_GPIOTE_CHANNELS_USED) +#if NRFX_API_VER_AT_LEAST(3, 2, 0) || defined(__NRFX_DOXYGEN__) + +/** @brief Input pin pull default configuration. */ +#define NRFX_GPIOTE_DEFAULT_PULL_CONFIG NRF_GPIO_PIN_NOPULL /** - * @brief Function for initializing the GPIOTE module. + * @brief Function for initializing the GPIOTE driver instance. * + * @param[in] p_instance Pointer to the driver instance structure. * @param[in] interrupt_priority Interrupt priority. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ -nrfx_err_t nrfx_gpiote_init(uint8_t interrupt_priority); +nrfx_err_t nrfx_gpiote_init(nrfx_gpiote_t const * p_instance, uint8_t interrupt_priority); /** - * @brief Function for checking if the GPIOTE module is initialized. + * @brief Function for checking if the GPIOTE driver instance is initialized. * - * @details The GPIOTE module is a shared module. Therefore, check if + * @details The GPIOTE driver instance is a shared module. Therefore, check if * the module is already initialized and skip initialization if it is. * + * @param[in] p_instance Pointer to the driver instance structure. + * * @retval true The module is already initialized. * @retval false The module is not initialized. */ -bool nrfx_gpiote_is_init(void); +bool nrfx_gpiote_init_check(nrfx_gpiote_t const * p_instance); -/** @brief Function for uninitializing the GPIOTE module. */ -void nrfx_gpiote_uninit(void); +/** + * @brief Function for uninitializing the GPIOTE driver instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_gpiote_uninit(nrfx_gpiote_t const * p_instance); /** * @brief Function for allocating a GPIOTE channel. @@ -177,12 +240,13 @@ void nrfx_gpiote_uninit(void); * from the rest of the driver. In particular, the driver does not need * to be initialized when this function is called. * - * @param[out] p_channel Pointer to the GPIOTE channel that has been allocated. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[out] p_channel Pointer to the GPIOTE channel that has been allocated. * * @retval NRFX_SUCCESS The channel was successfully allocated. * @retval NRFX_ERROR_NO_MEM There is no available channel to be used. */ -nrfx_err_t nrfx_gpiote_channel_alloc(uint8_t * p_channel); +nrfx_err_t nrfx_gpiote_channel_alloc(nrfx_gpiote_t const * p_instance, uint8_t * p_channel); /** * @brief Function for freeing a GPIOTE channel. @@ -194,12 +258,13 @@ nrfx_err_t nrfx_gpiote_channel_alloc(uint8_t * p_channel); * from the rest of the driver. In particular, the driver does not need * to be initialized when this function is called. * - * @param[in] channel GPIOTE channel to be freed. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] channel GPIOTE channel to be freed. * * @retval NRFX_SUCCESS The channel was successfully freed. * @retval NRFX_ERROR_INVALID_PARAM The channel is not user-configurable. */ -nrfx_err_t nrfx_gpiote_channel_free(uint8_t channel); +nrfx_err_t nrfx_gpiote_channel_free(nrfx_gpiote_t const * p_instance, uint8_t channel); /** * @brief Function for configuring the specified input pin and input event/interrupt. @@ -210,7 +275,7 @@ nrfx_err_t nrfx_gpiote_channel_free(uint8_t channel); * * - Setting level trigger (e.g. @ref NRFX_GPIOTE_TRIGGER_HIGH) and using GPIOTE * channel for the same pin. - * - Reconfiguring pin to input (@p p_input_config not NULL) when pin was configured + * - Reconfiguring pin to input (@p p_config->p_pull_config not NULL) when pin was configured * to use GPIOTE task. Prior to that, task must be disabled by configuring it with * polarity set to @ref NRF_GPIOTE_POLARITY_NONE. * - Configuring trigger using GPIOTE channel for pin previously configured as output @@ -218,22 +283,19 @@ nrfx_err_t nrfx_gpiote_channel_free(uint8_t channel); * * Function can be used to configure trigger and handler for sensing input changes * on an output pin. In that case, prior to that output pin must be configured with - * input buffer connected. In that case @p p_input_config is NULL to avoid reconfiguration - * of the pin. + * input buffer connected. In that case @p p_config->p_pull_config is NULL to avoid + * reconfiguration of the pin. * - * @param[in] pin Absolute pin number. - * @param[in] p_input_config Pin configuration. If NULL, the current configuration is untouched. - * @param[in] p_trigger_config Interrupt/event configuration. If NULL, the current configuration - * is untouched. - * @param[in] p_handler_config Handler configuration. If NULL it is untouched. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin number. + * @param[in] p_config Pointer to the structure with input pin configuration. * * @retval NRFX_SUCCESS Configuration was successful. * @retval NRFX_ERROR_INVALID_PARAM Invalid configuration. */ -nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, - nrfx_gpiote_input_config_t const * p_input_config, - nrfx_gpiote_trigger_config_t const * p_trigger_config, - nrfx_gpiote_handler_config_t const * p_handler_config); +nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + nrfx_gpiote_input_pin_config_t const * p_config); /** * @brief Function for configuring the specified output pin to be used by the driver. @@ -250,6 +312,7 @@ nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, * - Configuring GPIOTE task for pin which was previously configured as input. Before * using GPIOTE task pin must be configured as output by providing @p p_config. * + * @param[in] p_instance Pointer to the driver instance structure. * @param[in] pin Absolute pin number. * @param[in] p_config Pin configuration. If NULL pin configuration is not applied. * @param[in] p_task_config GPIOTE task configuration. If NULL task is not used. @@ -257,7 +320,8 @@ nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, * @retval NRFX_SUCCESS Configuration was successful. * @retval NRFX_ERROR_INVALID_PARAM Invalid configuration. */ -nrfx_err_t nrfx_gpiote_output_configure(nrfx_gpiote_pin_t pin, +nrfx_err_t nrfx_gpiote_output_configure(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, nrfx_gpiote_output_config_t const * p_config, nrfx_gpiote_task_config_t const * p_task_config); @@ -268,12 +332,13 @@ nrfx_err_t nrfx_gpiote_output_configure(nrfx_gpiote_pin_t pin, * * @warning GPIOTE channel used by the pin is not freed. * - * @param[in] pin Absolute pin number. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin number. * * @retval NRFX_SUCCESS Uninitialization was successful. * @retval NRFX_ERROR_INVALID_PARAM Pin not used by the driver. */ -nrfx_err_t nrfx_gpiote_pin_uninit(nrfx_gpiote_pin_t pin); +nrfx_err_t nrfx_gpiote_pin_uninit(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for enabling trigger for the given pin. @@ -281,72 +346,95 @@ nrfx_err_t nrfx_gpiote_pin_uninit(nrfx_gpiote_pin_t pin); * When GPIOTE event is used trigger can be enabled without enabling interrupt, * e.g. for PPI. * + * @param[in] p_instance Pointer to the driver instance structure. * @param[in] pin Absolute pin number. * @param[in] int_enable True to enable the interrupt. Must be true when sensing is used. */ -void nrfx_gpiote_trigger_enable(nrfx_gpiote_pin_t pin, bool int_enable); +void nrfx_gpiote_trigger_enable(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + bool int_enable); /** * @brief Function for disabling trigger for the given pin. * - * @param[in] pin Absolute pin number. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin number. */ -void nrfx_gpiote_trigger_disable(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_trigger_disable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Set global callback called for each event. * - * @param[in] handler Global handler. - * @param[in] p_context Context passed to the handler. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] handler Global handler. Can be NULL. + * @param[in] p_context Context passed to the handler. */ -void nrfx_gpiote_global_callback_set(nrfx_gpiote_interrupt_handler_t handler, +void nrfx_gpiote_global_callback_set(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_interrupt_handler_t handler, void * p_context); /** * @brief Function for retrieving Task/Event channel index associated with the given pin. * - * @param[in] pin Absolute pin number. - * @param[out] p_channel Location to write the channel index. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin number. + * @param[out] p_channel Location to write the channel index. * * @retval NRFX_SUCCESS Channel successfully written. * @retval NRFX_ERROR_INVALID_PARAM Pin is not configured or not using Task or Event. */ -nrfx_err_t nrfx_gpiote_channel_get(nrfx_gpiote_pin_t pin, uint8_t *p_channel); +nrfx_err_t nrfx_gpiote_channel_get(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + uint8_t * p_channel); + +/** + * @brief Function for retrieving number of channels for specified GPIOTE instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @return Number of channels for specified GPIOTE instance. + */ +uint32_t nrfx_gpiote_channels_number_get(nrfx_gpiote_t const * p_instance); /** * @brief Function for setting a GPIOTE output pin. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. */ -void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_out_set(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for clearing a GPIOTE output pin. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. */ -void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_out_clear(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for toggling a GPIOTE output pin. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. */ -void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_out_toggle(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for enabling a GPIOTE output pin task. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. */ -void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_out_task_enable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for disabling a GPIOTE output pin task. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. */ -void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_out_task_disable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for getting the OUT task for the specified output pin. @@ -354,20 +442,22 @@ void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin); * @details The returned task identifier can be used within @ref nrf_gpiote_hal, * for example, to configure a DPPI channel. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. * * @return OUT task associated with the specified output pin. */ -nrf_gpiote_task_t nrfx_gpiote_out_task_get(nrfx_gpiote_pin_t pin); +nrf_gpiote_task_t nrfx_gpiote_out_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for getting the address of the OUT task for the specified output pin. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. * * @return Address of OUT task. */ -uint32_t nrfx_gpiote_out_task_address_get(nrfx_gpiote_pin_t pin); +uint32_t nrfx_gpiote_out_task_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); #if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) /** @@ -376,20 +466,22 @@ uint32_t nrfx_gpiote_out_task_address_get(nrfx_gpiote_pin_t pin); * @details The returned task identifier can be used within @ref nrf_gpiote_hal, * for example, to configure a DPPI channel. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. * * @return SET task associated with the specified output pin. */ -nrf_gpiote_task_t nrfx_gpiote_set_task_get(nrfx_gpiote_pin_t pin); +nrf_gpiote_task_t nrfx_gpiote_set_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for getting the address of the SET task for the specified output pin. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. * * @return Address of SET task. */ -uint32_t nrfx_gpiote_set_task_address_get(nrfx_gpiote_pin_t pin); +uint32_t nrfx_gpiote_set_task_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); #endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) #if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) @@ -399,32 +491,24 @@ uint32_t nrfx_gpiote_set_task_address_get(nrfx_gpiote_pin_t pin); * @details The returned task identifier can be used within @ref nrf_gpiote_hal, * for example, to configure a DPPI channel. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. * * @return CLR task associated with the specified output pin. */ -nrf_gpiote_task_t nrfx_gpiote_clr_task_get(nrfx_gpiote_pin_t pin); +nrf_gpiote_task_t nrfx_gpiote_clr_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for getting the address of the SET task for the specified output pin. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. * * @return Address of CLR task. */ -uint32_t nrfx_gpiote_clr_task_address_get(nrfx_gpiote_pin_t pin); +uint32_t nrfx_gpiote_clr_task_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); #endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) -/** - * @brief Function for checking if a GPIOTE input pin is set. - * - * @param[in] pin Pin. - * - * @retval true The input pin is set. - * @retval false The input pin is not set. - */ -bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin); - /** * @brief Function for getting the GPIOTE event for the specified input pin. * @@ -433,94 +517,233 @@ bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin); * If the pin is configured to use low-accuracy mode, the PORT event * is returned. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. * * @return Event associated with the specified input pin. */ -nrf_gpiote_event_t nrfx_gpiote_in_event_get(nrfx_gpiote_pin_t pin); +nrf_gpiote_event_t nrfx_gpiote_in_event_get(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin); /** * @brief Function for getting the address of a GPIOTE input pin event. * @details If the pin is configured to use low-accuracy mode, the address of the PORT event is returned. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. * * @return Address of the specified input pin event. */ -uint32_t nrfx_gpiote_in_event_address_get(nrfx_gpiote_pin_t pin); +uint32_t nrfx_gpiote_in_event_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); /** * @brief Function for forcing a specific state on the pin configured as task. * - * @param[in] pin Pin. - * @param[in] state Pin state. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. + * @param[in] state Pin state. */ -void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state); +void nrfx_gpiote_out_task_force(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + uint8_t state); /** * @brief Function for triggering the task OUT manually. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. */ -void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_out_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); #if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) /** * @brief Function for triggering the task SET manually. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. */ -void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_set_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); #endif // defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__) #if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) /** * @brief Function for triggering the task CLR manually. * - * @param[in] pin Pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Pin number. */ -void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin); +void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin); #endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__) #if NRF_GPIOTE_HAS_LATENCY || defined(__NRFX_DOXYGEN__) /** - * @brief Function for setting the latency setting. + * @brief Function for setting the latency mode for a given GPIOTE instance. * * @note Available for event mode with rising or falling edge detection on the pin. - * Toggle task mode can only be used with low latency setting. + * Toggle task mode can only be used with low latency mode setting. * - * @param[in] latency Latency setting to be set. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] latency Latency mode to be set. */ -NRFX_STATIC_INLINE void nrfx_gpiote_latency_set(nrf_gpiote_latency_t latency); +NRFX_STATIC_INLINE void nrfx_gpiote_latency_set(nrfx_gpiote_t const * p_instance, + nrf_gpiote_latency_t latency); /** - * @brief Function for retrieving the latency setting. + * @brief Function for getting the latency mode for a given GPIOTE instance. + * + * @param[in] p_instance Pointer to the driver instance structure. * - * @return Latency setting. + * @return Latency mode. */ -NRFX_STATIC_INLINE nrf_gpiote_latency_t nrfx_gpiote_latency_get(void); +NRFX_STATIC_INLINE nrf_gpiote_latency_t nrfx_gpiote_latency_get(nrfx_gpiote_t const * p_instance); #endif #ifndef NRFX_DECLARE_ONLY +#if NRF_GPIOTE_HAS_LATENCY +NRFX_STATIC_INLINE void nrfx_gpiote_latency_set(nrfx_gpiote_t const * p_instance, + nrf_gpiote_latency_t latency) +{ + nrfy_gpiote_latency_set(p_instance->p_reg, latency); +} + +NRFX_STATIC_INLINE nrf_gpiote_latency_t nrfx_gpiote_latency_get(nrfx_gpiote_t const * p_instance) +{ + return nrfy_gpiote_latency_get(p_instance->p_reg); +} +#endif // NRF_GPIOTE_HAS_LATENCY + +#endif // NRFX_DECLARE_ONLY + +#else + +#if !defined(NRF_GPIOTE_INDEX) +#if (defined(NRF5340_XXAA_APPLICATION) || defined(NRF91_SERIES)) && \ + defined(NRF_TRUSTZONE_NONSECURE) +#define NRF_GPIOTE_INDEX 1 +#else +#define NRF_GPIOTE_INDEX 0 +#endif +#endif + +#if !defined(nrfx_gpiote_irq_handler) +#define nrfx_gpiote_irq_handler NRFX_CONCAT(nrfx_gpiote_, NRF_GPIOTE_INDEX, _irq_handler) +#endif + +#define NRFX_GPIOTE_DEFAULT_INPUT_CONFIG \ +{ \ + .pull = NRF_GPIO_PIN_NOPULL \ +} + +nrfx_err_t nrfx_gpiote_init(uint8_t interrupt_priority); + +bool nrfx_gpiote_is_init(void); + +void nrfx_gpiote_uninit(void); + +nrfx_err_t nrfx_gpiote_channel_alloc(uint8_t * p_channel); + +nrfx_err_t nrfx_gpiote_channel_free(uint8_t channel); + +nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, + nrfx_gpiote_input_config_t const * p_input_config, + nrfx_gpiote_trigger_config_t const * p_trigger_config, + nrfx_gpiote_handler_config_t const * p_handler_config); + +nrfx_err_t nrfx_gpiote_output_configure(nrfx_gpiote_pin_t pin, + nrfx_gpiote_output_config_t const * p_config, + nrfx_gpiote_task_config_t const * p_task_config); + +nrfx_err_t nrfx_gpiote_pin_uninit(nrfx_gpiote_pin_t pin); + +void nrfx_gpiote_trigger_enable(nrfx_gpiote_pin_t pin, bool int_enable); + +void nrfx_gpiote_trigger_disable(nrfx_gpiote_pin_t pin); + +void nrfx_gpiote_global_callback_set(nrfx_gpiote_interrupt_handler_t handler, + void * p_context); + +nrfx_err_t nrfx_gpiote_channel_get(nrfx_gpiote_pin_t pin, uint8_t *p_channel); + +void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin); + +void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin); + +void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin); + +void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin); + +void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin); + +nrf_gpiote_task_t nrfx_gpiote_out_task_get(nrfx_gpiote_pin_t pin); + +uint32_t nrfx_gpiote_out_task_address_get(nrfx_gpiote_pin_t pin); + +#if defined(GPIOTE_FEATURE_SET_PRESENT) +nrf_gpiote_task_t nrfx_gpiote_set_task_get(nrfx_gpiote_pin_t pin); + +uint32_t nrfx_gpiote_set_task_address_get(nrfx_gpiote_pin_t pin); +#endif + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) +nrf_gpiote_task_t nrfx_gpiote_clr_task_get(nrfx_gpiote_pin_t pin); + +uint32_t nrfx_gpiote_clr_task_address_get(nrfx_gpiote_pin_t pin); +#endif + +nrf_gpiote_event_t nrfx_gpiote_in_event_get(nrfx_gpiote_pin_t pin); + +uint32_t nrfx_gpiote_in_event_address_get(nrfx_gpiote_pin_t pin); + +void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state); + +void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin); + +#if defined(GPIOTE_FEATURE_SET_PRESENT) +void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin); +#endif + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) +void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin); +#endif + +#if NRF_GPIOTE_HAS_LATENCY +NRFX_STATIC_INLINE void nrfx_gpiote_latency_set(nrf_gpiote_latency_t latency); + +NRFX_STATIC_INLINE nrf_gpiote_latency_t nrfx_gpiote_latency_get(void); +#endif + +#ifndef NRFX_DECLARE_ONLY #if NRF_GPIOTE_HAS_LATENCY NRFX_STATIC_INLINE void nrfx_gpiote_latency_set(nrf_gpiote_latency_t latency) { - nrfy_gpiote_latency_set(NRF_GPIOTE, latency); + nrfy_gpiote_latency_set(NRFX_CONCAT(NRF_, GPIOTE, NRF_GPIOTE_INDEX), latency); } NRFX_STATIC_INLINE nrf_gpiote_latency_t nrfx_gpiote_latency_get(void) { - return nrfy_gpiote_latency_get(NRF_GPIOTE); + return nrfy_gpiote_latency_get(NRFX_CONCAT(NRF_, GPIOTE, NRF_GPIOTE_INDEX)); } #endif // NRF_GPIOTE_HAS_LATENCY - #endif // NRFX_DECLARE_ONLY +#endif // NRFX_API_VER_AT_LEAST(3, 2, 0) || defined(__NRFX_DOXYGEN__) /** @} */ -void nrfx_gpiote_irq_handler(void); - +/* + * Declare interrupt handlers for all enabled driver instances in the following format: + * nrfx_\_\_irq_handler (for example, nrfx_gpiote_0_irq_handler). + * + * A specific interrupt handler for the driver instance can be retrieved by using + * the NRFX_GPIOTE_INST_HANDLER_GET macro. + * + * Here is a sample of using the NRFX_GPIOTE_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: + * + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_GPIOTE_INST_GET(\)), \, + * NRFX_GPIOTE_INST_HANDLER_GET(\), 0, 0); + */ +NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(GPIOTE, gpiote) #ifdef __cplusplus } diff --git a/drivers/include/nrfx_i2s.h b/drivers/include/nrfx_i2s.h index a2c9d635b..f3abe7dfb 100644 --- a/drivers/include/nrfx_i2s.h +++ b/drivers/include/nrfx_i2s.h @@ -226,7 +226,9 @@ typedef void (* nrfx_i2s_data_handler_t)(nrfx_i2s_buffers_t const * p_released, * @param[in] handler Data handler provided by the user. Must not be NULL. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_INVALID_PARAM The requested combination of configuration * options is not allowed by the I2S peripheral. */ @@ -241,6 +243,16 @@ nrfx_err_t nrfx_i2s_init(nrfx_i2s_t const * p_instance, */ void nrfx_i2s_uninit(nrfx_i2s_t const * p_instance); +/** + * @brief Function for checking if the I2S driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_i2s_init_check(nrfx_i2s_t const * p_instance); + /** * @brief Function for starting the continuous I2S transfer. * @@ -321,11 +333,11 @@ void nrfx_i2s_stop(nrfx_i2s_t const * p_instance); * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_I2S_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_I2S_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_I2S_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_I2S_INST_GET(\)), \, - * NRFX_I2S_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_I2S_INST_GET(\)), \, + * NRFX_I2S_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(I2S, i2s) diff --git a/drivers/include/nrfx_ipc.h b/drivers/include/nrfx_ipc.h index 7bfe7c483..4ea0837d6 100644 --- a/drivers/include/nrfx_ipc.h +++ b/drivers/include/nrfx_ipc.h @@ -68,10 +68,11 @@ typedef struct * * @param irq_priority Interrupt priority. * @param handler Event handler provided by the user. + * Must not be NULL. * @param p_context Context passed to event handler. * - * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE Driver is already initialized. + * @retval NRFX_SUCCESS Initialization was successful. + * @retval NRFX_ERROR_ALREADY Driver is already initialized. */ nrfx_err_t nrfx_ipc_init(uint8_t irq_priority, nrfx_ipc_handler_t handler, void * p_context); @@ -112,6 +113,14 @@ NRFX_STATIC_INLINE uint32_t nrfx_ipc_gpmem_get(uint8_t mem_index); /** @brief Function for uninitializing the IPC module. */ void nrfx_ipc_uninit(void); +/** + * @brief Function for checking if the IPC driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_ipc_init_check(void); + /** * @brief Function for enabling events to generate interrupt. * diff --git a/drivers/include/nrfx_lpcomp.h b/drivers/include/nrfx_lpcomp.h index 8a819e2ed..f3075ac00 100644 --- a/drivers/include/nrfx_lpcomp.h +++ b/drivers/include/nrfx_lpcomp.h @@ -57,11 +57,21 @@ typedef void (* nrfx_lpcomp_event_handler_t)(nrf_lpcomp_event_t event); /** @brief LPCOMP configuration. */ typedef struct { - nrf_lpcomp_config_t config; ///< Peripheral configuration. - nrf_lpcomp_input_t input; ///< Input to be monitored. - uint8_t interrupt_priority; ///< LPCOMP interrupt priority. +#if NRFX_API_VER_AT_LEAST(3, 2, 0) || defined(__NRFX_DOXYGEN__) + nrf_lpcomp_ref_t reference; ///< Reference selection. + nrf_lpcomp_ext_ref_t ext_ref; ///< External analog reference selection. + nrf_lpcomp_detect_t detection; ///< Detection type. +#if NRF_LPCOMP_HAS_HYST + nrf_lpcomp_hyst_t hyst; ///< Comparator hysteresis. +#endif +#else + nrf_lpcomp_config_t config; ///< Peripheral configuration. +#endif + nrf_lpcomp_input_t input; ///< Input to be monitored. + uint8_t interrupt_priority; ///< LPCOMP interrupt priority. } nrfx_lpcomp_config_t; +#if NRFX_API_VER_AT_LEAST(3, 2, 0) || defined(__NRFX_DOXYGEN__) /** * @brief LPCOMP driver default configuration. * @@ -72,6 +82,15 @@ typedef struct * * @param[in] _input Comparator input pin. */ +#define NRFX_LPCOMP_DEFAULT_CONFIG(_input) \ +{ \ + .reference = NRF_LPCOMP_REF_SUPPLY_4_8, \ + .detection = NRF_LPCOMP_DETECT_CROSS, \ + NRFX_COND_CODE_1(LPCOMP_FEATURE_HYST_PRESENT, (.hyst = NRF_LPCOMP_HYST_NOHYST,), ()) \ + .input = (nrf_lpcomp_input_t)_input, \ + .interrupt_priority = NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY \ +} +#else #define NRFX_LPCOMP_DEFAULT_CONFIG(_input) \ { \ .config = \ @@ -83,6 +102,7 @@ typedef struct .input = (nrf_lpcomp_input_t)_input, \ .interrupt_priority = NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY \ } +#endif /** * @brief Function for initializing the LPCOMP driver. @@ -95,7 +115,9 @@ typedef struct * Must not be NULL. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The driver has already been initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_BUSY The COMP peripheral is already in use. * This is possible only if @ref nrfx_prs module * is enabled. @@ -104,7 +126,7 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config, nrfx_lpcomp_event_handler_t event_handler); /** - * @brief Function for uninitializing the LCOMP driver. + * @brief Function for uninitializing the LPCOMP driver. * * This function uninitializes the LPCOMP driver. The LPCOMP peripheral and * its interrupts are disabled, and local variables are cleaned. After this call, you must @@ -115,6 +137,14 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config, */ void nrfx_lpcomp_uninit(void); +/** + * @brief Function for checking if the LPCOMP driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_lpcomp_init_check(void); + /** * @brief Function for enabling the LPCOMP peripheral and interrupts. * diff --git a/drivers/include/nrfx_nfct.h b/drivers/include/nrfx_nfct.h index 813278f1a..5935acbe7 100644 --- a/drivers/include/nrfx_nfct.h +++ b/drivers/include/nrfx_nfct.h @@ -188,7 +188,9 @@ typedef struct * @param[in] p_config Pointer to the NFCT driver configuration structure. * * @retval NRFX_SUCCESS The NFCT driver was initialized successfully. - * @retval NRFX_ERROR_INVALID_STATE The NFCT driver is already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_FORBIDDEN The NFCT antenna pads are not configured as antenna pins. */ nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config); @@ -200,6 +202,14 @@ nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config); */ void nrfx_nfct_uninit(void); +/** + * @brief Function for checking if the NFCT driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_nfct_init_check(void); + /** * @brief Function for starting the NFC subsystem. * diff --git a/drivers/include/nrfx_nvmc.h b/drivers/include/nrfx_nvmc.h index 222e8cd82..ca35f6537 100644 --- a/drivers/include/nrfx_nvmc.h +++ b/drivers/include/nrfx_nvmc.h @@ -328,10 +328,22 @@ NRFX_STATIC_INLINE bool nrfx_nvmc_write_done_check(void) NRFX_STATIC_INLINE uint32_t nrfx_nvmc_uicr_word_read(uint32_t const volatile *address) { +#if NRF91_ERRATA_7_ENABLE_WORKAROUND + bool irq_disabled = __get_PRIMASK() == 1; + if (!irq_disabled) + { + __disable_irq(); + } +#endif + uint32_t value = nrf_nvmc_word_read((uint32_t)address); #if NRF91_ERRATA_7_ENABLE_WORKAROUND __DSB(); + if (!irq_disabled) + { + __enable_irq(); + } #endif return value; diff --git a/drivers/include/nrfx_pdm.h b/drivers/include/nrfx_pdm.h index 65ebbf89c..69de69503 100644 --- a/drivers/include/nrfx_pdm.h +++ b/drivers/include/nrfx_pdm.h @@ -145,7 +145,9 @@ typedef void (*nrfx_pdm_event_handler_t)(nrfx_pdm_evt_t const * p_evt); * @param[in] event_handler Event handler provided by the user. Cannot be NULL. * * @retval NRFX_SUCCESS Initialization was successful. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_INVALID_PARAM Invalid configuration was specified. */ nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config, @@ -170,6 +172,14 @@ nrfx_err_t nrfx_pdm_reconfigure(nrfx_pdm_config_t const * p_config); */ void nrfx_pdm_uninit(void); +/** + * @brief Function for checking if the PDM interface is initialized. + * + * @retval true Interface is already initialized. + * @retval false Interface is not initialized. + */ +bool nrfx_pdm_init_check(void); + /** * @brief Function for getting the address of a PDM interface task. * diff --git a/drivers/include/nrfx_power.h b/drivers/include/nrfx_power.h index 51713f3a5..3b5f3ba89 100644 --- a/drivers/include/nrfx_power.h +++ b/drivers/include/nrfx_power.h @@ -50,14 +50,14 @@ extern "C" { * @brief POWER peripheral driver. */ -#if NRF_POWER_HAS_POFCON || NRFX_CHECK(NRF_REGULATORS_HAS_POFCON) || defined(__NRFX_DOXYGEN__) +#if NRF_POWER_HAS_POFCON || NRFX_CHECK(NRF_REGULATORS_HAS_POF) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether the power failure comparator is supported. */ #define NRFX_POWER_SUPPORTS_POFCON 1 #else #define NRFX_POWER_SUPPORTS_POFCON 0 #endif -#if NRF_POWER_HAS_POFCON_VDDH || NRFX_CHECK(NRF_REGULATORS_HAS_POFCON_VDDH) || \ +#if NRF_POWER_HAS_POFCON_VDDH || NRFX_CHECK(NRF_REGULATORS_HAS_POF_VDDH) || \ defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether the power failure comparator for VDDH is supported. */ #define NRFX_POWER_SUPPORTS_POFCON_VDDH 1 @@ -65,7 +65,7 @@ extern "C" { #define NRFX_POWER_SUPPORTS_POFCON_VDDH 0 #endif -#if NRF_POWER_HAS_DCDCEN_VDDH || NRFX_CHECK(NRF_REGULATORS_HAS_DCDCEN_VDDH) || \ +#if NRF_POWER_HAS_DCDCEN_VDDH || NRFX_CHECK(NRF_REGULATORS_HAS_VREG_HIGH) || \ defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether the VDDH regulator is supported. */ #define NRFX_POWER_SUPPORTS_DCDCEN_VDDH 1 @@ -247,8 +247,8 @@ nrfx_power_usb_event_handler_t nrfx_power_usb_handler_get(void); * * @param[in] p_config Pointer to the structure with the initial configuration. * - * @retval NRFX_SUCCESS Successfully initialized. - * @retval NRFX_ERROR_ALREADY_INITIALIZED Module was already initialized. + * @retval NRFX_SUCCESS Successfully initialized. + * @retval NRFX_ERROR_ALREADY Module was already initialized. */ nrfx_err_t nrfx_power_init(nrfx_power_config_t const * p_config); @@ -261,6 +261,14 @@ nrfx_err_t nrfx_power_init(nrfx_power_config_t const * p_config); */ void nrfx_power_uninit(void); +/** + * @brief Function for checking if the power module driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_power_init_check(void); + #if NRFX_POWER_SUPPORTS_POFCON /** * @brief Function for initializing the power failure comparator. diff --git a/drivers/include/nrfx_power_compat.h b/drivers/include/nrfx_power_compat.h index 2af670fcf..4e044a849 100644 --- a/drivers/include/nrfx_power_compat.h +++ b/drivers/include/nrfx_power_compat.h @@ -46,39 +46,45 @@ #include #endif -#if NRF_REGULATORS_HAS_POFCON +#if NRF_REGULATORS_HAS_POF typedef nrf_regulators_pof_thr_t nrf_power_pof_thr_t; -#define NRF_POWER_POFTHR_V19 NRF_REGULATORS_POFTHR_V19 -#define NRF_POWER_POFTHR_V20 NRF_REGULATORS_POFTHR_V20 -#define NRF_POWER_POFTHR_V21 NRF_REGULATORS_POFTHR_V21 -#define NRF_POWER_POFTHR_V22 NRF_REGULATORS_POFTHR_V22 -#define NRF_POWER_POFTHR_V23 NRF_REGULATORS_POFTHR_V23 -#define NRF_POWER_POFTHR_V24 NRF_REGULATORS_POFTHR_V24 -#define NRF_POWER_POFTHR_V25 NRF_REGULATORS_POFTHR_V25 -#define NRF_POWER_POFTHR_V26 NRF_REGULATORS_POFTHR_V26 -#define NRF_POWER_POFTHR_V27 NRF_REGULATORS_POFTHR_V27 -#define NRF_POWER_POFTHR_V28 NRF_REGULATORS_POFTHR_V28 - -typedef nrf_regulators_pof_thrvddh_t nrf_power_pof_thrvddh_t; -#define NRF_POWER_POFTHRVDDH_V27 NRF_REGULATORS_POFTHRVDDH_V27 -#define NRF_POWER_POFTHRVDDH_V28 NRF_REGULATORS_POFTHRVDDH_V28 -#define NRF_POWER_POFTHRVDDH_V29 NRF_REGULATORS_POFTHRVDDH_V29 -#define NRF_POWER_POFTHRVDDH_V30 NRF_REGULATORS_POFTHRVDDH_V30 -#define NRF_POWER_POFTHRVDDH_V31 NRF_REGULATORS_POFTHRVDDH_V31 -#define NRF_POWER_POFTHRVDDH_V32 NRF_REGULATORS_POFTHRVDDH_V32 -#define NRF_POWER_POFTHRVDDH_V33 NRF_REGULATORS_POFTHRVDDH_V33 -#define NRF_POWER_POFTHRVDDH_V34 NRF_REGULATORS_POFTHRVDDH_V34 -#define NRF_POWER_POFTHRVDDH_V35 NRF_REGULATORS_POFTHRVDDH_V35 -#define NRF_POWER_POFTHRVDDH_V36 NRF_REGULATORS_POFTHRVDDH_V36 -#define NRF_POWER_POFTHRVDDH_V37 NRF_REGULATORS_POFTHRVDDH_V37 -#define NRF_POWER_POFTHRVDDH_V38 NRF_REGULATORS_POFTHRVDDH_V38 -#define NRF_POWER_POFTHRVDDH_V39 NRF_REGULATORS_POFTHRVDDH_V39 -#define NRF_POWER_POFTHRVDDH_V40 NRF_REGULATORS_POFTHRVDDH_V40 -#define NRF_POWER_POFTHRVDDH_V41 NRF_REGULATORS_POFTHRVDDH_V41 -#define NRF_POWER_POFTHRVDDH_V42 NRF_REGULATORS_POFTHRVDDH_V42 - -#endif // NRF_REGULATORS_HAS_POFCON +#define NRF_POWER_POFTHR_V17 NRF_REGULATORS_POF_THR_1V7 +#define NRF_POWER_POFTHR_V18 NRF_REGULATORS_POF_THR_1V8 +#define NRF_POWER_POFTHR_V19 NRF_REGULATORS_POF_THR_1V9 +#define NRF_POWER_POFTHR_V20 NRF_REGULATORS_POF_THR_2V0 +#define NRF_POWER_POFTHR_V21 NRF_REGULATORS_POF_THR_2V1 +#define NRF_POWER_POFTHR_V22 NRF_REGULATORS_POF_THR_2V2 +#define NRF_POWER_POFTHR_V23 NRF_REGULATORS_POF_THR_2V3 +#define NRF_POWER_POFTHR_V24 NRF_REGULATORS_POF_THR_2V4 +#define NRF_POWER_POFTHR_V25 NRF_REGULATORS_POF_THR_2V5 +#define NRF_POWER_POFTHR_V26 NRF_REGULATORS_POF_THR_2V6 +#define NRF_POWER_POFTHR_V27 NRF_REGULATORS_POF_THR_2V7 +#define NRF_POWER_POFTHR_V28 NRF_REGULATORS_POF_THR_2V8 + +#if NRF_REGULATORS_HAS_POF_VDDH + +typedef nrf_regulators_pof_thr_vddh_t nrf_power_pof_thrvddh_t; +#define NRF_POWER_POFTHRVDDH_V27 NRF_REGULATORS_POF_THR_VDDH_2V7 +#define NRF_POWER_POFTHRVDDH_V28 NRF_REGULATORS_POF_THR_VDDH_2V8 +#define NRF_POWER_POFTHRVDDH_V29 NRF_REGULATORS_POF_THR_VDDH_2V9 +#define NRF_POWER_POFTHRVDDH_V30 NRF_REGULATORS_POF_THR_VDDH_3V0 +#define NRF_POWER_POFTHRVDDH_V31 NRF_REGULATORS_POF_THR_VDDH_3V1 +#define NRF_POWER_POFTHRVDDH_V32 NRF_REGULATORS_POF_THR_VDDH_3V2 +#define NRF_POWER_POFTHRVDDH_V33 NRF_REGULATORS_POF_THR_VDDH_3V3 +#define NRF_POWER_POFTHRVDDH_V34 NRF_REGULATORS_POF_THR_VDDH_3V4 +#define NRF_POWER_POFTHRVDDH_V35 NRF_REGULATORS_POF_THR_VDDH_3V5 +#define NRF_POWER_POFTHRVDDH_V36 NRF_REGULATORS_POF_THR_VDDH_3V6 +#define NRF_POWER_POFTHRVDDH_V37 NRF_REGULATORS_POF_THR_VDDH_3V7 +#define NRF_POWER_POFTHRVDDH_V38 NRF_REGULATORS_POF_THR_VDDH_3V8 +#define NRF_POWER_POFTHRVDDH_V39 NRF_REGULATORS_POF_THR_VDDH_3V9 +#define NRF_POWER_POFTHRVDDH_V40 NRF_REGULATORS_POF_THR_VDDH_4V0 +#define NRF_POWER_POFTHRVDDH_V41 NRF_REGULATORS_POF_THR_VDDH_4V1 +#define NRF_POWER_POFTHRVDDH_V42 NRF_REGULATORS_POF_THR_VDDH_4V2 + +#endif // NRF_REGULATORS_HAS_POF_VDDH + +#endif // NRF_REGULATORS_HAS_POF #if defined(USBREG_PRESENT) #include "nrfx_usbreg.h" diff --git a/drivers/include/nrfx_pwm.h b/drivers/include/nrfx_pwm.h index ac9d1974a..607a8bd81 100644 --- a/drivers/include/nrfx_pwm.h +++ b/drivers/include/nrfx_pwm.h @@ -209,7 +209,9 @@ typedef void (* nrfx_pwm_handler_t)(nrfx_pwm_evt_type_t event_type, void * p_con * @param[in] p_context Context passed to the event handler. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * p_instance, nrfx_pwm_config_t const * p_config, @@ -237,6 +239,16 @@ nrfx_err_t nrfx_pwm_reconfigure(nrfx_pwm_t const * p_instance, nrfx_pwm_config_t */ void nrfx_pwm_uninit(nrfx_pwm_t const * p_instance); +/** + * @brief Function for checking if the PWM driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_pwm_init_check(nrfx_pwm_t const * p_instance); + /** * @brief Function for starting a single sequence playback. * @@ -426,11 +438,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * p_inst * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_PWM_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_PWM_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_PWM_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_PWM_INST_GET(\)), \, - * NRFX_PWM_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_PWM_INST_GET(\)), \, + * NRFX_PWM_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(PWM, pwm) diff --git a/drivers/include/nrfx_qdec.h b/drivers/include/nrfx_qdec.h index 7f3181bfc..37b5ea176 100644 --- a/drivers/include/nrfx_qdec.h +++ b/drivers/include/nrfx_qdec.h @@ -176,7 +176,9 @@ typedef void (*nrfx_qdec_event_handler_t)(nrfx_qdec_event_t event, void * p_cont * @param[in] p_context Context passed to event handler. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The QDEC was already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ nrfx_err_t nrfx_qdec_init(nrfx_qdec_t const * p_instance, nrfx_qdec_config_t const * p_config, @@ -205,6 +207,16 @@ nrfx_err_t nrfx_qdec_reconfigure(nrfx_qdec_t const * p_instance, */ void nrfx_qdec_uninit(nrfx_qdec_t const * p_instance); +/** + * @brief Function for checking if the QDEC driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_qdec_init_check(nrfx_qdec_t const * p_instance); + /** * @brief Function for enabling QDEC. * @@ -282,11 +294,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_qdec_event_address_get(nrfx_qdec_t const * p_in * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_QDEC_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_QDEC_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_QDEC_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_QDEC_INST_GET(\)), \, - * NRFX_QDEC_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_QDEC_INST_GET(\)), \, + * NRFX_QDEC_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(QDEC, qdec) diff --git a/drivers/include/nrfx_qspi.h b/drivers/include/nrfx_qspi.h index 7f8df8a3e..a77612a60 100644 --- a/drivers/include/nrfx_qspi.h +++ b/drivers/include/nrfx_qspi.h @@ -55,6 +55,7 @@ typedef struct nrf_qspi_pins_t pins; ///< Pin configuration structure. nrf_qspi_prot_conf_t prot_if; ///< Protocol layer interface configuration structure. nrf_qspi_phy_conf_t phy_if; ///< Physical layer interface configuration structure. + uint32_t timeout; ///< Time in milliseconds used in timeout counter. uint8_t irq_priority; ///< Interrupt priority. bool skip_gpio_cfg; ///< Skip GPIO configuration of pins. /**< When set to true, the driver does not modify @@ -84,6 +85,7 @@ typedef struct * - Deep Power-down disabled * - clock frequency: 2 MHz for nRF52 Series, 6 MHz for nRF53 Series * - SCK delay 5 clock ticks + * - 500 milliseconds operation timeout * - mode 0 (data captured on the clock rising edge and transmitted on a falling edge. Clock base level is '0') * * @param[in] _pin_sck Pin for clock signal. @@ -117,6 +119,7 @@ typedef struct .spi_mode = NRF_QSPI_MODE_0, \ .sck_freq = NRF_QSPI_FREQ_DIV16, \ }, \ + .timeout = 500, \ .irq_priority = (uint8_t)NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY, \ } @@ -184,12 +187,14 @@ typedef void (*nrfx_qspi_handler_t)(nrfx_qspi_evt_t event, void * p_context); /** * @brief Function for initializing the QSPI driver instance. * - * This function configures the peripheral and its interrupts, and activates it. During the - * activation process, the internal clocks are started and the QSPI peripheral tries to read - * the status byte to read the busy bit. Reading the status byte is done in a simple poll and wait - * mechanism. - * If the busy bit is 1, this indicates issues with the external memory device. As a result, - * @ref nrfx_qspi_init returns NRFX_ERROR_TIMEOUT. + * This function configures the peripheral and its interrupts. + * + * @note The function does not activate the peripheral instance. The activation is done during the first + * transfer after initialization or when calling @ref nrfx_qspi_activate function. + * The activation process starts the internal clocks, and the QSPI peripheral tries to read + * the status byte to check the busy bit. Reading the status byte is done in a simple poll + * and wait mechanism. If the busy bit is set, this indicates issues with the external memory + * device. As a result, transfer functions return @ref NRFX_ERROR_TIMEOUT. * * In case of issues: * - Check the connection. @@ -206,8 +211,9 @@ typedef void (*nrfx_qspi_handler_t)(nrfx_qspi_evt_t event, void * p_context); * in the Product Specification. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_TIMEOUT The peripheral cannot connect with external memory. - * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_INVALID_PARAM The pin configuration was incorrect. */ nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config, @@ -219,6 +225,9 @@ nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config, * * @param[in] p_config Pointer to the structure with the configuration. * + * @warning The function deactivates the peripheral instance. The activation is done during the first + * transfer after reconfiguration or when calling @ref nrfx_qspi_activate function. + * * @retval NRFX_SUCCESS Reconfiguration was successful. * @retval NRFX_ERROR_BUSY The driver is during transaction. * @retval NRFX_ERROR_TIMEOUT External memory is busy or there are connection issues. @@ -230,9 +239,41 @@ nrfx_err_t nrfx_qspi_reconfigure(nrfx_qspi_config_t const * p_config); /** @brief Function for uninitializing the QSPI driver instance. */ void nrfx_qspi_uninit(void); +/** + * @brief Function for activating the QSPI driver instance. + * + * @param[in] wait True if activation is to be in blocking mode, false otherwise. + * + * @retval NRFX_SUCCESS The driver instance has been activated. + * @retval NRFX_ERROR_ALREADY The driver is already activated. + * @retval NRFX_ERROR_TIMEOUT External memory is busy, or there are connection issues. + */ +nrfx_err_t nrfx_qspi_activate(bool wait); + +/** @brief Function for deactivating the QSPI driver instance. + * + * @retval NRFX_SUCCESS The driver instance has been activated. + * @retval NRFX_ERROR_BUSY The driver is during transaction. + */ +nrfx_err_t nrfx_qspi_deactivate(void); + +/** + * @brief Function for checking if the QSPI driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_qspi_init_check(void); + /** * @brief Function for reading data from the QSPI memory. * + * @note If that is the first operation after activation of driver initialization has been triggered, + * the activation process starts the internal clocks and the QSPI peripheral tries to read + * the status byte to check the busy bit. Reading the status byte is done in a simple poll + * and wait mechanism. If the busy bit is set, this indicates that the memory may not be ready yet. + * As a result, the function returns @ref NRFX_ERROR_TIMEOUT. + * * Write, read, and erase operations check memory device busy state before starting the operation. * If the memory is busy, the resulting action depends on the mode in which the read operation is used: * - blocking mode (without handler) - a delay occurs until the last operation runs and @@ -250,6 +291,7 @@ void nrfx_qspi_uninit(void); * @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation * was commissioned (handler mode). * @retval NRFX_ERROR_BUSY The driver currently handles another operation. + * @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues. * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region * or its address is not aligned to a 32-bit word. */ @@ -260,6 +302,8 @@ nrfx_err_t nrfx_qspi_read(void * p_rx_buffer, /** * @brief Function for writing data to QSPI memory. * + * @note Refer to the note for @ref nrfx_qspi_read. + * * Write, read, and erase operations check memory device busy state before starting the operation. * If the memory is busy, the resulting action depends on the mode in which the write operation is used: * - blocking mode (without handler) - a delay occurs until the last operation runs or @@ -281,6 +325,7 @@ nrfx_err_t nrfx_qspi_read(void * p_rx_buffer, * @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation * was commissioned (handler mode). * @retval NRFX_ERROR_BUSY The driver currently handles other operation. + * @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues. * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region * or its address is not aligned to a 32-bit word. */ @@ -291,6 +336,8 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer, /** * @brief Function for starting erasing of one memory block - 4KB, 64KB, or the whole chip. * + * @note Refer to the note for @ref nrfx_qspi_read. + * * Write, read, and erase operations check memory device busy state before starting the operation. * If the memory is busy, the resulting action depends on the mode in which the erase operation is used: * - blocking mode (without handler) - a delay occurs until the last operation runs or @@ -308,8 +355,9 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer, * * @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation * was commissioned (handler mode). - * @retval NRFX_ERROR_INVALID_ADDR The provided start address is not aligned to a 32-bit word. * @retval NRFX_ERROR_BUSY The driver currently handles another operation. + * @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues. + * @retval NRFX_ERROR_INVALID_ADDR The provided start address is not aligned to a 32-bit word. */ nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length, uint32_t start_address); @@ -317,18 +365,18 @@ nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length, /** * @brief Function for starting an erase operation of the whole chip. * - * @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation - * was commissioned (handler mode). - * @retval NRFX_ERROR_BUSY The driver currently handles another operation. + * @note Refer to the note for @ref nrfx_qspi_read. + * + * @retval NRFX_SUCCESS The operation was successful (blocking mode) or + * commissioned (handler mode). + * @retval NRFX_ERROR_BUSY The driver currently is handling another operation. + * @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues. */ nrfx_err_t nrfx_qspi_chip_erase(void); /** * @brief Function for getting the extended event associated with finished operation. * - * @warning This function shall be used only in the context of event handler - passed by the user during driver initialization. - * * @return Pointer to the extended event associated with finished operation. */ nrfx_qspi_evt_ext_t const * nrfx_qspi_event_extended_get(void); @@ -345,13 +393,24 @@ bool nrfx_qspi_xfer_buffered_check(void); * testing WIP (write in progress) bit. * * @retval NRFX_SUCCESS The driver and memory are ready to handle a new operation. - * @retval NRFX_ERROR_BUSY The driver or memory currently handle another operation. + * @retval NRFX_ERROR_BUSY The driver currently is handling another operation. */ nrfx_err_t nrfx_qspi_mem_busy_check(void); +/** + * @brief Function for signaling premature operation timeout. + * + * The function provides a mechanism that can cause premature timeout when the driver is waiting for + * the READY event. This allows to use external source of the timeout. If the driver is initialized + * with a handler, it will not process the event generated for the transfer. + */ +void nrfx_qspi_timeout_signal(void); + /** * @brief Function for sending operation code, sending data, and receiving data from the memory device. * + * @note Refer to the note for @ref nrfx_qspi_read. + * * Use this function to transfer configuration data to memory and to receive data from memory. * Pointers can be addresses from flash memory. * This function is a synchronous function and should be used only if necessary. @@ -368,7 +427,7 @@ nrfx_err_t nrfx_qspi_mem_busy_check(void); * @param[out] p_rx_buffer Pointer to the array for data to receive. Can be NULL if there is nothing to receive. * * @retval NRFX_SUCCESS The operation was successful. - * @retval NRFX_ERROR_TIMEOUT The external memory is busy or there are connection issues. + * @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues. * @retval NRFX_ERROR_BUSY The driver currently handles other operation. */ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, @@ -378,6 +437,8 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, /** * @brief Function for sending operation code and data to the memory device with simpler configuration. * + * @note Refer to the note for @ref nrfx_qspi_read. + * * Use this function to transfer configuration data to memory and to receive data from memory. * This function is a synchronous function and should be used only if necessary. * @@ -385,8 +446,9 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, * @param[in] length Length of the data to send and opcode. See @ref nrf_qspi_cinstr_len_t. * @param[in] p_tx_buffer Pointer to input data array. * - * @retval NRFX_SUCCESS The operation was successful. - * @retval NRFX_ERROR_BUSY The driver currently handles another operation. + * @retval NRFX_SUCCESS The operation was successful. + * @retval NRFX_ERROR_BUSY The driver currently handles another operation. + * @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues. */ nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode, nrf_qspi_cinstr_len_t length, @@ -395,6 +457,8 @@ nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode, /** * @brief Function for starting the custom instruction long frame mode. * + * @note Refer to the note for @ref nrfx_qspi_read. + * * The long frame mode is a mechanism that allows for arbitrary byte length custom instructions. * Use this function to initiate a custom transaction by sending custom instruction opcode. * To send and receive data, use @ref nrfx_qspi_lfm_xfer. @@ -411,13 +475,15 @@ nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode, * * @retval NRFX_SUCCESS Operation was successful. * @retval NRFX_ERROR_BUSY Driver currently handles other operation. - * @retval NRFX_ERROR_TIMEOUT External memory is busy or there are connection issues. + * @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues. */ nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config); /** * @brief Function for sending and receiving data in the custom instruction long frame mode. * + * @note Refer to the note for @ref nrfx_qspi_read. + * * Both specified buffers must be at least @p transfer_length bytes in size. * * @param[in] p_tx_buffer Pointer to the array with data to send. diff --git a/drivers/include/nrfx_rng.h b/drivers/include/nrfx_rng.h index fd1b2f33c..f171e547e 100644 --- a/drivers/include/nrfx_rng.h +++ b/drivers/include/nrfx_rng.h @@ -81,8 +81,8 @@ typedef void (* nrfx_rng_evt_handler_t)(uint8_t rng_data); * @param[in] p_config Pointer to the structure with the initial configuration. * @param[in] handler Event handler provided by the user. Must not be NULL. * - * @retval NRFX_SUCCESS Driver was successfully initialized. - * @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized. + * @retval NRFX_SUCCESS Driver was successfully initialized. + * @retval NRFX_ERROR_ALREADY Driver was already initialized. */ nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handler_t handler); @@ -103,6 +103,14 @@ void nrfx_rng_stop(void); /** @brief Function for uninitializing the nrfx_rng module. */ void nrfx_rng_uninit(void); +/** + * @brief Function for checking if the RNG driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_rng_init_check(void); + /** @} */ diff --git a/drivers/include/nrfx_rtc.h b/drivers/include/nrfx_rtc.h index 7533d316f..697ca5018 100644 --- a/drivers/include/nrfx_rtc.h +++ b/drivers/include/nrfx_rtc.h @@ -127,7 +127,9 @@ typedef void (*nrfx_rtc_handler_t)(nrfx_rtc_int_type_t int_type); * Must not be NULL. * * @retval NRFX_SUCCESS Successfully initialized. - * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * p_instance, nrfx_rtc_config_t const * p_config, @@ -143,6 +145,16 @@ nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * p_instance, */ void nrfx_rtc_uninit(nrfx_rtc_t const * p_instance); +/** + * @brief Function for checking if the RTC driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_rtc_init_check(nrfx_rtc_t const * p_instance); + /** * @brief Function for enabling the RTC driver instance. * @@ -173,6 +185,9 @@ void nrfx_rtc_disable(nrfx_rtc_t const * p_instance); * - The requested absolute compare value is not bigger than (0x00FFFFFF)-tick_latency. It is * the user's responsibility to ensure this. * + * @warning Once the compare event is received, corresponding compare channel + * will be disabled before executing event handler provided by the user. + * * @param[in] p_instance Pointer to the driver instance structure. * @param[in] channel One of the channels of the instance. * @param[in] val Absolute value to be set in the compare register. @@ -369,11 +384,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * p_inst * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_RTC_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_RTC_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_RTC_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_RTC_INST_GET(\)), \, - * NRFX_RTC_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_RTC_INST_GET(\)), \, + * NRFX_RTC_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(RTC, rtc) diff --git a/drivers/include/nrfx_saadc.h b/drivers/include/nrfx_saadc.h index be1c7fdcd..87fc677c0 100644 --- a/drivers/include/nrfx_saadc.h +++ b/drivers/include/nrfx_saadc.h @@ -55,7 +55,7 @@ extern "C" { #define NRFX_SAADC_DEFAULT_ACQTIME 79 #endif -#if NRF_SAADC_HAS_CONV_TIME || defined(__NRFX_DOXYGEN__) +#if NRF_SAADC_HAS_CONVTIME || defined(__NRFX_DOXYGEN__) /** @brief Auxiliary symbol specifying default value for the SAADC conversion time. */ #define NRFX_SAADC_DEFAULT_CONV_TIME 7 #endif @@ -135,6 +135,39 @@ extern "C" { .channel_index = _index, \ } +#if (NRF_SAADC_8BIT_SAMPLE_WIDTH == 8) || defined(__NRFX_DOXYGEN__) +/** + * @brief Macro for getting number of bytes needed to store specified number of SAADC samples + * for given resolution of the SAADC. + * + * @param[in] _resolution Resolution expressed as @ref nrf_saadc_resolution_t. + * @param[in] _samples Number of samples. + * + * @return Number of bytes needed to store specified number of samples. + */ +#define NRFX_SAADC_SAMPLES_TO_BYTES(_resolution, _samples) \ + ((_resolution) == NRF_SAADC_RESOLUTION_8BIT ? _samples : (_samples * 2)) +#else +#define NRFX_SAADC_SAMPLES_TO_BYTES(_resolution, _samples) (_samples) +#endif + +#if (NRF_SAADC_8BIT_SAMPLE_WIDTH == 8) || defined(__NRFX_DOXYGEN__) +/** + * @brief Macro for getting specified SAADC sample from the filled buffer. + * + * @param[in] _resolution Resolution expressed as @ref nrf_saadc_resolution_t. + * @param[in] _samples Pointer to the buffer filled with SAADC samples. + * @param[in] _index Sample index. + * + * @return Specified sample. + */ +#define NRFX_SAADC_SAMPLE_GET(_resolution, _samples, _index) \ + ((_resolution) == NRF_SAADC_RESOLUTION_8BIT ? (((int8_t *) (_samples))[(_index)]) : \ + (((int16_t *)(_samples))[(_index)])) +#else +#define NRFX_SAADC_SAMPLE_GET(_resolution, _samples, _index) (((int16_t *)(_samples))[(_index)]) +#endif + /** * @brief SAADC driver advanced mode default configuration. * @@ -231,7 +264,9 @@ typedef void (* nrfx_saadc_event_handler_t)(nrfx_saadc_evt_t const * p_event); * @param[in] interrupt_priority Interrupt priority. * * @retval NRFX_SUCCESS Initialization was successful. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ nrfx_err_t nrfx_saadc_init(uint8_t interrupt_priority); @@ -242,6 +277,14 @@ nrfx_err_t nrfx_saadc_init(uint8_t interrupt_priority); */ void nrfx_saadc_uninit(void); +/** + * @brief Function for checking if the SAADC driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_saadc_init_check(void); + /** * @brief Function for configuring multiple SAADC channels. * @@ -364,14 +407,14 @@ nrfx_err_t nrfx_saadc_advanced_mode_set(uint32_t channel_ * the conversion. * * @param[in] p_buffer Pointer to the buffer to be filled with conversion results. - * @param[in] size Number of @ref nrf_saadc_value_t samples in buffer. - * - * @retval NRFX_SUCCESS Buffer was supplied successfully. - * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not in the Data RAM region. - * @retval NRFX_ERROR_INVALID_LENGTH The provided buffer is not aligned to the number of activated channels - * or is too long for the EasyDMA to handle. - * @retval NRFX_ERROR_INVALID_STATE The driver is in the idle mode. - * @retval NRFX_ERROR_ALREADY_INITIALIZED Both buffers for double-buffered conversions are already set. + * @param[in] size Number of samples in the buffer. + * + * @retval NRFX_SUCCESS Buffer was supplied successfully. + * @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not in the Data RAM region. + * @retval NRFX_ERROR_INVALID_LENGTH The provided buffer is not aligned to the number of activated channels + * or is too long for the EasyDMA to handle. + * @retval NRFX_ERROR_INVALID_STATE The driver is in the idle mode. + * @retval NRFX_ERROR_ALREADY Both buffers for double-buffered conversions are already set. */ nrfx_err_t nrfx_saadc_buffer_set(nrf_saadc_value_t * p_buffer, uint16_t size); diff --git a/drivers/include/nrfx_spi.h b/drivers/include/nrfx_spi.h index fe9c9a877..1a1f796c5 100644 --- a/drivers/include/nrfx_spi.h +++ b/drivers/include/nrfx_spi.h @@ -218,7 +218,9 @@ typedef void (* nrfx_spi_evt_handler_t)(nrfx_spi_evt_t const * p_event, * @param[in] p_context Context passed to the event handler. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_BUSY Some other peripheral with the same * instance ID is already in use. This is * possible only if @ref nrfx_prs module @@ -249,6 +251,16 @@ nrfx_err_t nrfx_spi_reconfigure(nrfx_spi_t const * p_instance, */ void nrfx_spi_uninit(nrfx_spi_t const * p_instance); +/** + * @brief Function for checking if the SPI driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_spi_init_check(nrfx_spi_t const * p_instance); + /** * @brief Function for starting the SPI data transfer. * @@ -295,11 +307,11 @@ void nrfx_spi_abort(nrfx_spi_t const * p_instance); * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_SPI_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_SPI_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_SPI_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPI_INST_GET(\)), \, - * NRFX_SPI_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPI_INST_GET(\)), \, + * NRFX_SPI_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(SPI, spi) diff --git a/drivers/include/nrfx_spim.h b/drivers/include/nrfx_spim.h index 75e8f5d9d..11d81ec15 100644 --- a/drivers/include/nrfx_spim.h +++ b/drivers/include/nrfx_spim.h @@ -176,6 +176,14 @@ typedef struct #define NRFX_SPIM_FREQUENCY_STATIC_CHECK(id, frequency) \ NRF_SPIM_FREQUENCY_STATIC_CHECK(NRF_SPIM_INST_GET(id), frequency) +/** + * @brief Macro for getting base frequency value in Hz for a given SPIM instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +#define NRFX_SPIM_BASE_FREQUENCY_GET(p_instance) \ + NRF_SPIM_BASE_FREQUENCY_GET((p_instance)->p_reg) + /** @brief Flag indicating that TX buffer address will be incremented after transfer. */ #define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0) @@ -257,7 +265,9 @@ typedef void (* nrfx_spim_evt_handler_t)(nrfx_spim_evt_t const * p_event, * See the chapter Pin assignments in the Product Specification. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_BUSY Some other peripheral with the same * instance ID is already in use. This is * possible only if @ref nrfx_prs module @@ -300,6 +310,16 @@ nrfx_err_t nrfx_spim_reconfigure(nrfx_spim_t const * p_instance, */ void nrfx_spim_uninit(nrfx_spim_t const * p_instance); +/** + * @brief Function for checking if the SPIM driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_spim_init_check(nrfx_spim_t const * p_instance); + /** * @brief Function for starting the SPIM data transfer. * @@ -453,11 +473,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_spim_end_event_address_get(nrfx_spim_t const * * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_SPIM_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_SPIM_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_SPIM_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIM_INST_GET(\)), \, - * NRFX_SPIM_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIM_INST_GET(\)), \, + * NRFX_SPIM_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(SPIM, spim) diff --git a/drivers/include/nrfx_spis.h b/drivers/include/nrfx_spis.h index 8d9e00f09..b879ad0a0 100644 --- a/drivers/include/nrfx_spis.h +++ b/drivers/include/nrfx_spis.h @@ -180,7 +180,9 @@ typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_evt_t const * p_event, * @param[in] p_context Context passed to the event handler. * * @retval NRFX_SUCCESS The initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_INVALID_PARAM Invalid parameter is supplied. * @retval NRFX_ERROR_BUSY Some other peripheral with the same * instance ID is already in use. This is @@ -215,6 +217,16 @@ nrfx_err_t nrfx_spis_reconfigure(nrfx_spis_t const * p_instance, */ void nrfx_spis_uninit(nrfx_spis_t const * p_instance); +/** + * @brief Function for checking if the SPIS driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_spis_init_check(nrfx_spis_t const * p_instance); + /** * @brief Function for preparing the SPI slave instance for a single SPI transaction. * @@ -272,11 +284,11 @@ nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * p_instance, * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_SPIS_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_SPIS_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_SPIS_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIS_INST_GET(\)), \, - * NRFX_SPIS_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIS_INST_GET(\)), \, + * NRFX_SPIS_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(SPIS, spis) diff --git a/drivers/include/nrfx_temp.h b/drivers/include/nrfx_temp.h index 98f0f3861..04fe914aa 100644 --- a/drivers/include/nrfx_temp.h +++ b/drivers/include/nrfx_temp.h @@ -76,14 +76,22 @@ typedef void (* nrfx_temp_data_handler_t)(int32_t temperature); * @param[in] handler Data handler provided by the user. If not provided, * the driver is initialized in blocking mode. * - * @retval NRFX_SUCCESS Driver was successfully initialized. - * @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized. + * @retval NRFX_SUCCESS Driver was successfully initialized. + * @retval NRFX_ERROR_ALREADY Driver was already initialized. */ nrfx_err_t nrfx_temp_init(nrfx_temp_config_t const * p_config, nrfx_temp_data_handler_t handler); /** @brief Function for uninitializing the TEMP driver. */ void nrfx_temp_uninit(void); +/** + * @brief Function for checking if the TEMP driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_temp_init_check(void); + /** * @brief Function for getting the temperature measurement in a 2's complement * signed value representation. diff --git a/drivers/include/nrfx_timer.h b/drivers/include/nrfx_timer.h index f4b8311aa..6ee297fd4 100644 --- a/drivers/include/nrfx_timer.h +++ b/drivers/include/nrfx_timer.h @@ -113,6 +113,14 @@ typedef struct #define NRFX_TIMER_FREQUENCY_STATIC_CHECK(id, frequency) \ NRF_TIMER_FREQUENCY_STATIC_CHECK(NRF_TIMER_INST_GET(id), frequency) +/** + * @brief Macro for getting base frequency value in Hz for a given timer instance. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +#define NRFX_TIMER_BASE_FREQUENCY_GET(p_instance) \ + NRF_TIMER_BASE_FREQUENCY_GET((p_instance)->p_reg) + /** * @brief Timer driver event handler type. * @@ -122,8 +130,7 @@ typedef struct * additional information to the handler function, for * example, the timer ID. */ -typedef void (* nrfx_timer_event_handler_t)(nrf_timer_event_t event_type, - void * p_context); +typedef void (* nrfx_timer_event_handler_t)(nrf_timer_event_t event_type, void * p_context); /** * @brief Function for initializing the timer. @@ -133,7 +140,10 @@ typedef void (* nrfx_timer_event_handler_t)(nrf_timer_event_t event_type, * @param[in] timer_event_handler Event handler provided by the user. Can be NULL. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The instance is already initialized. + * @retval NRFX_ERROR_INVALID_PARAM Specified frequency is not supported by the TIMER instance. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ nrfx_err_t nrfx_timer_init(nrfx_timer_t const * p_instance, nrfx_timer_config_t const * p_config, @@ -146,8 +156,9 @@ nrfx_err_t nrfx_timer_init(nrfx_timer_t const * p_instance, * @param[in] p_config Pointer to the structure with the configuration. * * @retval NRFX_SUCCESS Reconfiguration was successful. - * @retval NRFX_ERROR_BUSY The driver is enabled and cannot be reconfigured. + * @retval NRFX_ERROR_INVALID_PARAM Specified frequency is not supported by the TIMER instance. * @retval NRFX_ERROR_INVALID_STATE The driver is uninitialized. + * @retval NRFX_ERROR_BUSY The driver is enabled and cannot be reconfigured. */ nrfx_err_t nrfx_timer_reconfigure(nrfx_timer_t const * p_instance, nrfx_timer_config_t const * p_config); @@ -159,6 +170,16 @@ nrfx_err_t nrfx_timer_reconfigure(nrfx_timer_t const * p_instance, */ void nrfx_timer_uninit(nrfx_timer_t const * p_instance); +/** + * @brief Function for checking if the TIMER driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_timer_init_check(nrfx_timer_t const * p_instance); + /** * @brief Function for turning on the timer. * @@ -266,8 +287,7 @@ NRFX_STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t co * * @return Captured value. */ -uint32_t nrfx_timer_capture(nrfx_timer_t const * p_instance, - nrf_timer_cc_channel_t cc_channel); +uint32_t nrfx_timer_capture(nrfx_timer_t const * p_instance, nrf_timer_cc_channel_t cc_channel); /** * @brief Function for returning the capture value from the specified channel. @@ -319,8 +339,7 @@ void nrfx_timer_extended_compare(nrfx_timer_t const * p_instance, * * @return Number of ticks. */ -uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * p_instance, - uint32_t time_us); +uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * p_instance, uint32_t time_us); /** * @brief Function for converting time in milliseconds to timer ticks. @@ -330,8 +349,7 @@ uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * p_instance, * * @return Number of ticks. */ -uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * p_instance, - uint32_t time_ms); +uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * p_instance, uint32_t time_ms); /** * @brief Function for enabling timer compare interrupt. @@ -339,8 +357,7 @@ uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * p_instance, * @param[in] p_instance Pointer to the driver instance structure. * @param[in] channel Compare channel. */ -void nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance, - uint32_t channel); +void nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance, uint32_t channel); /** * @brief Function for disabling timer compare interrupt. @@ -348,8 +365,7 @@ void nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance, * @param[in] p_instance Pointer to the driver instance structure. * @param[in] channel Compare channel. */ -void nrfx_timer_compare_int_disable(nrfx_timer_t const * p_instance, - uint32_t channel); +void nrfx_timer_compare_int_disable(nrfx_timer_t const * p_instance, uint32_t channel); #ifndef NRFX_DECLARE_ONLY NRFX_STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * p_instance, @@ -362,7 +378,8 @@ NRFX_STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t con uint32_t channel) { NRFX_ASSERT(channel < p_instance->cc_channel_count); - return nrfy_timer_task_address_get(p_instance->p_reg, nrfy_timer_capture_task_get(channel)); + return nrfy_timer_task_address_get(p_instance->p_reg, + nrfy_timer_capture_task_get((uint8_t)channel)); } NRFX_STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * p_instance, @@ -375,7 +392,8 @@ NRFX_STATIC_INLINE uint32_t nrfx_timer_compare_event_address_get(nrfx_timer_t co uint32_t channel) { NRFX_ASSERT(channel < p_instance->cc_channel_count); - return nrfy_timer_event_address_get(p_instance->p_reg, nrfy_timer_compare_event_get(channel)); + return nrfy_timer_event_address_get(p_instance->p_reg, + nrfy_timer_compare_event_get((uint8_t)channel)); } NRFX_STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const * p_instance, @@ -404,11 +422,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_timer_capture_get(nrfx_timer_t const * p_inst * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_TIMER_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_TIMER_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_TIMER_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TIMER_INST_GET(\)), \, - * NRFX_TIMER_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TIMER_INST_GET(\)), \, + * NRFX_TIMER_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(TIMER, timer) diff --git a/drivers/include/nrfx_twi.h b/drivers/include/nrfx_twi.h index aad60c536..416979629 100644 --- a/drivers/include/nrfx_twi.h +++ b/drivers/include/nrfx_twi.h @@ -218,7 +218,9 @@ typedef void (* nrfx_twi_evt_handler_t)(nrfx_twi_evt_t const * p_event, * @param[in] p_context Context passed to event handler. * * @retval NRFX_SUCCESS Initialization is successful. - * @retval NRFX_ERROR_INVALID_STATE The driver is in invalid state. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_BUSY Some other peripheral with the same * instance ID is already in use. This is * possible only if @ref nrfx_prs module @@ -249,6 +251,16 @@ nrfx_err_t nrfx_twi_reconfigure(nrfx_twi_t const * p_instance, */ void nrfx_twi_uninit(nrfx_twi_t const * p_instance); +/** + * @brief Function for checking if the TWI driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_twi_init_check(nrfx_twi_t const * p_instance); + /** * @brief Function for enabling the TWI instance. * @@ -376,11 +388,11 @@ NRFX_STATIC_INLINE nrfx_err_t nrfx_twi_bus_recover(uint32_t scl_pin, uint32_t sd * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_TWI_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_TWI_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_TWI_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TWI_INST_GET(\)), \, - * NRFX_TWI_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TWI_INST_GET(\)), \, + * NRFX_TWI_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(TWI, twi) diff --git a/drivers/include/nrfx_twim.h b/drivers/include/nrfx_twim.h index a36380bec..b6d65820b 100644 --- a/drivers/include/nrfx_twim.h +++ b/drivers/include/nrfx_twim.h @@ -49,14 +49,14 @@ extern "C" { * @brief Two Wire Interface Master with EasyDMA (TWIM) peripheral driver. */ -/** @brief Structure for the TWI master driver instance. */ +/** @brief Structure for the TWIM driver instance. */ typedef struct { NRF_TWIM_Type * p_twim; ///< Pointer to a structure with TWIM registers. uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only. } nrfx_twim_t; -/** @brief Macro for creating a TWI master driver instance. */ +/** @brief Macro for creating a TWIM driver instance. */ #define NRFX_TWIM_INSTANCE(id) \ { \ .p_twim = NRFX_CONCAT_2(NRF_TWIM, id), \ @@ -71,7 +71,7 @@ enum { }; #endif -/** @brief Structure for the TWI master driver instance configuration. */ +/** @brief Structure for the TWIM driver instance configuration. */ typedef struct { uint32_t scl_pin; ///< SCL pin number. @@ -129,7 +129,7 @@ typedef struct /** @brief Flag indicating that checks for spurious STOP condition will not be performed. */ #define NRFX_TWIM_FLAG_NO_SPURIOUS_STOP_CHECK (1UL << 6) -/** @brief TWI master driver event types. */ +/** @brief TWIM driver event types. */ typedef enum { NRFX_TWIM_EVT_DONE, ///< Transfer completed event. @@ -139,7 +139,7 @@ typedef enum NRFX_TWIM_EVT_BUS_ERROR ///< Error event: An unexpected transition occurred on the bus. } nrfx_twim_evt_type_t; -/** @brief TWI master driver transfer types. */ +/** @brief TWIM driver transfer types. */ typedef enum { NRFX_TWIM_XFER_TX, ///< TX transfer. @@ -148,7 +148,7 @@ typedef enum NRFX_TWIM_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start. } nrfx_twim_xfer_type_t; -/** @brief Structure for a TWI transfer descriptor. */ +/** @brief Structure for a TWIM transfer descriptor. */ typedef struct { nrfx_twim_xfer_type_t type; ///< Type of transfer. @@ -186,19 +186,19 @@ typedef struct #define NRFX_TWIM_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \ NRFX_TWIM_XFER_DESC(NRFX_TWIM_XFER_TXTX, addr, p_tx, tx_len, p_tx2, tx_len2) -/** @brief Structure for a TWI event. */ +/** @brief Structure for a TWIM event. */ typedef struct { nrfx_twim_evt_type_t type; ///< Event type. nrfx_twim_xfer_desc_t xfer_desc; ///< Transfer details. } nrfx_twim_evt_t; -/** @brief TWI event handler prototype. */ +/** @brief TWIM event handler prototype. */ typedef void (* nrfx_twim_evt_handler_t)(nrfx_twim_evt_t const * p_event, void * p_context); /** - * @brief Function for initializing the TWI driver instance. + * @brief Function for initializing the TWIM driver instance. * * @param[in] p_instance Pointer to the driver instance structure. * @param[in] p_config Pointer to the structure with the initial configuration. @@ -209,7 +209,9 @@ typedef void (* nrfx_twim_evt_handler_t)(nrfx_twim_evt_t const * p_event, * Pin assignments in the Product Specification. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE The driver is in invalid state. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_INVALID_PARAM Requested frequency is not available on the specified pins. * @retval NRFX_ERROR_BUSY Some other peripheral with the same * instance ID is already in use. This is @@ -222,7 +224,7 @@ nrfx_err_t nrfx_twim_init(nrfx_twim_t const * p_instance, void * p_context); /** - * @brief Function for reconfiguring the TWI instance. + * @brief Function for reconfiguring the TWIM instance. * * @param[in] p_instance Pointer to the driver instance structure. * @param[in] p_config Pointer to the structure with the configuration. @@ -235,28 +237,38 @@ nrfx_err_t nrfx_twim_reconfigure(nrfx_twim_t const * p_instance, nrfx_twim_config_t const * p_config); /** - * @brief Function for uninitializing the TWI instance. + * @brief Function for uninitializing the TWIM instance. * * @param[in] p_instance Pointer to the driver instance structure. */ void nrfx_twim_uninit(nrfx_twim_t const * p_instance); /** - * @brief Function for enabling the TWI instance. + * @brief Function for checking if the TWIM driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_twim_init_check(nrfx_twim_t const * p_instance); + +/** + * @brief Function for enabling the TWIM instance. * * @param[in] p_instance Pointer to the driver instance structure. */ void nrfx_twim_enable(nrfx_twim_t const * p_instance); /** - * @brief Function for disabling the TWI instance. + * @brief Function for disabling the TWIM instance. * * @param[in] p_instance Pointer to the driver instance structure. */ void nrfx_twim_disable(nrfx_twim_t const * p_instance); /** - * @brief Function for performing a TWI transfer. + * @brief Function for performing a TWIM transfer. * * The following transfer types can be configured (@ref nrfx_twim_xfer_desc_t.type): * - @ref NRFX_TWIM_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between). @@ -315,12 +327,12 @@ nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance, uint32_t flags); /** - * @brief Function for checking the TWI driver state. + * @brief Function for checking the TWIM driver state. * - * @param[in] p_instance TWI instance. + * @param[in] p_instance TWIM instance. * - * @retval true The TWI driver is currently busy performing a transfer. - * @retval false The TWI driver is ready for a new transfer. + * @retval true The TWIM driver is currently busy performing a transfer. + * @retval false The TWIM driver is ready for a new transfer. */ bool nrfx_twim_is_busy(nrfx_twim_t const * p_instance); @@ -393,11 +405,11 @@ NRFX_STATIC_INLINE nrfx_err_t nrfx_twim_bus_recover(uint32_t scl_pin, uint32_t s * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_TWIM_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_TWIM_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_TWIM_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TWIM_INST_GET(\)), \, - * NRFX_TWIM_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TWIM_INST_GET(\)), \, + * NRFX_TWIM_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(TWIM, twim) diff --git a/drivers/include/nrfx_twis.h b/drivers/include/nrfx_twis.h index 2b5bf2b54..c38fb49b7 100644 --- a/drivers/include/nrfx_twis.h +++ b/drivers/include/nrfx_twis.h @@ -184,10 +184,12 @@ typedef struct * It will be used by interrupts so make it sure that object * is not destroyed when function is leaving. * @param[in] p_config Pointer to the structure with the initial configuration. - * @param[in] event_handler Event handler provided by the user. + * @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled. * * @retval NRFX_SUCCESS Initialization is successful. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_BUSY Some other peripheral with the same * instance ID is already in use. This is * possible only if NRFX_PRS_ENABLED @@ -227,6 +229,16 @@ nrfx_err_t nrfx_twis_reconfigure(nrfx_twis_t const * p_instance, */ void nrfx_twis_uninit(nrfx_twis_t const * p_instance); +/** + * @brief Function for checking if the TWIS driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_twis_init_check(nrfx_twis_t const * p_instance); + /** * @brief Function for enabling the TWIS instance. * @@ -425,11 +437,11 @@ NRFX_STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance) * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_TWIS_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_TWIS_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_TWIS_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TWIS_INST_GET(\)), \, - * NRFX_TWIS_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TWIS_INST_GET(\)), \, + * NRFX_TWIS_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(TWIS, twis) diff --git a/drivers/include/nrfx_uart.h b/drivers/include/nrfx_uart.h index 378f46d62..e9bfe1aea 100644 --- a/drivers/include/nrfx_uart.h +++ b/drivers/include/nrfx_uart.h @@ -196,7 +196,9 @@ typedef void (*nrfx_uart_event_handler_t)(nrfx_uart_event_t const * p_event, * blocking mode. * * @retval NRFX_SUCCESS Initialization is successful. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. * @retval NRFX_ERROR_BUSY Some other peripheral with the same * instance ID is already in use. This is * possible only if @ref nrfx_prs module @@ -226,6 +228,16 @@ nrfx_err_t nrfx_uart_reconfigure(nrfx_uart_t const * p_instance, */ void nrfx_uart_uninit(nrfx_uart_t const * p_instance); +/** + * @brief Function for checking if the UART driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_uart_init_check(nrfx_uart_t const * p_instance); + /** * @brief Function for getting the address of the specified UART task. * @@ -414,11 +426,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_in * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_UART_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_UART_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_UART_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_UART_INST_GET(\)), \, - * NRFX_UART_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_UART_INST_GET(\)), \, + * NRFX_UART_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(UART, uart) diff --git a/drivers/include/nrfx_uarte.h b/drivers/include/nrfx_uarte.h index c85f5f9f5..6e9c61036 100644 --- a/drivers/include/nrfx_uarte.h +++ b/drivers/include/nrfx_uarte.h @@ -70,39 +70,193 @@ enum { .drv_inst_idx = NRFX_CONCAT_3(NRFX_UARTE, id, _INST_IDX), \ } +/**@defgroup NRFX_UARTE_RX_ENABLE_FLAGS Flags used for @ref nrfx_uarte_rx_enable. + * @{ */ + +/** + * @brief Flag for configuring continuous reception. + * + * When the flag is set, the ENDRX event is shortened with the STARTRX task. + * The flag should not be used together with short buffers in case there is a risk that a new buffer + * is not provided on time. If the flag is set and a new buffer is not provided on time, + * a receiver starts to overwrite the current buffer. If not set and a new buffer has been provided + * on time, a new transfer will be triggered from the ENDRX interrupt handler. + * This flag is recommended to be used with longer buffers to ensure lossless reception + * without HWFC detection. + */ +#define NRFX_UARTE_RX_ENABLE_CONT NRFX_BIT(0) + +/** + * @brief Flag indicating that receiver is stopped when new buffer is not provided. + * + * Setting a flag changes the behavior of the UARTE driver when receiving to the buffer is + * completed and a new buffer is not provided. When the flag is set, stopping is initiated. + * Since the stopping takes time, this operation can still be revoked by providing a new buffer + * (@ref nrfx_uarte_rx_buffer_set). When the flag is not set, then the receiver is kept enabled, and + * incoming data is put in the hardware FIFO (if HWFC is disabled) until FIFO is + * full and bytes are dropped. + */ +#define NRFX_UARTE_RX_ENABLE_STOP_ON_END NRFX_BIT(1) + +/** + * @brief Flag indicating that FIFO content that was flushed after the last stopping shall be kept. + * + * When a receiver is stopped, it is possible that there is some data in the hardware FIFO + * that was not stored in the user buffer due to the lack of capacity. As a result, that data + * is flushed to an internal buffer. If the flag is set, the flushed data is kept and copied into + * the user buffer. + * + * Using the flag makes the user to provide their buffer for flushed data during the initialization. + */ +#define NRFX_UARTE_RX_ENABLE_KEEP_FIFO_CONTENT NRFX_BIT(2) + +/**@} */ + +/**@defgroup NRFX_UARTE_TX_FLAGS Flags used for @ref nrfx_uarte_tx. + * + * Flags apply only if an instance is initialized with a user handler. Otherwise flags are + * ignored and all transfers are blocking. + * + * @{ */ + +/** + * @brief Flag indicating blocking transfer. + * + * When the flag is set, the transfer is synchronous even if the driver is configured + * to non-blocking operation. If UARTE is transmitting when the user requests blocking transfer, + * @ref NRFX_ERROR_BUSY is returned. A driver state is determined by hardware, thus it is + * accepted to poll the driver and continuously request blocking transfer until it + * is accepted. It can be done from any priority context. Blocking transfer returns + * when the buffer is transferred or when the user buffer is no longer in use + * (see @ref NRFX_UARTE_TX_EARLY_RETURN). + */ +#define NRFX_UARTE_TX_BLOCKING NRFX_BIT(0) + +/** + * @brief Flag indicating to return from blocking transfer not waiting for the last transmit event. + * + * The flag indicates a blocking transfer just like @ref NRFX_UARTE_TX_BLOCKING. + * However, when the flag is set, if the transfer is still ongoing and if the transfer of the last + * byte already has started, @ref nrfx_uarte_tx returns instead of waiting for the transfer to end. + */ +#define NRFX_UARTE_TX_EARLY_RETURN NRFX_BIT(1) + +/** + * @brief Flag indicating that the @ref nrfx_uarte_tx call will be linked to an active transfer. + * + * UARTE DMA registers are buffered which means that once transfer is started, registers with + * transfer details (pointer and length) can be overwritten. If that is combined with the (D)PPI + * connection between ENDTX and STARTTX events, then two transfers are linked together and + * bytes are transfer without any gap allowing to utilize the maximum bandwidth. + * + * When the flag is set, it indicates that the user setup ENDTX-STARTTX (D)PPI connection and + * wants to perform linked transfers. It is the user responsibility to disable the (D)PPI connection + * when the last transfer is started. It is also their responsibility to use this flag when there is + * already one ongoing transfer - otherwise, an error is returned. + * + * For example, if a sequence consists of three transfers, then the first @ref nrfx_uarte_tx + * is called without the flag and the following two transfers must have the flag set. The second + * @ref nrfx_uarte_tx may be called immediately after the first one and the third one after + * the first @ref NRFX_UARTE_EVT_TX_DONE event. After the second @ref NRFX_UARTE_EVT_TX_DONE + * event is received, (D)PPI connection must be disabled. + * + * When (D)PPI connection is used, then it is critical that (D)PPI connection is disabled on time, + * before the last transfer is completed. Otherwise, the transfer will be repeated, and unwanted data + * will be transferred. Hence, it is recommended to use longer buffers. Time needed to + * send the buffer must be longer than the maximum system latency. + * + * When the flag is used, then the driver instance must not use the ENDTX-STOPTX (D)PPI connection. + * + * When linked transfers are used, then blocking transfers (see @ref NRFX_UARTE_TX_BLOCKING and + * @ref NRFX_UARTE_TX_EARLY_RETURN) cannot be performed. An error is returned when the flag is set + * and the @ref nrfx_uarte_tx is called during ongoing blocking transfer. + * + * When this flag is used then driver instance must not use ENDTX-STOPTX (D)PPI connection. + * + * When linked transfers are used then blocking transfers (see @ref NRFX_UARTE_TX_BLOCKING and + * @ref NRFX_UARTE_TX_EARLY_RETURN) cannot be performed. Error is returned when @ref nrfx_uarte_tx + * is called with this flag set while there is on-going blocking transfer. + */ +#define NRFX_UARTE_TX_LINK NRFX_BIT(2) + +/**@} */ + +/**@defgroup NRFX_UARTE_TX_DONE_FLAGS Flags used for @ref nrfx_uarte_tx_evt_t. + * @{ */ + +/** @brief Flag indicating that TX transfer was aborted. */ +#define NRFX_UARTE_TX_DONE_ABORTED NRFX_BIT(0) + +/**@} */ + /** @brief Types of UARTE driver events. */ typedef enum { - NRFX_UARTE_EVT_TX_DONE, ///< Requested TX transfer completed. - NRFX_UARTE_EVT_RX_DONE, ///< Requested RX transfer completed. - NRFX_UARTE_EVT_ERROR, ///< Error reported by UART peripheral. + NRFX_UARTE_EVT_TX_DONE, ///< Requested TX transfer completed. + NRFX_UARTE_EVT_RX_DONE, ///< Requested RX transfer completed. + NRFX_UARTE_EVT_ERROR, ///< Error reported by UART peripheral. + NRFX_UARTE_EVT_RX_BUF_REQUEST, ///< Request for a RX buffer. + NRFX_UARTE_EVT_RX_DISABLED, ///< Receiver is disabled. + NRFX_UARTE_EVT_RX_BUF_TOO_LATE, ///< RX buffer request handled too late. + NRFX_UARTE_EVT_TRIGGER, ///< Result of @ref nrfx_uarte_int_trigger. } nrfx_uarte_evt_type_t; +/** @brief Structure used internally to handle reception through cache buffers. */ +typedef struct +{ + nrfy_uarte_buffer_t user[2]; ///< User buffers. + nrfy_uarte_buffer_t cache[2]; ///< Cache buffers. + size_t cache_len; ///< Single cache buffer length. + size_t started; ///< Used for tracking progress of the current user buffer. + size_t received; ///< Amount of received data in the current user buffer. + uint8_t idx; ///< Used for determining which cache buffer to use. + bool buf_req; ///< Flag indicate that next user buffer should be requested. +} nrfx_uarte_rx_cache_t; + /** @brief Structure for the UARTE configuration. */ typedef struct { - uint32_t txd_pin; ///< TXD pin number. - uint32_t rxd_pin; ///< RXD pin number. - uint32_t rts_pin; ///< RTS pin number. - uint32_t cts_pin; ///< CTS pin number. - void * p_context; ///< Context passed to interrupt handler. - nrf_uarte_baudrate_t baudrate; ///< Baud rate. - uint8_t interrupt_priority; ///< Interrupt priority. - nrf_uarte_config_t config; ///< Peripheral configuration. - bool skip_gpio_cfg; ///< Skip GPIO configuration of pins. - /**< When set to true, the driver does not modify - * any GPIO parameters of the used pins. Those - * parameters are supposed to be configured - * externally before the driver is initialized. */ - bool skip_psel_cfg; ///< Skip pin selection configuration. - /**< When set to true, the driver does not modify - * pin select registers in the peripheral. - * Those registers are supposed to be set up - * externally before the driver is initialized. - * @note When both GPIO configuration and pin - * selection are to be skipped, the structure - * fields that specify pins can be omitted, - * as they are ignored anyway. */ + uint32_t txd_pin; ///< TXD pin number. + uint32_t rxd_pin; ///< RXD pin number. + uint32_t rts_pin; ///< RTS pin number. + uint32_t cts_pin; ///< CTS pin number. + void * p_context; ///< Context passed to interrupt handler. + nrfy_uarte_buffer_t tx_cache; ///< TX cache buffer. + nrfy_uarte_buffer_t rx_cache; ///< RX cache buffer. + /**< A buffer to store flushed RX data. The buffer is also + * used when the input RX buffer is from an address space + * that cannot be handled by the DMA. + * A buffer size must be at least 5 bytes which is the + * size of the HW FIFO, and should be bigger if + * expected to be used as cache when an input RX buffer + * cannot be used for the DMA. If not provided, + * then bytes left in the FIFO after a receiver is + * disabled will be discarded, and reception will not + * be performed if the input RX buffer cannot be used by + * the DMA. */ + nrfx_uarte_rx_cache_t * p_rx_cache_scratch; /**< Static RAM memory area used for receiving data + * through RX cache buffer. Can be NULL if RX + * caching is not used. */ + nrf_uarte_baudrate_t baudrate; ///< Baud rate. + nrf_uarte_config_t config; ///< Peripheral configuration. + bool skip_psel_cfg; ///< Skip pin selection configuration. + /**< When set to true, the driver does not modify + * pin select registers in the peripheral. + * Those registers are supposed to be set up + * externally before the driver is initialized. + * @note When both GPIO configuration and pin + * selection are to be skipped, the structure + * fields that specify pins can be omitted, + * as they are ignored anyway. */ + bool skip_gpio_cfg; ///< Skip GPIO configuration of pins. + /**< When set to true, the driver does not modify + * any GPIO parameters of the used pins. Those + * parameters are supposed to be configured + * externally before the driver is initialized. */ + bool tx_stop_on_end; ///< Indicates that the STOPTX task is PPIed with ENDTX event + /**< If SHORT exists, then it will be used by the driver, + * otherwise (D)PPI connection must be setup by the user. */ + uint8_t interrupt_priority; ///< Interrupt priority. } nrfx_uarte_config_t; /** @@ -124,8 +278,18 @@ typedef struct .rts_pin = NRF_UARTE_PSEL_DISCONNECTED, \ .cts_pin = NRF_UARTE_PSEL_DISCONNECTED, \ .p_context = NULL, \ + .tx_cache = \ + { \ + .p_buffer = NULL, \ + .length = 0 \ + }, \ + .rx_cache = \ + { \ + .p_buffer = NULL, \ + .length = 0 \ + }, \ + .p_rx_cache_scratch = NULL, \ .baudrate = NRF_UARTE_BAUDRATE_115200, \ - .interrupt_priority = NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY, \ .config = \ { \ .hwfc = NRF_UARTE_HWFC_DISABLED, \ @@ -135,39 +299,60 @@ typedef struct NRFX_COND_CODE_1(NRFX_ARG_HAS_PARENTHESIS(UARTE_CONFIG_PARITYTYPE_Msk), \ (.paritytype = NRF_UARTE_PARITYTYPE_EVEN,), ()) \ }, \ + .skip_psel_cfg = false, \ + .skip_gpio_cfg = false, \ + .tx_stop_on_end = false, \ + .interrupt_priority = NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY \ } -/** @brief Structure for the UARTE transfer completion event. */ +/** @brief Structure for @ref NRFX_UARTE_EVT_RX_DONE event. */ +typedef struct +{ + uint8_t * p_buffer; ///< Pointer to the received data. + size_t length; ///< Amount of received data. +} nrfx_uarte_rx_evt_t; + +/** @brief Structure for the @ref NRFX_UARTE_EVT_TX_DONE event. */ typedef struct { - uint8_t * p_data; ///< Pointer to memory used for transfer. - size_t bytes; ///< Number of bytes transfered. -} nrfx_uarte_xfer_evt_t; + const uint8_t * p_buffer; ///< Pointer to the transferred data. + size_t length; ///< Amount of transferred data. + uint32_t flags; ///< Flags. See @ref NRFX_UARTE_TX_DONE_FLAGS. +} nrfx_uarte_tx_evt_t; -/** @brief Structure for UARTE error event. */ +/** @brief Structure for the @ref NRFX_UARTE_EVT_ERROR. */ typedef struct { - nrfx_uarte_xfer_evt_t rx; ///< Transfer details, including number of bytes received. - uint32_t error_mask; ///< Mask of error flags that generated the event. + nrfy_uarte_buffer_t rx; ///< Transfer details, including number of bytes received. + uint32_t error_mask; ///< Mask of error flags that generated the event. } nrfx_uarte_error_evt_t; +/** @brief Structure for the @ref NRFX_UARTE_EVT_RX_DISABLED. */ +typedef struct +{ + size_t flush_cnt; ///< Number of bytes flushed from RX FIFO. + /**< They will be copied to the next provided buffer if + * @ref NRFX_UARTE_RX_ENABLE_KEEP_FIFO_CONTENT is set. */ +} nrfx_uarte_rx_disabled_evt_t; + /** @brief Structure for UARTE event. */ typedef struct { nrfx_uarte_evt_type_t type; ///< Event type. union { - nrfx_uarte_xfer_evt_t rx; ///< Data provided for RX completion events. - nrfx_uarte_xfer_evt_t tx; ///< Data provided for TX completion events. - nrfx_uarte_error_evt_t error; ///< Data provided for error event. - } data; ///< Union to store event data. + nrfx_uarte_rx_evt_t rx; ///< Data for @ref NRFX_UARTE_EVT_RX_DONE. + nrfx_uarte_tx_evt_t tx; ///< Data for @ref NRFX_UARTE_EVT_TX_DONE. + nrfx_uarte_error_evt_t error; ///< Data for @ref NRFX_UARTE_EVT_ERROR. + nrfx_uarte_rx_disabled_evt_t rx_disabled; ///< Data for @ref NRFX_UARTE_EVT_RX_DISABLED. + } data; ///< Union to store event data. } nrfx_uarte_event_t; /** * @brief UARTE interrupt event handler. * - * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available - * only within the context of the event handler. + * @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is + * available only within the context of the event handler. * @param[in] p_context Context passed to the interrupt handler, set on initialization. */ typedef void (*nrfx_uarte_event_handler_t)(nrfx_uarte_event_t const * p_event, @@ -176,7 +361,7 @@ typedef void (*nrfx_uarte_event_handler_t)(nrfx_uarte_event_t const * p_event, /** * @brief Function for initializing the UARTE driver. * - * This function configures and enables UARTE. After this function GPIO pins are controlled by UARTE. + * This function configures UARTE but peripheral is kept disabled to reduce power consumption. * * @param[in] p_instance Pointer to the driver instance structure. * @param[in] p_config Pointer to the structure with the initial configuration. @@ -184,7 +369,10 @@ typedef void (*nrfx_uarte_event_handler_t)(nrfx_uarte_event_t const * p_event, * blocking mode. * * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_INVALID_STATE Driver is already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. + * @retval NRFX_ERROR_INVALID_PARAM Invalid configuration. * @retval NRFX_ERROR_BUSY Some other peripheral with the same * instance ID is already in use. This is * possible only if @ref nrfx_prs module @@ -214,6 +402,16 @@ nrfx_err_t nrfx_uarte_reconfigure(nrfx_uarte_t const * p_instance, */ void nrfx_uarte_uninit(nrfx_uarte_t const * p_instance); +/** + * @brief Function for checking if the UARTE driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_uarte_init_check(nrfx_uarte_t const * p_instance); + /** * @brief Function for getting the address of the specified UARTE task. * @@ -240,14 +438,17 @@ NRFX_STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_ * @brief Function for sending data over UARTE. * * If an event handler is provided in nrfx_uarte_init() call, this function - * returns immediately and the handler is called when the transfer is done. - * Otherwise, the transfer is performed in blocking mode, that is this function - * returns when the transfer is finished. Blocking mode is not using interrupt - * so there is no context switching inside the function. + * returns immediately (unless special flags are used) and the handler is called when the transfer + * is done. Otherwise, the transfer is performed in blocking mode, that is, this function + * returns when the transfer is finished. * * @note Peripherals using EasyDMA (including UARTE) require the transfer buffers * to be placed in the Data RAM region. If this condition is not met, - * this function will fail with the error code NRFX_ERROR_INVALID_ADDR. + * this function will attempt to use the cache buffer provided in the configuration + * and if it is not available it will return error. + * + * @note To achieve the lowest power consumption, transmitter is stopped and peripheral is disabled + * (if receiver is not used) when transfer is completed. * * @param[in] p_instance Pointer to the driver instance structure. * @param[in] p_data Pointer to data. @@ -255,13 +456,18 @@ NRFX_STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_ * dependent on the used SoC (see the MAXCNT register * description in the Product Specification). The driver * checks it with assertion. - * @param[in] flags Transfer options (0 for default settings). - * - * @retval NRFX_SUCCESS Initialization was successful. - * @retval NRFX_ERROR_BUSY Driver is already transferring. - * @retval NRFX_ERROR_FORBIDDEN The transfer was aborted from a different context - * (blocking mode only). - * @retval NRFX_ERROR_INVALID_ADDR p_data does not point to RAM buffer. + * @param[in] flags Option flags. See @ref NRFX_UARTE_TX_FLAGS. + * + * @retval NRFX_SUCCESS Initialization was successful. + * @retval NRFX_ERROR_BUSY Driver is busy transferring the data. + * @retval NRFX_ERROR_FORBIDDEN The transfer was aborted from a different context + * (blocking mode only) or transfer cannot be performed due to + * driver state, configuration or transfer parameters. + * @retval NRFX_ERROR_INVALID_ADDR p_data does not point to RAM buffer and cache buffer is not + * provided or attempted to use non DMA buffer with linked + * transfer (see @ref NRFX_UARTE_TX_LINK). + * @retval NRFX_ERROR_INVALID_LENGTH Flag @ref NRFX_UARTE_TX_EARLY_RETURN is used + * but @p length exceeds internal buffer size. */ nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance, uint8_t const * p_data, @@ -280,17 +486,66 @@ bool nrfx_uarte_tx_in_progress(nrfx_uarte_t const * p_instance); /** * @brief Function for aborting any ongoing transmission. - * @note @ref NRFX_UARTE_EVT_TX_DONE event will be generated in non-blocking mode. - * It will contain number of bytes sent until the abort was called. The event - * handler will be called from the UARTE interrupt context. + * + * @note When abortion is not synchronous, the @ref NRFX_UARTE_EVT_TX_DONE event will be generated + * in non-blocking mode. It will contain the number of bytes sent until the abort was called. + * If @ref NRFX_UARTE_TX_LINK flag was used for the transfer and linked transfer have not + * started yet, there will be the second @ref NRFX_UARTE_EVT_TX_DONE event with length equal + * to 0. The event handler will be called from the UARTE interrupt context. * * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] sync For future use. + * @param[in] sync If true operation is synchronous. Transmitter is stopped upon + * function return and no event is generated. * - * @retval NRFX_SUCCESS Successfully initiated abort. + * @retval NRFX_SUCCESS Successfully initiated abort or when transmitter synchronously + * stopped. + * @retval NRFX_ERROR_INVALID_STATE Attempt to asynchronously abort when no transfer is active. */ nrfx_err_t nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance, bool sync); +/** + * @brief Function for enabling the receiver. + * + * The event handler will be called from the caller context with + * the @ref NRFX_UARTE_EVT_RX_BUF_REQUEST event. The user may respond and provide a buffer + * using @ref nrfx_uarte_rx_buffer_set. An error is returned if buffer is not provided. After that, + * the receiver is started and another @ref NRFX_UARTE_EVT_RX_BUF_REQUEST is generated. + * If a new buffer is not provided, then the receiver is disabled once the first buffer + * becomes full. If a new buffer is provided, then the receiver will seamlessly switch to + * a new buffer (using a hardware shortcut). + * + * @note If transmitter is inactive then peripheral is disabled after receiver is stopped to achieve + * the lowest power consumption. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] flags Option flags. See @ref NRFX_UARTE_RX_ENABLE_FLAGS. + * + * @retval NRFX_SUCCESS Receiver successfully enabled. + * @retval NRFX_ERROR_BUSY When receiver is already enabled. + * @retval NRFX_ERROR_NO_MEM When buffer was not provided. + */ +nrfx_err_t nrfx_uarte_rx_enable(nrfx_uarte_t const * p_instance, uint32_t flags); + +/** + * @brief Function for providing reception buffer. + * + * The function should be called as a response to the @ref NRFX_UARTE_EVT_RX_BUF_REQUEST event. + * If the function is called before enabling the receiver, the first buffer is configured. + * If the function is called and there is no active buffer but the receiver is enabled + * but not started, it starts reception. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_data Pointer to a buffer. + * @param[in] length Buffer length. + * + * @retval NRFX_SUCCESS Buffer successfully set. + * @retval NRFX_ERROR_INVALID_STATE Buffer provided without pending request. + * @retval NRFX_ERROR_TIMEOUT Buffer provided too late. Receiver is being disabled. + */ +nrfx_err_t nrfx_uarte_rx_buffer_set(nrfx_uarte_t const * p_instance, + uint8_t * p_data, + size_t length); + /** * @brief Function for receiving data over UARTE. * @@ -317,6 +572,8 @@ nrfx_err_t nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance, bool sync); * To prevent this from happening, keep the UARTE interrupt latency low * or use large enough reception buffers. * + * @deprecated Use @ref nrfx_uarte_rx_enable and @ref nrfx_uarte_rx_buffer_set. + * * @param[in] p_instance Pointer to the driver instance structure. * @param[in] p_data Pointer to data. * @param[in] length Number of bytes to receive. Maximum possible length is @@ -337,21 +594,22 @@ nrfx_err_t nrfx_uarte_rx(nrfx_uarte_t const * p_instance, uint8_t * p_data, size_t length); - - /** * @brief Function for testing the receiver state in blocking mode. * * @param[in] p_instance Pointer to the driver instance structure. - * @param[out] p_rx_amount For future use. + * @param[out] p_rx_amount Pointer to the variable to be filled with the number of received bytes. + * Can be NULL. * - * @retval NRFX_SUCCESS The receiving operation is completed. - * @retval NRFX_ERROR_BUSY The receiver did not complete the operation. + * @retval NRFX_SUCCESS The receiving operation is completed. + * @retval NRFX_ERROR_BUSY The receiver did not complete the operation. + * @retval NRFX_ERROR_FORBIDDEN Operation is not supporting in the current configuration. */ nrfx_err_t nrfx_uarte_rx_ready(nrfx_uarte_t const * p_instance, size_t * p_rx_amount); /** * @brief Function for aborting any ongoing reception. + * * @note @ref NRFX_UARTE_EVT_RX_DONE event will be generated in non-blocking mode. * It will contain number of bytes received until the abort was called. The event * handler will be called from the UARTE interrupt context. @@ -367,17 +625,22 @@ nrfx_err_t nrfx_uarte_rx_ready(nrfx_uarte_t const * p_instance, size_t * p_rx_am * or use large enough reception buffers. * * @param[in] p_instance Pointer to the driver instance structure. - * @param[in] disable_all For future use. - * @param[in] sync For future use. + * @param[in] disable_all If true, UARTE is stopped. If false and there is a second RX buffer provided, + * only the first transfer is stopped. + * @param[in] sync If true, receiver is disabled synchronously. * - * @retval NRFX_SUCCESS Successfully initiated abort. + * @retval NRFX_SUCCESS Successfully initiate disabling or disabled (synchronous mode). + * @retval NRFX_ERROR_INVALID_STATE Receiver was not enabled. */ nrfx_err_t nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance, bool disable_all, bool sync); /** - * @brief Function for reading error source mask. Mask contains values from @ref nrf_uarte_error_mask_t. - * @note Function must be used in the blocking mode only. In case of non-blocking mode, an error event is - * generated. Function clears error sources after reading. + * @brief Function for reading error source mask. + * + * Mask contains values from @ref nrf_uarte_error_mask_t. + * + * @note Function must be used in the blocking mode only. In case of non-blocking mode, an error + * event is generated. Function clears error sources after reading. * * @param[in] p_instance Pointer to the driver instance structure. * @@ -385,6 +648,30 @@ nrfx_err_t nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance, bool disable_all */ uint32_t nrfx_uarte_errorsrc_get(nrfx_uarte_t const * p_instance); +/** + * @brief Function for checking if there was new RX data since the last check. + * + * Function checks @ref NRF_UARTE_EVENT_RXDRDY event and clears it if it was set. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true At least one byte was received since the last check. + * @retval false No new data was received since the last check. + */ +bool nrfx_uarte_rx_new_data_check(nrfx_uarte_t const * p_instance); + +/** + * @brief Function for triggering UARTE interrupt. + * + * Function can be used to jump into UARTE interrupt context. User handler is + * called with the event @ref NRFX_UARTE_EVT_TRIGGER. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval NRFX_ERROR_FORBIDDEN Failure. User handler is not configured. + * @retval NRFX_SUCCESS If interrupt is successfully triggered. + */ +nrfx_err_t nrfx_uarte_int_trigger(nrfx_uarte_t const * p_instance); #ifndef NRFX_DECLARE_ONLY NRFX_STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance, @@ -418,11 +705,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_ * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_UARTE_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_UARTE_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_UARTE_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_UARTE_INST_GET(\)), \, - * NRFX_UARTE_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_UARTE_INST_GET(\)), \, + * NRFX_UARTE_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(UARTE, uarte) diff --git a/drivers/include/nrfx_usbd.h b/drivers/include/nrfx_usbd.h index 3e7463fa2..3a8faac08 100644 --- a/drivers/include/nrfx_usbd.h +++ b/drivers/include/nrfx_usbd.h @@ -388,7 +388,9 @@ typedef struct * @param[in] event_handler Event handler provided by the user. Cannot be null. * * @retval NRFX_SUCCESS Initialization successful. - * @retval NRFX_ERROR_INVALID_STATE Driver was already initialized. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. */ nrfx_err_t nrfx_usbd_init(nrfx_usbd_event_handler_t event_handler); @@ -397,6 +399,14 @@ nrfx_err_t nrfx_usbd_init(nrfx_usbd_event_handler_t event_handler); */ void nrfx_usbd_uninit(void); +/** + * @brief Function for checking if the USBD driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_usbd_init_check(void); + /** * @brief Enable the USBD port. * diff --git a/drivers/include/nrfx_usbreg.h b/drivers/include/nrfx_usbreg.h index 3c07cf52c..520eb3bae 100644 --- a/drivers/include/nrfx_usbreg.h +++ b/drivers/include/nrfx_usbreg.h @@ -119,6 +119,14 @@ void nrfx_usbreg_disable(void); */ void nrfx_usbreg_uninit(void); +/** + * @brief Function for checking if the USBREG driver is initialized. + * + * @retval true Driver is already initialized. + * @retval false Driver is not initialized. + */ +bool nrfx_usbreg_init_check(void); + /** * @brief Function for getting the status of USBREG. * diff --git a/drivers/include/nrfx_wdt.h b/drivers/include/nrfx_wdt.h index 01a88154d..259060620 100644 --- a/drivers/include/nrfx_wdt.h +++ b/drivers/include/nrfx_wdt.h @@ -53,6 +53,13 @@ extern "C" { * @brief Watchdog Timer (WDT) peripheral driver. */ +#if NRF_WDT_HAS_STOP || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether watchdog stopping is supported. */ +#define NRFX_WDT_HAS_STOP 1 +#else +#define NRFX_WDT_HAS_STOP 0 +#endif + #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) || defined(__NRFX_DOXYGEN__) /** @brief WDT instance interrupt priority configuration. */ #define NRFX_WDT_IRQ_CONFIG .interrupt_priority = NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY @@ -60,13 +67,32 @@ extern "C" { #define NRFX_WDT_IRQ_CONFIG #endif +#if NRFX_API_VER_AT_LEAST(3, 2, 0) +/** + * @brief WDT event handler function type. + * + * @param[in] event_type WDT event. + * @param[in] requests Value of the request status register. Bits that have been set can be + * used to determine which RR (Reload Request) register was the reason + * for timeout event. + * Valid only when @ref NRF_WDT_EVENT_TIMEOUT is passed in @p event_type. + * @param[in] p_context User context. + */ +typedef void (*nrfx_wdt_event_handler_t)(nrf_wdt_event_t event_type, + uint32_t requests, + void * p_context); +#else /** * @brief WDT event handler function type. * - * @param[in] requests Value of the request status register. Set bits can be used to determine - * which RR register was the reason for timeout event. + * @deprecated Use new variant instead. + * + * @param[in] requests Value of the request status register. Bits that have been set can be + * used to determine which RR (Reload Request) register was the reason + * for timeout event. */ typedef void (*nrfx_wdt_event_handler_t)(uint32_t requests); +#endif /** @brief WDT channel ID type. */ typedef nrf_wdt_rr_register_t nrfx_wdt_channel_id; @@ -93,13 +119,13 @@ enum { .drv_inst_idx = NRFX_CONCAT_3(NRFX_WDT, id, _INST_IDX), \ } -/** @brief Struct for WDT initialization. */ +/** @brief Structure for WDT initialization. */ typedef struct { - uint32_t behaviour; /**< WDT behaviour flags bitmask, constructed from @ref nrf_wdt_behaviour_mask_t. */ - uint32_t reload_value; /**< WDT reload value in ms. */ + uint32_t behaviour; ///< WDT behavior flags bitmask, constructed from @ref nrf_wdt_behaviour_mask_t. + uint32_t reload_value; ///< WDT reload value in milliseconds. #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) || defined(__NRFX_DOXYGEN__) - uint8_t interrupt_priority; /**< WDT interrupt priority */ + uint8_t interrupt_priority; ///< WDT interrupt priority. #endif } nrfx_wdt_config_t; @@ -117,6 +143,7 @@ typedef struct NRFX_WDT_IRQ_CONFIG \ } +#if NRFX_API_VER_AT_LEAST(3, 2, 0) /** * @brief Function for initializing the WDT driver instance. * @@ -126,6 +153,30 @@ typedef struct * using @ref nrfx_wdt_reconfigure. * @param[in] wdt_event_handler Event handler provided by the user. Ignored when * @ref NRFX_WDT_CONFIG_NO_IRQ option is enabled. + * @param[in] p_context User context passed in event handler. Ignored when + * @ref NRFX_WDT_CONFIG_NO_IRQ option is enabled. + * + * @retval NRFX_SUCCESS Initialization was successful. + * @retval NRFX_ERROR_ALREADY The driver is already initialized. + * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized. + * @deprecated Use @ref NRFX_ERROR_ALREADY instead. + */ +nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const * p_instance, + nrfx_wdt_config_t const * p_config, + nrfx_wdt_event_handler_t wdt_event_handler, + void * p_context); +#else +/** + * @brief Function for initializing the WDT driver instance. + * + * @deprecated Use new variant instead. + * + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] p_config Pointer to the structure with the initial configuration. + * NULL if configuration is to be skipped and will be done later + * using @ref nrfx_wdt_reconfigure. + * @param[in] wdt_event_handler Event handler provided by the user. Ignored when + * @ref NRFX_WDT_CONFIG_NO_IRQ option is enabled. * * @retval NRFX_SUCCESS Initialization was successful. * @retval NRFX_ERROR_INVALID_STATE The driver was already initialized. @@ -133,6 +184,26 @@ typedef struct nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const * p_instance, nrfx_wdt_config_t const * p_config, nrfx_wdt_event_handler_t wdt_event_handler); +#endif + +/** + * @brief Function for uninitializing the WDT driver instance. + * + * The instance can be uninitialized only when not running. + * + * @param[in] p_instance Pointer to the driver instance structure. + */ +void nrfx_wdt_uninit(nrfx_wdt_t const * p_instance); + +/** + * @brief Function for checking if the WDT driver instance is initialized. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval true Instance is already initialized. + * @retval false Instance is not initialized. + */ +bool nrfx_wdt_init_check(nrfx_wdt_t const * p_instance); /** * @brief Function for reconfiguring the watchdog. @@ -182,13 +253,25 @@ void nrfx_wdt_enable(nrfx_wdt_t const * p_instance); void nrfx_wdt_feed(nrfx_wdt_t const * p_instance); /** - * @brief Function for feeding an invidual watchdog channel. + * @brief Function for feeding an individual watchdog channel. * * @param[in] p_instance Pointer to the driver instance structure. * @param[in] channel_id ID of watchdog channel. */ void nrfx_wdt_channel_feed(nrfx_wdt_t const * p_instance, nrfx_wdt_channel_id channel_id); +#if NRFX_WDT_HAS_STOP +/** + * @brief Function for stopping the watchdog. + * + * @param[in] p_instance Pointer to the driver instance structure. + * + * @retval NRFX_SUCCESS Watchdog has been successfully stopped. + * @retval NRFX_ERROR_FORBIDDEN Configuration does not allow for stopping the watchdog. + */ +nrfx_err_t nrfx_wdt_stop(nrfx_wdt_t const * p_instance); +#endif + /** * @brief Function for returning a requested task address for the WDT driver module. * @@ -243,11 +326,11 @@ NRFX_STATIC_INLINE uint32_t nrfx_wdt_event_address_get(nrfx_wdt_t const * p_inst * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_WDT_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_WDT_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_WDT_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_WDT_INST_GET(\)), \, - * NRFX_WDT_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_WDT_INST_GET(\)), \, + * NRFX_WDT_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(WDT, wdt) diff --git a/drivers/nrfx_common.h b/drivers/nrfx_common.h index ae58dad52..eb968da87 100644 --- a/drivers/nrfx_common.h +++ b/drivers/nrfx_common.h @@ -43,6 +43,7 @@ #include #include "nrfx_utils.h" #include +#include #include "nrfx_ext.h" #ifdef __cplusplus @@ -58,7 +59,7 @@ extern "C" { #endif #if defined(ISA_RISCV) -#define __STATIC_INLINE static inline +#define __STATIC_INLINE __attribute__((always_inline)) static inline #endif #ifndef NRFX_STATIC_INLINE @@ -135,7 +136,7 @@ extern "C" { * * @return Bit mask. */ -#define NRFX_BIT_MASK(x) (((x) == 32) ? UINT32_MAX : ((1UL << x) - 1)) +#define NRFX_BIT_MASK(x) (((x) == 32) ? UINT32_MAX : ((1UL << (x)) - 1)) /** * @brief Macro for returning size in bits for given size in bytes. @@ -250,8 +251,8 @@ extern "C" { /** * @brief Macro for resolving provided user macro for present instances of a peripheral. * - * Macro checks if peripheral instances are present by checking if there is - * \\_PRESENT define set to 1. + * Macro checks if peripheral instances are present by checking if there is a token + * NRF_\\ defined with wrapped in parenthesis value. * * Macro supports check on instances with following names: * - \0 - \255 - e.g. SPIM0, SPIM255 diff --git a/drivers/nrfx_errors.h b/drivers/nrfx_errors.h index d5c791cd2..abf7f416c 100644 --- a/drivers/nrfx_errors.h +++ b/drivers/nrfx_errors.h @@ -52,23 +52,24 @@ /** @brief Enumerated type for error codes. */ typedef enum { - NRFX_SUCCESS = (NRFX_ERROR_BASE_NUM + 0), ///< Operation performed successfully. - NRFX_ERROR_INTERNAL = (NRFX_ERROR_BASE_NUM + 1), ///< Internal error. - NRFX_ERROR_NO_MEM = (NRFX_ERROR_BASE_NUM + 2), ///< No memory for operation. - NRFX_ERROR_NOT_SUPPORTED = (NRFX_ERROR_BASE_NUM + 3), ///< Not supported. - NRFX_ERROR_INVALID_PARAM = (NRFX_ERROR_BASE_NUM + 4), ///< Invalid parameter. - NRFX_ERROR_INVALID_STATE = (NRFX_ERROR_BASE_NUM + 5), ///< Invalid state, operation disallowed in this state. - NRFX_ERROR_INVALID_LENGTH = (NRFX_ERROR_BASE_NUM + 6), ///< Invalid length. - NRFX_ERROR_TIMEOUT = (NRFX_ERROR_BASE_NUM + 7), ///< Operation timed out. - NRFX_ERROR_FORBIDDEN = (NRFX_ERROR_BASE_NUM + 8), ///< Operation is forbidden. - NRFX_ERROR_NULL = (NRFX_ERROR_BASE_NUM + 9), ///< Null pointer. - NRFX_ERROR_INVALID_ADDR = (NRFX_ERROR_BASE_NUM + 10), ///< Bad memory address. - NRFX_ERROR_BUSY = (NRFX_ERROR_BASE_NUM + 11), ///< Busy. - NRFX_ERROR_ALREADY_INITIALIZED = (NRFX_ERROR_BASE_NUM + 12), ///< Module already initialized. + NRFX_SUCCESS = (NRFX_ERROR_BASE_NUM + 0), ///< Operation performed successfully. + NRFX_ERROR_INTERNAL = (NRFX_ERROR_BASE_NUM + 1), ///< Internal error. + NRFX_ERROR_NO_MEM = (NRFX_ERROR_BASE_NUM + 2), ///< No memory for operation. + NRFX_ERROR_NOT_SUPPORTED = (NRFX_ERROR_BASE_NUM + 3), ///< Not supported. + NRFX_ERROR_INVALID_PARAM = (NRFX_ERROR_BASE_NUM + 4), ///< Invalid parameter. + NRFX_ERROR_INVALID_STATE = (NRFX_ERROR_BASE_NUM + 5), ///< Invalid state, operation disallowed in this state. + NRFX_ERROR_INVALID_LENGTH = (NRFX_ERROR_BASE_NUM + 6), ///< Invalid length. + NRFX_ERROR_TIMEOUT = (NRFX_ERROR_BASE_NUM + 7), ///< Operation timed out. + NRFX_ERROR_FORBIDDEN = (NRFX_ERROR_BASE_NUM + 8), ///< Operation is forbidden. + NRFX_ERROR_NULL = (NRFX_ERROR_BASE_NUM + 9), ///< Null pointer. + NRFX_ERROR_INVALID_ADDR = (NRFX_ERROR_BASE_NUM + 10), ///< Bad memory address. + NRFX_ERROR_BUSY = (NRFX_ERROR_BASE_NUM + 11), ///< Busy. + NRFX_ERROR_ALREADY = (NRFX_ERROR_BASE_NUM + 12), ///< Operation already done. + NRFX_ERROR_ALREADY_INITIALIZED = NRFX_ERROR_ALREADY, ///< @deprecated Use @ref NRFX_ERROR_ALREADY instead. - NRFX_ERROR_DRV_TWI_ERR_OVERRUN = (NRFX_ERROR_DRIVERS_BASE_NUM + 0), ///< TWI error: Overrun. - NRFX_ERROR_DRV_TWI_ERR_ANACK = (NRFX_ERROR_DRIVERS_BASE_NUM + 1), ///< TWI error: Address not acknowledged. - NRFX_ERROR_DRV_TWI_ERR_DNACK = (NRFX_ERROR_DRIVERS_BASE_NUM + 2) ///< TWI error: Data not acknowledged. + NRFX_ERROR_DRV_TWI_ERR_OVERRUN = (NRFX_ERROR_DRIVERS_BASE_NUM + 0), ///< TWI error: Overrun. + NRFX_ERROR_DRV_TWI_ERR_ANACK = (NRFX_ERROR_DRIVERS_BASE_NUM + 1), ///< TWI error: Address not acknowledged. + NRFX_ERROR_DRV_TWI_ERR_DNACK = (NRFX_ERROR_DRIVERS_BASE_NUM + 2) ///< TWI error: Data not acknowledged. } nrfx_err_t; /** @} */ diff --git a/drivers/nrfx_utils_internal.h b/drivers/nrfx_utils_internal.h index cc1a90739..580163c85 100644 --- a/drivers/nrfx_utils_internal.h +++ b/drivers/nrfx_utils_internal.h @@ -163,7 +163,8 @@ #define _NRFX_IRQ_HANDLER(periph_name, prefix, i, periph_name_small) \ void NRFX_CONCAT(nrfx_, periph_name_small, _, prefix, i, _irq_handler)(void) \ { \ - irq_handler(NRFX_CONCAT(NRF_, periph_name, prefix, i), \ + irq_handler(NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(NRFX_CONCAT(periph_name, prefix, i)), \ + (NRFX_CONCAT(NRF_, periph_name, prefix, i)), (NULL)), \ &m_cb[NRFX_CONCAT(NRFX_, periph_name, prefix, i, _INST_IDX)]); \ } @@ -195,10 +196,22 @@ void NRFX_CONCAT(nrfx_, periph_name_small, _, prefix, i, _irq_handler)(void) \ #define _NRFX_IRQ_HANDLER_DECLARE(periph_name, prefix, i, periph_name_small) \ void NRFX_CONCAT(nrfx_, periph_name_small, _, prefix, i, _irq_handler)(void); -/* Macro for getting third argument from the set of input arguments. */ +/* Macro for getting the fourth argument from the set of input arguments. */ +#define __NRFX_GET_ARG4(arg1, arg2, arg3, arg4...) arg4 +#define _NRFX_GET_ARG4(...) __NRFX_GET_ARG4(__VA_ARGS__) + +/* Macro for getting the third argument from the set of input arguments. */ #define __NRFX_GET_ARG3(arg1, arg2, arg3, ...) arg3 #define _NRFX_GET_ARG3(...) __NRFX_GET_ARG3(__VA_ARGS__) +/* Macro for getting the second argument from the set of input arguments. */ +#define __NRFX_GET_ARG2(arg1, arg2, ...) arg2 +#define _NRFX_GET_ARG2(...) __NRFX_GET_ARG2(__VA_ARGS__) + +/* Macro for getting the first argument from the set of input arguments. */ +#define __NRFX_GET_ARG1(arg1, ...) arg1 +#define _NRFX_GET_ARG1(...) __NRFX_GET_ARG1(__VA_ARGS__) + /* Macro for triggering argument evaluation. */ #define _NRFX_EVAL(...) __VA_ARGS__ diff --git a/drivers/src/nrfx_adc.c b/drivers/src/nrfx_adc.c index f7a103dde..841e14e1b 100644 --- a/drivers/src/nrfx_adc.c +++ b/drivers/src/nrfx_adc.c @@ -63,7 +63,11 @@ nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config, if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -86,6 +90,8 @@ nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config, void nrfx_adc_uninit(void) { + NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_IRQ_DISABLE(ADC_IRQn); nrf_adc_int_disable(NRF_ADC, NRF_ADC_INT_END_MASK); nrf_adc_task_trigger(NRF_ADC, NRF_ADC_TASK_STOP); @@ -97,6 +103,12 @@ void nrfx_adc_uninit(void) m_cb.p_head = NULL; m_cb.state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +bool nrfx_adc_init_check(void) +{ + return (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); } void nrfx_adc_channel_enable(nrfx_adc_channel_t * const p_channel) @@ -245,6 +257,7 @@ static bool adc_sample_process() nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size) { NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(buffer); nrfx_err_t err_code; diff --git a/drivers/src/nrfx_clock.c b/drivers/src/nrfx_clock.c index a30d92169..c0825a8b1 100644 --- a/drivers/src/nrfx_clock.c +++ b/drivers/src/nrfx_clock.c @@ -47,8 +47,10 @@ extern bool nrfx_power_irq_enabled; #if defined(CLOCK_LFCLKSRC_SRC_RC) || defined(__NRFX_DOXYGEN__) #define LF_SRC_RC CLOCK_LFCLKSRC_SRC_RC -#else +#elif defined(CLOCK_LFCLKSRC_SRC_LFRC) #define LF_SRC_RC CLOCK_LFCLKSRC_SRC_LFRC +#else + #define LF_SRC_RC CLOCK_LFCLK_SRC_SRC_LFRC #endif #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) @@ -89,6 +91,8 @@ extern bool nrfx_power_irq_enabled; #if defined(CLOCK_LFCLKSRC_SRC_Xtal) #define LF_SRC_LFXO CLOCK_LFCLKSRC_SRC_Xtal +#elif NRF_CLOCK_HAS_LFCLK_TYPE + #define LF_SRC_LFXO CLOCK_LFCLK_SRC_SRC_LFXO #else #define LF_SRC_LFXO CLOCK_LFCLKSRC_SRC_LFXO #endif @@ -190,26 +194,26 @@ static void clock_stop(nrf_clock_domain_t domain) { case NRF_CLOCK_DOMAIN_LFCLK: nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK); - nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED); nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTOP); + nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED); break; case NRF_CLOCK_DOMAIN_HFCLK: nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK); - nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED); nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKSTOP); + nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED); break; #if NRF_CLOCK_HAS_HFCLK192M case NRF_CLOCK_DOMAIN_HFCLK192M: nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF192M_STARTED_MASK); - nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLK192MSTARTED); nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLK192MSTOP); + nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLK192MSTARTED); break; #endif #if NRF_CLOCK_HAS_HFCLKAUDIO case NRF_CLOCK_DOMAIN_HFCLKAUDIO: nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HFAUDIO_STARTED_MASK); - nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED); nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKAUDIOSTOP); + nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED); break; #endif default: @@ -274,12 +278,10 @@ static bool clock_lfclksrc_tweak(nrf_clock_lfclk_t * p_lfclksrc) nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler) { - NRFX_ASSERT(event_handler); - nrfx_err_t err_code = NRFX_SUCCESS; if (m_clock_cb.module_initialized) { - err_code = NRFX_ERROR_ALREADY_INITIALIZED; + err_code = NRFX_ERROR_ALREADY; } else { @@ -300,7 +302,10 @@ nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler) void nrfx_clock_enable(void) { NRFX_ASSERT(m_clock_cb.module_initialized); - nrfx_power_clock_irq_init(); + if (m_clock_cb.event_handler) + { + nrfx_power_clock_irq_init(); + } nrf_clock_lf_src_set(NRF_CLOCK, clock_initial_lfclksrc_get()); #if NRF_CLOCK_HAS_HFCLKSRC nrf_clock_hf_src_set(NRF_CLOCK, NRF_CLOCK_HFCLK_HIGH_ACCURACY); @@ -318,18 +323,22 @@ void nrfx_clock_enable(void) void nrfx_clock_disable(void) { NRFX_ASSERT(m_clock_cb.module_initialized); + + if (m_clock_cb.event_handler) + { #if NRFX_CHECK(NRFX_POWER_ENABLED) - NRFX_ASSERT(nrfx_clock_irq_enabled); - if (!nrfx_power_irq_enabled) + NRFX_ASSERT(nrfx_clock_irq_enabled); + if (!nrfx_power_irq_enabled) #endif - { - NRFX_IRQ_DISABLE(nrfx_get_irq_number(NRF_CLOCK)); + { + NRFX_IRQ_DISABLE(nrfx_get_irq_number(NRF_CLOCK)); + } } nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK | NRF_CLOCK_INT_LF_STARTED_MASK | #if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) NRF_CLOCK_INT_DONE_MASK | -#if NRF_HAS_CALIBRATION_TIMER +#if NRF_CLOCK_HAS_CALIBRATION_TIMER NRF_CLOCK_INT_CTTO_MASK | #endif #endif // NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) @@ -355,72 +364,106 @@ void nrfx_clock_uninit(void) NRFX_LOG_INFO("Uninitialized."); } +bool nrfx_clock_init_check(void) +{ + return m_clock_cb.module_initialized; +} + void nrfx_clock_start(nrf_clock_domain_t domain) { + uint32_t int_mask; + nrf_clock_event_t event; + nrf_clock_task_t task; + NRFX_ASSERT(m_clock_cb.module_initialized); switch (domain) { case NRF_CLOCK_DOMAIN_LFCLK: + { + nrf_clock_lfclk_t lfclksrc; + if (nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc)) { - nrf_clock_lfclk_t lfclksrc; - if (nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc)) - { - // LF clock is already running. Inspect its source. - // If LF clock source is inappropriate then it will be stopped and modified. - // Ignore return value as LF clock will be started again regardless of the result. - (void)clock_lfclksrc_tweak(&lfclksrc); - } - else if (nrf_clock_start_task_check(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK)) + // LF clock is already running. Inspect its source. + // If LF clock source is inappropriate then it will be stopped and modified. + // Ignore return value as LF clock will be started again regardless of the result. + (void)clock_lfclksrc_tweak(&lfclksrc); + } + else if (nrf_clock_start_task_check(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK)) + { + // LF clock is not active yet but was started already. Inspect its source. + lfclksrc = nrf_clock_lf_srccopy_get(NRF_CLOCK); + if (clock_lfclksrc_tweak(&lfclksrc)) { - // LF clock is not active yet but was started already. Inspect its source. - lfclksrc = nrf_clock_lf_srccopy_get(NRF_CLOCK); - if (clock_lfclksrc_tweak(&lfclksrc)) + // LF clock was started already and the configured source + // corresponds to the user configuration. + // No action is needed as the chosen LF clock source will become active soon. + if (m_clock_cb.event_handler) { - // LF clock was started already and the configured source - // corresponds to the user configuration. - // No action is needed as the chosen LF clock source will become active soon. nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK); - break; } - // Otherwise LF clock was started already but with inappropriate source. - // LF clock was stopped and modified. Now it will be restarted. - } - else - { - // LF clock not active and not started. - lfclksrc = clock_initial_lfclksrc_get(); + else + { + while (!nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED)) + {} + nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED); + } + return; } - nrf_clock_lf_src_set(NRF_CLOCK, lfclksrc); + // Otherwise LF clock was started already but with inappropriate source. + // LF clock was stopped and modified. Now it will be restarted. } - nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED); - nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK); -#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132) - nrfx_clock_anomaly_132(); -#endif - nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_LFCLKSTART); + else + { + // LF clock not active and not started. + lfclksrc = clock_initial_lfclksrc_get(); + } + nrf_clock_lf_src_set(NRF_CLOCK, lfclksrc); + } + event = NRF_CLOCK_EVENT_LFCLKSTARTED; + int_mask = NRF_CLOCK_INT_LF_STARTED_MASK; + task = NRF_CLOCK_TASK_LFCLKSTART; break; case NRF_CLOCK_DOMAIN_HFCLK: - nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED); - nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK); - nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKSTART); + event = NRF_CLOCK_EVENT_HFCLKSTARTED; + int_mask = NRF_CLOCK_INT_HF_STARTED_MASK; + task = NRF_CLOCK_TASK_HFCLKSTART; break; #if NRF_CLOCK_HAS_HFCLK192M case NRF_CLOCK_DOMAIN_HFCLK192M: - nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLK192MSTARTED); - nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_HF192M_STARTED_MASK); - nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLK192MSTART); + event = NRF_CLOCK_EVENT_HFCLK192MSTARTED; + int_mask = NRF_CLOCK_INT_HF192M_STARTED_MASK; + task = NRF_CLOCK_TASK_HFCLK192MSTART; break; #endif #if NRF_CLOCK_HAS_HFCLKAUDIO case NRF_CLOCK_DOMAIN_HFCLKAUDIO: - nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED); - nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_HFAUDIO_STARTED_MASK); - nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKAUDIOSTART); + event = NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED; + int_mask = NRF_CLOCK_INT_HFAUDIO_STARTED_MASK; + task = NRF_CLOCK_TASK_HFCLKAUDIOSTART; break; #endif default: NRFX_ASSERT(0); - break; + return; + } + + nrf_clock_event_clear(NRF_CLOCK, event); +#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132) + if (event == NRF_CLOCK_EVENT_LFCLKSTARTED) + { + nrfx_clock_anomaly_132(); + } +#endif + nrf_clock_task_trigger(NRF_CLOCK, task); + if (m_clock_cb.event_handler) + { + nrf_clock_int_enable(NRF_CLOCK, int_mask); + } + else + { + while (!nrf_clock_event_check(NRF_CLOCK, event)) + {} + nrf_clock_event_clear(NRF_CLOCK, event); } } @@ -430,81 +473,101 @@ void nrfx_clock_stop(nrf_clock_domain_t domain) clock_stop(domain); } +#if NRF_CLOCK_HAS_CALIBRATION && NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) nrfx_err_t nrfx_clock_calibration_start(void) { nrfx_err_t err_code = NRFX_SUCCESS; -#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) nrf_clock_hfclk_t clk_src; if (!nrfx_clock_is_running(NRF_CLOCK_DOMAIN_HFCLK, &clk_src)) { - return NRFX_ERROR_INVALID_STATE; + err_code = NRFX_ERROR_INVALID_STATE; } - - if (clk_src != NRF_CLOCK_HFCLK_HIGH_ACCURACY) + else if (clk_src != NRF_CLOCK_HFCLK_HIGH_ACCURACY) { - return NRFX_ERROR_INVALID_STATE; + err_code = NRFX_ERROR_INVALID_STATE; + } + else if (!nrfx_clock_is_running(NRF_CLOCK_DOMAIN_LFCLK, NULL)) + { + err_code = NRFX_ERROR_INVALID_STATE; } - if (!nrfx_clock_is_running(NRF_CLOCK_DOMAIN_LFCLK, NULL)) + if (err_code != NRFX_SUCCESS) { - return NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; } if (m_clock_cb.cal_state == CAL_STATE_IDLE) { nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_DONE); - nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_DONE_MASK); + m_clock_cb.cal_state = CAL_STATE_CAL; #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192) *(volatile uint32_t *)0x40000C34 = 0x00000002; #endif nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CAL); + if (m_clock_cb.event_handler) + { + nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_DONE_MASK); + } + else + { + while (!nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_DONE)) + {} + nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_DONE); + } } else { err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; } -#endif // NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) - NRFX_LOG_WARNING("Function: %s, error code: %s.", - __func__, - NRFX_LOG_ERROR_STRING_GET(err_code)); + NRFX_LOG_INFO("Initialized."); return err_code; } nrfx_err_t nrfx_clock_is_calibrating(void) { -#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) if (m_clock_cb.cal_state == CAL_STATE_CAL) { return NRFX_ERROR_BUSY; } -#endif return NRFX_SUCCESS; } +#if NRF_CLOCK_HAS_CALIBRATION_TIMER && NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED) void nrfx_clock_calibration_timer_start(uint8_t interval) { -#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) && \ - NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED) && NRF_CLOCK_HAS_CALIBRATION_TIMER nrf_clock_cal_timer_timeout_set(NRF_CLOCK, interval); nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO); - nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK); + nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTART); -#else - (void)interval; -#endif + if (m_clock_cb.event_handler) + { + nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK); + } + else + { + while (!nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO)) + {} + nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_CTTO); + } } void nrfx_clock_calibration_timer_stop(void) { -#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) && \ - NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED) && NRF_CLOCK_HAS_CALIBRATION_TIMER nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_CTTO_MASK); nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_CTSTOP); -#endif } +#endif // NRF_CLOCK_HAS_CALIBRATION_TIMER && NRFX_CHECK(NRFX_CLOCK_CONFIG_CT_ENABLED) +#endif // NRF_CLOCK_HAS_CALIBRATION && NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED) #if defined(CLOCK_FEATURE_HFCLK_DIVIDE_PRESENT) || NRF_CLOCK_HAS_HFCLK192M nrfx_err_t nrfx_clock_divider_set(nrf_clock_domain_t domain, diff --git a/drivers/src/nrfx_comp.c b/drivers/src/nrfx_comp.c index 56178df8b..5bad1b305 100644 --- a/drivers/src/nrfx_comp.c +++ b/drivers/src/nrfx_comp.c @@ -57,6 +57,7 @@ static void comp_configure(nrfx_comp_config_t const * p_config) nrfy_comp_config_t nrfy_config = { .reference = p_config->reference, + .ext_ref = p_config->ext_ref, .main_mode = p_config->main_mode, .threshold = p_config->threshold, .speed_mode = p_config->speed_mode, @@ -108,7 +109,11 @@ nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config, if (m_state != NRFX_DRV_STATE_UNINITIALIZED) { // COMP driver is already initialized +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -155,13 +160,24 @@ nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config, nrfx_err_t nrfx_comp_reconfigure(nrfx_comp_config_t const * p_config) { NRFX_ASSERT(p_config); + nrfx_err_t err_code; + if (m_state == NRFX_DRV_STATE_UNINITIALIZED) { - return NRFX_ERROR_INVALID_STATE; + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; + } - if (m_state == NRFX_DRV_STATE_POWERED_ON) + else if (m_state == NRFX_DRV_STATE_POWERED_ON) { - return NRFX_ERROR_BUSY; + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; } nrfy_comp_disable(NRF_COMP); comp_configure(p_config); @@ -172,6 +188,7 @@ nrfx_err_t nrfx_comp_reconfigure(nrfx_comp_config_t const * p_config) void nrfx_comp_uninit(void) { NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); + nrfy_comp_int_uninit(NRF_COMP); nrfy_comp_disable(NRF_COMP); #if NRFX_CHECK(NRFX_PRS_ENABLED) @@ -182,8 +199,15 @@ void nrfx_comp_uninit(void) NRFX_LOG_INFO("Uninitialized."); } +bool nrfx_comp_init_check(void) +{ + return (m_state != NRFX_DRV_STATE_UNINITIALIZED); +} + void nrfx_comp_pin_select(nrf_comp_input_t psel) { + NRFX_ASSERT(m_state != NRFX_DRV_STATE_UNINITIALIZED); + bool comp_enable_state = nrfy_comp_enable_check(NRF_COMP); nrfy_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_STOP); if (m_state == NRFX_DRV_STATE_POWERED_ON) @@ -201,6 +225,7 @@ void nrfx_comp_pin_select(nrf_comp_input_t psel) void nrfx_comp_start(uint32_t comp_int_mask, uint32_t comp_shorts_mask) { NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); + (void)nrfy_comp_events_process(NRF_COMP, comp_int_mask); nrfy_comp_int_enable(NRF_COMP, comp_int_mask); nrfy_comp_shorts_enable(NRF_COMP, comp_shorts_mask); @@ -212,6 +237,7 @@ void nrfx_comp_start(uint32_t comp_int_mask, uint32_t comp_shorts_mask) void nrfx_comp_stop(void) { NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + nrfy_comp_shorts_disable(NRF_COMP, UINT32_MAX); nrfy_comp_int_disable(NRF_COMP, UINT32_MAX); nrfy_comp_task_trigger(NRF_COMP, NRF_COMP_TASK_STOP); @@ -222,6 +248,7 @@ void nrfx_comp_stop(void) uint32_t nrfx_comp_sample() { NRFX_ASSERT(m_state == NRFX_DRV_STATE_POWERED_ON); + return nrfy_comp_sample(NRF_COMP); } diff --git a/drivers/src/nrfx_egu.c b/drivers/src/nrfx_egu.c index 7af536bb6..0092f7652 100644 --- a/drivers/src/nrfx_egu.c +++ b/drivers/src/nrfx_egu.c @@ -84,14 +84,14 @@ static uint32_t egu_event_mask_get_and_clear(NRF_EGU_Type * p_reg, uint32_t int_ uint32_t event_mask = 0; while (int_mask) { - uint8_t event_idx = NRF_CTZ(int_mask); - int_mask &= ~(1uL << event_idx); + uint8_t event_idx = (uint8_t)NRF_CTZ(int_mask); + int_mask &= ~(1UL << event_idx); nrf_egu_event_t event = nrf_egu_triggered_event_get(event_idx); if (nrf_egu_event_check(p_reg, event)) { nrf_egu_event_clear(p_reg, event); - event_mask |= (1uL << event_idx); + event_mask |= (1UL << event_idx); } } return event_mask; @@ -106,13 +106,15 @@ nrfx_err_t nrfx_egu_init(nrfx_egu_t const * p_instance, nrfx_egu_event_handler_t event_handler, void * p_context) { - NRFX_ASSERT(p_instance); - egu_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + return NRFX_ERROR_ALREADY; +#else return NRFX_ERROR_INVALID_STATE; +#endif } p_cb->state = NRFX_DRV_STATE_INITIALIZED; @@ -129,7 +131,6 @@ nrfx_err_t nrfx_egu_init(nrfx_egu_t const * p_instance, void nrfx_egu_int_enable(nrfx_egu_t const * p_instance, uint32_t mask) { - NRFX_ASSERT(p_instance); NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].handler); @@ -139,7 +140,6 @@ void nrfx_egu_int_enable(nrfx_egu_t const * p_instance, uint32_t mask) void nrfx_egu_int_disable(nrfx_egu_t const * p_instance, uint32_t mask) { - NRFX_ASSERT(p_instance); NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); nrf_egu_int_disable(p_instance->p_reg, mask); @@ -147,7 +147,6 @@ void nrfx_egu_int_disable(nrfx_egu_t const * p_instance, uint32_t mask) void nrfx_egu_trigger(nrfx_egu_t const * p_instance, uint8_t event_idx) { - NRFX_ASSERT(p_instance); NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(event_idx < nrf_egu_channel_count(p_instance->p_reg)); @@ -156,27 +155,32 @@ void nrfx_egu_trigger(nrfx_egu_t const * p_instance, uint8_t event_idx) void nrfx_egu_uninit(nrfx_egu_t const * p_instance) { - NRFX_ASSERT(p_instance); - egu_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - nrf_egu_int_disable(p_instance->p_reg, ~0uL); + nrf_egu_int_disable(p_instance->p_reg, ~0UL); NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg)); p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; } +bool nrfx_egu_init_check(nrfx_egu_t const * p_instance) +{ + egu_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} + static void irq_handler(NRF_EGU_Type * p_reg, egu_control_block_t * p_cb) { - uint32_t int_mask = nrf_egu_int_enable_check(p_reg, ~0uL); + uint32_t int_mask = nrf_egu_int_enable_check(p_reg, ~0UL); /* Check (and clear) only the events that are set to generate interrupts. Leave the other ones untouched. */ uint32_t event_mask = egu_event_mask_get_and_clear(p_reg, int_mask); while (event_mask) { - uint8_t event_idx = NRF_CTZ(event_mask); - event_mask &= ~(1uL << event_idx); + uint8_t event_idx = (uint8_t)NRF_CTZ(event_mask); + event_mask &= ~(1UL << event_idx); p_cb->handler(event_idx, p_cb->p_context); } } diff --git a/drivers/src/nrfx_gpiote.c b/drivers/src/nrfx_gpiote.c index fa9ebbf61..4a15b9e24 100644 --- a/drivers/src/nrfx_gpiote.c +++ b/drivers/src/nrfx_gpiote.c @@ -42,12 +42,31 @@ #define NRFX_LOG_MODULE GPIOTE #include +#if !NRFX_FEATURE_PRESENT(NRFX_GPIOTE, _ENABLED) +#error "No enabled GPIOTE instances. Check ." +#endif + /* Macro returning number of pins in the port */ #define GPIO_PIN_NUM(periph, prefix, i, _) NRFX_CONCAT(periph, prefix, i, _PIN_NUM) +/* Macro returning mask of pins in the port */ +#define GPIO_PIN_MASK(periph, prefix, i, _) NRFX_CONCAT(periph, prefix, i, _FEATURE_PINS_PRESENT) + +#if defined(NRF52820_XXAA) +/* nRF52820 has gaps between available pins. The symbol can't be based on P0_PIN_NUM. */ +#define MAX_PIN_NUMBER 32 +#else /* Macro for calculating total number of pins. */ #define MAX_PIN_NUMBER NRFX_FOREACH_PRESENT(P, GPIO_PIN_NUM, (+), (0), _) +#define GPIO_WITH_GAP(periph, prefix, i, _) \ + (((1 << GPIO_PIN_NUM(periph, prefix, i, _)) - 1) != GPIO_PIN_MASK(periph, prefix, i, _)) + +#if NRFX_FOREACH_PRESENT(P, GPIO_WITH_GAP, (+), (0), _) +#error "Pin gaps in GPIO ports not supported" +#endif +#endif + /* Macro returns true if port has 32 pins. */ #define GPIO_IS_FULL_PORT(periph, prefix, i, _) \ (NRFX_CONCAT(periph, prefix, i, _PIN_NUM) == 32) @@ -63,11 +82,6 @@ (GPIOTE_CH_NUM + NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS) #endif -/* Verify that trigger matches gpiote enum. */ -NRFX_STATIC_ASSERT(NRFX_GPIOTE_TRIGGER_LOTOHI == GPIOTE_CONFIG_POLARITY_LoToHi); -NRFX_STATIC_ASSERT(NRFX_GPIOTE_TRIGGER_HITOLO == GPIOTE_CONFIG_POLARITY_HiToLo); -NRFX_STATIC_ASSERT(NRFX_GPIOTE_TRIGGER_TOGGLE == GPIOTE_CONFIG_POLARITY_Toggle); - /* * 2 bytes are dedicated for each pin to store it's current state. * @@ -98,8 +112,8 @@ NRFX_STATIC_ASSERT(NRFX_GPIOTE_TRIGGER_TOGGLE == GPIOTE_CONFIG_POLARITY_Toggle); /* Trigger mode field. It stores the information about a trigger type. If trigger * is not enabled, it holds information about task usage and pin direction. */ -#define PIN_FLAG_TRIG_MODE_OFFSET 2 -#define PIN_FLAG_TRIG_MODE_BITS 3 +#define PIN_FLAG_TRIG_MODE_OFFSET 2UL +#define PIN_FLAG_TRIG_MODE_BITS 3UL #define PIN_FLAG_TRIG_MODE_MASK \ (NRFX_BIT_MASK(PIN_FLAG_TRIG_MODE_BITS) << PIN_FLAG_TRIG_MODE_OFFSET) NRFX_STATIC_ASSERT(NRFX_GPIOTE_TRIGGER_MAX <= NRFX_BIT(PIN_FLAG_TRIG_MODE_BITS)); @@ -116,8 +130,8 @@ NRFX_STATIC_ASSERT(NRFX_GPIOTE_TRIGGER_MAX <= NRFX_BIT(PIN_FLAG_TRIG_MODE_BITS)) #define PIN_FLAG_HANDLER_PRESENT NRFX_BIT(8) -#define PIN_HANDLER_ID_SHIFT 9 -#define PIN_HANDLER_ID_BITS 4 +#define PIN_HANDLER_ID_SHIFT 9UL +#define PIN_HANDLER_ID_BITS 4UL #define PIN_HANDLER_ID_MASK (NRFX_BIT_MASK(PIN_HANDLER_ID_BITS) << PIN_HANDLER_ID_SHIFT) #define PIN_HANDLER_MASK (PIN_FLAG_HANDLER_PRESENT | PIN_HANDLER_ID_MASK) @@ -137,8 +151,8 @@ NRFX_STATIC_ASSERT(NRFX_GPIOTE_TRIGGER_MAX <= NRFX_BIT(PIN_FLAG_TRIG_MODE_BITS)) #define PIN_HANDLER_MAX_COUNT NRFX_BIT_MASK(PIN_HANDLER_ID_BITS) NRFX_STATIC_ASSERT(NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS <= PIN_HANDLER_MAX_COUNT); -#define PIN_TE_ID_SHIFT 13 -#define PIN_TE_ID_BITS 3 +#define PIN_TE_ID_SHIFT 13UL +#define PIN_TE_ID_BITS 3UL #define PIN_TE_ID_MASK (NRFX_BIT_MASK(PIN_TE_ID_BITS) << PIN_TE_ID_SHIFT) /* Validate that field is big enough for number of channels. */ @@ -151,6 +165,10 @@ NRFX_STATIC_ASSERT((NRFX_BIT(PIN_TE_ID_BITS)) >= GPIOTE_CH_NUM); /* Macro for getting Task/Event index from flags. */ #define PIN_GET_TE_ID(flags) ((flags & PIN_TE_ID_MASK) >> PIN_TE_ID_SHIFT) +#define GPIOTE_PORT_INDEX(periph_name, prefix, i, _) i, +#define GPIOTE_PORTS_INDEX_LIST \ + NRFX_FOREACH_PRESENT(P, GPIOTE_PORT_INDEX, (), (), _) + /* Structure holding state of the pins */ typedef struct { @@ -163,26 +181,73 @@ typedef struct /* Each pin state */ uint16_t pin_flags[MAX_PIN_NUMBER]; - /* Mask for tracking gpiote channel allocation. */ + /* Number of GPIOTE channels. */ + uint32_t channels_number; + + /* Mask for tracking GPIOTE channel allocation. */ nrfx_atomic_t available_channels_mask; /* Mask for tracking event handler entries allocation. */ nrfx_atomic_t available_evt_handlers; + /* Mask of available ports for GPIOTE instance. */ + uint32_t available_gpio_ports; + #if !defined(NRF_GPIO_LATCH_PRESENT) uint32_t port_pins[GPIO_COUNT]; #endif nrfx_drv_state_t state; } gpiote_control_block_t; -static gpiote_control_block_t m_cb = { - .available_channels_mask = NRFX_GPIOTE_APP_CHANNELS_MASK +#if !defined(__NRFX_DOXYGEN__) +#if (defined(NRF_GPIOTE) || defined(NRF_GPIOTE0)) && !defined(NRFX_GPIOTE0_CHANNELS_USED) +/* Bitmask that defines GPIOTE0 channels that are reserved for use outside of the nrfx library. */ +#define NRFX_GPIOTE0_CHANNELS_USED 0UL +#endif + +#if defined(NRF_GPIOTE1) && !defined(NRFX_GPIOTE1_CHANNELS_USED) +/* Bitmask that defines GPIOTE1 channels that are reserved for use outside of the nrfx library. */ +#define NRFX_GPIOTE1_CHANNELS_USED 0UL +#endif + +#if defined(NRF_GPIOTE20) && !defined(NRFX_GPIOTE20_CHANNELS_USED) +/* Bitmask that defines GPIOTE20 channels that are reserved for use outside of the nrfx library. */ +#define NRFX_GPIOTE20_CHANNELS_USED 0UL +#endif + +#if defined(NRF_GPIOTE30) && !defined(NRFX_GPIOTE30_CHANNELS_USED) +/* Bitmask that defines GPIOTE30 channels that are reserved for use outside of the nrfx library. */ +#define NRFX_GPIOTE30_CHANNELS_USED 0UL +#endif + +#if defined(NRF_GPIOTE130) && !defined(NRFX_GPIOTE130_CHANNELS_USED) +/* Bitmask that defines GPIOTE130 channels that are reserved for use outside of the nrfx library. */ +#define NRFX_GPIOTE130_CHANNELS_USED 0UL +#endif + +#if defined(NRF_GPIOTE131) && !defined(NRFX_GPIOTE131_CHANNELS_USED) +/* Bitmask that defines GPIOTE131 channels that are reserved for use outside of the nrfx library. */ +#define NRFX_GPIOTE131_CHANNELS_USED 0UL +#endif +#endif // !defined(__NRFX_DOXYGEN__) + +#define _NRFX_GPIOTE_CB_INITIALIZER(periph_name, prefix, idx, _) \ + [NRFX_CONCAT(NRFX_, periph_name, idx, _INST_IDX)] = { \ + .channels_number = NRFX_CONCAT_3(periph_name, idx, _CH_NUM), \ + .available_channels_mask = (nrfx_atomic_t)NRFX_GPIOTE_APP_CHANNELS_MASK(idx), \ + .available_gpio_ports = NRFX_CONCAT_3(periph_name, idx, _AVAILABLE_GPIO_PORTS), \ + }, + +static gpiote_control_block_t m_cb[NRFX_GPIOTE_ENABLED_COUNT] = { + NRFX_FOREACH_ENABLED(GPIOTE, _NRFX_GPIOTE_CB_INITIALIZER, (), ()) }; #if defined(NRF_GPIO_LATCH_PRESENT) || (!FULL_PORTS_PRESENT) static const uint8_t ports[GPIO_COUNT] = GPIO_PORT_NUM_LIST; #endif +static const uint8_t port_index[GPIO_COUNT] = {GPIOTE_PORTS_INDEX_LIST}; + #define GPIO_PORT_OFFSET(i, _) \ NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(NRFX_CONCAT(P, i)),(NRFX_CONCAT(P, i, _PIN_NUM)), (0)) @@ -190,7 +255,7 @@ static uint8_t get_pin_idx(nrfx_gpiote_pin_t pin) { #if FULL_PORTS_PRESENT // If all ports have 32 pins then array ordering matches pin ordering. - return pin; + return (uint8_t)pin; #else // Possible instances must be explicitely listed as NRFX_LISTIFY cannot be nested. static const uint8_t port_offset[] = { @@ -216,74 +281,102 @@ static uint8_t get_pin_idx(nrfx_gpiote_pin_t pin) #endif } -/** @brief Checks if pin is in use by the driver. +/** @brief Function for getting instance control block. + * + * Function is optimized for case when there is only one GPIOTE instance. + * + * @param[in] idx Instance index. + * + * @return Control block. + */ +static gpiote_control_block_t * get_cb(uint32_t idx) +{ + if (NRFX_GPIOTE_ENABLED_COUNT == 1) + { + return &m_cb[0]; + } + else + { + return &m_cb[idx]; + } +} + +/** @brief Checks if pin is in use by a given GPIOTE instance. * - * @param[in] pin Absolute pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin. * * @return True if pin is in use. */ -static bool pin_in_use(uint32_t pin) +static bool pin_in_use(nrfx_gpiote_t const * p_instance, uint32_t pin) { - return m_cb.pin_flags[get_pin_idx(pin)] & PIN_FLAG_IN_USE; + return get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)] & PIN_FLAG_IN_USE; } -/** @brief Check if Task/Event is used. +/** @brief Check if Task/Event is used by a given GPIOTE instance. * * Assuming that pin is in use. * - * @param[in] pin Absolute pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin. * * @return True if pin uses GPIOTE task/event. */ -static bool pin_in_use_by_te(uint32_t pin) +static bool pin_in_use_by_te(nrfx_gpiote_t const * p_instance, uint32_t pin) { - return m_cb.pin_flags[get_pin_idx(pin)] & PIN_FLAG_TE_USED; + return get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)] & PIN_FLAG_TE_USED; } -/** @brief Check if pin has trigger. +/** @brief Check if pin has trigger for a given GPIOTE instance. * - * @param[in] pin Absolute pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin. * * @return True if pin has trigger. */ -static bool pin_has_trigger(uint32_t pin) +static bool pin_has_trigger(nrfx_gpiote_t const * p_instance, uint32_t pin) { - return PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[get_pin_idx(pin)]) != NRFX_GPIOTE_TRIGGER_NONE; + return PIN_FLAG_TRIG_MODE_GET( + get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)]) != + NRFX_GPIOTE_TRIGGER_NONE; } -/** @brief Check if pin is output. +/** @brief Check if pin is output for a given GPIOTE instance. * * Assuming that pin is in use. * - * @param[in] pin Absolute pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin. * * @return True if pin is output. */ -static bool pin_is_output(uint32_t pin) +static bool pin_is_output(nrfx_gpiote_t const * p_instance, uint32_t pin) { - return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[get_pin_idx(pin)]); + return PIN_FLAG_IS_OUTPUT(get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)]); } -/** @brief Check if pin is output controlled by GPIOTE task. +/** @brief Check if pin is output controlled by GPIOTE task for a given GPIOTE instance. * - * @param[in] pin Absolute pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin. * * @return True if pin is task output. */ -static bool pin_is_task_output(uint32_t pin) +static bool pin_is_task_output(nrfx_gpiote_t const * p_instance, uint32_t pin) { - return pin_is_output(pin) && pin_in_use_by_te(pin); + return pin_is_output(p_instance, pin) && pin_in_use_by_te(p_instance, pin); } -/** @brief Check if pin is used by the driver and configured as input. +/** @brief Check if pin is used by the driver and configured as input for a given GPIOTE instance. * - * @param[in] pin Absolute pin. + * @param[in] p_instance Pointer to the driver instance structure. + * @param[in] pin Absolute pin. * * @return True if pin is configured as input. */ -static bool pin_is_input(uint32_t pin) +static bool pin_is_input(nrfx_gpiote_t const * p_instance, uint32_t pin) { - return !pin_is_output(pin); + return !pin_is_output(p_instance, pin); } /* Convert polarity enum (HAL) to trigger enum. */ @@ -299,9 +392,9 @@ static nrf_gpiote_polarity_t gpiote_trigger_to_polarity(nrfx_gpiote_trigger_t tr } /* Returns gpiote TE channel associated with the pin */ -static uint8_t pin_te_get(nrfx_gpiote_pin_t pin) +static uint8_t pin_te_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { - return PIN_GET_TE_ID(m_cb.pin_flags[get_pin_idx(pin)]); + return PIN_GET_TE_ID(get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)]); } static bool is_level(nrfx_gpiote_trigger_t trigger) @@ -309,11 +402,11 @@ static bool is_level(nrfx_gpiote_trigger_t trigger) return trigger >= NRFX_GPIOTE_TRIGGER_LOW; } -static bool handler_in_use(int32_t handler_id) +static bool handler_in_use(nrfx_gpiote_t const * p_instance, int32_t handler_id) { for (uint32_t i = 0; i < MAX_PIN_NUMBER; i++) { - if (PIN_GET_HANDLER_ID(m_cb.pin_flags[i]) == handler_id) + if (PIN_GET_HANDLER_ID(get_cb(p_instance->drv_inst_idx)->pin_flags[i]) == handler_id) { return true; } @@ -323,25 +416,26 @@ static bool handler_in_use(int32_t handler_id) /* Function clears pin handler flag and releases handler slot if handler+context * pair is not used by other pin. */ -static void release_handler(nrfx_gpiote_pin_t pin) +static void release_handler(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { uint8_t idx = get_pin_idx(pin); - int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[idx]); + int32_t handler_id = PIN_GET_HANDLER_ID(get_cb(p_instance->drv_inst_idx)->pin_flags[idx]); if (handler_id == PIN_FLAG_NO_HANDLER) { return; } - m_cb.pin_flags[idx] &= ~PIN_HANDLER_MASK; + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] &= (uint16_t)~PIN_HANDLER_MASK; /* Check if other pin is using same handler and release handler only if handler * is not used by others. */ - if (!handler_in_use(handler_id)) + if (!handler_in_use(p_instance, handler_id)) { - m_cb.handlers[handler_id].handler = NULL; - nrfx_err_t err = nrfx_flag32_free(&m_cb.available_evt_handlers, handler_id); + get_cb(p_instance->drv_inst_idx)->handlers[handler_id].handler = NULL; + nrfx_err_t err = nrfx_flag32_free( + &get_cb(p_instance->drv_inst_idx)->available_evt_handlers, (uint8_t)handler_id); (void)err; NRFX_ASSERT(err == NRFX_SUCCESS); } @@ -350,43 +444,64 @@ static void release_handler(nrfx_gpiote_pin_t pin) /* Function releases the handler associated with the pin and sets GPIOTE channel * configuration to default if it was used with the pin. */ -static void pin_handler_trigger_uninit(nrfx_gpiote_pin_t pin) +static void pin_handler_trigger_uninit(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { - if (pin_in_use_by_te(pin)) + if (pin_in_use_by_te(p_instance, pin)) { /* te to default */ - nrfy_gpiote_te_default(NRF_GPIOTE, pin_te_get(pin)); + nrfy_gpiote_te_default(p_instance->p_reg, pin_te_get(p_instance, pin)); } else { #if !defined(NRF_GPIO_LATCH_PRESENT) - nrf_bitmask_bit_clear(pin, (uint8_t *)m_cb.port_pins); + nrf_bitmask_bit_clear(pin, (uint8_t *)get_cb(p_instance->drv_inst_idx)->port_pins); #endif } - release_handler(pin); - m_cb.pin_flags[get_pin_idx(pin)] = PIN_FLAG_NOT_USED; + release_handler(p_instance, pin); + get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)] = PIN_FLAG_NOT_USED; } -nrfx_err_t nrfx_gpiote_pin_uninit(nrfx_gpiote_pin_t pin) +/* Function disabling sense level for the given pin + * or disabling interrupts and events for GPIOTE channel if it was used with the pin. + */ +static void pin_trigger_disable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { - if (!pin_in_use(pin)) + if (pin_in_use_by_te(p_instance, pin) && pin_is_input(p_instance, pin)) { - return NRFX_ERROR_INVALID_PARAM; + uint8_t ch = pin_te_get(p_instance, pin); + + nrfy_gpiote_int_disable(p_instance->p_reg, NRFX_BIT(ch)); + nrfy_gpiote_event_disable(p_instance->p_reg, ch); } + else + { + nrfy_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE); + } +} - nrfx_gpiote_trigger_disable(pin); - pin_handler_trigger_uninit(pin); - nrfy_gpio_cfg_default(pin); +static nrf_gpiote_event_t pin_in_event_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); + NRFX_ASSERT(pin_is_input(p_instance, pin)); + NRFX_ASSERT(pin_has_trigger(p_instance, pin)); - return NRFX_SUCCESS; + if (pin_in_use_by_te(p_instance, pin)) + { + return nrfy_gpiote_in_event_get((uint8_t)pin_te_get(p_instance, pin)); + } + + return NRF_GPIOTE_EVENT_PORT; } -static int32_t find_handler(nrfx_gpiote_interrupt_handler_t handler, void * p_context) +static int32_t find_handler(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_interrupt_handler_t handler, + void * p_context) { - for (uint32_t i = 0; i < NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS; i++) + for (int32_t i = 0; i < NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS; i++) { - if ((m_cb.handlers[i].handler == handler) && (m_cb.handlers[i].p_context == p_context)) + if ((get_cb(p_instance->drv_inst_idx)->handlers[i].handler == handler) && + (get_cb(p_instance->drv_inst_idx)->handlers[i].p_context == p_context)) { return i; } @@ -396,26 +511,27 @@ static int32_t find_handler(nrfx_gpiote_interrupt_handler_t handler, void * p_co } /** @brief Set new handler, if handler was not previously set allocate it. */ -static nrfx_err_t pin_handler_set(nrfx_gpiote_pin_t pin, +static nrfx_err_t pin_handler_set(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, nrfx_gpiote_interrupt_handler_t handler, void * p_context) { nrfx_err_t err; int32_t handler_id; - release_handler(pin); + release_handler(p_instance, pin); if (!handler) { return NRFX_SUCCESS; } - handler_id = find_handler(handler, p_context); + handler_id = find_handler(p_instance, handler, p_context); /* Handler not found, new must be allocated. */ if (handler_id < 0) { uint8_t id; - err = nrfx_flag32_alloc(&m_cb.available_evt_handlers, &id); + err = nrfx_flag32_alloc(&get_cb(p_instance->drv_inst_idx)->available_evt_handlers, &id); if (err != NRFX_SUCCESS) { return err; @@ -423,16 +539,19 @@ static nrfx_err_t pin_handler_set(nrfx_gpiote_pin_t pin, handler_id = (int32_t)id; } - m_cb.handlers[handler_id].handler = handler; - m_cb.handlers[handler_id].p_context = p_context; - m_cb.pin_flags[get_pin_idx(pin)] |= PIN_FLAG_HANDLER(handler_id); + get_cb(p_instance->drv_inst_idx)->handlers[handler_id].handler = handler; + get_cb(p_instance->drv_inst_idx)->handlers[handler_id].p_context = p_context; + get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)] |= + (uint16_t)PIN_FLAG_HANDLER((uint8_t)handler_id); return NRFX_SUCCESS; } -static inline nrf_gpio_pin_sense_t get_initial_sense(nrfx_gpiote_pin_t pin) +static inline nrf_gpio_pin_sense_t get_initial_sense(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin) { - nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[get_pin_idx(pin)]); + nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET( + get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)]); nrf_gpio_pin_sense_t sense; if (trigger == NRFX_GPIOTE_TRIGGER_LOW) @@ -452,17 +571,61 @@ static inline nrf_gpio_pin_sense_t get_initial_sense(nrfx_gpiote_pin_t pin) return sense; } -nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, - nrfx_gpiote_input_config_t const * p_input_config, - nrfx_gpiote_trigger_config_t const * p_trigger_config, - nrfx_gpiote_handler_config_t const * p_handler_config) +/* Return handler associated with given pin or null. */ +static nrfx_gpiote_handler_config_t const * channel_handler_get(gpiote_control_block_t * p_cb, + nrfx_gpiote_pin_t pin) +{ + int32_t handler_id = PIN_GET_HANDLER_ID(p_cb->pin_flags[get_pin_idx(pin)]); + + if (handler_id == PIN_FLAG_NO_HANDLER) + { + return NULL; + } + + return &p_cb->handlers[handler_id]; +} + +/* Function for deinitializing the specified pin. */ +static nrfx_err_t pin_uninit(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + if (!pin_in_use(p_instance, pin)) + { + return NRFX_ERROR_INVALID_PARAM; + } + + pin_trigger_disable(p_instance, pin); + pin_handler_trigger_uninit(p_instance, pin); + nrfy_gpio_cfg_default(pin); + + return NRFX_SUCCESS; +} + +/* Function for deinitializing the specified pin if present. */ +static void pin_cond_uninit(nrfx_gpiote_t const * p_instance, uint32_t pin) +{ + if (nrfy_gpio_pin_present_check(pin)) + { + nrfx_err_t err_code = pin_uninit(p_instance, pin); + + if (err_code != NRFX_SUCCESS) + { + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + } + } +} + +static nrfx_err_t gpiote_input_configure(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + nrfx_gpiote_input_pin_config_t const * p_config) { nrfx_err_t err; uint8_t idx = get_pin_idx(pin); - if (p_input_config) + if (p_config->p_pull_config) { - if (pin_is_task_output(pin)) + if (pin_is_task_output(p_instance, pin)) { return NRFX_ERROR_INVALID_PARAM; } @@ -470,18 +633,18 @@ nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, nrf_gpio_pin_dir_t dir = NRF_GPIO_PIN_DIR_INPUT; nrf_gpio_pin_input_t input_connect = NRF_GPIO_PIN_INPUT_CONNECT; - nrfy_gpio_reconfigure(pin, &dir, &input_connect, &p_input_config->pull, NULL, NULL); + nrfy_gpio_reconfigure(pin, &dir, &input_connect, p_config->p_pull_config, NULL, NULL); - m_cb.pin_flags[idx] &= ~PIN_FLAG_OUTPUT; - m_cb.pin_flags[idx] |= PIN_FLAG_IN_USE; + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] &= (uint16_t)~PIN_FLAG_OUTPUT; + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] |= PIN_FLAG_IN_USE; } - if (p_trigger_config) + if (p_config->p_trigger_config) { - nrfx_gpiote_trigger_t trigger = p_trigger_config->trigger; - bool use_evt = p_trigger_config->p_in_channel ? true : false; + nrfx_gpiote_trigger_t trigger = p_config->p_trigger_config->trigger; + bool use_evt = p_config->p_trigger_config->p_in_channel ? true : false; - if (pin_is_output(pin)) + if (pin_is_output(p_instance, pin)) { if (use_evt) { @@ -490,9 +653,9 @@ nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, } else { - m_cb.pin_flags[idx] &= ~(PIN_TE_ID_MASK | PIN_FLAG_TE_USED); - if (use_evt) - { + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] &= + (uint16_t) ~(PIN_TE_ID_MASK | PIN_FLAG_TE_USED); + if (use_evt) { bool edge = trigger <= NRFX_GPIOTE_TRIGGER_TOGGLE; /* IN event used. */ @@ -502,40 +665,43 @@ nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, return NRFX_ERROR_INVALID_PARAM; } - uint8_t ch = *p_trigger_config->p_in_channel; + uint8_t ch = *p_config->p_trigger_config->p_in_channel; if (trigger == NRFX_GPIOTE_TRIGGER_NONE) { - nrfy_gpiote_te_default(NRF_GPIOTE, ch); + nrfy_gpiote_te_default(p_instance->p_reg, ch); } else { nrf_gpiote_polarity_t polarity = gpiote_trigger_to_polarity(trigger); - nrfy_gpiote_event_disable(NRF_GPIOTE, ch); - nrfy_gpiote_event_configure(NRF_GPIOTE, ch, pin, polarity); + nrfy_gpiote_event_disable(p_instance->p_reg, ch); + nrfy_gpiote_event_configure(p_instance->p_reg, ch, pin, polarity); - m_cb.pin_flags[idx] |= PIN_FLAG_TE_ID(ch); + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] |= (uint16_t)PIN_FLAG_TE_ID(ch); } } } #if !defined(NRF_GPIO_LATCH_PRESENT) if (use_evt || trigger == NRFX_GPIOTE_TRIGGER_NONE) { - nrf_bitmask_bit_clear(pin, (uint8_t *)m_cb.port_pins); + nrf_bitmask_bit_clear(pin, (uint8_t *)get_cb(p_instance->drv_inst_idx)->port_pins); } else { - nrf_bitmask_bit_set(pin, (uint8_t *)m_cb.port_pins); + nrf_bitmask_bit_set(pin, (uint8_t *)get_cb(p_instance->drv_inst_idx)->port_pins); } #endif - m_cb.pin_flags[idx] &= ~PIN_FLAG_TRIG_MODE_MASK; - m_cb.pin_flags[idx] |= PIN_FLAG_TRIG_MODE_SET(trigger); + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] &= (uint16_t)~PIN_FLAG_TRIG_MODE_MASK; + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] |= (uint16_t)PIN_FLAG_TRIG_MODE_SET(trigger); } - if (p_handler_config) + if (p_config->p_handler_config) { - err = pin_handler_set(pin, p_handler_config->handler, p_handler_config->p_context); + err = pin_handler_set(p_instance, + pin, + p_config->p_handler_config->handler, + p_config->p_handler_config->p_context); } else { @@ -545,23 +711,25 @@ nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, return err; } -nrfx_err_t nrfx_gpiote_output_configure(nrfx_gpiote_pin_t pin, - nrfx_gpiote_output_config_t const * p_config, - nrfx_gpiote_task_config_t const * p_task_config) +static nrfx_err_t gpiote_output_configure(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + nrfx_gpiote_output_config_t const * p_config, + nrfx_gpiote_task_config_t const * p_task_config) { uint8_t idx = get_pin_idx(pin); if (p_config) { /* Cannot configure pin to output if pin was using TE event. */ - if (pin_is_input(pin) && pin_in_use_by_te(pin)) + if (pin_is_input(p_instance, pin) && pin_in_use_by_te(p_instance, pin)) { return NRFX_ERROR_INVALID_PARAM; } /* If reconfiguring to output pin that has trigger configured then accept * only when input is still connected. */ - if (pin_has_trigger(pin) && (p_config->input_connect == NRF_GPIO_PIN_INPUT_DISCONNECT)) + if (pin_has_trigger(p_instance, pin) && + (p_config->input_connect == NRF_GPIO_PIN_INPUT_DISCONNECT)) { return NRFX_ERROR_INVALID_PARAM; } @@ -571,45 +739,50 @@ nrfx_err_t nrfx_gpiote_output_configure(nrfx_gpiote_pin_t pin, nrfy_gpio_reconfigure(pin, &dir, &p_config->input_connect, &p_config->pull, &p_config->drive, NULL); - m_cb.pin_flags[idx] |= PIN_FLAG_IN_USE | PIN_FLAG_OUTPUT; + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] |= PIN_FLAG_IN_USE | PIN_FLAG_OUTPUT; } if (p_task_config) { - if (pin_is_input(pin)) + if (pin_is_input(p_instance, pin)) { return NRFX_ERROR_INVALID_PARAM; } uint32_t ch = p_task_config->task_ch; - nrfy_gpiote_te_default(NRF_GPIOTE, ch); - m_cb.pin_flags[idx] &= ~(PIN_FLAG_TE_USED | PIN_TE_ID_MASK); + nrfy_gpiote_te_default(p_instance->p_reg, ch); + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] &= + (uint16_t) ~(PIN_FLAG_TE_USED | PIN_TE_ID_MASK); if (p_task_config->polarity != NRF_GPIOTE_POLARITY_NONE) { - nrfy_gpiote_task_configure(NRF_GPIOTE, ch, pin, + nrfy_gpiote_task_configure(p_instance->p_reg, ch, pin, p_task_config->polarity, p_task_config->init_val); - m_cb.pin_flags[idx] |= PIN_FLAG_TE_ID(ch); + get_cb(p_instance->drv_inst_idx)->pin_flags[idx] |= (uint16_t)PIN_FLAG_TE_ID(ch); } } return NRFX_SUCCESS; } -void nrfx_gpiote_global_callback_set(nrfx_gpiote_interrupt_handler_t handler, void * p_context) +static void gpiote_global_callback_set(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_interrupt_handler_t handler, + void * p_context) { - m_cb.global_handler.handler = handler; - m_cb.global_handler.p_context = p_context; + get_cb(p_instance->drv_inst_idx)->global_handler.handler = handler; + get_cb(p_instance->drv_inst_idx)->global_handler.p_context = p_context; } -nrfx_err_t nrfx_gpiote_channel_get(nrfx_gpiote_pin_t pin, uint8_t *p_channel) +static nrfx_err_t gpiote_channel_get(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + uint8_t * p_channel) { NRFX_ASSERT(p_channel); - if (pin_in_use_by_te(pin)) + if (pin_in_use_by_te(p_instance, pin)) { - *p_channel = PIN_GET_TE_ID(m_cb.pin_flags[get_pin_idx(pin)]); + *p_channel = PIN_GET_TE_ID(get_cb(p_instance->drv_inst_idx)->pin_flags[get_pin_idx(pin)]); return NRFX_SUCCESS; } else @@ -618,67 +791,64 @@ nrfx_err_t nrfx_gpiote_channel_get(nrfx_gpiote_pin_t pin, uint8_t *p_channel) } } -/* Return handler associated with given pin or null. */ -static nrfx_gpiote_handler_config_t const * channel_handler_get(nrfx_gpiote_pin_t pin) +static nrfx_err_t gpiote_init(nrfx_gpiote_t const * p_instance, uint8_t interrupt_priority) { - int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[get_pin_idx(pin)]); - - if (handler_id == PIN_FLAG_NO_HANDLER) - { - return NULL; - } +#if defined(NRF5340_XXAA_APPLICATION) || defined(NRF91_SERIES) +#if defined(NRF_TRUSTZONE_NONSECURE) + NRFX_ASSERT(p_instance->p_reg == NRF_GPIOTE1); +#else + NRFX_ASSERT(p_instance->p_reg == NRF_GPIOTE0); +#endif +#endif - return &m_cb.handlers[handler_id]; -} + gpiote_control_block_t * p_cb = get_cb(p_instance->drv_inst_idx); + nrfx_err_t err_code = NRFX_SUCCESS; -nrfx_err_t nrfx_gpiote_init(uint8_t interrupt_priority) -{ - nrfx_err_t err_code; + NRFX_LOG_INFO("channels_number: %d, available_channels_mask: 0x%x", + (int)p_cb->channels_number, (int)p_cb->available_channels_mask); - if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) + if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } - memset(m_cb.pin_flags, 0, sizeof(m_cb.pin_flags)); + memset(p_cb->pin_flags, 0, sizeof(p_cb->pin_flags)); - nrfy_gpiote_int_init(NRF_GPIOTE, (uint32_t)NRF_GPIOTE_INT_PORT_MASK, interrupt_priority, true); + nrfy_gpiote_int_init(p_instance->p_reg, + (uint32_t)NRF_GPIOTE_INT_PORT_MASK, + interrupt_priority, + true, + p_cb->channels_number); - m_cb.state = NRFX_DRV_STATE_INITIALIZED; - m_cb.available_evt_handlers = NRFX_BIT_MASK(NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS); + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + p_cb->available_evt_handlers = NRFX_BIT_MASK(NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS); - err_code = NRFX_SUCCESS; NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); return err_code; } - -bool nrfx_gpiote_is_init(void) +static bool gpiote_init_check(nrfx_gpiote_t const * p_instance) { - return (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) ? true : false; -} - -static void pin_uninit(uint32_t pin) -{ - if (nrfy_gpio_pin_present_check(pin) && pin_in_use(pin)) - { - nrfx_gpiote_pin_uninit(pin); - } + return (get_cb(p_instance->drv_inst_idx)->state != NRFX_DRV_STATE_UNINITIALIZED); } -void nrfx_gpiote_uninit(void) +static void gpiote_uninit(nrfx_gpiote_t const * p_instance) { - NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(get_cb(p_instance->drv_inst_idx)->state != NRFX_DRV_STATE_UNINITIALIZED); #if FULL_PORTS_PRESENT // Simple iteration for simple case to save memory for (size_t i = 0; i < MAX_PIN_NUMBER; i++) { - pin_uninit(i); + pin_cond_uninit(p_instance, i); } #else #define _PORT_LEN(periph, prefix, i, _) NRFX_CONCAT(periph, prefix, i, _PIN_NUM), @@ -692,258 +862,567 @@ void nrfx_gpiote_uninit(void) { for (size_t j = 0; j < port_lens[i]; j++) { - pin_uninit(32 * ports[i] + j); + pin_cond_uninit(p_instance, 32 * ports[i] + j); } } #undef _PORT_LEN #endif - m_cb.state = NRFX_DRV_STATE_UNINITIALIZED; + get_cb(p_instance->drv_inst_idx)->state = NRFX_DRV_STATE_UNINITIALIZED; + get_cb(p_instance->drv_inst_idx)->global_handler.handler = NULL; NRFX_LOG_INFO("Uninitialized."); } -nrfx_err_t nrfx_gpiote_channel_free(uint8_t channel) +static nrfx_err_t pin_channel_free(nrfx_gpiote_t const * p_instance, uint8_t channel) { - return nrfx_flag32_free(&m_cb.available_channels_mask, channel); + return nrfx_flag32_free(&get_cb(p_instance->drv_inst_idx)->available_channels_mask, channel); } -nrfx_err_t nrfx_gpiote_channel_alloc(uint8_t * p_channel) +static nrfx_err_t pin_channel_alloc(nrfx_gpiote_t const * p_instance, uint8_t * p_channel) { - return nrfx_flag32_alloc(&m_cb.available_channels_mask, p_channel); + NRFX_LOG_INFO("available_channels_mask = %d", + (int)get_cb(p_instance->drv_inst_idx)->available_channels_mask); + return nrfx_flag32_alloc(&get_cb(p_instance->drv_inst_idx)->available_channels_mask, p_channel); } -void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin) +static void pin_out_set(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_output(pin) && !pin_in_use_by_te(pin)); + NRFX_ASSERT(pin_is_output(p_instance, pin) && !pin_in_use_by_te(p_instance, pin)); nrfy_gpio_pin_set(pin); } - -void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin) +static void pin_out_clear(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_output(pin) && !pin_in_use_by_te(pin)); + NRFX_ASSERT(pin_is_output(p_instance, pin) && !pin_in_use_by_te(p_instance, pin)); nrfy_gpio_pin_clear(pin); } - -void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin) +static void pin_out_toggle(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_output(pin) && !pin_in_use_by_te(pin)); + NRFX_ASSERT(pin_is_output(p_instance, pin) && !pin_in_use_by_te(p_instance, pin)); nrfy_gpio_pin_toggle(pin); } -void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin) +static void pin_out_task_enable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { (void)pin_is_task_output; /* Add to avoid compiler warnings when asserts disabled.*/ NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_task_output(pin)); + NRFX_ASSERT(pin_is_task_output(p_instance, pin)); - nrfy_gpiote_task_enable(NRF_GPIOTE, (uint32_t)pin_te_get(pin)); + nrfy_gpiote_task_enable(p_instance->p_reg, (uint32_t)pin_te_get(p_instance, pin)); } - -void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin) +static void pin_out_task_disable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_task_output(pin)); + NRFX_ASSERT(pin_is_task_output(p_instance, pin)); - nrfy_gpiote_task_disable(NRF_GPIOTE, (uint32_t)pin_te_get(pin)); + nrfy_gpiote_task_disable(p_instance->p_reg, (uint32_t)pin_te_get(p_instance, pin)); } - -nrf_gpiote_task_t nrfx_gpiote_out_task_get(nrfx_gpiote_pin_t pin) +static nrf_gpiote_task_t pin_out_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_task_output(pin)); + NRFX_ASSERT(pin_is_task_output(p_instance, pin)); - return nrfy_gpiote_out_task_get((uint8_t)pin_te_get(pin)); + return nrfy_gpiote_out_task_get((uint8_t)pin_te_get(p_instance, pin)); } - -uint32_t nrfx_gpiote_out_task_address_get(nrfx_gpiote_pin_t pin) +static uint32_t pin_out_task_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { - nrf_gpiote_task_t task = nrfx_gpiote_out_task_get(pin); - return nrfy_gpiote_task_address_get(NRF_GPIOTE, task); + nrf_gpiote_task_t task = pin_out_task_get(p_instance, pin); + return nrfy_gpiote_task_address_get(p_instance->p_reg, task); } - #if defined(GPIOTE_FEATURE_SET_PRESENT) -nrf_gpiote_task_t nrfx_gpiote_set_task_get(nrfx_gpiote_pin_t pin) +static nrf_gpiote_task_t pin_set_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_task_output(pin)); + NRFX_ASSERT(pin_is_task_output(p_instance, pin)); - return nrfy_gpiote_set_task_get((uint8_t)pin_te_get(pin)); + return nrfy_gpiote_set_task_get((uint8_t)pin_te_get(p_instance, pin)); } - -uint32_t nrfx_gpiote_set_task_address_get(nrfx_gpiote_pin_t pin) +static uint32_t pin_set_task_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { - nrf_gpiote_task_t task = nrfx_gpiote_set_task_get(pin); - return nrfy_gpiote_task_address_get(NRF_GPIOTE, task); + nrf_gpiote_task_t task = pin_set_task_get(p_instance, pin); + return nrfy_gpiote_task_address_get(p_instance->p_reg, task); } #endif // defined(GPIOTE_FEATURE_SET_PRESENT) - #if defined(GPIOTE_FEATURE_CLR_PRESENT) -nrf_gpiote_task_t nrfx_gpiote_clr_task_get(nrfx_gpiote_pin_t pin) +static nrf_gpiote_task_t pin_clr_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_task_output(pin)); - - return nrfy_gpiote_clr_task_get((uint8_t)pin_te_get(pin)); -} + NRFX_ASSERT(pin_is_task_output(p_instance, pin)); - -uint32_t nrfx_gpiote_clr_task_address_get(nrfx_gpiote_pin_t pin) -{ - nrf_gpiote_task_t task = nrfx_gpiote_clr_task_get(pin); - return nrfy_gpiote_task_address_get(NRF_GPIOTE, task); + return nrfy_gpiote_clr_task_get((uint8_t)pin_te_get(p_instance, pin)); } #endif // defined(GPIOTE_FEATURE_CLR_PRESENT) - -void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state) +static void pin_out_task_force(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + uint8_t state) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_task_output(pin)); + NRFX_ASSERT(pin_is_task_output(p_instance, pin)); nrf_gpiote_outinit_t init_val = state ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW; - nrfy_gpiote_task_force(NRF_GPIOTE, (uint32_t)pin_te_get(pin), init_val); + nrfy_gpiote_task_force(p_instance->p_reg, (uint32_t)pin_te_get(p_instance, pin), init_val); } - -void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin) +static void pin_out_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_task_output(pin)); + NRFX_ASSERT(pin_is_task_output((nrfx_gpiote_t const *)p_instance, pin)); - nrf_gpiote_task_t task = nrfy_gpiote_out_task_get((uint8_t)pin_te_get(pin)); - nrfy_gpiote_task_trigger(NRF_GPIOTE, task); + nrf_gpiote_task_t task = nrfy_gpiote_out_task_get((uint8_t)pin_te_get(p_instance, pin)); + nrfy_gpiote_task_trigger(p_instance->p_reg, task); } - #if defined(GPIOTE_FEATURE_SET_PRESENT) -void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin) +static void pin_set_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_in_use(pin)); - NRFX_ASSERT(pin_in_use_by_te(pin)); + NRFX_ASSERT(pin_in_use(p_instance, pin)); + NRFX_ASSERT(pin_in_use_by_te(p_instance, pin)); - nrf_gpiote_task_t task = nrfy_gpiote_set_task_get((uint8_t)pin_te_get(pin)); - nrfy_gpiote_task_trigger(NRF_GPIOTE, task); + nrf_gpiote_task_t task = nrfy_gpiote_set_task_get((uint8_t)pin_te_get(p_instance, pin)); + nrfy_gpiote_task_trigger(p_instance->p_reg, task); } - - #endif // defined(GPIOTE_FEATURE_SET_PRESENT) #if defined(GPIOTE_FEATURE_CLR_PRESENT) -void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin) +static void pin_clr_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) { NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_in_use(pin)); - NRFX_ASSERT(pin_in_use_by_te(pin)); + NRFX_ASSERT(pin_in_use(p_instance, pin)); + NRFX_ASSERT(pin_in_use_by_te(p_instance, pin)); - nrf_gpiote_task_t task = nrfy_gpiote_clr_task_get((uint8_t)pin_te_get(pin)); - nrfy_gpiote_task_trigger(NRF_GPIOTE, task); + nrf_gpiote_task_t task = nrfy_gpiote_clr_task_get((uint8_t)pin_te_get(p_instance, pin)); + nrfy_gpiote_task_trigger(p_instance->p_reg, task); } - - #endif // defined(GPIOTE_FEATURE_CLR_PRESENT) -void nrfx_gpiote_trigger_enable(nrfx_gpiote_pin_t pin, bool int_enable) +static void pin_trigger_enable(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + bool int_enable) { - NRFX_ASSERT(pin_has_trigger(pin)); + NRFX_ASSERT(pin_has_trigger(p_instance, pin)); - if (pin_in_use_by_te(pin) && pin_is_input(pin)) + if (pin_in_use_by_te(p_instance, pin) && pin_is_input(p_instance, pin)) { - uint8_t ch = pin_te_get(pin); + uint8_t ch = pin_te_get(p_instance, pin); - nrfy_gpiote_event_clear(NRF_GPIOTE, nrf_gpiote_in_event_get(ch)); - nrfy_gpiote_event_enable(NRF_GPIOTE, ch); + nrfy_gpiote_event_clear(p_instance->p_reg, nrf_gpiote_in_event_get(ch)); + nrfy_gpiote_event_enable(p_instance->p_reg, ch); if (int_enable) { - nrfy_gpiote_int_enable(NRF_GPIOTE, NRFX_BIT(ch)); + nrfy_gpiote_int_enable(p_instance->p_reg, NRFX_BIT(ch)); } } else { NRFX_ASSERT(int_enable); - nrfy_gpio_cfg_sense_set(pin, get_initial_sense(pin)); + nrfy_gpio_cfg_sense_set(pin, get_initial_sense(p_instance, pin)); } } -void nrfx_gpiote_trigger_disable(nrfx_gpiote_pin_t pin) +bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin) { - if (pin_in_use_by_te(pin) && pin_is_input(pin)) - { - uint8_t ch = pin_te_get(pin); + NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); + return nrfy_gpio_pin_read(pin) ? true : false; +} - nrfy_gpiote_int_disable(NRF_GPIOTE, NRFX_BIT(ch)); - nrfy_gpiote_event_disable(NRF_GPIOTE, ch); - } - else - { - nrfy_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE); - } +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + +nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + nrfx_gpiote_input_pin_config_t const * p_config) +{ + return gpiote_input_configure(p_instance, pin, p_config); } -bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin) +nrfx_err_t nrfx_gpiote_output_configure(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + nrfx_gpiote_output_config_t const * p_config, + nrfx_gpiote_task_config_t const * p_task_config) { - NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - return nrfy_gpio_pin_read(pin) ? true : false; + return gpiote_output_configure(p_instance, pin, p_config, p_task_config); } +void nrfx_gpiote_global_callback_set(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_interrupt_handler_t handler, + void * p_context) +{ + gpiote_global_callback_set(p_instance, handler, p_context); +} -nrf_gpiote_event_t nrfx_gpiote_in_event_get(nrfx_gpiote_pin_t pin) +nrfx_err_t nrfx_gpiote_channel_get(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + uint8_t * p_channel) { - NRFX_ASSERT(nrfy_gpio_pin_present_check(pin)); - NRFX_ASSERT(pin_is_input(pin)); - NRFX_ASSERT(pin_has_trigger(pin)); + return gpiote_channel_get(p_instance, pin, p_channel); +} + +uint32_t nrfx_gpiote_channels_number_get(nrfx_gpiote_t const * p_instance) +{ + gpiote_control_block_t * p_cb = get_cb(p_instance->drv_inst_idx); + + return p_cb->channels_number; +} + +nrfx_err_t nrfx_gpiote_init(nrfx_gpiote_t const * p_instance, uint8_t interrupt_priority) +{ + return gpiote_init(p_instance, interrupt_priority); +} + +bool nrfx_gpiote_init_check(nrfx_gpiote_t const * p_instance) +{ + return gpiote_init_check(p_instance); +} + +void nrfx_gpiote_uninit(nrfx_gpiote_t const * p_instance) +{ + gpiote_uninit(p_instance); +} + +nrfx_err_t nrfx_gpiote_pin_uninit(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + return pin_uninit(p_instance, pin); +} + +nrfx_err_t nrfx_gpiote_channel_free(nrfx_gpiote_t const * p_instance, uint8_t channel) +{ + return pin_channel_free(p_instance, channel); +} + +nrfx_err_t nrfx_gpiote_channel_alloc(nrfx_gpiote_t const * p_instance, uint8_t * p_channel) +{ + return pin_channel_alloc(p_instance, p_channel); +} + +void nrfx_gpiote_out_set(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_out_set(p_instance, pin); +} + +void nrfx_gpiote_out_clear(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_out_clear(p_instance, pin); +} + +void nrfx_gpiote_out_toggle(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_out_toggle(p_instance, pin); +} + +void nrfx_gpiote_out_task_enable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_out_task_enable(p_instance, pin); +} + +void nrfx_gpiote_out_task_disable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_out_task_disable(p_instance, pin); +} - if (pin_in_use_by_te(pin)) +nrf_gpiote_task_t nrfx_gpiote_out_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + return pin_out_task_get(p_instance, pin); +} + +uint32_t nrfx_gpiote_out_task_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + return pin_out_task_address_get(p_instance, pin); +} + +#if defined(GPIOTE_FEATURE_SET_PRESENT) +nrf_gpiote_task_t nrfx_gpiote_set_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + return pin_set_task_get(p_instance, pin); +} + +uint32_t nrfx_gpiote_set_task_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + return pin_set_task_address_get(p_instance, pin); +} +#endif // defined(GPIOTE_FEATURE_SET_PRESENT) + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) +nrf_gpiote_task_t nrfx_gpiote_clr_task_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + return pin_clr_task_get(p_instance, pin); +} + +uint32_t nrfx_gpiote_clr_task_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + nrf_gpiote_task_t task = pin_clr_task_get(p_instance, pin); + return nrfy_gpiote_task_address_get(p_instance->p_reg, task); +} +#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) + +void nrfx_gpiote_out_task_force(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + uint8_t state) +{ + pin_out_task_force(p_instance, pin, state); +} + +void nrfx_gpiote_out_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_out_task_trigger(p_instance, pin); +} + +#if defined(GPIOTE_FEATURE_SET_PRESENT) +void nrfx_gpiote_set_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_set_task_trigger(p_instance, pin); +} +#endif // defined(GPIOTE_FEATURE_SET_PRESENT) + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) +void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_clr_task_trigger(p_instance, pin); +} +#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) + +void nrfx_gpiote_trigger_enable(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin, + bool int_enable) +{ + pin_trigger_enable(p_instance, pin, int_enable); +} + +void nrfx_gpiote_trigger_disable(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + pin_trigger_disable(p_instance, pin); +} + +nrf_gpiote_event_t nrfx_gpiote_in_event_get(nrfx_gpiote_t const * p_instance, + nrfx_gpiote_pin_t pin) +{ + return pin_in_event_get(p_instance, pin); +} + +uint32_t nrfx_gpiote_in_event_address_get(nrfx_gpiote_t const * p_instance, nrfx_gpiote_pin_t pin) +{ + nrf_gpiote_event_t event = pin_in_event_get(p_instance, pin); + return nrfy_gpiote_event_address_get(p_instance->p_reg, event); +} +#else + +nrfx_gpiote_t const gpio_instance = NRFX_GPIOTE_INSTANCE(NRF_GPIOTE_INDEX); + +nrfx_err_t nrfx_gpiote_input_configure(nrfx_gpiote_pin_t pin, + nrfx_gpiote_input_config_t const * p_input_config, + nrfx_gpiote_trigger_config_t const * p_trigger_config, + nrfx_gpiote_handler_config_t const * p_handler_config) +{ + nrf_gpio_pin_pull_t const * p_pull_config = NULL; + + if (p_input_config) { - return nrfy_gpiote_in_event_get((uint8_t)pin_te_get(pin)); + p_pull_config = &p_input_config->pull; } - return NRF_GPIOTE_EVENT_PORT; + nrfx_gpiote_input_pin_config_t config = { + .p_pull_config = p_pull_config, + .p_trigger_config = p_trigger_config, + .p_handler_config = p_handler_config, + }; + + return gpiote_input_configure(&gpio_instance, pin, &config); +} + +nrfx_err_t nrfx_gpiote_output_configure(nrfx_gpiote_pin_t pin, + nrfx_gpiote_output_config_t const * p_config, + nrfx_gpiote_task_config_t const * p_task_config) +{ + return gpiote_output_configure(&gpio_instance, pin, p_config, p_task_config); +} + +void nrfx_gpiote_global_callback_set(nrfx_gpiote_interrupt_handler_t handler, + void * p_context) +{ + gpiote_global_callback_set(&gpio_instance, handler, p_context); +} + +nrfx_err_t nrfx_gpiote_channel_get(nrfx_gpiote_pin_t pin, uint8_t *p_channel) +{ + return gpiote_channel_get(&gpio_instance, pin, p_channel); +} + +nrfx_err_t nrfx_gpiote_init(uint8_t interrupt_priority) +{ + return gpiote_init(&gpio_instance, interrupt_priority); +} + +bool nrfx_gpiote_is_init(void) +{ + return gpiote_init_check(&gpio_instance); +} + +void nrfx_gpiote_uninit(void) +{ + gpiote_uninit(&gpio_instance); +} + +nrfx_err_t nrfx_gpiote_pin_uninit(nrfx_gpiote_pin_t pin) +{ + return pin_uninit(&gpio_instance, pin); +} + +nrfx_err_t nrfx_gpiote_channel_free(uint8_t channel) +{ + return pin_channel_free(&gpio_instance, channel); +} + +nrfx_err_t nrfx_gpiote_channel_alloc(uint8_t * p_channel) +{ + return pin_channel_alloc(&gpio_instance, p_channel); +} + +void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin) +{ + pin_out_set(&gpio_instance, pin); +} + +void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin) +{ + pin_out_clear(&gpio_instance, pin); +} + +void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin) +{ + pin_out_toggle(&gpio_instance, pin); +} + +void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin) +{ + pin_out_task_enable(&gpio_instance, pin); +} + +void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin) +{ + pin_out_task_disable(&gpio_instance, pin); +} + +nrf_gpiote_task_t nrfx_gpiote_out_task_get(nrfx_gpiote_pin_t pin) +{ + return pin_out_task_get(&gpio_instance, pin); +} + +uint32_t nrfx_gpiote_out_task_address_get(nrfx_gpiote_pin_t pin) +{ + return pin_out_task_address_get(&gpio_instance, pin); +} + +#if defined(GPIOTE_FEATURE_SET_PRESENT) +nrf_gpiote_task_t nrfx_gpiote_set_task_get(nrfx_gpiote_pin_t pin) +{ + return pin_set_task_get(&gpio_instance, pin); +} + +uint32_t nrfx_gpiote_set_task_address_get(nrfx_gpiote_pin_t pin) +{ + return pin_set_task_address_get(&gpio_instance, pin); +} +#endif + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) +nrf_gpiote_task_t nrfx_gpiote_clr_task_get(nrfx_gpiote_pin_t pin) +{ + return pin_clr_task_get(&gpio_instance, pin); +} + +uint32_t nrfx_gpiote_clr_task_address_get(nrfx_gpiote_pin_t pin) +{ + nrf_gpiote_task_t task = pin_clr_task_get(&gpio_instance, pin); + return nrfy_gpiote_task_address_get(gpio_instance.p_reg, task); +} +#endif + +void nrfx_gpiote_out_task_force(nrfx_gpiote_pin_t pin, uint8_t state) +{ + pin_out_task_force(&gpio_instance, pin, state); +} + +void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin) +{ + pin_out_task_trigger(&gpio_instance, pin); +} + +#if defined(GPIOTE_FEATURE_SET_PRESENT) +void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin) +{ + pin_set_task_trigger(&gpio_instance, pin); +} +#endif + +#if defined(GPIOTE_FEATURE_CLR_PRESENT) +void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin) +{ + pin_clr_task_trigger(&gpio_instance, pin); } +#endif +void nrfx_gpiote_trigger_enable(nrfx_gpiote_pin_t pin, bool int_enable) +{ + pin_trigger_enable(&gpio_instance, pin, int_enable); +} + +void nrfx_gpiote_trigger_disable(nrfx_gpiote_pin_t pin) +{ + pin_trigger_disable(&gpio_instance, pin); +} + +nrf_gpiote_event_t nrfx_gpiote_in_event_get(nrfx_gpiote_pin_t pin) +{ + return pin_in_event_get(&gpio_instance, pin); +} uint32_t nrfx_gpiote_in_event_address_get(nrfx_gpiote_pin_t pin) { - nrf_gpiote_event_t event = nrfx_gpiote_in_event_get(pin); - return nrfy_gpiote_event_address_get(NRF_GPIOTE, event); + nrf_gpiote_event_t event = pin_in_event_get(&gpio_instance, pin); + return nrfy_gpiote_event_address_get(gpio_instance.p_reg, event); } -static void call_handler(nrfx_gpiote_pin_t pin, nrfx_gpiote_trigger_t trigger) +#endif // NRFX_API_VER_AT_LEAST(3, 2, 0) || defined(__NRFX_DOXYGEN__) + + +static void call_handler(gpiote_control_block_t * p_cb, + nrfx_gpiote_pin_t pin, + nrfx_gpiote_trigger_t trigger) { - nrfx_gpiote_handler_config_t const * handler = channel_handler_get(pin); + nrfx_gpiote_handler_config_t const * handler = channel_handler_get(p_cb, pin); if (handler) { handler->handler(pin, trigger, handler->p_context); } - if (m_cb.global_handler.handler) + if (p_cb->global_handler.handler) { - m_cb.global_handler.handler(pin, trigger, m_cb.global_handler.p_context); + p_cb->global_handler.handler(pin, trigger, p_cb->global_handler.p_context); } } -static void next_sense_cond_call_handler(nrfx_gpiote_pin_t pin, - nrfx_gpiote_trigger_t trigger, - nrf_gpio_pin_sense_t sense) +static void next_sense_cond_call_handler(gpiote_control_block_t * p_cb, + nrfx_gpiote_pin_t pin, + nrfx_gpiote_trigger_t trigger, + nrf_gpio_pin_sense_t sense) { if (is_level(trigger)) { - call_handler(pin, trigger); + call_handler(p_cb, pin, trigger); if (nrfy_gpio_pin_sense_get(pin) == sense) { /* The sensing mechanism needs to be reenabled here so that the PORT event @@ -969,109 +1448,124 @@ static void next_sense_cond_call_handler(nrfx_gpiote_pin_t pin, (sense == NRF_GPIO_PIN_SENSE_HIGH && trigger == NRFX_GPIOTE_TRIGGER_LOTOHI) || (sense == NRF_GPIO_PIN_SENSE_LOW && trigger == NRFX_GPIOTE_TRIGGER_HITOLO)) { - call_handler(pin, trigger); + call_handler(p_cb, pin, trigger); } } } #if defined(NRF_GPIO_LATCH_PRESENT) -static bool latch_pending_read_and_check(uint32_t * latch) +static bool latch_pending_read_and_check(uint32_t * latch, uint32_t available_gpio_ports) { - nrfy_gpio_latches_read_and_clear(0, GPIO_COUNT, latch); - for (uint32_t port_idx = 0; port_idx < GPIO_COUNT; port_idx++) { - if (latch[port_idx]) + if (nrf_bitmask_bit_is_set(port_index[port_idx], &available_gpio_ports)) { - /* If any of the latch bits is still set, it means another edge has been captured - * before or during the interrupt processing. Therefore event-processing loop - * should be executed again. */ - return true; + nrfy_gpio_latches_read_and_clear(port_idx, 1, &latch[port_idx]); + + if (latch[port_idx]) + { + /* If any of the latch bits is still set, it means another edge has been captured + * before or during the interrupt processing. Therefore event-processing loop + * should be executed again. */ + return true; + } } } return false; } -static void port_event_handle(void) +static void port_event_handle(NRF_GPIOTE_Type * p_gpiote, gpiote_control_block_t * p_cb) { - uint32_t latch[GPIO_COUNT]; + uint32_t latch[GPIO_COUNT] = {0}; - nrfy_gpio_latches_read_and_clear(0, GPIO_COUNT, latch); + latch_pending_read_and_check(latch, p_cb->available_gpio_ports); do { for (uint32_t i = 0; i < GPIO_COUNT; i++) { - while (latch[i]) + if (nrf_bitmask_bit_is_set(port_index[i], &p_cb->available_gpio_ports)) { - uint32_t pin = NRF_CTZ(latch[i]); - - /* Convert to absolute value. */ - uint32_t abs_pin = NRF_PIN_PORT_TO_PIN_NUMBER(pin, ports[i]); - nrf_gpio_pin_sense_t sense; - nrfx_gpiote_trigger_t trigger = - PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[get_pin_idx(abs_pin)]); - - nrf_bitmask_bit_clear(pin, &latch[i]); - sense = nrfy_gpio_pin_sense_get(abs_pin); - - next_sense_cond_call_handler(abs_pin, trigger, sense); - /* Try to clear LATCH bit corresponding to currently processed pin. - * This may not succeed if the pin's state changed during the interrupt processing - * and now it matches the new sense configuration. In such case, - * the pin will be processed again in another iteration of the outer loop. */ - nrfy_gpio_pin_latch_clear(abs_pin); - } + while (latch[i]) + { + uint32_t pin = NRF_CTZ(latch[i]); + + /* Convert to absolute value. */ + nrfx_gpiote_pin_t abs_pin = NRF_PIN_PORT_TO_PIN_NUMBER(pin, ports[i]); + nrf_gpio_pin_sense_t sense; + nrfx_gpiote_trigger_t trigger = + PIN_FLAG_TRIG_MODE_GET(p_cb->pin_flags[get_pin_idx(abs_pin)]); + + nrf_bitmask_bit_clear(pin, &latch[i]); + sense = nrfy_gpio_pin_sense_get(abs_pin); + + next_sense_cond_call_handler(p_cb, abs_pin, trigger, sense); + /* Try to clear LATCH bit corresponding to currently processed pin. + * This may not succeed if the pin's state changed during the interrupt processing + * and now it matches the new sense configuration. In such case, + * the pin will be processed again in another iteration of the outer loop. */ + nrfy_gpio_pin_latch_clear(abs_pin); + } + } } /* All pins have been handled, clear PORT, check latch again in case * something came between deciding to exit and clearing PORT event. */ - (void)nrfy_gpiote_events_process(NRF_GPIOTE, (uint32_t)NRF_GPIOTE_INT_PORT_MASK); - } while (latch_pending_read_and_check(latch)); + (void)nrfy_gpiote_events_process(p_gpiote, + (uint32_t)NRF_GPIOTE_INT_PORT_MASK, + p_cb->channels_number); + } while (latch_pending_read_and_check(latch, p_cb->available_gpio_ports)); } #else -static bool input_read_and_check(uint32_t * input, uint32_t * pins_to_check) +static bool input_read_and_check(uint32_t * input, + uint32_t * pins_to_check, + uint32_t available_gpio_ports) { bool process_inputs_again; uint32_t new_input[GPIO_COUNT]; - nrfy_gpio_ports_read(0, GPIO_COUNT, new_input); - process_inputs_again = false; for (uint32_t port_idx = 0; port_idx < GPIO_COUNT; port_idx++) { - /* Execute XOR to find out which inputs have changed. */ - uint32_t input_diff = input[port_idx] ^ new_input[port_idx]; - input[port_idx] = new_input[port_idx]; - if (input_diff) + if (nrf_bitmask_bit_is_set(port_index[port_idx], &available_gpio_ports)) { - /* If any differences among inputs were found, mark those pins - * to be processed again. */ - pins_to_check[port_idx] &= input_diff; - process_inputs_again = true; - } - else - { - pins_to_check[port_idx] = 0; + nrfy_gpio_ports_read(port_idx, 1, &new_input[port_idx]); + + /* Execute XOR to find out which inputs have changed. */ + uint32_t input_diff = input[port_idx] ^ new_input[port_idx]; + input[port_idx] = new_input[port_idx]; + if (input_diff) + { + /* If any differences among inputs were found, mark those pins + * to be processed again. */ + pins_to_check[port_idx] &= input_diff; + process_inputs_again = true; + } + else + { + pins_to_check[port_idx] = 0; + } } } return process_inputs_again; } -static void port_event_handle(void) +static void port_event_handle(NRF_GPIOTE_Type * p_gpiote, gpiote_control_block_t * p_cb) { - uint32_t pins_to_check[GPIO_COUNT]; + uint32_t pins_to_check[GPIO_COUNT] = {0}; uint32_t input[GPIO_COUNT] = {0}; uint8_t rel_pin; - uint8_t pin; + nrfx_gpiote_pin_t pin; nrfx_gpiote_trigger_t trigger; - nrfy_gpio_ports_read(0, GPIO_COUNT, input); - for (uint32_t port_idx = 0; port_idx < GPIO_COUNT; port_idx++) { - pins_to_check[port_idx] = m_cb.port_pins[port_idx]; + if (nrf_bitmask_bit_is_set(port_index[port_idx], &p_cb->available_gpio_ports)) + { + nrfy_gpio_ports_read(port_idx, 1, &input[port_idx]); + pins_to_check[port_idx] = p_cb->port_pins[port_idx]; + } } do { @@ -1082,12 +1576,12 @@ static void port_event_handle(void) nrf_gpio_pin_sense_t sense; bool pin_state; - rel_pin = NRF_CTZ(pins_to_check[i]); + rel_pin = (uint8_t)NRF_CTZ(pins_to_check[i]); pins_to_check[i] &= ~NRFX_BIT(rel_pin); /* Absolute */ pin = rel_pin + 32 * i; - trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[get_pin_idx(pin)]); + trigger = PIN_FLAG_TRIG_MODE_GET(p_cb->pin_flags[get_pin_idx(pin)]); sense = nrfy_gpio_pin_sense_get(pin); pin_state = nrf_bitmask_bit_is_set(pin, input); @@ -1095,80 +1589,88 @@ static void port_event_handle(void) if ((pin_state && (sense == NRF_GPIO_PIN_SENSE_HIGH)) || (!pin_state && (sense == NRF_GPIO_PIN_SENSE_LOW)) ) { - next_sense_cond_call_handler(pin, trigger, sense); + next_sense_cond_call_handler(p_cb, pin, trigger, sense); } } } - /* All pins used with PORT must be rechecked because it's content and - * number of port pins may have changed during handler execution. */ for (uint32_t port_idx = 0; port_idx < GPIO_COUNT; port_idx++) { - pins_to_check[port_idx] = m_cb.port_pins[port_idx]; - } + if (nrf_bitmask_bit_is_set(port_index[port_idx], &p_cb->available_gpio_ports)) + { + /* All pins used with PORT must be rechecked because it's content and + * number of port pins may have changed during handler execution. */ + pins_to_check[port_idx] = p_cb->port_pins[port_idx]; - /* Small trick to continue check if input level is equal to the trigger: - * Set input to the opposite level. If input equals trigger level that - * it will be set in pins_to_check. */ - for (uint32_t i = 0; i < GPIO_COUNT; i++) - { - uint32_t pin_mask = pins_to_check[i]; + /* Small trick to continue check if input level is equal to the trigger: + * Set input to the opposite level. If input equals trigger level that + * it will be set in pins_to_check. */ - while (pin_mask) - { - rel_pin = NRF_CTZ(pin_mask); - pin_mask &= ~NRFX_BIT(rel_pin); - pin = rel_pin + 32 * i; - if (nrfy_gpio_pin_sense_get(pin) != NRF_GPIO_PIN_NOSENSE) + uint32_t pin_mask = pins_to_check[port_idx]; + + while (pin_mask) { - trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[get_pin_idx(pin)]); - if (trigger == NRFX_GPIOTE_TRIGGER_HIGH) + rel_pin = (uint8_t)NRF_CTZ(pin_mask); + pin_mask &= ~NRFX_BIT(rel_pin); + pin = rel_pin + 32 * port_idx; + if (nrfy_gpio_pin_sense_get(pin) != NRF_GPIO_PIN_NOSENSE) { - input[i] &= ~NRFX_BIT(rel_pin); - } - else if (trigger == NRFX_GPIOTE_TRIGGER_LOW) - { - input[i] |= NRFX_BIT(rel_pin); + trigger = PIN_FLAG_TRIG_MODE_GET(p_cb->pin_flags[get_pin_idx(pin)]); + if (trigger == NRFX_GPIOTE_TRIGGER_HIGH) + { + input[port_idx] &= ~NRFX_BIT(rel_pin); + } + else if (trigger == NRFX_GPIOTE_TRIGGER_LOW) + { + input[port_idx] |= NRFX_BIT(rel_pin); + } } } } } - (void)nrfy_gpiote_events_process(NRF_GPIOTE, (uint32_t)NRF_GPIOTE_INT_PORT_MASK); - } while (input_read_and_check(input, pins_to_check)); + (void)nrfy_gpiote_events_process(p_gpiote, + (uint32_t)NRF_GPIOTE_INT_PORT_MASK, + p_cb->channels_number); + } while (input_read_and_check(input, pins_to_check, p_cb->available_gpio_ports)); } #endif // defined(NRF_GPIO_LATCH_PRESENT) -static void gpiote_evt_handle(uint32_t mask) +static void gpiote_evt_handle(NRF_GPIOTE_Type * p_gpiote, + gpiote_control_block_t * p_cb, + uint32_t mask) { while (mask) { uint32_t ch = NRF_CTZ(mask); mask &= ~NRFX_BIT(ch); - nrfx_gpiote_pin_t pin = nrfy_gpiote_event_pin_get(NRF_GPIOTE, ch); - nrf_gpiote_polarity_t polarity = nrfy_gpiote_event_polarity_get(NRF_GPIOTE, ch); + nrfx_gpiote_pin_t pin = nrfy_gpiote_event_pin_get(p_gpiote, ch); + nrf_gpiote_polarity_t polarity = nrfy_gpiote_event_polarity_get(p_gpiote, ch); - call_handler(pin, gpiote_polarity_to_trigger(polarity)); + call_handler(p_cb, pin, gpiote_polarity_to_trigger(polarity)); } } -void nrfx_gpiote_irq_handler(void) +static void irq_handler(NRF_GPIOTE_Type * p_gpiote, gpiote_control_block_t * p_cb) { /* Collect status of all GPIOTE pin events. Processing is done once all are collected and cleared.*/ - uint32_t enabled_in_events = nrf_gpiote_int_enable_check(NRF_GPIOTE, NRF_GPIOTE_INT_IN_MASK); - uint32_t evt_mask = nrfy_gpiote_events_process(NRF_GPIOTE, + uint32_t enabled_in_events = nrf_gpiote_int_enable_check(p_gpiote, NRF_GPIOTE_INT_IN_MASK); + uint32_t evt_mask = nrfy_gpiote_events_process(p_gpiote, enabled_in_events | - (uint32_t)NRF_GPIOTE_INT_PORT_MASK); + (uint32_t)NRF_GPIOTE_INT_PORT_MASK, + p_cb->channels_number); /* Handle PORT event. */ if (evt_mask & (uint32_t)NRF_GPIOTE_INT_PORT_MASK) { - port_event_handle(); + port_event_handle(p_gpiote, p_cb); evt_mask &= ~(uint32_t)NRF_GPIOTE_INT_PORT_MASK; } /* Process pin events. */ - gpiote_evt_handle(evt_mask); + gpiote_evt_handle(p_gpiote, p_cb, evt_mask); } +NRFX_INSTANCE_IRQ_HANDLERS(GPIOTE, gpiote) + #endif // NRFX_CHECK(NRFX_GPIOTE_ENABLED) diff --git a/drivers/src/nrfx_i2s.c b/drivers/src/nrfx_i2s.c index a49889e9a..d145314d4 100644 --- a/drivers/src/nrfx_i2s.c +++ b/drivers/src/nrfx_i2s.c @@ -102,6 +102,12 @@ static void configure_pins(nrfx_i2s_config_t const * p_config) { nrfy_gpio_cfg_output(p_config->sck_pin); nrfy_gpio_cfg_output(p_config->lrck_pin); +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_I2S_CLOCKPIN_SCK_NEEDED_EXT) + nrfy_gpio_pin_clock_set(p_config->sck_pin, true); +#endif +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_I2S_CLOCKPIN_LRCK_NEEDED_EXT) + nrfy_gpio_pin_clock_set(p_config->lrck_pin, true); +#endif } else { @@ -112,6 +118,9 @@ static void configure_pins(nrfx_i2s_config_t const * p_config) if (p_config->mck_pin != NRF_I2S_PIN_NOT_CONNECTED) { nrfy_gpio_cfg_output(p_config->mck_pin); +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_I2S_CLOCKPIN_MCK_NEEDED_EXT) + nrfy_gpio_pin_clock_set(p_config->mck_pin, true); +#endif } // - SDOUT (optional) - always output, if (p_config->sdout_pin != NRF_I2S_PIN_NOT_CONNECTED) @@ -218,7 +227,11 @@ nrfx_err_t nrfx_i2s_init(nrfx_i2s_t const * p_instance, if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -319,6 +332,13 @@ void nrfx_i2s_uninit(nrfx_i2s_t const * p_instance) NRFX_LOG_INFO("Uninitialized."); } +bool nrfx_i2s_init_check(nrfx_i2s_t const * p_instance) +{ + nrfx_i2s_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} + nrfx_err_t nrfx_i2s_start(nrfx_i2s_t const * p_instance, nrfx_i2s_buffers_t const * p_initial_buffers, uint16_t buffer_size, @@ -381,8 +401,8 @@ nrfx_err_t nrfx_i2s_start(nrfx_i2s_t const * p_instance, p_cb->state = NRFX_DRV_STATE_POWERED_ON; nrfy_i2s_int_enable(p_instance->p_reg, - (p_cb->use_rx ? NRF_I2S_INT_RXPTRUPD_MASK : 0) | - (p_cb->use_tx ? NRF_I2S_INT_TXPTRUPD_MASK : 0) | + (p_cb->use_rx ? NRF_I2S_INT_RXPTRUPD_MASK : 0UL) | + (p_cb->use_tx ? NRF_I2S_INT_TXPTRUPD_MASK : 0UL) | NRF_I2S_INT_STOPPED_MASK); const nrfy_i2s_xfer_desc_t xfer = { diff --git a/drivers/src/nrfx_ipc.c b/drivers/src/nrfx_ipc.c index bff335e85..333549d81 100644 --- a/drivers/src/nrfx_ipc.c +++ b/drivers/src/nrfx_ipc.c @@ -37,6 +37,9 @@ #include +#define NRFX_LOG_MODULE IPC +#include + // Control block - driver instance local data. typedef struct { @@ -52,7 +55,7 @@ nrfx_err_t nrfx_ipc_init(uint8_t irq_priority, nrfx_ipc_handler_t handler, void NRFX_ASSERT(handler); if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) { - return NRFX_ERROR_ALREADY_INITIALIZED; + return NRFX_ERROR_ALREADY; } NRFX_IRQ_PRIORITY_SET(IPC_IRQn, irq_priority); @@ -62,6 +65,7 @@ nrfx_err_t nrfx_ipc_init(uint8_t irq_priority, nrfx_ipc_handler_t handler, void m_cb.handler = handler; m_cb.p_context = p_context; + NRFX_LOG_INFO("Initialized."); return NRFX_SUCCESS; } @@ -70,7 +74,7 @@ void nrfx_ipc_config_load(const nrfx_ipc_config_t * p_config) NRFX_ASSERT(p_config); NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); - uint32_t i; + uint8_t i; for (i = 0; i < IPC_CONF_NUM; ++i) { nrf_ipc_send_config_set(NRF_IPC, i, p_config->send_task_config[i]); @@ -82,13 +86,15 @@ void nrfx_ipc_config_load(const nrfx_ipc_config_t * p_config) } nrf_ipc_int_enable(NRF_IPC, p_config->receive_events_enabled); + + NRFX_LOG_INFO("Configuartion loaded."); } void nrfx_ipc_uninit(void) { NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); - uint32_t i; + uint8_t i; for (i = 0; i < IPC_CONF_NUM; ++i) { nrf_ipc_send_config_set(NRF_IPC, i, 0); @@ -99,48 +105,72 @@ void nrfx_ipc_uninit(void) nrf_ipc_receive_config_set(NRF_IPC, i, 0); } + NRFX_IRQ_DISABLE(IPC_IRQn); nrf_ipc_int_disable(NRF_IPC, 0xFFFFFFFF); + m_cb.state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +bool nrfx_ipc_init_check(void) +{ + return (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED); } void nrfx_ipc_receive_event_enable(uint8_t event_index) { NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); nrf_ipc_int_enable(NRF_IPC, (1UL << event_index)); + + NRFX_LOG_INFO("Event %u enabled.", event_index); } void nrfx_ipc_receive_event_disable(uint8_t event_index) { NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); nrf_ipc_int_disable(NRF_IPC, (1UL << event_index)); + + NRFX_LOG_INFO("Event %u disabled.", event_index); } void nrfx_ipc_receive_event_group_enable(uint32_t event_bitmask) { NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); nrf_ipc_int_enable(NRF_IPC, event_bitmask); + + NRFX_LOG_INFO("Events masked with %x enabled.", event_bitmask); } void nrfx_ipc_receive_event_group_disable(uint32_t event_bitmask) { NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); nrf_ipc_int_disable(NRF_IPC, event_bitmask); + + NRFX_LOG_INFO("Events masked with %x disabled.", event_bitmask); } void nrfx_ipc_receive_event_channel_assign(uint8_t event_index, uint8_t channel_index) { + NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(channel_index < IPC_CH_NUM); + uint32_t channel_bitmask = (1UL << channel_index); channel_bitmask |= nrf_ipc_receive_config_get(NRF_IPC, event_index); nrf_ipc_receive_config_set(NRF_IPC, event_index, channel_bitmask); + + NRFX_LOG_INFO("Event %u assigned to IPC channel %u.", event_index, channel_index); } void nrfx_ipc_send_task_channel_assign(uint8_t send_index, uint8_t channel_index) { + NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(channel_index < IPC_CH_NUM); + uint32_t channel_bitmask = (1UL << channel_index); channel_bitmask |= nrf_ipc_send_config_get(NRF_IPC, send_index); nrf_ipc_send_config_set(NRF_IPC, send_index, channel_bitmask); + + NRFX_LOG_INFO("Signal %u assigned to IPC channel %u.", send_index, channel_index); } void nrfx_ipc_irq_handler(void) @@ -152,7 +182,7 @@ void nrfx_ipc_irq_handler(void) while (bitmask) { - uint8_t event_idx = NRF_CTZ(bitmask); + uint8_t event_idx = (uint8_t)NRF_CTZ(bitmask); bitmask &= ~(1UL << event_idx); nrf_ipc_event_clear(NRF_IPC, nrf_ipc_receive_event_get(event_idx)); if (m_cb.handler) diff --git a/drivers/src/nrfx_lpcomp.c b/drivers/src/nrfx_lpcomp.c index 39fe4865d..9a629459c 100644 --- a/drivers/src/nrfx_lpcomp.c +++ b/drivers/src/nrfx_lpcomp.c @@ -48,10 +48,57 @@ (event == NRF_LPCOMP_EVENT_CROSS ? "NRF_LPCOMP_EVENT_CROSS" : \ "UNKNOWN EVENT")))) - static nrfx_lpcomp_event_handler_t m_lpcomp_event_handler = NULL; static nrfx_drv_state_t m_state = NRFX_DRV_STATE_UNINITIALIZED; +static void lpcomp_configure(nrfx_lpcomp_config_t const * p_config) +{ + nrfy_lpcomp_config_t nrfy_config = + { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + .reference = p_config->reference, + .ext_ref = p_config->ext_ref, + .detection = p_config->detection, + NRFX_COND_CODE_1(LPCOMP_FEATURE_HYST_PRESENT, (.hyst = p_config->config.hyst), ()) +#else + .config = + { + .reference = p_config->config.reference, + .detection = p_config->config.detection, + NRFX_COND_CODE_1(LPCOMP_FEATURE_HYST_PRESENT, (.hyst = p_config->config.hyst), ()) + }, +#endif + .input = p_config->input + }; + + nrfy_lpcomp_periph_configure(NRF_LPCOMP, &nrfy_config); + + uint32_t int_mask = 0; + +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + switch (p_config->detection) +#else + switch (p_config->config.detection) +#endif + { + case NRF_LPCOMP_DETECT_UP: + int_mask = NRF_LPCOMP_INT_UP_MASK; + break; + + case NRF_LPCOMP_DETECT_DOWN: + int_mask = NRF_LPCOMP_INT_DOWN_MASK; + break; + + case NRF_LPCOMP_DETECT_CROSS: + int_mask = NRF_LPCOMP_INT_CROSS_MASK; + break; + + default: + break; + } + nrfy_lpcomp_int_init(NRF_LPCOMP, int_mask, p_config->interrupt_priority, true); +} + static void lpcomp_execute_handler(nrf_lpcomp_event_t event, uint32_t event_mask) { if (event_mask & nrfy_lpcomp_int_enable_check(NRF_LPCOMP, NRFY_EVENT_TO_INT_BITMASK(event))) @@ -85,7 +132,11 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config, if (m_state != NRFX_DRV_STATE_UNINITIALIZED) { // LPCOMP driver is already initialized +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -107,17 +158,6 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config, nrfy_lpcomp_task_trigger(NRF_LPCOMP, NRF_LPCOMP_TASK_STOP); nrfy_lpcomp_disable(NRF_LPCOMP); - nrfy_lpcomp_config_t nrfy_config = - { - .config = { - .reference = p_config->config.reference, - .detection = p_config->config.detection, - NRFX_COND_CODE_1(LPCOMP_FEATURE_HYST_PRESENT, (.hyst = p_config->config.hyst), ()) - }, - .input = p_config->input - }; - - nrfy_lpcomp_periph_configure(NRF_LPCOMP, &nrfy_config); nrfy_lpcomp_shorts_disable(NRF_LPCOMP, NRF_LPCOMP_SHORT_CROSS_STOP_MASK | NRF_LPCOMP_SHORT_UP_STOP_MASK | @@ -129,27 +169,11 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config, NRF_LPCOMP_INT_DOWN_MASK | NRF_LPCOMP_INT_UP_MASK | NRF_LPCOMP_INT_CROSS_MASK); - nrfy_lpcomp_enable(NRF_LPCOMP); - uint32_t int_mask = 0; - switch (p_config->config.detection) - { - case NRF_LPCOMP_DETECT_UP: - int_mask = NRF_LPCOMP_INT_UP_MASK; - break; + lpcomp_configure(p_config); - case NRF_LPCOMP_DETECT_DOWN: - int_mask = NRF_LPCOMP_INT_DOWN_MASK; - break; - - case NRF_LPCOMP_DETECT_CROSS: - int_mask = NRF_LPCOMP_INT_CROSS_MASK; - break; + nrfy_lpcomp_enable(NRF_LPCOMP); - default: - break; - } - nrfy_lpcomp_int_init(NRF_LPCOMP, int_mask, p_config->interrupt_priority, true); nrfy_lpcomp_shorts_enable(NRF_LPCOMP, NRF_LPCOMP_SHORT_READY_SAMPLE_MASK); m_state = NRFX_DRV_STATE_INITIALIZED; @@ -172,6 +196,11 @@ void nrfx_lpcomp_uninit(void) NRFX_LOG_INFO("Uninitialized."); } +bool nrfx_lpcomp_init_check(void) +{ + return (m_state != NRFX_DRV_STATE_UNINITIALIZED); +} + void nrfx_lpcomp_enable(void) { NRFX_ASSERT(m_state == NRFX_DRV_STATE_INITIALIZED); diff --git a/drivers/src/nrfx_nfct.c b/drivers/src/nrfx_nfct.c index 3dfe89e34..22bd896bb 100644 --- a/drivers/src/nrfx_nfct.c +++ b/drivers/src/nrfx_nfct.c @@ -116,8 +116,8 @@ static nrfx_nfct_timer_workaround_t m_timer_workaround = #endif /* Macros for conversion of bits to bytes. */ -#define NRFX_NFCT_BYTES_TO_BITS(_bytes) ((_bytes) << 3) -#define NRFX_NFCT_BITS_TO_BYTES(_bits) ((_bits) >> 3) +#define NRFX_NFCT_BYTES_TO_BITS(_bytes) ((_bytes) << 3UL) +#define NRFX_NFCT_BITS_TO_BYTES(_bits) ((_bits) >> 3UL) /* Macro for checking whether the NFCT interrupt is active. */ #define NRFX_NFCT_EVT_ACTIVE(_name, _mask) \ @@ -451,7 +451,15 @@ nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config) if (m_nfct_cb.state != NRFX_DRV_STATE_UNINITIALIZED) { - return NRFX_ERROR_INVALID_STATE; +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else + err_code = NRFX_ERROR_INVALID_STATE; +#endif + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; } nfct_trims_apply(); @@ -460,15 +468,19 @@ nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config) /* Make sure that NFC pads are configured as NFCT antenna pins. */ if (!nrfy_nfct_pad_config_enable_check(NRF_NFCT)) { + err_code = NRFX_ERROR_FORBIDDEN; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); NRFX_LOG_ERROR("NFCT pads are not configured as NFCT antenna pins"); - return NRFX_ERROR_FORBIDDEN; + return err_code; } #endif m_nfct_cb.config = *p_config; nfct_hw_init_setup(); - nrfy_nfct_int_init(NRF_NFCT, 0, p_config->irq_priority, false); + nrfy_nfct_int_init(NRF_NFCT, p_config->rxtx_int_mask, p_config->irq_priority, false); #if NRFX_CHECK(NFCT_WORKAROUND_USES_TIMER) /* Initialize Timer module as the workaround for NFCT HW issues. */ @@ -476,10 +488,11 @@ nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config) #endif m_nfct_cb.state = NRFX_DRV_STATE_INITIALIZED; + m_nfct_cb.field_on = false; m_nfct_cb.frame_delay_max = NFCT_FRAMEDELAYMAX_DEFAULT; m_nfct_cb.frame_delay_min = NFCT_FRAMEDELAYMIN_DEFAULT; - NRFX_LOG_INFO("Initialized"); + NRFX_LOG_INFO("Initialized."); return err_code; } @@ -495,10 +508,18 @@ void nrfx_nfct_uninit(void) #endif m_nfct_cb.state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +bool nrfx_nfct_init_check(void) +{ + return (m_nfct_cb.state != NRFX_DRV_STATE_UNINITIALIZED); } void nrfx_nfct_enable(void) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); + nrfy_nfct_error_status_clear(NRF_NFCT, NRFX_NFCT_ERROR_STATUS_ALL_MASK); nrfy_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_SENSE); @@ -513,6 +534,8 @@ void nrfx_nfct_enable(void) void nrfx_nfct_disable(void) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); + nrfy_nfct_int_disable(NRF_NFCT, NRF_NFCT_DISABLE_ALL_INT); nrfy_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_DISABLE); @@ -521,6 +544,8 @@ void nrfx_nfct_disable(void) bool nrfx_nfct_field_check(void) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); + uint32_t const field_state = nrfy_nfct_field_status_get(NRF_NFCT); if (((field_state & NRF_NFCT_FIELD_STATE_PRESENT_MASK) == 0) && @@ -537,6 +562,7 @@ nrfx_err_t nrfx_nfct_rx(nrfx_nfct_data_desc_t const * p_rx_data) { nrfx_err_t err; + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(p_rx_data); // EasyDMA requires that transfer buffers are placed in DataRAM, @@ -550,7 +576,10 @@ nrfx_err_t nrfx_nfct_rx(nrfx_nfct_data_desc_t const * p_rx_data) return err; } - nrfy_nfct_rxtx_buffer_set(NRF_NFCT, (uint8_t *)p_rx_data->p_data, p_rx_data->data_size, true); + nrfy_nfct_rxtx_buffer_set(NRF_NFCT, + (uint8_t *)p_rx_data->p_data, + (uint16_t)p_rx_data->data_size, + true); nrfx_nfct_rxtx_int_enable(NRFX_NFCT_RX_INT_MASK); nrfy_nfct_task_trigger(NRF_NFCT, NRF_NFCT_TASK_ENABLERXDATA); @@ -561,6 +590,7 @@ nrfx_err_t nrfx_nfct_rx(nrfx_nfct_data_desc_t const * p_rx_data) nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data, nrf_nfct_frame_delay_mode_t delay_mode) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(p_tx_data); NRFX_ASSERT(p_tx_data->p_data); @@ -597,9 +627,9 @@ nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data, nrfy_nfct_rxtx_buffer_set(NRF_NFCT, (uint8_t *)p_tx_data->p_data, - p_tx_data->data_size, + (uint16_t)p_tx_data->data_size, false); - nrfy_nfct_tx_bits_set(NRF_NFCT, NRFX_NFCT_BYTES_TO_BITS(p_tx_data->data_size)); + nrfy_nfct_tx_bits_set(NRF_NFCT, (uint16_t)NRFX_NFCT_BYTES_TO_BITS(p_tx_data->data_size)); nrfy_nfct_frame_delay_mode_set(NRF_NFCT, (nrf_nfct_frame_delay_mode_t) delay_mode); nfct_frame_delay_max_set(false); @@ -620,6 +650,7 @@ nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data, nrfx_err_t nrfx_nfct_bits_tx(nrfx_nfct_data_desc_t const * p_tx_data, nrf_nfct_frame_delay_mode_t delay_mode) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(p_tx_data); NRFX_ASSERT(p_tx_data->p_data); @@ -661,9 +692,12 @@ nrfx_err_t nrfx_nfct_bits_tx(nrfx_nfct_data_desc_t const * p_tx_data, /* In case when Tx operation was scheduled with delay, stop scheduled Tx operation. */ nfct_stop_tx(); - nrfy_nfct_rxtx_buffer_set(NRF_NFCT, (uint8_t *)p_tx_data->p_data, buffer_length, false); - nrfy_nfct_tx_bits_set(NRF_NFCT, p_tx_data->data_size); - nrfy_nfct_frame_delay_mode_set(NRF_NFCT, (nrf_nfct_frame_delay_mode_t) delay_mode); + nrfy_nfct_rxtx_buffer_set(NRF_NFCT, + (uint8_t *)p_tx_data->p_data, + (uint16_t)buffer_length, + false); + nrfy_nfct_tx_bits_set(NRF_NFCT, (uint16_t)p_tx_data->data_size); + nrfy_nfct_frame_delay_mode_set(NRF_NFCT, (nrf_nfct_frame_delay_mode_t)delay_mode); nfct_frame_delay_max_set(false); nrfx_nfct_rxtx_int_enable(NRFX_NFCT_TX_INT_MASK); @@ -682,6 +716,8 @@ nrfx_err_t nrfx_nfct_bits_tx(nrfx_nfct_data_desc_t const * p_tx_data, void nrfx_nfct_state_force(nrfx_nfct_state_t state) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); + #if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_190) if (state == NRFX_NFCT_STATE_ACTIVATED) { @@ -696,6 +732,8 @@ void nrfx_nfct_state_force(nrfx_nfct_state_t state) void nrfx_nfct_init_substate_force(nrfx_nfct_active_state_t sub_state) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); + if (sub_state == NRFX_NFCT_ACTIVE_STATE_DEFAULT) { #if defined(NRF52832_XXAA) || defined(NRF52832_XXAB) @@ -726,6 +764,7 @@ void nrfx_nfct_init_substate_force(nrfx_nfct_active_state_t sub_state) nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(p_param); switch (p_param->id) @@ -759,7 +798,7 @@ nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param) } m_nfct_cb.frame_delay_min = delay_min; - nrfy_nfct_frame_delay_min_set(NRF_NFCT, m_nfct_cb.frame_delay_min); + nrfy_nfct_frame_delay_min_set(NRF_NFCT, (uint16_t)m_nfct_cb.frame_delay_min); break; } @@ -792,6 +831,9 @@ nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param) nrfx_err_t nrfx_nfct_nfcid1_default_bytes_get(uint8_t * const p_nfcid1_buff, uint32_t nfcid1_buff_len) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(p_nfcid1_buff); + uint32_t tag_header[3]; if ((nfcid1_buff_len != NRFX_NFCT_NFCID1_SINGLE_SIZE) && @@ -845,6 +887,8 @@ nrfx_err_t nrfx_nfct_nfcid1_default_bytes_get(uint8_t * const p_nfcid1_buff, void nrfx_nfct_autocolres_enable(void) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); + #if defined(NRF52832_XXAA) || defined(NRF52832_XXAB) (*(uint32_t *)(0x4000559C)) &= (~(0x1UL)); #else @@ -854,6 +898,8 @@ void nrfx_nfct_autocolres_enable(void) void nrfx_nfct_autocolres_disable(void) { + NRFX_ASSERT(m_nfct_cb.state == NRFX_DRV_STATE_INITIALIZED); + #if defined(NRF52832_XXAA) || defined(NRF52832_XXAB) (*(uint32_t *)(0x4000559C)) |= (0x1UL); #else @@ -982,7 +1028,7 @@ void nrfx_nfct_irq_handler(void) } /* Report any other error. */ - err_status &= ~NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK; + err_status &= (uint32_t)~NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK; if (err_status) { NRFX_LOG_DEBUG("Error (0x%x)", (unsigned int) err_status); diff --git a/drivers/src/nrfx_pdm.c b/drivers/src/nrfx_pdm.c index b0c61628d..91fb61b4a 100644 --- a/drivers/src/nrfx_pdm.c +++ b/drivers/src/nrfx_pdm.c @@ -123,7 +123,11 @@ nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config, if (m_cb.drv_state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -203,14 +207,19 @@ void nrfx_pdm_uninit(void) NRFX_LOG_INFO("Uninitialized."); } -static void pdm_start() +bool nrfx_pdm_init_check(void) +{ + return (m_cb.drv_state != NRFX_DRV_STATE_UNINITIALIZED); +} + +static void pdm_start(void) { m_cb.drv_state = NRFX_DRV_STATE_POWERED_ON; nrfy_pdm_enable(NRF_PDM0); nrfy_pdm_start(NRF_PDM0, NULL); } -static void pdm_buf_request() +static void pdm_buf_request(void) { m_cb.irq_buff_request = 1; NRFY_IRQ_PENDING_SET(nrfx_get_irq_number(NRF_PDM0)); diff --git a/drivers/src/nrfx_power.c b/drivers/src/nrfx_power.c index 7c27a8140..f509daef3 100644 --- a/drivers/src/nrfx_power.c +++ b/drivers/src/nrfx_power.c @@ -112,19 +112,19 @@ nrfx_err_t nrfx_power_init(nrfx_power_config_t const * p_config) NRFX_ASSERT(p_config); if (m_initialized) { - return NRFX_ERROR_ALREADY_INITIALIZED; + return NRFX_ERROR_ALREADY; } #if NRF_POWER_HAS_DCDCEN_VDDH nrf_power_dcdcen_vddh_set(NRF_POWER, p_config->dcdcenhv); -#elif NRF_REGULATORS_HAS_DCDCEN_VDDH - nrf_regulators_dcdcen_vddh_set(NRF_REGULATORS, p_config->dcdcenhv); +#elif NRF_REGULATORS_HAS_VREG_HIGH + nrf_regulators_vreg_enable_set(NRF_REGULATORS, NRF_REGULATORS_VREG_HIGH, p_config->dcdcenhv); #endif #if NRF_POWER_HAS_DCDCEN nrf_power_dcdcen_set(NRF_POWER, p_config->dcdcen); #elif defined(REGULATORS_PRESENT) - nrf_regulators_dcdcen_set(NRF_REGULATORS, p_config->dcdcen); + nrf_regulators_vreg_enable_set(NRF_REGULATORS, NRF_REGULATORS_VREG_MAIN, p_config->dcdcen); #if !defined(NRF_TRUSTZONE_NONSECURE) if (p_config->dcdcen && nrf53_errata_53()) { @@ -162,6 +162,11 @@ void nrfx_power_uninit(void) m_initialized = false; } +bool nrfx_power_init_check(void) +{ + return m_initialized; +} + #if NRFX_POWER_SUPPORTS_POFCON void nrfx_power_pof_init(nrfx_power_pofwarn_config_t const * p_config) { @@ -179,14 +184,21 @@ void nrfx_power_pof_enable(nrfx_power_pofwarn_config_t const * p_config) { #if NRF_POWER_HAS_POFCON nrf_power_pofcon_set(NRF_POWER, true, p_config->thr); -#elif NRF_REGULATORS_HAS_POFCON - nrf_regulators_pofcon_set(NRF_REGULATORS, true, p_config->thr); -#endif - #if NRF_POWER_HAS_POFCON_VDDH nrf_power_pofcon_vddh_set(NRF_POWER, p_config->thrvddh); -#elif NRF_REGULATORS_HAS_POFCON_VDDH - nrf_regulators_pofcon_vddh_set(NRF_REGULATORS, p_config->thrvddh); +#endif +#elif NRF_REGULATORS_HAS_POF + nrf_regulators_pof_config_t pof_config = { + .enable = true, + .thr = p_config->thr, +#if NRF_REGULATORS_HAS_POF_VDDH + .thr_vddh = p_config->thrvddh, +#endif +#if NRF_REGULATORS_HAS_POF_WARN_DISABLE + .warn_disable = false, +#endif + }; + nrf_regulators_pof_config_set(NRF_REGULATORS, &pof_config); #endif if (m_pofwarn_handler != NULL) @@ -199,8 +211,12 @@ void nrfx_power_pof_disable(void) { #if NRF_POWER_HAS_POFCON nrf_power_pofcon_set(NRF_POWER, false, NRF_POWER_POFTHR_V27); -#elif NRF_REGULATORS_HAS_POFCON - nrf_regulators_pofcon_set(NRF_REGULATORS, false, NRF_REGULATORS_POFTHR_V27); +#elif NRF_REGULATORS_HAS_POF + nrf_regulators_pof_config_t pof_config = { + .enable = false, + .thr = NRF_REGULATORS_POF_THR_2V7, + }; + nrf_regulators_pof_config_set(NRF_REGULATORS, &pof_config); #endif nrf_power_int_disable(NRF_POWER, NRF_POWER_INT_POFWARN_MASK); } diff --git a/drivers/src/nrfx_pwm.c b/drivers/src/nrfx_pwm.c index 5340dab18..b7dd68fdf 100644 --- a/drivers/src/nrfx_pwm.c +++ b/drivers/src/nrfx_pwm.c @@ -52,7 +52,7 @@ // an interrupt. During the playback, the PWM interrupt triggered on SEQEND // event of a preceding sequence is used to protect the transfer done for // the next sequence to be played. -#include +#include #define USE_DMA_ISSUE_WORKAROUND #endif #if defined(USE_DMA_ISSUE_WORKAROUND) @@ -75,7 +75,7 @@ typedef struct nrfx_pwm_handler_t handler; void * p_context; nrfx_drv_state_t volatile state; - uint8_t flags; + uint32_t flags; bool skip_gpio_cfg; } pwm_control_block_t; static pwm_control_block_t m_cb[NRFX_PWM_ENABLED_COUNT]; @@ -171,16 +171,16 @@ static bool pwm_stopped_check(nrfx_pwm_t const * p_instance) { pwm_control_block_t * p_cb = &m_cb[p_instance->instance_id]; - if (p_cb->handler) - { - return (p_cb->state == NRFX_DRV_STATE_POWERED_ON ? false : true); - } - else + if (!p_cb->handler) { - return ((p_cb->state != NRFX_DRV_STATE_POWERED_ON) || - (nrfy_pwm_events_process(p_instance->p_reg, - NRFY_EVENT_TO_INT_BITMASK(NRF_PWM_EVENT_STOPPED)))); + if (nrfy_pwm_events_process(p_instance->p_reg, + NRFY_EVENT_TO_INT_BITMASK(NRF_PWM_EVENT_STOPPED))) + { + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + } } + + return p_cb->state != NRFX_DRV_STATE_POWERED_ON; } nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * p_instance, @@ -194,7 +194,11 @@ nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * p_instance, if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -221,9 +225,10 @@ nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * p_instance, nrfx_err_t nrfx_pwm_reconfigure(nrfx_pwm_t const * p_instance, nrfx_pwm_config_t const * p_config) { - NRFX_ASSERT(p_config); pwm_control_block_t * p_cb = &m_cb[p_instance->instance_id]; + NRFX_ASSERT(p_config); + if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) { return NRFX_ERROR_INVALID_STATE; @@ -241,6 +246,7 @@ nrfx_err_t nrfx_pwm_reconfigure(nrfx_pwm_t const * p_instance, nrfx_pwm_config_t void nrfx_pwm_uninit(nrfx_pwm_t const * p_instance) { pwm_control_block_t * p_cb = &m_cb[p_instance->instance_id]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); nrfy_pwm_int_uninit(p_instance->p_reg); @@ -256,11 +262,19 @@ void nrfx_pwm_uninit(nrfx_pwm_t const * p_instance) } p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +bool nrfx_pwm_init_check(nrfx_pwm_t const * p_instance) +{ + pwm_control_block_t * p_cb = &m_cb[p_instance->instance_id]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); } static uint32_t start_playback(nrfx_pwm_t const * p_instance, pwm_control_block_t * p_cb, - uint8_t flags, + uint32_t flags, uint8_t seq_id) { p_cb->state = NRFX_DRV_STATE_POWERED_ON; @@ -294,7 +308,7 @@ static uint32_t start_playback(nrfx_pwm_t const * p_instance, #endif if (flags & NRFX_PWM_FLAG_NO_EVT_FINISHED) { - int_mask &= ~NRF_PWM_INT_LOOPSDONE_MASK; + int_mask &= (uint32_t)~NRF_PWM_INT_LOOPSDONE_MASK; } nrfy_pwm_int_set(p_instance->p_reg, int_mask); @@ -316,9 +330,9 @@ static uint32_t start_playback(nrfx_pwm_t const * p_instance, // the PWM by triggering the proper task from EGU interrupt handler, // it is not safe to do it directly via PPI. p_cb->starting_task_address = starting_task_address; - nrfy_egu_int_enable(DMA_ISSUE_EGU, nrfy_egu_channel_int_get(p_instance->instance_id)); - return nrfy_egu_task_address_get(DMA_ISSUE_EGU, - nrfy_egu_trigger_task_get(p_instance->instance_id)); + nrf_egu_int_enable(DMA_ISSUE_EGU, nrf_egu_channel_int_get(p_instance->instance_id)); + return nrf_egu_task_address_get(DMA_ISSUE_EGU, + nrf_egu_trigger_task_get(p_instance->instance_id)); #else return starting_task_address; #endif @@ -334,6 +348,7 @@ uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * p_instance, uint32_t flags) { pwm_control_block_t * p_cb = &m_cb[p_instance->instance_id]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(playback_count > 0); NRFX_ASSERT(nrfx_is_in_ram(p_sequence->values.p_raw)); @@ -344,7 +359,7 @@ uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * p_instance, nrfy_pwm_sequence_set(p_instance->p_reg, 1, p_sequence); bool odd = (playback_count & 1); nrfy_pwm_loop_set(p_instance->p_reg, - (playback_count / 2) + (odd ? 1 : 0)); + (uint16_t)((playback_count / 2UL) + (odd ? 1UL : 0UL))); uint32_t shorts_mask = 0; if (flags & NRFX_PWM_FLAG_STOP) @@ -378,6 +393,7 @@ uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * p_instance, uint32_t flags) { pwm_control_block_t * p_cb = &m_cb[p_instance->instance_id]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(playback_count > 0); NRFX_ASSERT(nrfx_is_in_ram(p_sequence_0->values.p_raw)); @@ -420,6 +436,7 @@ uint32_t nrfx_pwm_complex_playback(nrfx_pwm_t const * p_instance, bool nrfx_pwm_stop(nrfx_pwm_t const * p_instance, bool wait_until_stopped) { pwm_control_block_t * p_cb = &m_cb[p_instance->instance_id]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); bool ret_val = false; @@ -508,10 +525,10 @@ void DMA_ISSUE_EGU_IRQHandler(void) { for (uint8_t i = 0; i < NRFX_PWM_ENABLED_COUNT; i++) { - nrf_egu_event_t event = nrfy_egu_triggered_event_get(i); - if (nrfy_egu_event_check(DMA_ISSUE_EGU, event)) + nrf_egu_event_t event = nrf_egu_triggered_event_get(i); + if (nrf_egu_event_check(DMA_ISSUE_EGU, event)) { - nrfy_egu_event_clear(DMA_ISSUE_EGU, event); + nrf_egu_event_clear(DMA_ISSUE_EGU, event); *(volatile uint32_t *)(m_cb[i].starting_task_address) = 1; } } diff --git a/drivers/src/nrfx_qdec.c b/drivers/src/nrfx_qdec.c index c61ca609f..b58f3b706 100644 --- a/drivers/src/nrfx_qdec.c +++ b/drivers/src/nrfx_qdec.c @@ -112,7 +112,6 @@ nrfx_err_t nrfx_qdec_init(nrfx_qdec_t const * p_instance, nrfx_qdec_event_handler_t handler, void * p_context) { - NRFX_ASSERT(p_instance); NRFX_ASSERT(p_config); NRFX_ASSERT(handler); @@ -122,7 +121,11 @@ nrfx_err_t nrfx_qdec_init(nrfx_qdec_t const * p_instance, if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -166,13 +169,13 @@ nrfx_err_t nrfx_qdec_reconfigure(nrfx_qdec_t const * p_instance, void nrfx_qdec_uninit(nrfx_qdec_t const * p_instance) { - NRFX_ASSERT(p_instance); qdec_control_block_t * const p_cb = &m_cb[p_instance->drv_inst_idx]; nrfy_qdec_pins_t pins; NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); nrfy_qdec_disable(p_instance->p_reg); + nrfy_qdec_int_disable(p_instance->p_reg, 0xFFFFFFFF); nrfy_qdec_int_uninit(p_instance->p_reg); nrfy_qdec_shorts_disable(p_instance->p_reg, NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK); @@ -193,10 +196,15 @@ void nrfx_qdec_uninit(nrfx_qdec_t const * p_instance) NRFX_LOG_INFO("Uninitialized."); } -void nrfx_qdec_enable(nrfx_qdec_t const * p_instance) +bool nrfx_qdec_init_check(nrfx_qdec_t const * p_instance) { - NRFX_ASSERT(p_instance); + qdec_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} +void nrfx_qdec_enable(nrfx_qdec_t const * p_instance) +{ qdec_control_block_t * const p_cb = &m_cb[p_instance->drv_inst_idx]; NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); @@ -209,8 +217,6 @@ void nrfx_qdec_enable(nrfx_qdec_t const * p_instance) void nrfx_qdec_disable(nrfx_qdec_t const * p_instance) { - NRFX_ASSERT(p_instance); - qdec_control_block_t * const p_cb = &m_cb[p_instance->drv_inst_idx]; NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); @@ -224,7 +230,6 @@ void nrfx_qdec_accumulators_read(nrfx_qdec_t const * p_instance, int32_t * p_acc, uint32_t * p_accdbl) { - NRFX_ASSERT(p_instance); NRFX_ASSERT(p_accdbl); NRFX_ASSERT(p_acc); NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_POWERED_ON); @@ -243,11 +248,13 @@ static void irq_handler(NRF_QDEC_Type * p_qdec, qdec_control_block_t * p_cb) uint32_t evt_to_process; nrfx_qdec_event_t event; uint32_t evt_mask; + uint32_t all_evt_mask; - evt_to_process = NRFY_EVENT_TO_INT_BITMASK(NRF_QDEC_EVENT_SAMPLERDY) | - NRFY_EVENT_TO_INT_BITMASK(NRF_QDEC_EVENT_REPORTRDY) | - NRFY_EVENT_TO_INT_BITMASK(NRF_QDEC_EVENT_ACCOF); + all_evt_mask = NRFY_EVENT_TO_INT_BITMASK(NRF_QDEC_EVENT_SAMPLERDY) | + NRFY_EVENT_TO_INT_BITMASK(NRF_QDEC_EVENT_REPORTRDY) | + NRFY_EVENT_TO_INT_BITMASK(NRF_QDEC_EVENT_ACCOF); + evt_to_process = nrfy_qdec_int_enable_check(p_qdec, all_evt_mask); evt_mask = nrfy_qdec_events_process(p_qdec, evt_to_process); if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_QDEC_EVENT_SAMPLERDY)) diff --git a/drivers/src/nrfx_qspi.c b/drivers/src/nrfx_qspi.c index 0cdf53445..553977b16 100644 --- a/drivers/src/nrfx_qspi.c +++ b/drivers/src/nrfx_qspi.c @@ -39,6 +39,9 @@ #include #include +#define NRFX_LOG_MODULE QSPI +#include + /** @brief Command byte used to read status register. */ #define QSPI_STD_CMD_RDSR 0x05 @@ -100,11 +103,20 @@ typedef struct uint32_t addr_secondary; /**< Address for the secondary buffer. */ nrfx_qspi_evt_ext_t evt_ext; /**< Extended event. */ nrfx_qspi_state_t state; /**< Driver state. */ + uint32_t timeout; /**< Time in milliseconds used for operation timeout. */ + bool volatile activated; /**< Flag indicating whether the QSPI is active. */ + bool volatile timeout_signal; /**< Flag indicating a timeout of an operation. + * The flag is used to trigger premature timeout + * if @ref nrfx_qspi_timeout_signal is used. */ bool skip_gpio_cfg; /**< Do not touch GPIO configuration of used pins. */ } qspi_control_block_t; static qspi_control_block_t m_cb; +static nrfx_err_t qspi_activate(bool wait); +static nrfx_err_t qspi_ready_wait(void); +static void qspi_workaround_apply(void); + static nrfx_err_t qspi_xfer(void * p_buffer, size_t length, uint32_t address, @@ -118,32 +130,12 @@ static nrfx_err_t qspi_xfer(void * p_buffer, return NRFX_ERROR_INVALID_ADDR; } - if ((m_cb.state != NRFX_QSPI_STATE_IDLE) && - (m_cb.state != desired_state)) + if (m_cb.state != NRFX_QSPI_STATE_IDLE && + (m_cb.state != desired_state || !m_cb.activated)) { return NRFX_ERROR_BUSY; } - bool is_first_buffer = false; - if (m_cb.handler) - { - if (m_cb.p_buffer_primary) - { - m_cb.p_buffer_secondary = p_buffer; - m_cb.size_secondary = length; - m_cb.addr_secondary = address; - } - else - { - m_cb.p_buffer_primary = p_buffer; - m_cb.size_primary = length; - m_cb.addr_primary = address; - - m_cb.state = desired_state; - is_first_buffer = true; - } - } - nrf_qspi_task_t task; if (desired_state == NRFX_QSPI_STATE_WRITE) { @@ -156,18 +148,44 @@ static nrfx_err_t qspi_xfer(void * p_buffer, task = NRF_QSPI_TASK_READSTART; } + m_cb.timeout_signal = false; + if (!m_cb.handler) { + if (!m_cb.activated && qspi_activate(true) == NRFX_ERROR_TIMEOUT) + { + return NRFX_ERROR_TIMEOUT; + } + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); nrf_qspi_task_trigger(NRF_QSPI, task); - while (!nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY)) - {} + + return qspi_ready_wait(); } - else if (is_first_buffer) + + if (m_cb.p_buffer_primary) { + m_cb.p_buffer_secondary = p_buffer; + m_cb.size_secondary = length; + m_cb.addr_secondary = address; + } + else + { + m_cb.p_buffer_primary = p_buffer; + m_cb.size_primary = length; + m_cb.addr_primary = address; + + m_cb.state = desired_state; nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); - nrf_qspi_task_trigger(NRF_QSPI, task); + if (!m_cb.activated) + { + (void)qspi_activate(false); + } + else + { + nrf_qspi_task_trigger(NRF_QSPI, task); + } } return NRFX_SUCCESS; @@ -262,11 +280,15 @@ static void qspi_pins_deconfigure(void) static nrfx_err_t qspi_ready_wait(void) { bool result; - NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY), - QSPI_DEF_WAIT_ATTEMPTS, - QSPI_DEF_WAIT_TIME_US, - result); - if (!result) + uint32_t attempts = m_cb.timeout > 0 ? + (m_cb.timeout * 1000UL) / QSPI_DEF_WAIT_TIME_US : QSPI_DEF_WAIT_ATTEMPTS; + + NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY) || m_cb.timeout_signal, + attempts, + QSPI_DEF_WAIT_TIME_US, + result); + + if (!result || m_cb.timeout_signal) { return NRFX_ERROR_TIMEOUT; } @@ -281,6 +303,7 @@ static nrfx_err_t qspi_configure(nrfx_qspi_config_t const * p_config) return NRFX_ERROR_INVALID_PARAM; } + m_cb.timeout = p_config->timeout; m_cb.skip_gpio_cfg = p_config->skip_gpio_cfg; /* The code below accesses the IFTIMING and IFCONFIG1 registers what @@ -289,12 +312,11 @@ static nrfx_err_t qspi_configure(nrfx_qspi_config_t const * p_config) */ if (NRF52_ERRATA_215_ENABLE_WORKAROUND || NRF53_ERRATA_43_ENABLE_WORKAROUND) { - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE); - if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT) - { - return NRFX_ERROR_TIMEOUT; - } + /* The interrupt is disabled because of the anomaly handling. + * It will be reenabled if needed before the next QSPI operation. + */ + nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + qspi_workaround_apply(); } nrf_qspi_xip_offset_set(NRF_QSPI, p_config->xip_offset); @@ -304,12 +326,12 @@ static nrfx_err_t qspi_configure(nrfx_qspi_config_t const * p_config) uint32_t regval = nrf_qspi_ifconfig0_raw_get(NRF_QSPI); if (p_config->phy_if.sck_freq == NRF_QSPI_FREQ_DIV1) { - regval |= ((1 << 16) | (1 << 17)); + regval |= ((1UL << 16) | (1UL << 17)); } else { - regval &= ~(1 << 17); - regval |= (1 << 16); + regval &= ~(1UL << 17); + regval |= (1UL << 16); } nrf_qspi_ifconfig0_raw_set(NRF_QSPI, regval); nrf_qspi_iftiming_set(NRF_QSPI, 6); @@ -325,72 +347,151 @@ static nrfx_err_t qspi_configure(nrfx_qspi_config_t const * p_config) return NRFX_SUCCESS; } +static nrfx_err_t qspi_activate(bool wait) +{ + nrf_qspi_enable(NRF_QSPI); + + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE); + + if (wait) + { + nrfx_err_t ret = qspi_ready_wait(); + + if (ret == NRFX_SUCCESS) + { + m_cb.activated = true; + } + return ret; + } + + return NRFX_SUCCESS; +} + +static void qspi_deactivate(void) +{ + m_cb.activated = false; + + if (nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI)) + { + nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, NRF_QSPI_CINSTR_LEN_1B, true); + } + + nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_DEACTIVATE); + + nrf_qspi_disable(NRF_QSPI); + + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); +} + +static void qspi_workaround_apply(void) +{ + nrf_qspi_pins_t pins; + nrf_qspi_pins_t disconnected_pins = { + .sck_pin = NRF_QSPI_PIN_NOT_CONNECTED, + .csn_pin = NRF_QSPI_PIN_NOT_CONNECTED, + .io0_pin = NRF_QSPI_PIN_NOT_CONNECTED, + .io1_pin = NRF_QSPI_PIN_NOT_CONNECTED, + .io2_pin = NRF_QSPI_PIN_NOT_CONNECTED, + .io3_pin = NRF_QSPI_PIN_NOT_CONNECTED, + }; + + /* Disconnect pins to not wait for response from external memory. */ + nrf_qspi_pins_get(NRF_QSPI, &pins); + nrf_qspi_pins_set(NRF_QSPI, &disconnected_pins); + + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE); + + while (!nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY)) + {} + + /* Restore previous pins. */ + nrf_qspi_pins_set(NRF_QSPI, &pins); +} + nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config, nrfx_qspi_handler_t handler, void * p_context) { + nrfx_err_t err_code; + NRFX_ASSERT(p_config); + if (m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED) { - return NRFX_ERROR_INVALID_STATE; +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else + err_code = NRFX_ERROR_INVALID_STATE; +#endif + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; } m_cb.handler = handler; m_cb.p_context = p_context; - /* QSPI interrupt is disabled because the device should be enabled in polling mode - (wait for activate task event ready) */ - nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); - if (p_config) { - nrfx_err_t result = qspi_configure(p_config); - if (result != NRFX_SUCCESS) + nrfx_err_t err_code = qspi_configure(p_config); + if (err_code != NRFX_SUCCESS) { - return result; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; } } m_cb.p_buffer_primary = NULL; m_cb.p_buffer_secondary = NULL; - m_cb.state = NRFX_QSPI_STATE_IDLE; - - nrf_qspi_enable(NRF_QSPI); - - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE); - // Waiting for the peripheral to activate + m_cb.state = NRFX_QSPI_STATE_IDLE; + m_cb.activated = false; - return qspi_ready_wait(); + return NRFX_SUCCESS; } nrfx_err_t nrfx_qspi_reconfigure(nrfx_qspi_config_t const * p_config) { NRFX_ASSERT(p_config); nrfx_err_t err_code = NRFX_SUCCESS; + if (m_cb.state == NRFX_QSPI_STATE_UNINITIALIZED) { return NRFX_ERROR_INVALID_STATE; } + if (m_cb.state != NRFX_QSPI_STATE_IDLE) { return NRFX_ERROR_BUSY; } - /* The interrupt is disabled because of the anomaly handling performed - * in qspi_configure(). It will be reenabled if needed before the next - * QSPI operation. - */ - nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); - - nrf_qspi_disable(NRF_QSPI); - err_code = qspi_configure(p_config); - nrf_qspi_enable(NRF_QSPI); + if (!m_cb.activated) + { + err_code = qspi_configure(p_config); + } + else + { + qspi_deactivate(); + err_code = qspi_configure(p_config); + } return err_code; } +void nrfx_qspi_timeout_signal(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED); + + m_cb.timeout_signal = true; +} + nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, void const * p_tx_buffer, void * p_rx_buffer) @@ -402,6 +503,11 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, return NRFX_ERROR_BUSY; } + if (!m_cb.activated && qspi_activate(true) == NRFX_ERROR_TIMEOUT) + { + return NRFX_ERROR_TIMEOUT; + } + /* In some cases, only opcode should be sent. To prevent execution, set function code is * surrounded by an if. */ @@ -422,14 +528,11 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config, */ if (NRF52_ERRATA_215_ENABLE_WORKAROUND || NRF53_ERRATA_43_ENABLE_WORKAROUND) { - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE); - if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT) - { - return NRFX_ERROR_TIMEOUT; - } + qspi_workaround_apply(); } + m_cb.timeout_signal = false; + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); nrf_qspi_cinstr_transfer_start(NRF_QSPI, p_config); @@ -456,6 +559,9 @@ nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode, nrf_qspi_cinstr_len_t length, void const * p_tx_buffer) { + NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED); + NRFX_ASSERT(p_tx_buffer); + nrf_qspi_cinstr_conf_t config = NRFX_QSPI_DEFAULT_CINSTR(opcode, length); return nrfx_qspi_cinstr_xfer(&config, p_tx_buffer, NULL); } @@ -470,6 +576,11 @@ nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config) return NRFX_ERROR_BUSY; } + if (!m_cb.activated && qspi_activate(true) == NRFX_ERROR_TIMEOUT) + { + return NRFX_ERROR_TIMEOUT; + } + /* For transferring arbitrary byte length custom instructions driver has to switch to * blocking mode. If driver was previously configured to non-blocking mode, interrupts * will get reenabled before next standard transfer. @@ -482,16 +593,13 @@ nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config) */ if (NRF52_ERRATA_215_ENABLE_WORKAROUND || NRF53_ERRATA_43_ENABLE_WORKAROUND) { - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE); - if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT) - { - return NRFX_ERROR_TIMEOUT; - } + qspi_workaround_apply(); } NRFX_ASSERT(!(nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI))); + m_cb.timeout_signal = false; + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); nrf_qspi_cinstr_long_transfer_start(NRF_QSPI, p_config); @@ -521,6 +629,8 @@ nrfx_err_t nrfx_qspi_lfm_xfer(void const * p_tx_buffer, for (uint32_t curr_byte = 0; curr_byte < transfer_length; curr_byte += 8) { uint32_t remaining_bytes = transfer_length - curr_byte; + m_cb.timeout_signal = false; + if (remaining_bytes < 8) { length = (nrf_qspi_cinstr_len_t)(remaining_bytes + 1); @@ -571,6 +681,8 @@ nrfx_err_t nrfx_qspi_lfm_xfer(void const * p_tx_buffer, nrfx_err_t nrfx_qspi_mem_busy_check(void) { + NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED); + nrfx_err_t ret_code; uint8_t status_value = 0; @@ -605,25 +717,44 @@ void nrfx_qspi_uninit(void) NRFX_IRQ_DISABLE(QSPI_IRQn); - if (nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI)) + qspi_deactivate(); + if (!m_cb.skip_gpio_cfg) { - nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, NRF_QSPI_CINSTR_LEN_1B, true); + qspi_pins_deconfigure(); } - nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + m_cb.state = NRFX_QSPI_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} - nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_DEACTIVATE); +nrfx_err_t nrfx_qspi_activate(bool wait) +{ + NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED); - nrf_qspi_disable(NRF_QSPI); + if (m_cb.activated) + { + return NRFX_ERROR_ALREADY; + } - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + return qspi_activate(wait); +} - if (!m_cb.skip_gpio_cfg) +nrfx_err_t nrfx_qspi_deactivate(void) +{ + NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED); + + if (m_cb.state != NRFX_QSPI_STATE_IDLE) { - qspi_pins_deconfigure(); + return NRFX_ERROR_BUSY; } - m_cb.state = NRFX_QSPI_STATE_UNINITIALIZED; + qspi_deactivate(); + return NRFX_SUCCESS; +} + +bool nrfx_qspi_init_check(void) +{ + return (m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED); } nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer, @@ -654,26 +785,43 @@ nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length, { return NRFX_ERROR_BUSY; } - m_cb.state = NRFX_QSPI_STATE_ERASE; nrf_qspi_erase_ptr_set(NRF_QSPI, start_address, length); - nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); - nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ERASESTART); + m_cb.timeout_signal = false; + if (!m_cb.handler) { - while (!nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY)) - {} - m_cb.state = NRFX_QSPI_STATE_IDLE; + if (!m_cb.activated && qspi_activate(true) == NRFX_ERROR_TIMEOUT) + { + return NRFX_ERROR_TIMEOUT; + } + + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ERASESTART); + + return qspi_ready_wait(); + } + + m_cb.state = NRFX_QSPI_STATE_ERASE; + nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + + if (!m_cb.activated) + { + (void)qspi_activate(false); } else { - nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK); + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ERASESTART); } + return NRFX_SUCCESS; } nrfx_err_t nrfx_qspi_chip_erase(void) { + NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED); + return nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_ALL, 0); } @@ -788,6 +936,27 @@ static void qspi_extended_event_process(nrfx_qspi_evt_ext_t * p_event) } } +static void qspi_activate_event_process(void) +{ + switch (m_cb.state) + { + case NRFX_QSPI_STATE_WRITE: + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_WRITESTART); + break; + + case NRFX_QSPI_STATE_READ: + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_READSTART); + break; + + case NRFX_QSPI_STATE_ERASE: + nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ERASESTART); + break; + + default: + break; + } +} + void nrfx_qspi_irq_handler(void) { // Catch Event ready interrupts @@ -795,13 +964,24 @@ void nrfx_qspi_irq_handler(void) { nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY); + if (!m_cb.activated) + { + m_cb.activated = true; + qspi_activate_event_process(); + return; + } + qspi_extended_event_process(&m_cb.evt_ext); if (!m_cb.p_buffer_primary) { m_cb.state = NRFX_QSPI_STATE_IDLE; } - m_cb.handler(NRFX_QSPI_EVENT_DONE, m_cb.p_context); + if (!m_cb.timeout_signal) + { + m_cb.handler(NRFX_QSPI_EVENT_DONE, m_cb.p_context); + } + m_cb.evt_ext.type = NRFX_QSPI_EVENT_NONE; } } diff --git a/drivers/src/nrfx_rng.c b/drivers/src/nrfx_rng.c index 067bb9532..dc75fcac7 100644 --- a/drivers/src/nrfx_rng.c +++ b/drivers/src/nrfx_rng.c @@ -56,7 +56,7 @@ nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handle NRFX_ASSERT(handler); if (m_rng_state != NRFX_DRV_STATE_UNINITIALIZED) { - return NRFX_ERROR_ALREADY_INITIALIZED; + return NRFX_ERROR_ALREADY; } m_rng_hndl = handler; @@ -101,6 +101,11 @@ void nrfx_rng_uninit(void) NRFX_LOG_INFO("Uninitialized."); } +bool nrfx_rng_init_check(void) +{ + return (m_rng_state != NRFX_DRV_STATE_UNINITIALIZED); +} + void nrfx_rng_irq_handler(void) { nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY); diff --git a/drivers/src/nrfx_rtc.c b/drivers/src/nrfx_rtc.c index 241f27cf9..13e71e7a6 100644 --- a/drivers/src/nrfx_rtc.c +++ b/drivers/src/nrfx_rtc.c @@ -53,7 +53,6 @@ (event == NRF_RTC_EVENT_COMPARE_3 ? "NRF_RTC_EVENT_COMPARE_3" : \ "UNKNOWN EVENT")))))) - /** @brief RTC driver instance control block structure. */ typedef struct { @@ -78,7 +77,11 @@ nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * p_instance, if (m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -104,10 +107,11 @@ nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * p_instance, void nrfx_rtc_uninit(nrfx_rtc_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + uint32_t mask = NRF_RTC_INT_TICK_MASK | NRF_RTC_INT_OVERFLOW_MASK | NRF_RTC_ALL_CHANNELS_INT_MASK; - NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); nrfy_rtc_int_uninit(p_instance->p_reg); nrfy_rtc_stop(p_instance->p_reg, mask); @@ -116,6 +120,11 @@ void nrfx_rtc_uninit(nrfx_rtc_t const * p_instance) NRFX_LOG_INFO("Uninitialized."); } +bool nrfx_rtc_init_check(nrfx_rtc_t const * p_instance) +{ + return (m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); +} + void nrfx_rtc_enable(nrfx_rtc_t const * p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); @@ -184,10 +193,10 @@ nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * p_instance, { nrfy_rtc_cc_set(p_instance->p_reg, channel, val); uint32_t cnt = nrfy_rtc_counter_get(p_instance->p_reg); - int32_t diff = cnt - val; + int32_t diff = (int32_t)(cnt - val); if (cnt < val) { - diff += NRF_RTC_COUNTER_MAX; + diff += (int32_t)NRF_RTC_COUNTER_MAX; } if (diff < m_cb[p_instance->instance_id].tick_latency) { @@ -216,6 +225,8 @@ nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * p_instance, void nrfx_rtc_tick_enable(nrfx_rtc_t const * p_instance, bool enable_irq) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); + nrfy_rtc_event_int_clear_enable(p_instance->p_reg, NRF_RTC_EVENT_TICK, enable_irq); @@ -224,6 +235,8 @@ void nrfx_rtc_tick_enable(nrfx_rtc_t const * p_instance, bool enable_irq) void nrfx_rtc_tick_disable(nrfx_rtc_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrfy_rtc_event_int_disable(p_instance->p_reg, NRF_RTC_INT_TICK_MASK); NRFX_LOG_INFO("Tick events disabled."); @@ -231,6 +244,8 @@ void nrfx_rtc_tick_disable(nrfx_rtc_t const * p_instance) void nrfx_rtc_overflow_enable(nrfx_rtc_t const * p_instance, bool enable_irq) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); + nrfy_rtc_event_int_clear_enable(p_instance->p_reg, NRF_RTC_EVENT_OVERFLOW, enable_irq); @@ -238,12 +253,16 @@ void nrfx_rtc_overflow_enable(nrfx_rtc_t const * p_instance, bool enable_irq) void nrfx_rtc_overflow_disable(nrfx_rtc_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrfy_rtc_event_int_disable(p_instance->p_reg, NRF_RTC_INT_OVERFLOW_MASK); } uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + uint32_t ticks; if (m_cb[p_instance->instance_id].reliable) { @@ -266,12 +285,11 @@ static void irq_handler(NRF_RTC_Type * p_reg, uint32_t event_mask = nrfy_rtc_events_process(p_reg, evt_to_process); - nrf_rtc_event_t event; uint32_t active_cc_mask = nrfy_rtc_int_enable_check(p_reg, NRF_RTC_ALL_CHANNELS_INT_MASK); - for (uint32_t i = 0; i < channel_count; i++) + for (uint8_t i = 0; i < channel_count; i++) { - event = nrf_rtc_compare_event_get(i); + nrf_rtc_event_t event = nrf_rtc_compare_event_get(i); if ((active_cc_mask & NRFY_EVENT_TO_INT_BITMASK(event)) && (event_mask & NRFY_EVENT_TO_INT_BITMASK(event))) { @@ -283,13 +301,13 @@ static void irq_handler(NRF_RTC_Type * p_reg, if (event_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_RTC_EVENT_TICK)) { - NRFX_LOG_DEBUG("Event: %s, reg: %p.", EVT_TO_STR(event), p_reg); + NRFX_LOG_DEBUG("Event: %s, reg: %p.", EVT_TO_STR(NRF_RTC_EVENT_TICK), p_reg); p_cb->handler(NRFX_RTC_INT_TICK); } if (event_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_RTC_EVENT_OVERFLOW)) { - NRFX_LOG_DEBUG("Event: %s, reg: %p.", EVT_TO_STR(event), p_reg); + NRFX_LOG_DEBUG("Event: %s, reg: %p.", EVT_TO_STR(NRF_RTC_EVENT_OVERFLOW), p_reg); p_cb->handler(NRFX_RTC_INT_OVERFLOW); } } diff --git a/drivers/src/nrfx_saadc.c b/drivers/src/nrfx_saadc.c index 85f2655be..abd06e8ef 100644 --- a/drivers/src/nrfx_saadc.c +++ b/drivers/src/nrfx_saadc.c @@ -72,7 +72,7 @@ typedef struct nrfx_saadc_event_handler_t calib_event_handler; ///< Event handler function pointer for calibration event. nrfy_saadc_buffer_t buffer_primary; ///< Primary buffer description structure. nrfy_saadc_buffer_t buffer_secondary; ///< Secondary buffer description structure. - nrf_saadc_value_t calib_samples[2]; ///< Scratch buffer for post-calibration samples. + uint16_t calib_samples[2]; ///< Scratch buffer for post-calibration samples. uint16_t samples_converted; ///< Number of samples present in result buffer when in the blocking mode. nrfy_saadc_channel_input_t channels_input[SAADC_CH_NUM]; ///< Array holding input of each of the channels. nrf_saadc_state_t saadc_state; ///< State of the SAADC driver. @@ -151,17 +151,17 @@ static void saadc_channel_config(nrfx_saadc_channel_t const * p_channel) nrfy_saadc_channel_configure(NRF_SAADC, channel_index, &p_channel->channel_config, NULL); m_cb.channels_input[channel_index].input_p = p_channel->pin_p; m_cb.channels_input[channel_index].input_n = p_channel->pin_n; - m_cb.channels_configured |= 1U << channel_index; + m_cb.channels_configured |= (uint8_t)(1U << channel_index); } static void saadc_channels_deconfig(uint32_t channel_mask) { while (channel_mask) { - uint8_t channel = NRF_CTZ(channel_mask); + uint8_t channel = (uint8_t)NRF_CTZ(channel_mask); - channel_mask &= ~(1 << channel); - m_cb.channels_configured &= ~(1 << channel); + channel_mask &= ~(1UL << channel); + m_cb.channels_configured &= (uint8_t)~(1UL << channel); m_cb.channels_input[channel].input_p = NRF_SAADC_INPUT_DISABLED; m_cb.channels_input[channel].input_n = NRF_SAADC_INPUT_DISABLED; @@ -172,8 +172,8 @@ static void saadc_channels_disable(uint32_t channel_mask) { while (channel_mask) { - uint8_t channel = NRF_CTZ(channel_mask); - channel_mask &= ~(1 << channel); + uint8_t channel = (uint8_t)NRF_CTZ(channel_mask); + channel_mask &= ~(1UL << channel); nrfy_saadc_channel_input_set(NRF_SAADC, channel, NRF_SAADC_INPUT_DISABLED, NRF_SAADC_INPUT_DISABLED); } @@ -208,14 +208,14 @@ static void saadc_generic_mode_set(uint32_t ch_to_activate_mas nrfy_saadc_stop(NRF_SAADC, true); #endif - m_cb.limits_low_activated = 0; + m_cb.limits_low_activated = 0; m_cb.limits_high_activated = 0; - m_cb.buffer_primary.p_buffer = NULL; + m_cb.buffer_primary.p_buffer = NULL; m_cb.buffer_secondary.p_buffer = NULL; - m_cb.event_handler = event_handler; - m_cb.channels_activated = ch_to_activate_mask; - m_cb.samples_converted = 0; + m_cb.event_handler = event_handler; + m_cb.channels_activated = (uint8_t)ch_to_activate_mask; + m_cb.samples_converted = 0; nrfy_saadc_config_t config = {.resolution = resolution, .oversampling = oversampling}; nrfy_saadc_periph_configure(NRF_SAADC, &config); @@ -241,8 +241,8 @@ static void saadc_generic_mode_set(uint32_t ch_to_activate_mas input = m_cb.channels_input[ch_pos]; burst_to_set = burst; } - nrfy_saadc_burst_set(NRF_SAADC, ch_pos, burst_to_set); - nrfy_saadc_channel_configure(NRF_SAADC, ch_pos, NULL, &input); + nrfy_saadc_burst_set(NRF_SAADC, (uint8_t)ch_pos, burst_to_set); + nrfy_saadc_channel_configure(NRF_SAADC, (uint8_t)ch_pos, NULL, &input); } } @@ -251,7 +251,11 @@ nrfx_err_t nrfx_saadc_init(uint8_t interrupt_priority) nrfx_err_t err_code; if (m_cb.saadc_state != NRF_SAADC_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -279,11 +283,17 @@ void nrfx_saadc_uninit(void) nrfx_saadc_abort(); nrfy_saadc_int_uninit(NRF_SAADC); + nrfy_saadc_event_clear(NRF_SAADC, NRF_SAADC_EVENT_DONE); nrfy_saadc_disable(NRF_SAADC); saadc_channels_disable(m_cb.channels_configured | m_cb.channels_activated); m_cb.saadc_state = NRF_SAADC_STATE_UNINITIALIZED; } +bool nrfx_saadc_init_check(void) +{ + return (m_cb.saadc_state != NRF_SAADC_STATE_UNINITIALIZED); +} + nrfx_err_t nrfx_saadc_channels_config(nrfx_saadc_channel_t const * p_channels, uint32_t channel_count) { @@ -459,7 +469,7 @@ nrfx_err_t nrfx_saadc_buffer_set(nrf_saadc_value_t * p_buffer, uint16_t size) if (m_cb.buffer_secondary.p_buffer) { - return NRFX_ERROR_ALREADY_INITIALIZED; + return NRFX_ERROR_ALREADY; } if (!nrfx_is_in_ram(p_buffer)) @@ -559,9 +569,20 @@ nrfx_err_t nrfx_saadc_mode_trigger(void) // When in advanced blocking mode, latch single chunk of buffer in EasyDMA. // Each chunk consists of single sample from each activated channels. // END event will arrive when single chunk is filled with samples. - nrfy_saadc_buffer_t chunk = - {.p_buffer = &m_cb.buffer_primary.p_buffer[m_cb.samples_converted], - .length = m_cb.channels_activated_count}; + nrfy_saadc_buffer_t chunk = { .length = m_cb.channels_activated_count}; + +#if (NRF_SAADC_8BIT_SAMPLE_WIDTH == 8) + if (nrfy_saadc_resolution_get(NRF_SAADC) == NRF_SAADC_RESOLUTION_8BIT) + { + chunk.p_buffer = (nrf_saadc_value_t *) + &((uint8_t *)m_cb.buffer_primary.p_buffer)[m_cb.samples_converted]; + } + else +#endif + { + chunk.p_buffer = (nrf_saadc_value_t *) + &((uint16_t *)m_cb.buffer_primary.p_buffer)[m_cb.samples_converted]; + } nrfy_saadc_buffer_set(NRF_SAADC, &chunk, true, true); if (m_cb.oversampling_without_burst) { @@ -648,24 +669,24 @@ nrfx_err_t nrfx_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t lim uint32_t int_mask = nrfy_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_LOW); if (limit_low == INT16_MIN) { - m_cb.limits_low_activated &= ~(1 << channel); + m_cb.limits_low_activated &= (uint8_t)~(1UL << channel); nrfy_saadc_int_disable(NRF_SAADC, int_mask); } else { - m_cb.limits_low_activated |= (1 << channel); + m_cb.limits_low_activated |= (uint8_t)(1UL << channel); nrfy_saadc_int_enable(NRF_SAADC, int_mask); } int_mask = nrfy_saadc_limit_int_get(channel, NRF_SAADC_LIMIT_HIGH); if (limit_high == INT16_MAX) { - m_cb.limits_high_activated &= ~(1 << channel); + m_cb.limits_high_activated &= (uint8_t)~(1UL << channel); nrfy_saadc_int_disable(NRF_SAADC, int_mask); } else { - m_cb.limits_high_activated |= (1 << channel); + m_cb.limits_high_activated |= (uint8_t)(1UL << channel); nrfy_saadc_int_enable(NRF_SAADC, int_mask); } @@ -693,7 +714,7 @@ nrfx_err_t nrfx_saadc_offset_calibrate(nrfx_saadc_event_handler_t calib_event_ha { nrfy_saadc_calibrate(NRF_SAADC, false); // Make sure that LIMIT feature is disabled before offset calibration. - int_mask &= ~(NRF_SAADC_INT_CH0LIMITL | NRF_SAADC_INT_CH0LIMITH); + int_mask &= ~(uint32_t)(NRF_SAADC_INT_CH0LIMITL | NRF_SAADC_INT_CH0LIMITH); nrfy_saadc_int_set(NRF_SAADC, int_mask | NRF_SAADC_INT_STARTED | NRF_SAADC_INT_STOPPED | NRF_SAADC_INT_END | NRF_SAADC_INT_CALIBRATEDONE); } @@ -722,8 +743,8 @@ static void saadc_pre_calibration_state_restore(void) { nrf_saadc_disable(NRF_SAADC); uint32_t int_mask = nrfy_saadc_int_enable_check(NRF_SAADC, ~0UL) & - ~(NRF_SAADC_INT_STARTED | NRF_SAADC_INT_STOPPED | - NRF_SAADC_INT_END | NRF_SAADC_INT_CALIBRATEDONE); + (uint32_t)(~(NRF_SAADC_INT_STARTED | NRF_SAADC_INT_STOPPED | + NRF_SAADC_INT_END | NRF_SAADC_INT_CALIBRATEDONE)); m_cb.saadc_state = m_cb.saadc_state_prev; if (m_cb.event_handler) { @@ -797,7 +818,7 @@ static void saadc_event_end_handle(void) nrfx_saadc_evt_t evt_data; evt_data.type = NRFX_SAADC_EVT_DONE; evt_data.data.done.p_buffer = m_cb.buffer_primary.p_buffer; - evt_data.data.done.size = m_cb.buffer_primary.length; + evt_data.data.done.size = (uint16_t)m_cb.buffer_primary.length; switch (m_cb.saadc_state) { @@ -849,8 +870,8 @@ static void saadc_event_limits_handle(void) while (limits_triggered) { - uint8_t limit = NRF_CTZ((uint32_t)limits_triggered); - limits_triggered &= ~(1 << limit); + uint8_t limit = (uint8_t)NRF_CTZ((uint32_t)limits_triggered); + limits_triggered &= ~(1UL << limit); // There are two limits per channel. uint8_t channel = limit / 2; diff --git a/drivers/src/nrfx_spi.c b/drivers/src/nrfx_spi.c index 1f008f04f..d41c2f665 100644 --- a/drivers/src/nrfx_spi.c +++ b/drivers/src/nrfx_spi.c @@ -140,12 +140,17 @@ nrfx_err_t nrfx_spi_init(nrfx_spi_t const * p_instance, void * p_context) { NRFX_ASSERT(p_config); + spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; nrfx_err_t err_code; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -192,6 +197,7 @@ nrfx_err_t nrfx_spi_reconfigure(nrfx_spi_t const * p_instance, nrfx_spi_config_t const * p_config) { NRFX_ASSERT(p_config); + spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) @@ -211,9 +217,10 @@ nrfx_err_t nrfx_spi_reconfigure(nrfx_spi_t const * p_instance, void nrfx_spi_uninit(nrfx_spi_t const * p_instance) { spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRF_SPI_Type * p_spi = p_instance->p_reg; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + if (p_cb->handler) { NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg)); @@ -249,6 +256,14 @@ void nrfx_spi_uninit(nrfx_spi_t const * p_instance) #endif p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +bool nrfx_spi_init_check(nrfx_spi_t const * p_instance) +{ + spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); } static void finish_transfer(spi_control_block_t * p_cb) @@ -376,6 +391,7 @@ nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const * p_instance, uint32_t flags) { spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(p_xfer_desc->p_tx_buffer != NULL || p_xfer_desc->tx_length == 0); NRFX_ASSERT(p_xfer_desc->p_rx_buffer != NULL || p_xfer_desc->rx_length == 0); @@ -423,7 +439,9 @@ nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const * p_instance, void nrfx_spi_abort(nrfx_spi_t const * p_instance) { spi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + p_cb->abort = true; } diff --git a/drivers/src/nrfx_spim.c b/drivers/src/nrfx_spim.c index 0f42ee415..9f508fd9e 100644 --- a/drivers/src/nrfx_spim.c +++ b/drivers/src/nrfx_spim.c @@ -269,11 +269,14 @@ static void configure_pins(nrfx_spim_t const * p_instance, // buffer must always be connected for the SPI to work. uint32_t sck_val = (p_config->mode <= NRF_SPIM_MODE_1) ? 0 : 1; pin_init(p_config->sck_pin, NRF_GPIO_PIN_DIR_OUTPUT, NRF_GPIO_PIN_NOPULL, pin_drive, sck_val); -#if NRF_GPIO_HAS_CLOCKPIN +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_SPIM_CLOCKPIN_SCK_NEEDED_EXT) nrfy_gpio_pin_clock_set(p_config->sck_pin, true); #endif // - MOSI (optional) - output with initial value 0 pin_init(p_config->mosi_pin, NRF_GPIO_PIN_DIR_OUTPUT, NRF_GPIO_PIN_NOPULL, pin_drive, 0); +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_SPIM_CLOCKPIN_MOSI_NEEDED_EXT) + nrfy_gpio_pin_clock_set(p_config->mosi_pin, true); +#endif // - MISO (optional) - input pin_init(p_config->miso_pin, NRF_GPIO_PIN_DIR_INPUT, p_config->miso_pull, pin_drive, 0); // - Slave Select (optional) - output with initial value 1 (inactive). @@ -352,7 +355,7 @@ static nrf_spim_frequency_t spim_frequency_bit_decode(uint32_t frequency) #elif NRF_SPIM_HAS_PRESCALER static bool spim_frequency_valid_check(nrfx_spim_t const * p_instance, uint32_t frequency) { - uint32_t base_frequency = NRF_SPIM_BASE_FREQUENCY_GET(p_instance->p_reg); + uint32_t base_frequency = NRFX_SPIM_BASE_FREQUENCY_GET(p_instance); uint32_t prescaler = NRF_SPIM_PRESCALER_CALCULATE(p_instance->p_reg, frequency); return (base_frequency % frequency == 0) && @@ -509,12 +512,17 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t const * p_instance, void * p_context) { NRFX_ASSERT(p_config); + spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; nrfx_err_t err_code; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -560,6 +568,7 @@ nrfx_err_t nrfx_spim_reconfigure(nrfx_spim_t const * p_instance, nrfx_spim_config_t const * p_config) { NRFX_ASSERT(p_config); + spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) @@ -594,6 +603,7 @@ static void spim_pin_uninit(uint32_t pin) void nrfx_spim_uninit(nrfx_spim_t const * p_instance) { spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); nrfy_spim_int_uninit(p_instance->p_reg); @@ -636,6 +646,14 @@ void nrfx_spim_uninit(nrfx_spim_t const * p_instance) #endif p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +bool nrfx_spim_init_check(nrfx_spim_t const * p_instance) +{ + spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); } #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) @@ -647,6 +665,7 @@ nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * p_instance, (void)flags; NRFX_ASSERT(cmd_length <= NRF_SPIM_DCX_CNT_ALL_CMD); + nrfy_spim_dcx_cnt_set((NRF_SPIM_Type *)p_instance->p_reg, cmd_length); return nrfx_spim_xfer(p_instance, p_xfer_desc, 0); } @@ -785,6 +804,7 @@ nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * p_instance, uint32_t flags) { spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(p_xfer_desc->p_tx_buffer != NULL || p_xfer_desc->tx_length == 0); NRFX_ASSERT(p_xfer_desc->p_rx_buffer != NULL || p_xfer_desc->rx_length == 0); @@ -834,6 +854,7 @@ nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * p_instance, void nrfx_spim_abort(nrfx_spim_t const * p_instance) { spim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); spim_abort(p_instance->p_reg, p_cb); diff --git a/drivers/src/nrfx_spis.c b/drivers/src/nrfx_spis.c index df84b653b..20a14fa9a 100644 --- a/drivers/src/nrfx_spis.c +++ b/drivers/src/nrfx_spis.c @@ -71,6 +71,9 @@ static void csn_event_handler(nrfx_gpiote_pin_t pin, (void)trigger; (void)p_context; } +#if NRFX_API_VER_AT_LEAST(3, 2, 0) +static nrfx_gpiote_t const gpiote = NRFX_GPIOTE_INSTANCE(0); +#endif #endif @@ -111,7 +114,7 @@ static void pins_configure(nrfx_spis_config_t const * p_config) NRF_GPIO_PIN_NOPULL, NRF_GPIO_PIN_S0S1, NRF_GPIO_PIN_NOSENSE); -#if NRF_GPIO_HAS_CLOCKPIN +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_SPIS_CLOCKPIN_SCK_NEEDED_EXT) nrfy_gpio_pin_clock_set(p_config->sck_pin, true); #endif @@ -133,6 +136,9 @@ static void pins_configure(nrfx_spis_config_t const * p_config) NRF_GPIO_PIN_NOPULL, p_config->miso_drive, NRF_GPIO_PIN_NOSENSE); +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_SPIS_CLOCKPIN_MISO_NEEDED_EXT) + nrfy_gpio_pin_clock_set(p_config->miso_pin, true); +#endif } nrf_gpio_cfg(p_config->csn_pin, @@ -173,7 +179,11 @@ static bool spis_configure(nrfx_spis_t const * p_instance, // first as that pin number may be different now. if (p_cb->csn_pin != NRF_SPIS_PIN_NOT_CONNECTED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + nrfx_gpiote_pin_uninit(&gpiote, p_cb->csn_pin); +#else nrfx_gpiote_pin_uninit(p_cb->csn_pin); +#endif p_cb->csn_pin = NRF_SPIS_PIN_NOT_CONNECTED; } @@ -185,17 +195,24 @@ static bool spis_configure(nrfx_spis_t const * p_instance, // on the CSN line. Handling of these interrupts will make the CPU active // and thus will protect the DMA transfers started by SPIS right after it // is selected for communication. - nrfx_gpiote_trigger_config_t trigger_config = { + nrfx_gpiote_trigger_config_t trig_config = { .trigger = NRFX_GPIOTE_TRIGGER_HITOLO, .p_in_channel = &p_cb->gpiote_ch }; - nrfx_gpiote_handler_config_t handler_config = { + nrfx_gpiote_handler_config_t hndl_config = { .handler = csn_event_handler }; - nrfx_err_t err_code = nrfx_gpiote_input_configure(csn_pin, - NULL, - &trigger_config, - &handler_config); + +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + nrfx_gpiote_input_pin_config_t config = { + .p_pull_config = NULL, + .p_trigger_config = &trig_config, + .p_handler_config = &hndl_config + }; + nrfx_err_t err_code = nrfx_gpiote_input_configure(&gpiote, csn_pin, &config); +#else + nrfx_err_t err_code = nrfx_gpiote_input_configure(csn_pin, NULL, &trig_config, &hndl_config); +#endif if (err_code != NRFX_SUCCESS) { NRFX_LOG_ERROR("Function: %s, error code: %s.", @@ -204,7 +221,11 @@ static bool spis_configure(nrfx_spis_t const * p_instance, return false; } +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + nrfx_gpiote_trigger_enable(&gpiote, csn_pin, true); +#else nrfx_gpiote_trigger_enable(csn_pin, true); +#endif p_cb->csn_pin = csn_pin; #endif @@ -236,6 +257,7 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * p_instance, { NRFX_ASSERT(p_config); NRFX_ASSERT(event_handler); + spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; nrfx_err_t err_code; @@ -243,7 +265,11 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * p_instance, if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -275,9 +301,14 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * p_instance, // (the GPIOTE driver may be already initialized at this point, by this // driver when another SPIS instance is used or by an application code, // so just ignore the returned value here). +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + (void)nrfx_gpiote_init(&gpiote, NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY); + err_code = nrfx_gpiote_channel_alloc(&gpiote, &p_cb->gpiote_ch); +#else (void)nrfx_gpiote_init(NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY); - err_code = nrfx_gpiote_channel_alloc(&p_cb->gpiote_ch); +#endif + if (err_code != NRFX_SUCCESS) { err_code = NRFX_ERROR_INTERNAL; @@ -295,12 +326,19 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * p_instance, if (!spis_configure(p_instance, p_config)) { #if defined(USE_DMA_ISSUE_WORKAROUND) +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + nrfx_gpiote_channel_free(&gpiote, p_cb->gpiote_ch); +#else nrfx_gpiote_channel_free(p_cb->gpiote_ch); +#endif #endif err_code = NRFX_ERROR_INVALID_PARAM; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); +#if NRFX_CHECK(NRFX_PRS_ENABLED) + nrfx_prs_release(p_spis); +#endif return err_code; } } @@ -326,6 +364,7 @@ nrfx_err_t nrfx_spis_reconfigure(nrfx_spis_t const * p_instance, nrfx_spis_config_t const * p_config) { NRFX_ASSERT(p_config); + nrfx_err_t err_code; spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; @@ -349,6 +388,7 @@ nrfx_err_t nrfx_spis_reconfigure(nrfx_spis_t const * p_instance, void nrfx_spis_uninit(nrfx_spis_t const * p_instance) { spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRF_SPIS_Type * p_spis = p_instance->p_reg; @@ -356,9 +396,17 @@ void nrfx_spis_uninit(nrfx_spis_t const * p_instance) #if defined(USE_DMA_ISSUE_WORKAROUND) if (p_cb->csn_pin != NRF_SPIS_PIN_NOT_CONNECTED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + nrfx_gpiote_pin_uninit(&gpiote, p_cb->csn_pin); +#else nrfx_gpiote_pin_uninit(p_cb->csn_pin); +#endif } +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + nrfx_gpiote_channel_free(&gpiote, p_cb->gpiote_ch); +#else nrfx_gpiote_channel_free(p_cb->gpiote_ch); +#endif #endif #define DISABLE_ALL 0xFFFFFFFF @@ -393,6 +441,12 @@ void nrfx_spis_uninit(nrfx_spis_t const * p_instance) NRFX_LOG_INFO("Uninitialized."); } +bool nrfx_spis_init_check(nrfx_spis_t const * p_instance) +{ + spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} /** @brief Function for executing the state entry action. */ static void spis_state_entry_action_execute(NRF_SPIS_Type * p_spis, @@ -453,12 +507,13 @@ nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * p_instance, uint8_t * p_rx_buffer, size_t rx_buffer_length) { - NRFX_ASSERT(p_tx_buffer != NULL || tx_buffer_length == 0); - NRFX_ASSERT(p_rx_buffer != NULL || rx_buffer_length == 0); - spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx]; nrfx_err_t err_code; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + NRFX_ASSERT(p_tx_buffer != NULL || tx_buffer_length == 0); + NRFX_ASSERT(p_rx_buffer != NULL || rx_buffer_length == 0); + if (!SPIS_LENGTH_VALIDATE(p_instance->drv_inst_idx, rx_buffer_length, tx_buffer_length)) diff --git a/drivers/src/nrfx_temp.c b/drivers/src/nrfx_temp.c index f1500aa8f..d97f2778a 100644 --- a/drivers/src/nrfx_temp.c +++ b/drivers/src/nrfx_temp.c @@ -61,7 +61,7 @@ nrfx_err_t nrfx_temp_init(nrfx_temp_config_t const * p_config, nrfx_temp_data_ha if (m_temp_state != NRFX_DRV_STATE_UNINITIALIZED) { - return NRFX_ERROR_ALREADY_INITIALIZED; + return NRFX_ERROR_ALREADY; } #if NRFX_CHECK(USE_WORKAROUND_FOR_TEMP_OFFSET_ANOMALY) @@ -97,6 +97,11 @@ void nrfx_temp_uninit(void) m_temp_state = NRFX_DRV_STATE_UNINITIALIZED; } +bool nrfx_temp_init_check(void) +{ + return (m_temp_state != NRFX_DRV_STATE_UNINITIALIZED); +} + int32_t nrfx_temp_calculate(int32_t raw_measurement) { /* Raw temperature is a 2's complement signed value. Moreover, it is represented diff --git a/drivers/src/nrfx_timer.c b/drivers/src/nrfx_timer.c index 0632bef5d..5e769887c 100644 --- a/drivers/src/nrfx_timer.c +++ b/drivers/src/nrfx_timer.c @@ -59,10 +59,10 @@ #define PRESCALER_INVALID UINT32_MAX -#define TIMER_FREQUENCY_VALID_CHECK(p_instance, frequency) \ - ((NRF_TIMER_BASE_FREQUENCY_GET(p_instance->p_reg) % (frequency) == 0) && \ - NRFX_IS_POWER_OF_TWO(NRF_TIMER_BASE_FREQUENCY_GET(p_instance->p_reg) / (frequency)) && \ - ((NRF_TIMER_BASE_FREQUENCY_GET(p_instance->p_reg) / (frequency)) <= \ +#define TIMER_FREQUENCY_VALID_CHECK(p_instance, frequency) \ + ((NRFX_TIMER_BASE_FREQUENCY_GET(p_instance) % (frequency) == 0) && \ + NRFX_IS_POWER_OF_TWO(NRFX_TIMER_BASE_FREQUENCY_GET(p_instance) / (frequency)) && \ + ((NRFX_TIMER_BASE_FREQUENCY_GET(p_instance) / (frequency)) <= \ (1 << NRF_TIMER_PRESCALER_MAX))) #define NRFX_LOG_MODULE TIMER @@ -81,7 +81,7 @@ static timer_control_block_t m_cb[NRFX_TIMER_ENABLED_COUNT]; static uint32_t prescaler_calculate(nrfx_timer_t const * p_instance, uint32_t frequency) { (void)p_instance; - uint32_t base_frequency = NRF_TIMER_BASE_FREQUENCY_GET(p_instance->p_reg); + uint32_t base_frequency = NRFX_TIMER_BASE_FREQUENCY_GET(p_instance); if (!TIMER_FREQUENCY_VALID_CHECK(p_instance, frequency)) { @@ -121,13 +121,19 @@ nrfx_err_t nrfx_timer_init(nrfx_timer_t const * p_instance, nrfx_timer_config_t const * p_config, nrfx_timer_event_handler_t timer_event_handler) { + NRFX_ASSERT(p_config); + timer_control_block_t * p_cb = &m_cb[p_instance->instance_id]; nrfx_err_t err_code; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -160,6 +166,7 @@ nrfx_err_t nrfx_timer_reconfigure(nrfx_timer_t const * p_instance, { NRFX_ASSERT(p_config); NRFX_ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width)); + timer_control_block_t * p_cb = &m_cb[p_instance->instance_id]; if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) @@ -178,6 +185,8 @@ nrfx_err_t nrfx_timer_reconfigure(nrfx_timer_t const * p_instance, void nrfx_timer_uninit(nrfx_timer_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrfy_timer_int_uninit(p_instance->p_reg); nrfy_timer_shorts_disable(p_instance->p_reg, ~0UL); @@ -189,9 +198,17 @@ void nrfx_timer_uninit(nrfx_timer_t const * p_instance) NRFX_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id); } +bool nrfx_timer_init_check(nrfx_timer_t const * p_instance) +{ + timer_control_block_t * p_cb = &m_cb[p_instance->instance_id]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} + void nrfx_timer_enable(nrfx_timer_t const * p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); + nrfy_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START); m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_POWERED_ON; NRFX_LOG_INFO("Enabled instance: %d.", p_instance->instance_id); @@ -200,6 +217,7 @@ void nrfx_timer_enable(nrfx_timer_t const * p_instance) void nrfx_timer_disable(nrfx_timer_t const * p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrfy_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN); m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED; NRFX_LOG_INFO("Disabled instance: %d.", p_instance->instance_id); @@ -208,12 +226,14 @@ void nrfx_timer_disable(nrfx_timer_t const * p_instance) bool nrfx_timer_is_enabled(nrfx_timer_t const * p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + return (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON); } void nrfx_timer_resume(nrfx_timer_t const * p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrfy_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START); NRFX_LOG_INFO("Resumed instance: %d.", p_instance->instance_id); } @@ -221,6 +241,7 @@ void nrfx_timer_resume(nrfx_timer_t const * p_instance) void nrfx_timer_pause(nrfx_timer_t const * p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrfy_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP); NRFX_LOG_INFO("Paused instance: %d.", p_instance->instance_id); } @@ -228,6 +249,7 @@ void nrfx_timer_pause(nrfx_timer_t const * p_instance) void nrfx_timer_clear(nrfx_timer_t const * p_instance) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrfy_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_CLEAR); } @@ -239,8 +261,7 @@ void nrfx_timer_increment(nrfx_timer_t const * p_instance) nrfy_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT); } -uint32_t nrfx_timer_capture(nrfx_timer_t const * p_instance, - nrf_timer_cc_channel_t cc_channel) +uint32_t nrfx_timer_capture(nrfx_timer_t const * p_instance, nrf_timer_cc_channel_t cc_channel) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(cc_channel < p_instance->cc_channel_count); @@ -248,20 +269,18 @@ uint32_t nrfx_timer_capture(nrfx_timer_t const * p_instance, return nrfy_timer_capture_get(p_instance->p_reg, cc_channel); } -uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * p_instance, - uint32_t time_us) +uint32_t nrfx_timer_us_to_ticks(nrfx_timer_t const * p_instance, uint32_t time_us) { uint32_t prescaler = nrfy_timer_prescaler_get(p_instance->p_reg); - uint32_t freq_base_mhz = NRF_TIMER_BASE_FREQUENCY_GET(p_instance->p_reg) / 1000000; + uint32_t freq_base_mhz = NRFX_TIMER_BASE_FREQUENCY_GET(p_instance) / 1000000; uint64_t ticks = (((uint64_t)time_us * freq_base_mhz) >> prescaler); return (uint32_t)ticks; } -uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * p_instance, - uint32_t time_ms) +uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * p_instance, uint32_t time_ms) { uint32_t prescaler = nrfy_timer_prescaler_get(p_instance->p_reg); - uint32_t freq_base_khz = NRF_TIMER_BASE_FREQUENCY_GET(p_instance->p_reg) / 1000; + uint32_t freq_base_khz = NRFX_TIMER_BASE_FREQUENCY_GET(p_instance) / 1000; uint64_t ticks = (((uint64_t)time_ms * freq_base_khz) >> prescaler); return (uint32_t)ticks; } @@ -271,6 +290,8 @@ void nrfx_timer_compare(nrfx_timer_t const * p_instance, uint32_t cc_value, bool enable_int) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); + nrf_timer_int_mask_t timer_int = nrfy_timer_compare_int_get(cc_channel); if (enable_int) @@ -296,6 +317,8 @@ void nrfx_timer_extended_compare(nrfx_timer_t const * p_instance, nrf_timer_short_mask_t timer_short_mask, bool enable_int) { + NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED); + nrfy_timer_shorts_disable(p_instance->p_reg, (TIMER_SHORTS_COMPARE0_STOP_Msk << cc_channel) | (TIMER_SHORTS_COMPARE0_CLEAR_Msk << cc_channel)); @@ -312,28 +335,24 @@ void nrfx_timer_extended_compare(nrfx_timer_t const * p_instance, cc_channel); } -void nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance, - uint32_t channel) +void nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance, uint32_t channel) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(channel < p_instance->cc_channel_count); - nrfy_timer_event_clear(p_instance->p_reg, nrfy_timer_compare_event_get(channel)); - nrfy_timer_int_enable(p_instance->p_reg, nrfy_timer_compare_int_get(channel)); + nrfy_timer_event_clear(p_instance->p_reg, nrfy_timer_compare_event_get((uint8_t)channel)); + nrfy_timer_int_enable(p_instance->p_reg, nrfy_timer_compare_int_get((uint8_t)channel)); } -void nrfx_timer_compare_int_disable(nrfx_timer_t const * p_instance, - uint32_t channel) +void nrfx_timer_compare_int_disable(nrfx_timer_t const * p_instance, uint32_t channel) { NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED); NRFX_ASSERT(channel < p_instance->cc_channel_count); - nrfy_timer_int_disable(p_instance->p_reg, nrfy_timer_compare_int_get(channel)); + nrfy_timer_int_disable(p_instance->p_reg, nrfy_timer_compare_int_get((uint8_t)channel)); } -static void irq_handler(NRF_TIMER_Type * p_reg, - timer_control_block_t * p_cb, - uint8_t channel_count) +static void irq_handler(NRF_TIMER_Type * p_reg, timer_control_block_t * p_cb, uint8_t channel_count) { uint32_t event_mask = nrfy_timer_events_process(p_reg, NRF_TIMER_ALL_CHANNELS_INT_MASK); nrf_timer_event_t event; diff --git a/drivers/src/nrfx_twi.c b/drivers/src/nrfx_twi.c index 368d8b57c..cc128064b 100644 --- a/drivers/src/nrfx_twi.c +++ b/drivers/src/nrfx_twi.c @@ -179,12 +179,17 @@ nrfx_err_t nrfx_twi_init(nrfx_twi_t const * p_instance, void * p_context) { NRFX_ASSERT(p_config); + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; nrfx_err_t err_code; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -242,6 +247,7 @@ nrfx_err_t nrfx_twi_reconfigure(nrfx_twi_t const * p_instance, nrfx_twi_config_t const * p_config) { NRFX_ASSERT(p_config); + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) @@ -262,6 +268,7 @@ nrfx_err_t nrfx_twi_reconfigure(nrfx_twi_t const * p_instance, void nrfx_twi_uninit(nrfx_twi_t const * p_instance) { twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); if (p_cb->handler) @@ -284,9 +291,17 @@ void nrfx_twi_uninit(nrfx_twi_t const * p_instance) NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); } +bool nrfx_twi_init_check(nrfx_twi_t const * p_instance) +{ + twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} + void nrfx_twi_enable(nrfx_twi_t const * p_instance) { twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); NRF_TWI_Type * p_twi = p_instance->p_twi; @@ -299,6 +314,7 @@ void nrfx_twi_enable(nrfx_twi_t const * p_instance) void nrfx_twi_disable(nrfx_twi_t const * p_instance) { twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); NRF_TWI_Type * p_twi = p_instance->p_twi; @@ -598,7 +614,6 @@ static nrfx_err_t twi_xfer(NRF_TWI_Type * p_twi, nrfx_twi_xfer_desc_t const * p_xfer_desc, uint32_t flags) { - nrfx_err_t err_code = NRFX_SUCCESS; if ((p_cb->prev_suspend == TWI_SUSPEND_TX) && (p_xfer_desc->type == NRFX_TWI_XFER_RX)) @@ -656,6 +671,8 @@ static nrfx_err_t twi_xfer(NRF_TWI_Type * p_twi, bool nrfx_twi_is_busy(nrfx_twi_t const * p_instance) { twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + return p_cb->busy; } @@ -663,10 +680,13 @@ nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance, nrfx_twi_xfer_desc_t const * p_xfer_desc, uint32_t flags) { - nrfx_err_t err_code = NRFX_SUCCESS; twi_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); + NRFX_ASSERT(p_xfer_desc->p_primary_buf != NULL || p_xfer_desc->primary_length == 0); + NRFX_ASSERT(p_xfer_desc->p_secondary_buf != NULL || p_xfer_desc->secondary_length == 0); + // TXRX and TXTX transfers are supported only in non-blocking mode. NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWI_XFER_TXRX))); NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWI_XFER_TXTX))); @@ -691,11 +711,15 @@ nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance, size_t nrfx_twi_data_count_get(nrfx_twi_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + return m_cb[p_instance->drv_inst_idx].bytes_transferred; } uint32_t nrfx_twi_stopped_event_get(nrfx_twi_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + return nrf_twi_event_address_get(p_instance->p_twi, NRF_TWI_EVENT_STOPPED); } @@ -769,7 +793,6 @@ static void irq_handler(NRF_TWI_Type * p_twi, twi_control_block_t * p_cb) p_cb->handler(&event, p_cb->p_context); } } - } NRFX_INSTANCE_IRQ_HANDLERS(TWI, twi) diff --git a/drivers/src/nrfx_twim.c b/drivers/src/nrfx_twim.c index fae68872f..e45c6a9ce 100644 --- a/drivers/src/nrfx_twim.c +++ b/drivers/src/nrfx_twim.c @@ -243,7 +243,7 @@ static bool pins_configure(nrfx_twim_config_t const * p_config) NRFX_ASSERT(p_config->scl_pin != p_config->sda_pin); TWIM_PIN_INIT(p_config->scl_pin, pin_drive); TWIM_PIN_INIT(p_config->sda_pin, pin_drive); -#if NRF_GPIO_HAS_CLOCKPIN +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_TWIM_CLOCKPIN_SCL_NEEDED_EXT) nrfy_gpio_pin_clock_set(p_config->scl_pin, true); #endif } @@ -256,12 +256,17 @@ nrfx_err_t nrfx_twim_init(nrfx_twim_t const * p_instance, void * p_context) { NRFX_ASSERT(p_config); + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; nrfx_err_t err_code; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -316,6 +321,7 @@ nrfx_err_t nrfx_twim_reconfigure(nrfx_twim_t const * p_instance, nrfx_twim_config_t const * p_config) { NRFX_ASSERT(p_config); + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) @@ -335,6 +341,7 @@ nrfx_err_t nrfx_twim_reconfigure(nrfx_twim_t const * p_instance, void nrfx_twim_uninit(nrfx_twim_t const * p_instance) { twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); nrfy_twim_int_uninit(p_instance->p_twim); @@ -357,6 +364,13 @@ void nrfx_twim_uninit(nrfx_twim_t const * p_instance) NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); } +bool nrfx_twim_init_check(nrfx_twim_t const * p_instance) +{ + twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} + void nrfx_twim_enable(nrfx_twim_t const * p_instance) { twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; @@ -371,6 +385,7 @@ void nrfx_twim_enable(nrfx_twim_t const * p_instance) void nrfx_twim_disable(nrfx_twim_t const * p_instance) { twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); p_cb->int_mask = 0; @@ -597,6 +612,8 @@ nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance, nrfx_err_t err_code = NRFX_SUCCESS; twim_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); + // TXRX and TXTX transfers are supported only in non-blocking mode. NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWIM_XFER_TXRX))); NRFX_ASSERT( !((p_cb->handler == NULL) && (p_xfer_desc->type == NRFX_TWIM_XFER_TXTX))); @@ -624,12 +641,16 @@ nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance, uint32_t nrfx_twim_start_task_address_get(nrfx_twim_t const * p_instance, nrfx_twim_xfer_type_t xfer_type) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + return nrfy_twim_task_address_get(p_instance->p_twim, (xfer_type != NRFX_TWIM_XFER_RX) ? NRF_TWIM_TASK_STARTTX : NRF_TWIM_TASK_STARTRX); } uint32_t nrfx_twim_stopped_event_address_get(nrfx_twim_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + return nrfy_twim_event_address_get(p_instance->p_twim, NRF_TWIM_EVENT_STOPPED); } diff --git a/drivers/src/nrfx_twis.c b/drivers/src/nrfx_twis.c index 5be607edb..3982bc43c 100644 --- a/drivers/src/nrfx_twis.c +++ b/drivers/src/nrfx_twis.c @@ -54,7 +54,6 @@ (event == NRF_TWIS_EVENT_READ ? "NRF_TWIS_EVENT_READ" : \ "UNKNOWN EVENT")))))) - /** * @brief Actual state of internal state machine * @@ -355,7 +354,7 @@ static void irq_handler(NRF_TWIS_Type * p_reg, twis_control_block_t * p_cb) evdata.data.tx_amount = nrf_twis_tx_amount_get(p_reg); NRFX_LOG_INFO("Transfer tx_len:%d", evdata.data.tx_amount); NRFX_LOG_DEBUG("Tx data:"); - NRFX_LOG_HEXDUMP_DEBUG((uint8_t const *)p_reg->TXD.PTR, + NRFX_LOG_HEXDUMP_DEBUG((uint8_t const *)nrf_twis_tx_buffer_get(p_reg), evdata.data.tx_amount * sizeof(uint8_t)); call_event_handler(p_cb, &evdata); /* Go to idle and repeat the state machine if READ or WRITE events detected. @@ -427,7 +426,6 @@ static void irq_handler(NRF_TWIS_Type * p_reg, twis_control_block_t * p_cb) } } - static inline void nrfx_twis_preprocess_status(nrfx_twis_t const * p_instance) { if (!NRFX_TWIS_NO_SYNC_MODE) @@ -465,8 +463,10 @@ static void twis_configure(nrfx_twis_t const * p_instance, { nrf_twis_pins_set(p_instance->p_reg, p_config->scl_pin, p_config->sda_pin); } - nrf_twis_address_set(p_instance->p_reg, 0, p_config->addr[0]); - nrf_twis_address_set(p_instance->p_reg, 1, p_config->addr[1]); + + nrf_twis_address_set(p_instance->p_reg, 0, (nrf_twis_address_t)p_config->addr[0]); + nrf_twis_address_set(p_instance->p_reg, 1, (nrf_twis_address_t)p_config->addr[1]); + nrf_twis_config_address_set(p_instance->p_reg, (nrf_twis_config_addr_mask_t)addr_mask); if (m_cb[p_instance->drv_inst_idx].ev_handler) @@ -485,7 +485,6 @@ static void twis_configure(nrfx_twis_t const * p_instance, * */ - nrfx_err_t nrfx_twis_init(nrfx_twis_t const * p_instance, nrfx_twis_config_t const * p_config, nrfx_twis_event_handler_t event_handler) @@ -498,7 +497,11 @@ nrfx_err_t nrfx_twis_init(nrfx_twis_t const * p_instance, if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -534,7 +537,7 @@ nrfx_err_t nrfx_twis_init(nrfx_twis_t const * p_instance, NRFX_ASSERT(p_config->scl_pin != p_config->sda_pin); nrfx_twis_config_pin(p_config->scl_pin, p_config->scl_pull); nrfx_twis_config_pin(p_config->sda_pin, p_config->sda_pull); -#if NRF_GPIO_HAS_CLOCKPIN +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_TWIS_CLOCKPIN_SCL_NEEDED_EXT) nrf_gpio_pin_clock_set(p_config->scl_pin, true); #endif } @@ -558,6 +561,7 @@ nrfx_err_t nrfx_twis_reconfigure(nrfx_twis_t const * p_instance, nrfx_twis_config_t const * p_config) { NRFX_ASSERT(p_config); + if (m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_UNINITIALIZED) { return NRFX_ERROR_INVALID_STATE; @@ -576,6 +580,7 @@ void nrfx_twis_uninit(nrfx_twis_t const * p_instance) { NRF_TWIS_Type * p_reg = p_instance->p_reg; twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); nrfx_twis_swreset(p_reg); @@ -593,13 +598,21 @@ void nrfx_twis_uninit(nrfx_twis_t const * p_instance) /* Clear variables */ p_cb->ev_handler = NULL; p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); } +bool nrfx_twis_init_check(nrfx_twis_t const * p_instance) +{ + twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} void nrfx_twis_enable(nrfx_twis_t const * p_instance) { NRF_TWIS_Type * p_reg = p_instance->p_reg; twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); nrfx_twis_clear_all_events(p_reg); @@ -616,11 +629,11 @@ void nrfx_twis_enable(nrfx_twis_t const * p_instance) p_cb->substate = NRFX_TWIS_SUBSTATE_IDLE; } - void nrfx_twis_disable(nrfx_twis_t const * p_instance) { NRF_TWIS_Type * p_reg = p_instance->p_reg; twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); nrf_twis_int_disable(p_reg, m_used_ints_mask); @@ -705,18 +718,22 @@ static uint32_t nrfx_twis_error_get_and_clear_internal(uint32_t volatile * perro uint32_t nrfx_twis_error_get_and_clear(nrfx_twis_t const * p_instance) { + twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + nrfx_twis_preprocess_status(p_instance); /* Make sure that access to error member is atomic * so there is no bit that is cleared if it is not copied to local variable already. */ - twis_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; return nrfx_twis_error_get_and_clear_internal(&p_cb->error); } - nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance, void const * p_buf, size_t size) { + NRFX_ASSERT(p_buf); + nrfx_err_t err_code; twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; @@ -761,11 +778,12 @@ nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance, return err_code; } - nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance, void * p_buf, size_t size) { + NRFX_ASSERT(p_buf); + nrfx_err_t err_code; twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; @@ -810,39 +828,53 @@ nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance, return err_code; } - bool nrfx_twis_is_busy(nrfx_twis_t const * p_instance) { - nrfx_twis_preprocess_status(p_instance); twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); + + nrfx_twis_preprocess_status(p_instance); return NRFX_TWIS_SUBSTATE_IDLE != p_cb->substate; } bool nrfx_twis_is_waiting_tx_buff(nrfx_twis_t const * p_instance) { - nrfx_twis_preprocess_status(p_instance); twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); + + nrfx_twis_preprocess_status(p_instance); return NRFX_TWIS_SUBSTATE_READ_WAITING == p_cb->substate; } bool nrfx_twis_is_waiting_rx_buff(nrfx_twis_t const * p_instance) { - nrfx_twis_preprocess_status(p_instance); twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); + + nrfx_twis_preprocess_status(p_instance); return NRFX_TWIS_SUBSTATE_WRITE_WAITING == p_cb->substate; } bool nrfx_twis_is_pending_tx(nrfx_twis_t const * p_instance) { - nrfx_twis_preprocess_status(p_instance); twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); + + nrfx_twis_preprocess_status(p_instance); return NRFX_TWIS_SUBSTATE_READ_PENDING == p_cb->substate; } bool nrfx_twis_is_pending_rx(nrfx_twis_t const * p_instance) { - nrfx_twis_preprocess_status(p_instance); twis_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_POWERED_ON); + + nrfx_twis_preprocess_status(p_instance); return NRFX_TWIS_SUBSTATE_WRITE_PENDING == p_cb->substate; } diff --git a/drivers/src/nrfx_uart.c b/drivers/src/nrfx_uart.c index b7f97402b..8466c1646 100644 --- a/drivers/src/nrfx_uart.c +++ b/drivers/src/nrfx_uart.c @@ -192,12 +192,17 @@ nrfx_err_t nrfx_uart_init(nrfx_uart_t const * p_instance, nrfx_uart_event_handler_t event_handler) { NRFX_ASSERT(p_config); + uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; nrfx_err_t err_code = NRFX_SUCCESS; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -244,6 +249,7 @@ nrfx_err_t nrfx_uart_reconfigure(nrfx_uart_t const * p_instance, nrfx_uart_config_t const * p_config) { NRFX_ASSERT(p_config); + uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) @@ -268,6 +274,8 @@ void nrfx_uart_uninit(nrfx_uart_t const * p_instance) { uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + nrf_uart_disable(p_instance->p_reg); if (p_cb->handler) @@ -286,6 +294,13 @@ void nrfx_uart_uninit(nrfx_uart_t const * p_instance) NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); } +bool nrfx_uart_init_check(nrfx_uart_t const * p_instance) +{ + uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} + static void tx_byte(NRF_UART_Type * p_uart, uart_control_block_t * p_cb) { nrf_uart_event_clear(p_uart, NRF_UART_EVENT_TXDRDY); @@ -322,6 +337,7 @@ nrfx_err_t nrfx_uart_tx(nrfx_uart_t const * p_instance, size_t length) { uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(p_data); NRFX_ASSERT(length > 0); @@ -376,6 +392,8 @@ nrfx_err_t nrfx_uart_tx(nrfx_uart_t const * p_instance, bool nrfx_uart_tx_in_progress(nrfx_uart_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + return (m_cb[p_instance->drv_inst_idx].tx_buffer_length != 0); } @@ -405,7 +423,7 @@ nrfx_err_t nrfx_uart_rx(nrfx_uart_t const * p_instance, { uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); NRFX_ASSERT(p_data); NRFX_ASSERT(length > 0); @@ -520,11 +538,15 @@ nrfx_err_t nrfx_uart_rx(nrfx_uart_t const * p_instance, bool nrfx_uart_rx_ready(nrfx_uart_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + return nrf_uart_event_check(p_instance->p_reg, NRF_UART_EVENT_RXDRDY); } void nrfx_uart_rx_enable(nrfx_uart_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); + if (!m_cb[p_instance->drv_inst_idx].rx_enabled) { rx_enable(p_instance); @@ -534,12 +556,18 @@ void nrfx_uart_rx_enable(nrfx_uart_t const * p_instance) void nrfx_uart_rx_disable(nrfx_uart_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); + nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPRX); m_cb[p_instance->drv_inst_idx].rx_enabled = false; } uint32_t nrfx_uart_errorsrc_get(nrfx_uart_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + /* Function must be used in blocking mode only. */ + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].handler == NULL); + nrf_uart_event_clear(p_instance->p_reg, NRF_UART_EVENT_ERROR); return nrf_uart_errorsrc_get_and_clear(p_instance->p_reg); } @@ -575,6 +603,8 @@ void nrfx_uart_tx_abort(nrfx_uart_t const * p_instance) { uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + p_cb->tx_abort = true; nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPTX); if (p_cb->handler) @@ -587,6 +617,8 @@ void nrfx_uart_tx_abort(nrfx_uart_t const * p_instance) void nrfx_uart_rx_abort(nrfx_uart_t const * p_instance) { + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + nrf_uart_int_disable(p_instance->p_reg, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR); nrf_uart_task_trigger(p_instance->p_reg, NRF_UART_TASK_STOPRX); diff --git a/drivers/src/nrfx_uarte.c b/drivers/src/nrfx_uarte.c index e4910e659..23120c902 100644 --- a/drivers/src/nrfx_uarte.c +++ b/drivers/src/nrfx_uarte.c @@ -42,14 +42,11 @@ #include #include "prs/nrfx_prs.h" #include +#include #define NRFX_LOG_MODULE UARTE #include -#define EVT_TO_STR(event) \ - (event == NRF_UARTE_EVENT_ERROR ? "NRF_UARTE_EVENT_ERROR" : \ - "UNKNOWN EVENT") - #define UARTEX_LENGTH_VALIDATE(periph_name, prefix, i, drv_inst_idx, len1, len2) \ (((drv_inst_idx) == NRFX_CONCAT(NRFX_, periph_name, prefix, i, _INST_IDX)) && \ NRFX_EASYDMA_LENGTH_VALIDATE(NRFX_CONCAT(periph_name, prefix, i), len1, len2)) @@ -57,34 +54,144 @@ #define UARTE_LENGTH_VALIDATE(drv_inst_idx, len) \ (NRFX_FOREACH_ENABLED(UARTE, UARTEX_LENGTH_VALIDATE, (||), (0), drv_inst_idx, len, 0)) +#if NRFX_UARTE_CONFIG_RX_CACHE_ENABLED +// Internal cache buffer is used if buffers provided by a user cannot be used in DMA. This is a +// HW limitation on some platforms but for testing purposes it can be emulated on any platform. +#define RX_CACHE_SUPPORTED 1 +#else +#define RX_CACHE_SUPPORTED 0 +#endif + +// There is a HW bug which results in RX amount value not being updated when FIFO was empty. +// It is then hard to determine if FIFO contained anything or not. +#define USE_WORKAROUND_FOR_FLUSHRX_ANOMALY 1 + +// Size of the RX HW FIFO +#define UARTE_HW_RX_FIFO_SIZE 5 + +// Set of flags which if needed are atomically controlled. Flags maintain current state and +// configuration. +#define UARTE_FLAG_TX_CNT 12 // Max amount of TX flags +#define UARTE_FLAG_RX_CNT 12 // Max amount of RX flags +#define UARTE_FLAG_MISC_CNT 8 // Max amount of miscellaneous flags + +#define UARTE_FLAG_TX_OFFSET 0 +#define UARTE_FLAG_RX_OFFSET UARTE_FLAG_TX_CNT +#define UARTE_FLAG_MISC_OFFSET (UARTE_FLAG_RX_OFFSET + UARTE_FLAG_RX_CNT) + +#define UARTE_FLAG(type, i) \ + NRFX_BIT(NRFX_CONCAT(UARTE_FLAG_,type,_OFFSET) + i) + +// Mask with all RX flags +#define UARTE_RX_FLAGS (NRFX_BIT_MASK(UARTE_FLAG_RX_CNT) << UARTE_FLAG_RX_OFFSET) + +// Flag set when there is a PPI connection set up between ENDTX event and TXSTOP task. +#define UARTE_FLAG_TX_STOP_ON_END UARTE_FLAG(TX, 0) +// +// Flag is set when internal TX buffer is used as a cache/proxy buffer. It is used when user buffer +// is in the memory that cannot be used by the DMA. +#define UARTE_FLAG_TX_USE_CACHE UARTE_FLAG(TX, 1) + +// Flag is used to indicate that asynchronous TX transfer request occured during blocking transfer. +// Asynchronous pending transfer is started immediately after the current blocking transfer is +// completed. +#define UARTE_FLAG_TX_PENDING UARTE_FLAG(TX, 2) + +// Flag indicates that TX abort is in progress. +#define UARTE_FLAG_TX_ABORTED UARTE_FLAG(TX, 3) + +// Flag indicates that TX transfers are linked (by ENDTX-STARTTX PPI connection set up by the user). +#define UARTE_FLAG_TX_LINKED UARTE_FLAG(TX, 4) + +// Flag is set when receiver is active. +#define UARTE_FLAG_RX_ENABLED UARTE_FLAG(RX, 0) + +// Flag is set if receiver is enabled with flag NRFX_UARTE_RX_ENABLE_STOP_ON_END. +#define UARTE_FLAG_RX_STOP_ON_END UARTE_FLAG(RX, 1) + +// Flag is set if receiver is enabled with flag NRFX_UARTE_RX_ENABLE_CONT. +#define UARTE_FLAG_RX_CONT UARTE_FLAG(RX, 2) + +// Flag is set if receiver is enabled with flag NRFX_UARTE_RX_ENABLE_KEEP_FIFO_CONTENT. +#define UARTE_FLAG_RX_KEEP_FIFO_CONTENT UARTE_FLAG(RX, 3) + +// Flag indicates that RX abort was done to seamlessly switch the DMA buffer and not to abort the +// transfer. +#define UARTE_FLAG_RX_RESTARTED UARTE_FLAG(RX, 4) + +// Flag is set when internal RX buffer is used as a cache/proxy buffer. It is used when user buffer +// is in the memory that cannot be used by the DMA. +#define UARTE_FLAG_RX_USE_CACHE UARTE_FLAG(RX, 5) + +// Flag indicates that RX was aborted. +#define UARTE_FLAG_RX_ABORTED UARTE_FLAG(RX, 6) + +// Flag is set if instance was configured to control PSEL pins during the initialization. +#define UARTE_FLAG_PSEL_UNINIT UARTE_FLAG(MISC, 0) + +// Flag is set if instance was configured to control GPIO pins during the initialization. +#define UARTE_FLAG_GPIO_UNINIT UARTE_FLAG(MISC, 1) + +// Flag is atomically set when nrfx_uarte_int_trigger is called. +#define UARTE_FLAG_TRIGGER UARTE_FLAG(MISC, 2) + +// Flag indicates that HWFC pins are being configured. +#define UARTE_FLAG_HWFC_PINS UARTE_FLAG(MISC, 3) + +typedef struct +{ + /* User provided buffers. */ + nrfy_uarte_buffer_t curr; + nrfy_uarte_buffer_t next; + nrfy_uarte_buffer_t flush; + nrfx_uarte_rx_cache_t * p_cache; + size_t off; +} uarte_rx_data_t; + +typedef struct +{ + nrfy_uarte_buffer_t curr; + nrfy_uarte_buffer_t next; + nrfy_uarte_buffer_t cache; + size_t off; + int amount; +} uarte_tx_data_t; + typedef struct { void * p_context; nrfx_uarte_event_handler_t handler; - uint8_t const * p_tx_buffer; - uint8_t * p_rx_buffer; - uint8_t * p_rx_secondary_buffer; - volatile size_t tx_buffer_length; - size_t rx_buffer_length; - size_t rx_secondary_buffer_length; + uarte_rx_data_t rx; + uarte_tx_data_t tx; nrfx_drv_state_t state; - bool rx_aborted; - bool skip_gpio_cfg : 1; - bool skip_psel_cfg : 1; + nrfx_atomic_t flags; } uarte_control_block_t; + static uarte_control_block_t m_cb[NRFX_UARTE_ENABLED_COUNT]; +static const uint32_t rx_int_mask = NRF_UARTE_INT_ERROR_MASK | + NRF_UARTE_INT_ENDRX_MASK | + NRF_UARTE_INT_RXTO_MASK | + NRF_UARTE_INT_RXSTARTED_MASK; + static void apply_workaround_for_enable_anomaly(nrfx_uarte_t const * p_instance); static void uarte_configure(nrfx_uarte_t const * p_instance, nrfx_uarte_config_t const * p_config) { - if (!p_config->skip_gpio_cfg) + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + if (!NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG) && + (p_config->skip_gpio_cfg == false)) { + p_cb->flags |= UARTE_FLAG_GPIO_UNINIT; if (p_config->txd_pin != NRF_UARTE_PSEL_DISCONNECTED) { nrfy_gpio_pin_set(p_config->txd_pin); nrfy_gpio_cfg_output(p_config->txd_pin); +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_UARTE_CLOCKPIN_TXD_NEEDED_EXT) + nrfy_gpio_pin_clock_set(p_config->txd_pin, true); +#endif } if (p_config->rxd_pin != NRF_UARTE_PSEL_DISCONNECTED) { @@ -92,25 +199,29 @@ static void uarte_configure(nrfx_uarte_t const * p_instance, } } - if (p_config->config.hwfc == NRF_UARTE_HWFC_ENABLED) + if (!NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG) && + (p_config->config.hwfc == NRF_UARTE_HWFC_ENABLED) && (!p_config->skip_gpio_cfg)) { - if (!p_config->skip_gpio_cfg) + p_cb->flags |= UARTE_FLAG_HWFC_PINS; + if (p_config->cts_pin != NRF_UARTE_PSEL_DISCONNECTED) { - if (p_config->cts_pin != NRF_UARTE_PSEL_DISCONNECTED) - { - nrfy_gpio_cfg_input(p_config->cts_pin, NRF_GPIO_PIN_NOPULL); - } - if (p_config->rts_pin != NRF_UARTE_PSEL_DISCONNECTED) - { - nrfy_gpio_pin_set(p_config->rts_pin); - nrfy_gpio_cfg_output(p_config->rts_pin); -#if NRF_GPIO_HAS_CLOCKPIN + nrfy_gpio_cfg_input(p_config->cts_pin, NRF_GPIO_PIN_NOPULL); + } + if (p_config->rts_pin != NRF_UARTE_PSEL_DISCONNECTED) + { + nrfy_gpio_pin_set(p_config->rts_pin); + nrfy_gpio_cfg_output(p_config->rts_pin); +#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_UARTE_CLOCKPIN_RTS_NEEDED_EXT) nrfy_gpio_pin_clock_set(p_config->rts_pin, true); #endif - } } } + if (!NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG) && !p_config->skip_psel_cfg) + { + p_cb->flags |= UARTE_FLAG_PSEL_UNINIT; + } + nrfy_uarte_config_t nrfy_config = { .pins = @@ -121,7 +232,8 @@ static void uarte_configure(nrfx_uarte_t const * p_instance, .cts_pin = p_config->cts_pin }, .baudrate = p_config->baudrate, - .skip_psel_cfg = p_config->skip_psel_cfg + .skip_psel_cfg = NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG) ? + true : p_config->skip_psel_cfg }; nrfy_config.config = p_config->config; @@ -129,47 +241,58 @@ static void uarte_configure(nrfx_uarte_t const * p_instance, apply_workaround_for_enable_anomaly(p_instance); - if (m_cb[p_instance->drv_inst_idx].handler) - { - nrfy_uarte_int_init(p_instance->p_reg, - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDRX) | - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDTX) | - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ERROR) | - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_RXTO) | - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_TXSTOPPED), - p_config->interrupt_priority, - true); - } + nrfy_uarte_int_init(p_instance->p_reg, + NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDRX) | + NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDTX) | + NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ERROR) | + NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_RXTO) | + NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_TXSTOPPED), + p_config->interrupt_priority, + false); } static void pins_to_default(nrfx_uarte_t const * p_instance) { uarte_control_block_t const * p_cb = &m_cb[p_instance->drv_inst_idx]; - - /* Reset pins to default states */ nrfy_uarte_pins_t pins; - nrfy_uarte_pins_get(p_instance->p_reg, &pins); - if (!p_cb->skip_psel_cfg) + + // Need to read pins before they are reset. + if (!NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG)) + { + nrfy_uarte_pins_get(p_instance->p_reg, &pins); + } + + // Reset pins to default states. + if (!NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG) && + (p_cb->flags & UARTE_FLAG_PSEL_UNINIT)) { nrfy_uarte_pins_disconnect(p_instance->p_reg); } - if (!p_cb->skip_gpio_cfg) + + if (!NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG)) { - if (pins.txd_pin != NRF_UARTE_PSEL_DISCONNECTED) - { - nrfy_gpio_cfg_default(pins.txd_pin); - } - if (pins.rxd_pin != NRF_UARTE_PSEL_DISCONNECTED) - { - nrfy_gpio_cfg_default(pins.rxd_pin); - } - if (pins.cts_pin != NRF_UARTE_PSEL_DISCONNECTED) - { - nrfy_gpio_cfg_default(pins.cts_pin); - } - if (pins.rts_pin != NRF_UARTE_PSEL_DISCONNECTED) + if (p_cb->flags & UARTE_FLAG_GPIO_UNINIT) { - nrfy_gpio_cfg_default(pins.rts_pin); + if (pins.txd_pin != NRF_UARTE_PSEL_DISCONNECTED) + { + nrfy_gpio_cfg_default(pins.txd_pin); + } + if (pins.rxd_pin != NRF_UARTE_PSEL_DISCONNECTED) + { + nrfy_gpio_cfg_default(pins.rxd_pin); + } + + if (p_cb->flags & UARTE_FLAG_HWFC_PINS) + { + if (pins.cts_pin != NRF_UARTE_PSEL_DISCONNECTED) + { + nrfy_gpio_cfg_default(pins.cts_pin); + } + if (pins.rts_pin != NRF_UARTE_PSEL_DISCONNECTED) + { + nrfy_gpio_cfg_default(pins.rts_pin); + } + } } } } @@ -214,17 +337,92 @@ static void apply_workaround_for_enable_anomaly(nrfx_uarte_t const * p_instance) #endif // defined(NRF53_SERIES) || defined(NRF91_SERIES) } +/* Function returns true if new transfer can be started. Since TXSTOPPED + * (and ENDTX) is cleared before triggering new transfer, TX is ready for new + * transfer if any event is set. + * + * @param stop_on_end TXSTOP is PPIed with ENDTX. Check only TXSTOPPED. + */ +static bool is_tx_ready(NRF_UARTE_Type * p_uarte, bool stop_on_end) +{ + return nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED) || + (!stop_on_end && nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX)); +} + +static bool prepare_rx(NRF_UARTE_Type * p_uarte) +{ + /** + * Stop any currently running RX operations. This can occur when a + * bootloader sets up the UART hardware and does not clean it up + * before jumping to the next application. + */ + if (nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_RXSTARTED)) + { + bool res; + + nrfy_uarte_enable(p_uarte); + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPRX); + + NRFX_WAIT_FOR(nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_RXTO) || + nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ERROR), 100, 10, res); + + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXSTARTED); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDRX); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXTO); + nrfy_uarte_disable(p_uarte); + + return res; + } + return true; +} + +static bool prepare_tx(NRF_UARTE_Type * p_uarte, bool stop_on_end) +{ + (void)stop_on_end; + uint8_t dummy = 0; + + nrfy_uarte_enable(p_uarte); + + /* Set TXSTOPPED event by requesting fake (zero-length) transfer. + * Pointer to RAM variable (data->tx_buffer) is set because otherwise + * such operation may result in HardFault or RAM corruption. + */ + nrfy_uarte_tx_buffer_set(p_uarte, &dummy, 0); + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STARTTX); + + /* switch off transmitter to save an energy */ + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPTX); + + bool res; + + NRFX_WAIT_FOR(is_tx_ready(p_uarte, true), 10, 1, res); + + if (!res) + { + return false; + } + + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX); + nrfy_uarte_disable(p_uarte); + return true; +} + nrfx_err_t nrfx_uarte_init(nrfx_uarte_t const * p_instance, nrfx_uarte_config_t const * p_config, nrfx_uarte_event_handler_t event_handler) { NRFX_ASSERT(p_config); - uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - nrfx_err_t err_code = NRFX_SUCCESS; + uint32_t inst_idx = p_instance->drv_inst_idx; + uarte_control_block_t * p_cb = &m_cb[inst_idx]; + nrfx_err_t err_code; if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -235,10 +433,9 @@ nrfx_err_t nrfx_uarte_init(nrfx_uarte_t const * p_instance, static nrfx_irq_handler_t const irq_handlers[NRFX_UARTE_ENABLED_COUNT] = { NRFX_INSTANCE_IRQ_HANDLERS_LIST(UARTE, uarte) }; - if (nrfx_prs_acquire(p_instance->p_reg, - irq_handlers[p_instance->drv_inst_idx]) != NRFX_SUCCESS) + if (nrfx_prs_acquire(p_instance->p_reg, irq_handlers[inst_idx]) != NRFX_SUCCESS) { - err_code = NRFX_ERROR_BUSY; + nrfx_err_t err_code = NRFX_ERROR_BUSY; NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -246,31 +443,76 @@ nrfx_err_t nrfx_uarte_init(nrfx_uarte_t const * p_instance, } #endif // NRFX_CHECK(NRFX_PRS_ENABLED) + memset(p_cb, 0, sizeof(uarte_control_block_t)); + + p_cb->p_context = p_config->p_context; + p_cb->tx.cache.p_buffer = p_config->tx_cache.p_buffer; + if (p_config->tx_cache.length == 0) + { + p_cb->tx.cache.length = 0; + } + else + { + p_cb->tx.cache.length = p_config->tx_cache.length - 1; + } + if (p_config->rx_cache.length >= UARTE_HW_RX_FIFO_SIZE) + { + p_cb->rx.flush.p_buffer = p_config->rx_cache.p_buffer; + p_cb->rx.flush.length = 0; + if (RX_CACHE_SUPPORTED && p_config->p_rx_cache_scratch) + { + size_t buf_len = p_config->rx_cache.length / 2; + + p_cb->rx.p_cache = p_config->p_rx_cache_scratch; + + memset(p_cb->rx.p_cache, 0, sizeof(*p_cb->rx.p_cache)); + // Split provided cache space into two equal buffers. Cache buffers can overlap with + // flush buffer as they are not used simultaneously. + p_cb->rx.p_cache->cache_len = buf_len; + p_cb->rx.p_cache->cache[0].p_buffer = p_config->rx_cache.p_buffer; + p_cb->rx.p_cache->cache[1].p_buffer = &p_config->rx_cache.p_buffer[buf_len]; + } + } + + + if (p_config->tx_stop_on_end) + { + p_cb->flags |= UARTE_FLAG_TX_STOP_ON_END; +#if NRF_UARTE_HAS_ENDTX_STOPTX_SHORT + nrfy_uarte_shorts_enable(p_instance->p_reg, NRF_UARTE_SHORT_ENDTX_STOPTX); +#endif + } + p_cb->handler = event_handler; + p_cb->state = NRFX_DRV_STATE_INITIALIZED; - if (p_config) + // Handle case when other user (e.g. bootloader) left RX in active state. + if (!prepare_rx(p_instance->p_reg)) { - p_cb->p_context = p_config->p_context; - p_cb->skip_gpio_cfg = p_config->skip_gpio_cfg; - p_cb->skip_psel_cfg = p_config->skip_psel_cfg; - uarte_configure(p_instance, p_config); - } - - nrfy_uarte_enable(p_instance->p_reg); - p_cb->rx_buffer_length = 0; - p_cb->rx_secondary_buffer_length = 0; - p_cb->tx_buffer_length = 0; - p_cb->state = NRFX_DRV_STATE_INITIALIZED; - NRFX_LOG_INFO("Function: %s, error code: %s.", - __func__, - NRFX_LOG_ERROR_STRING_GET(err_code)); - return err_code; + return NRFX_ERROR_INTERNAL; + } + + uarte_configure(p_instance, p_config); + + if (!prepare_tx(p_instance->p_reg, p_config->tx_stop_on_end)) + { + return NRFX_ERROR_INTERNAL; + } + + uint32_t tx_int_mask = (!event_handler || p_config->tx_stop_on_end) ? + 0 : NRF_UARTE_INT_ENDTX_MASK; + uint32_t int_mask = tx_int_mask | ((event_handler) ? rx_int_mask : 0); + + nrfy_uarte_int_enable(p_instance->p_reg, int_mask); + + return NRFX_SUCCESS; } nrfx_err_t nrfx_uarte_reconfigure(nrfx_uarte_t const * p_instance, nrfx_uarte_config_t const * p_config) { NRFX_ASSERT(p_config); + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) @@ -287,368 +529,1365 @@ nrfx_err_t nrfx_uarte_reconfigure(nrfx_uarte_t const * p_instance, p_cb->p_context = p_config->p_context; } uarte_configure(p_instance, p_config); - nrfy_uarte_enable(p_instance->p_reg); - return NRFX_SUCCESS; + + if (prepare_tx(p_instance->p_reg, p_cb->flags & UARTE_FLAG_TX_STOP_ON_END)) + { + return NRFX_SUCCESS; + } + else + { + return NRFX_ERROR_INTERNAL; + } } void nrfx_uarte_uninit(nrfx_uarte_t const * p_instance) { + nrfx_err_t err; uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRF_UARTE_Type * p_uarte = p_instance->p_reg; - if (p_cb->handler) - { - nrfy_uarte_int_disable(p_instance->p_reg, - NRF_UARTE_INT_ENDRX_MASK | - NRF_UARTE_INT_ENDTX_MASK | - NRF_UARTE_INT_ERROR_MASK | - NRF_UARTE_INT_RXTO_MASK | - NRF_UARTE_INT_TXSTOPPED_MASK); - nrfy_uarte_int_uninit(p_instance->p_reg); - } - // Make sure all transfers are finished before UARTE is disabled - // to achieve the lowest power consumption. - nrfy_uarte_shorts_disable(p_instance->p_reg, NRF_UARTE_SHORT_ENDRX_STARTRX); - - nrfy_uarte_xfer_desc_t xfer_desc = { - .p_buffer = p_cb->p_rx_buffer, - .length = p_cb->rx_buffer_length - }; - nrfy_uarte_stop(p_instance->p_reg, &xfer_desc); + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); - nrfy_uarte_disable(p_instance->p_reg); - pins_to_default(p_instance); + nrfy_uarte_int_disable(p_uarte, + NRF_UARTE_INT_ENDRX_MASK | + NRF_UARTE_INT_ENDTX_MASK | + NRF_UARTE_INT_ERROR_MASK | + NRF_UARTE_INT_RXTO_MASK | + NRF_UARTE_INT_RXSTARTED_MASK | + NRF_UARTE_INT_TXSTOPPED_MASK); + nrfy_uarte_int_uninit(p_uarte); #if NRFX_CHECK(NRFX_PRS_ENABLED) - nrfx_prs_release(p_instance->p_reg); + nrfx_prs_release(p_uarte); #endif + err = nrfx_uarte_rx_abort(p_instance, true, true); + (void)err; + + err = nrfx_uarte_tx_abort(p_instance, true); + (void)err; + + pins_to_default(p_instance); + + p_cb->flags = 0; p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; p_cb->handler = NULL; NRFX_LOG_INFO("Instance uninitialized: %d.", p_instance->drv_inst_idx); } -nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance, - uint8_t const * p_data, - size_t length, - uint32_t flags) +bool nrfx_uarte_init_check(nrfx_uarte_t const * p_instance) { - (void)flags; uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); - NRFX_ASSERT(p_data); - NRFX_ASSERT(length > 0); - NRFX_ASSERT(UARTE_LENGTH_VALIDATE(p_instance->drv_inst_idx, length)); - nrfx_err_t err_code = NRFX_SUCCESS; + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} - // EasyDMA requires that transfer buffers are placed in DataRAM, - // signal error if the are not. - if (!nrf_dma_accessible_check(p_instance->p_reg, p_data)) +static void tx_start(NRF_UARTE_Type * p_uarte, const uint8_t *buf, size_t len, bool en_int) +{ + nrfy_uarte_tx_buffer_set(p_uarte, buf, len); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_TXSTOPPED); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_TXSTARTED); + + nrfy_uarte_enable(p_uarte); + + if (en_int) { - err_code = NRFX_ERROR_INVALID_ADDR; - NRFX_LOG_WARNING("Function: %s, error code: %s.", - __func__, - NRFX_LOG_ERROR_STRING_GET(err_code)); - return err_code; + nrfy_uarte_int_enable(p_uarte, NRF_UARTE_INT_TXSTOPPED_MASK); } - if (nrfx_uarte_tx_in_progress(p_instance)) + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STARTTX); +} + +static bool is_rx_active(uarte_control_block_t * p_cb) +{ + return (p_cb->flags & UARTE_FLAG_RX_ENABLED) ? true : false; +} + +/* Must be called with interrupts locked. */ +static void disable_hw_from_tx(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb) +{ + if (nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED) && !is_rx_active(p_cb)) { - err_code = NRFX_ERROR_BUSY; - NRFX_LOG_WARNING("Function: %s, error code: %s.", - __func__, - NRFX_LOG_ERROR_STRING_GET(err_code)); - return err_code; + nrfy_uarte_disable(p_uarte); } - p_cb->tx_buffer_length = length; - p_cb->p_tx_buffer = p_data; +} - NRFX_LOG_INFO("Transfer tx_len: %d.", p_cb->tx_buffer_length); - NRFX_LOG_DEBUG("Tx data:"); - NRFX_LOG_HEXDUMP_DEBUG(p_cb->p_tx_buffer, - p_cb->tx_buffer_length * sizeof(p_cb->p_tx_buffer[0])); +/* Block until transfer is completed. Disable UARTE if RX is not active. */ +static void block_on_tx(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb) +{ + bool stop_on_end = p_cb->flags & UARTE_FLAG_TX_STOP_ON_END; + bool do_disable = true; - nrfy_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ENDTX); - nrfy_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED); - nrfy_uarte_tx_buffer_set(p_instance->p_reg, p_cb->p_tx_buffer, p_cb->tx_buffer_length); + while (!is_tx_ready(p_uarte, stop_on_end)) + {} - uint32_t evt_mask = nrfy_uarte_tx_start(p_instance->p_reg, !p_cb->handler); - if (p_cb->handler == NULL) + NRFX_CRITICAL_SECTION_ENTER(); + + if (!stop_on_end) { - if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_TXSTOPPED)) + if (nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX)) { - err_code = NRFX_ERROR_FORBIDDEN; + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPTX); + while (!is_tx_ready(p_uarte, true)) + {} } else { - // Transmitter has to be stopped by triggering the STOPTX task to achieve - // the lowest possible level of the UARTE power consumption. - nrfy_uarte_stop(p_instance->p_reg, NULL); + do_disable = false; } - p_cb->tx_buffer_length = 0; } - NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); - return err_code; + else if (!nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED)) + { + do_disable = false; + } + + if (do_disable) + { + disable_hw_from_tx(p_uarte, p_cb); + } + NRFX_CRITICAL_SECTION_EXIT(); } -bool nrfx_uarte_tx_in_progress(nrfx_uarte_t const * p_instance) +static nrfx_err_t wait_for_endtx(NRF_UARTE_Type * p_uarte, + uint8_t const * p_buf, + uint32_t length, + bool stop_on_end) { - return (m_cb[p_instance->drv_inst_idx].tx_buffer_length != 0); + const uint8_t * p_tx; + bool ready; + uint32_t amount; + nrfx_err_t err; + + do { + // Pend until TX is ready again or TX buffer pointer is replaced with new + // address which indicates that current context got preempted and new + // request was started from a higher priority context. + ready = is_tx_ready(p_uarte, stop_on_end); + amount = nrfy_uarte_tx_amount_get(p_uarte); + p_tx = nrfy_uarte_tx_buffer_get(p_uarte); + } while (!ready && p_tx == p_buf); + + // Check if transfer got aborted. Note that aborted transfer can only be + // detected if new transfer is not started. + err = ((p_tx == p_buf) && (length > amount)) ? NRFX_ERROR_FORBIDDEN : NRFX_SUCCESS; + + if ((err == NRFX_SUCCESS) && !stop_on_end) + { + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPTX); + } + + return err; } -nrfx_err_t nrfx_uarte_rx(nrfx_uarte_t const * p_instance, - uint8_t * p_data, - size_t length) +static nrfx_err_t poll_out(nrfx_uarte_t const * p_instance, uint8_t const * p_byte, bool early_ret) { uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - + NRF_UARTE_Type * p_uarte = p_instance->p_reg; NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); - NRFX_ASSERT(p_data); - NRFX_ASSERT(length > 0); - NRFX_ASSERT(UARTE_LENGTH_VALIDATE(p_instance->drv_inst_idx, length)); - - nrfx_err_t err_code = NRFX_SUCCESS; + bool use_cache; + nrfx_err_t err = NRFX_ERROR_BUSY; + uint8_t const * p_buf; - // EasyDMA requires that transfer buffers are placed in DataRAM, - // signal error if the are not. - if (!nrf_dma_accessible_check(p_instance->p_reg, p_data)) + if (p_cb->tx.cache.p_buffer == NULL) { - err_code = NRFX_ERROR_INVALID_ADDR; - NRFX_LOG_WARNING("Function: %s, error code: %s.", - __func__, - NRFX_LOG_ERROR_STRING_GET(err_code)); - return err_code; + if (!nrf_dma_accessible_check(p_uarte, p_byte)) + { + return NRFX_ERROR_INVALID_PARAM; + } + use_cache = false; } - - bool second_buffer = false; - - if (p_cb->handler) + else { - nrfy_uarte_int_disable(p_instance->p_reg, NRF_UARTE_INT_ERROR_MASK | - NRF_UARTE_INT_ENDRX_MASK); + use_cache = true; } - if (p_cb->rx_buffer_length != 0) + + NRFX_CRITICAL_SECTION_ENTER(); + bool tx_ready = is_tx_ready(p_uarte, p_cb->flags & UARTE_FLAG_TX_STOP_ON_END); + + if (tx_ready) { - if (p_cb->rx_secondary_buffer_length != 0) + if (p_cb->tx.amount < 0) { - if (p_cb->handler) - { - nrfy_uarte_int_enable(p_instance->p_reg, NRF_UARTE_INT_ERROR_MASK | - NRF_UARTE_INT_ENDRX_MASK); - } - err_code = NRFX_ERROR_BUSY; - NRFX_LOG_WARNING("Function: %s, error code: %s.", - __func__, - NRFX_LOG_ERROR_STRING_GET(err_code)); - return err_code; + p_cb->tx.amount = (int)nrfy_uarte_tx_amount_get(p_uarte); + } + if (use_cache) + { + // Last byte in cache buffer is used for polling out. + p_cb->tx.cache.p_buffer[p_cb->tx.cache.length] = *p_byte; + p_buf = &p_cb->tx.cache.p_buffer[p_cb->tx.cache.length]; + } + else + { + p_buf = p_byte; } - second_buffer = true; + tx_start(p_uarte, p_buf, 1, early_ret); + err = NRFX_SUCCESS; } + NRFX_CRITICAL_SECTION_EXIT(); - if (!second_buffer) + if ((err == NRFX_SUCCESS) && !early_ret) { - p_cb->rx_buffer_length = length; - p_cb->p_rx_buffer = p_data; - p_cb->rx_secondary_buffer_length = 0; + err = wait_for_endtx(p_uarte, p_buf, 1, p_cb->flags & UARTE_FLAG_TX_STOP_ON_END); + + NRFX_CRITICAL_SECTION_ENTER(); + disable_hw_from_tx(p_uarte, p_cb); + NRFX_CRITICAL_SECTION_EXIT(); } - else + + return err; +} + +static bool tx_prepare_start(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb, + bool use_cache) +{ + if (!is_tx_ready(p_uarte, p_cb->flags & UARTE_FLAG_TX_STOP_ON_END)) { - p_cb->p_rx_secondary_buffer = p_data; - p_cb->rx_secondary_buffer_length = length; + // Transmitter is busy, set pending flag. + p_cb->flags |= UARTE_FLAG_TX_PENDING; + nrfy_uarte_int_enable(p_uarte, NRF_UARTE_INT_TXSTOPPED_MASK); + return false; } - NRFX_LOG_INFO("Transfer rx_len: %d.", length); + uint8_t const * p_buf; + uint32_t xfer_len; - nrfy_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ENDRX); - nrfy_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_RXTO); - nrfy_uarte_rx_buffer_set(p_instance->p_reg, p_data, length); - uint32_t evt_mask = 0; - if (second_buffer) + if (use_cache) { - nrfy_uarte_shorts_enable(p_instance->p_reg, NRF_UARTE_SHORT_ENDRX_STARTRX); + uint32_t chunk_len = NRFX_MIN(p_cb->tx.cache.length, p_cb->tx.curr.length - p_cb->tx.off); + + memcpy(p_cb->tx.cache.p_buffer, &p_cb->tx.curr.p_buffer[p_cb->tx.off], chunk_len); + p_buf = p_cb->tx.cache.p_buffer; + xfer_len = chunk_len; } else { - nrfy_uarte_xfer_desc_t xfer_desc = { - .p_buffer = p_cb->p_rx_buffer, - .length = p_cb->rx_buffer_length - }; + p_buf = p_cb->tx.curr.p_buffer; + xfer_len = p_cb->tx.curr.length; + } + p_cb->tx.amount = -1; + tx_start(p_uarte, p_buf, xfer_len, true); + + return true; +} + +static nrfx_err_t blocking_tx(nrfx_uarte_t const * p_instance, + uint8_t const * p_buffer, + uint32_t length, + uint32_t flags) +{ + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + bool early_ret = p_cb->handler && (flags & NRFX_UARTE_TX_EARLY_RETURN); + nrfx_err_t err = NRFX_SUCCESS; - evt_mask = nrfy_uarte_rx_start(p_instance->p_reg, !p_cb->handler ? &xfer_desc : NULL); + if ((early_ret && !p_cb->tx.cache.p_buffer) || (p_cb->flags & UARTE_FLAG_TX_LINKED)) + { + return NRFX_ERROR_FORBIDDEN; } - if (p_cb->handler == NULL) + for (uint32_t i = 0; i < length; i++) { - p_cb->rx_buffer_length = 0; + do { + err = poll_out(p_instance, &p_buffer[i], early_ret); + if ((err != NRFX_SUCCESS) && (err != NRFX_ERROR_BUSY)) + { + // TX aborted or other error + return err; + } - if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ERROR)) - { - err_code = NRFX_ERROR_INTERNAL; - } + } while (err != NRFX_SUCCESS); - if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_RXTO)) + if (!p_cb->handler && (p_cb->flags & UARTE_FLAG_TX_ABORTED)) { - err_code = NRFX_ERROR_FORBIDDEN; + NRFX_ATOMIC_FETCH_AND(&p_cb->flags, ~UARTE_FLAG_TX_ABORTED); + err = NRFX_ERROR_FORBIDDEN; + break; } } - else - { - p_cb->rx_aborted = false; - nrfy_uarte_int_enable(p_instance->p_reg, NRF_UARTE_INT_ERROR_MASK | - NRF_UARTE_INT_ENDRX_MASK); - } - NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); - return err_code; + return err; } -nrfx_err_t nrfx_uarte_rx_ready(nrfx_uarte_t const * p_instance, size_t * p_rx_amount) +nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance, + uint8_t const * p_data, + size_t length, + uint32_t flags) { - (void)p_rx_amount; + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRF_UARTE_Type * p_uarte = p_instance->p_reg; - return nrfy_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_ENDRX) ? - NRFX_SUCCESS : NRFX_ERROR_BUSY; -} + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(UARTE_LENGTH_VALIDATE(p_instance->drv_inst_idx, length)); + NRFX_ASSERT(p_data); + NRFX_ASSERT(length > 0); -uint32_t nrfx_uarte_errorsrc_get(nrfx_uarte_t const * p_instance) + nrfx_err_t err_code = NRFX_SUCCESS; + bool use_cache; + + if (length == 0) + { + return NRFX_ERROR_INVALID_LENGTH; + } + + // Handle case when transfer is blocking. + if (!p_cb->handler || (flags & (NRFX_UARTE_TX_EARLY_RETURN | NRFX_UARTE_TX_BLOCKING))) + { + return blocking_tx(p_instance, p_data, length, flags); + } + + // EasyDMA requires that transfer buffers are placed in DataRAM, + // signal error if the are not. + if (!nrf_dma_accessible_check(p_uarte, p_data)) + { + if (!p_cb->tx.cache.p_buffer || + (NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_TX_LINK) && (flags & NRFX_UARTE_TX_LINK))) + { + err_code = NRFX_ERROR_INVALID_ADDR; + } + + use_cache = true; + } + else + { + if ((p_cb->flags & UARTE_FLAG_TX_STOP_ON_END) && + (NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_TX_LINK) && (flags & NRFX_UARTE_TX_LINK))) + { + // STOPTX on ENDTX connection cannot be used together with linking. + err_code = NRFX_ERROR_FORBIDDEN; + } + + use_cache = false; + } + + if (err_code != NRFX_SUCCESS) + { + return err_code; + } + + NRFX_CRITICAL_SECTION_ENTER(); + if (p_cb->tx.curr.length == 0) + { + p_cb->tx.curr.length = length; + p_cb->tx.curr.p_buffer = (uint8_t *)p_data; + if (use_cache) + { + p_cb->flags |= UARTE_FLAG_TX_USE_CACHE; + } + + tx_prepare_start(p_uarte, p_cb, use_cache); + } + else if (NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_TX_LINK) && + !p_cb->tx.next.length && (flags & NRFX_UARTE_TX_LINK)) + { + if (nrf_dma_accessible_check(p_uarte, p_cb->tx.curr.p_buffer)) + { + bool res; + + p_cb->flags |= UARTE_FLAG_TX_LINKED; + p_cb->tx.next.p_buffer = (uint8_t *)p_data; + p_cb->tx.next.length = length; + NRFX_WAIT_FOR(nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTARTED), 10, 1, res); + if (res) + { +#if NRF_UARTE_HAS_ENDTX_STOPTX_SHORT + if (p_cb->flags & UARTE_FLAG_TX_STOP_ON_END) + { + nrfy_uarte_shorts_disable(p_uarte, NRF_UARTE_SHORT_ENDTX_STOPTX); + } +#endif + nrfy_uarte_tx_buffer_set(p_uarte, p_data, length); + err_code = NRFX_SUCCESS; + } + else + { + err_code = NRFX_ERROR_INTERNAL; + } + } + else + { + err_code = NRFX_ERROR_FORBIDDEN; + } + } + else + { + err_code = NRFX_ERROR_BUSY; + } + NRFX_CRITICAL_SECTION_EXIT(); + + return err_code; +} + +bool nrfx_uarte_tx_in_progress(nrfx_uarte_t const * p_instance) { - nrfy_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ERROR); - return nrfy_uarte_errorsrc_get_and_clear(p_instance->p_reg); + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + + return (m_cb[p_instance->drv_inst_idx].tx.curr.length != 0); } -static void rx_done_event(uarte_control_block_t * p_cb, - size_t bytes, - uint8_t * p_data) +nrfx_err_t nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance, bool sync) { - nrfx_uarte_event_t event; - event.type = NRFX_UARTE_EVT_RX_DONE; - event.data.rx.bytes = bytes; - event.data.rx.p_data = p_data; + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRF_UARTE_Type * p_uarte = p_instance->p_reg; + uint32_t mask; + + NRFX_ATOMIC_FETCH_OR(&p_cb->flags, UARTE_FLAG_TX_ABORTED); + + if (sync) + { + mask = nrfy_uarte_int_enable_check(p_uarte, NRF_UARTE_INT_ENDTX_MASK); + nrfy_uarte_int_disable(p_uarte, NRF_UARTE_INT_TXSTOPPED_MASK | NRF_UARTE_INT_ENDTX_MASK); + } + + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPTX); + + if (sync) + { + block_on_tx(p_uarte, p_cb); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX); + nrfy_uarte_int_enable(p_uarte, mask); + p_cb->tx.curr.length = 0; + } + + NRFX_LOG_INFO("TX transaction aborted."); + + return NRFX_SUCCESS; +} + +static void user_handler(uarte_control_block_t * p_cb, nrfx_uarte_evt_type_t type) +{ + nrfx_uarte_event_t event = { + .type = type + }; p_cb->handler(&event, p_cb->p_context); } -static void tx_done_event(uarte_control_block_t * p_cb, - size_t bytes) +static void user_handler_on_rx_disabled(uarte_control_block_t * p_cb, size_t flush_cnt) { - nrfx_uarte_event_t event; - event.type = NRFX_UARTE_EVT_TX_DONE; - event.data.tx.bytes = bytes; - event.data.tx.p_data = (uint8_t *)p_cb->p_tx_buffer; + nrfx_uarte_event_t event = { + .type = NRFX_UARTE_EVT_RX_DISABLED, + .data = { + .rx_disabled = { + .flush_cnt = flush_cnt + } + } + }; - p_cb->tx_buffer_length = 0; p_cb->handler(&event, p_cb->p_context); } -nrfx_err_t nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance, bool sync) +static void user_handler_on_error(NRF_UARTE_Type * p_uarte, uarte_control_block_t * p_cb) { - (void)sync; - uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; - nrfy_uarte_tx_abort(p_instance->p_reg, !p_cb->handler ? true : false); - NRFX_LOG_INFO("TX transaction aborted."); + nrfx_uarte_event_t event = { + .type = NRFX_UARTE_EVT_ERROR, + .data = { + .error = { + .error_mask = nrfy_uarte_errorsrc_get_and_clear(p_uarte) + } + } + }; - return NRFX_SUCCESS; + p_cb->handler(&event, p_cb->p_context); } -nrfx_err_t nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance, bool disable_all, bool sync) +static void user_handler_on_rx_done(uarte_control_block_t * p_cb, + const uint8_t * p_data, + size_t len) +{ + nrfx_uarte_event_t event = { + .type = NRFX_UARTE_EVT_RX_DONE, + .data = { + .rx = { + .p_buffer = (uint8_t *)p_data, + .length = len + } + } + }; + + p_cb->handler(&event, p_cb->p_context); +} + +static void user_handler_on_tx_done(uarte_control_block_t * p_cb, + const uint8_t * p_data, + size_t len, + bool abort) +{ + nrfx_uarte_event_t event = { + .type = NRFX_UARTE_EVT_TX_DONE, + .data = { + .tx = { + .p_buffer = (uint8_t *)p_data, + .length = len, + .flags = abort ? NRFX_UARTE_TX_DONE_ABORTED : 0 + } + } + }; + + p_cb->handler(&event, p_cb->p_context); +} + +static void release_rx(uarte_control_block_t * p_cb) +{ + /* Clear all RX flags. */ + NRFX_ATOMIC_FETCH_AND(&p_cb->flags, ~UARTE_RX_FLAGS); +} + +static bool is_tx_active(NRF_UARTE_Type * p_uarte) +{ + return !nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED) || + nrfy_uarte_int_enable_check(p_uarte, NRF_UARTE_INT_TXSTOPPED_MASK); +} + +static void disable_hw_from_rx(NRF_UARTE_Type * p_uarte) +{ + NRFX_CRITICAL_SECTION_ENTER(); + + if (!is_tx_active(p_uarte)) + { + nrfy_uarte_disable(p_uarte); + } + + NRFX_CRITICAL_SECTION_EXIT(); +} + +static void on_rx_disabled(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb, + size_t flush_cnt) +{ + nrfy_uarte_shorts_disable(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX); + nrfy_uarte_int_disable(p_uarte, rx_int_mask); + disable_hw_from_rx(p_uarte); + + p_cb->rx.curr.p_buffer = NULL; + p_cb->rx.next.p_buffer = NULL; + release_rx(p_cb); + user_handler_on_rx_disabled(p_cb, flush_cnt); +} + +/* Some data may be left in flush buffer. It need to be copied into rx buffer. + * If flushed data exceeds input buffer rx enabled is terminated. + * Returns true when flushed did not filled whole user buffer. + */ +static bool rx_flushed_handler(NRF_UARTE_Type * p_uarte, uarte_control_block_t * p_cb) +{ + if (p_cb->rx.flush.length == 0) + { + return true; + } + + if ((uint32_t)p_cb->rx.flush.length > p_cb->rx.curr.length) + { + uint8_t * p_buf = p_cb->rx.curr.p_buffer; + size_t len = p_cb->rx.curr.length; + + p_cb->rx.curr.p_buffer = NULL; + p_cb->rx.curr.length = 0; + memcpy(p_buf, p_cb->rx.flush.p_buffer, len); + p_cb->rx.flush.length -= len; + memmove(p_cb->rx.flush.p_buffer, &p_cb->rx.flush.p_buffer[len], p_cb->rx.flush.length); + + if (p_cb->handler) + { + user_handler_on_rx_done(p_cb, p_buf, len); + if (p_cb->flags & UARTE_FLAG_RX_STOP_ON_END) + { + on_rx_disabled(p_uarte, p_cb, 0); + } + } + + return false; + } + else + { + memcpy(p_cb->rx.curr.p_buffer, p_cb->rx.flush.p_buffer, p_cb->rx.flush.length); + p_cb->rx.off = p_cb->rx.flush.length; + p_cb->rx.flush.length = 0; + } + + return true; +} + +nrfx_err_t nrfx_uarte_rx_enable(nrfx_uarte_t const * p_instance, uint32_t flags) { - (void)disable_all; - (void)sync; uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRF_UARTE_Type * p_uarte = p_instance->p_reg; + uint32_t prev_flags; + + prev_flags = NRFX_ATOMIC_FETCH_OR(&p_cb->flags, UARTE_FLAG_RX_ENABLED); + if (prev_flags & UARTE_FLAG_RX_ENABLED) + { + return NRFX_ERROR_BUSY; + } - // Short between ENDRX event and STARTRX task must be disabled before - // aborting transmission. - if (p_cb->rx_secondary_buffer_length != 0) + if ((flags & NRFX_UARTE_RX_ENABLE_KEEP_FIFO_CONTENT) && !p_cb->rx.flush.p_buffer) { - nrfy_uarte_shorts_disable(p_instance->p_reg, NRF_UARTE_SHORT_ENDRX_STARTRX); + return NRFX_ERROR_FORBIDDEN; + } + + nrfy_uarte_int_disable(p_uarte, rx_int_mask); + nrfy_uarte_enable(p_uarte); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDRX); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXSTARTED); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXTO); + + uint32_t rt_flags = (flags & NRFX_UARTE_RX_ENABLE_CONT ? UARTE_FLAG_RX_CONT : 0) | + (flags & NRFX_UARTE_RX_ENABLE_STOP_ON_END ? UARTE_FLAG_RX_STOP_ON_END : 0) | + (flags & NRFX_UARTE_RX_ENABLE_KEEP_FIFO_CONTENT ? + UARTE_FLAG_RX_KEEP_FIFO_CONTENT : 0); + + NRFX_ATOMIC_FETCH_OR(&p_cb->flags, rt_flags); + + if ((p_cb->rx.curr.p_buffer == NULL) && p_cb->handler) + { + user_handler(p_cb, NRFX_UARTE_EVT_RX_BUF_REQUEST); + } + + // Expecting to get buffer set as a response to the request. + if (p_cb->rx.curr.p_buffer == NULL) + { + release_rx(p_cb); + return NRFX_ERROR_NO_MEM; + } + + /* Check if instance is still enabled. It might get disabled at some point. */ + if (p_cb->flags & UARTE_FLAG_RX_ENABLED) + { + if (!nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_RXSTARTED)) + { + /* Manually trigger RX if it was not yet started. */ + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STARTRX); + } + + if (p_cb->handler) + { + nrfy_uarte_int_enable(p_uarte, rx_int_mask); + } } - p_cb->rx_aborted = true; - nrfy_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPRX); - NRFX_LOG_INFO("RX transaction aborted."); return NRFX_SUCCESS; } -static void irq_handler(NRF_UARTE_Type * p_reg, uarte_control_block_t * p_cb) +static nrfx_err_t rx_buffer_set(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb, + uint8_t * p_data, + size_t length) { - nrfy_uarte_xfer_desc_t xfer_desc = { - .p_buffer = p_cb->p_rx_buffer, - .length = p_cb->rx_buffer_length - }; - uint32_t evt_mask = nrfy_uarte_events_process(p_reg, - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ERROR) | - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDRX) | - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDTX) | - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_RXTO) | - NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_TXSTOPPED), - &xfer_desc); + nrfx_err_t err_code = NRFX_SUCCESS; - if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ERROR)) + if (p_cb->rx.curr.p_buffer == NULL || + (!p_cb->handler && nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDRX))) { - nrfx_uarte_event_t event; - event.type = NRFX_UARTE_EVT_ERROR; - event.data.error.error_mask = nrfy_uarte_errorsrc_get_and_clear(p_reg); - event.data.error.rx.bytes = nrfy_uarte_rx_amount_get(p_reg); - event.data.error.rx.p_data = p_cb->p_rx_buffer; + if (p_cb->rx.curr.p_buffer) + { + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDRX); + } - // Abort transfer. - p_cb->rx_buffer_length = 0; - p_cb->rx_secondary_buffer_length = 0; + p_cb->rx.curr.p_buffer = p_data; + p_cb->rx.curr.length = length; - p_cb->handler(&event, p_cb->p_context); + if (rx_flushed_handler(p_uarte, p_cb)) + { + nrfy_uarte_rx_buffer_set(p_uarte, + &p_cb->rx.curr.p_buffer[p_cb->rx.off], + p_cb->rx.curr.length - p_cb->rx.off); + if (p_cb->flags & UARTE_FLAG_RX_ENABLED) + { + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STARTRX); + } + } } - else if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDRX)) + else if (p_cb->rx.next.p_buffer == NULL) { - // Aborted transfers are handled in RXTO event processing. - if (!p_cb->rx_aborted) + p_cb->rx.next.p_buffer = p_data; + p_cb->rx.next.length = length; + + nrfy_uarte_rx_buffer_set(p_uarte, p_data, length); + if (p_cb->flags & UARTE_FLAG_RX_CONT) { - size_t amount = p_cb->rx_buffer_length; - if (p_cb->rx_secondary_buffer_length != 0) + nrfy_uarte_shorts_enable(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX); + } + } + else + { + err_code = NRFX_ERROR_BUSY; + } + + return err_code; +} + +static size_t get_curr_cache_buf_len(size_t cache_len, size_t len, size_t curr) +{ + if (len == 0) + { + return 0; + } + + size_t rem = len - curr; + + return (rem > cache_len) ? NRFX_MIN(cache_len, rem / 2) : rem; +} + +static size_t get_cache_buf_len(nrfx_uarte_rx_cache_t * p_cache) +{ + size_t user_len = p_cache->user[0].length; + size_t len = get_curr_cache_buf_len(p_cache->cache_len, user_len, p_cache->started); + + if (!len) + { + p_cache->started = 0; + len = get_curr_cache_buf_len(p_cache->cache_len, p_cache->user[1].length, 0); + } + + p_cache->started += len; + + return len; +} + +nrfx_err_t nrfx_uarte_rx_buffer_set(nrfx_uarte_t const * p_instance, + uint8_t * p_data, + size_t length) +{ + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(UARTE_LENGTH_VALIDATE(p_instance->drv_inst_idx, length)); + NRFX_ASSERT(p_data); + NRFX_ASSERT(length > 0); + + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRF_UARTE_Type * p_uarte = p_instance->p_reg; + bool cont = false; + bool int_enabled; + nrfx_err_t err = NRFX_SUCCESS; + + int_enabled = nrfy_uarte_int_enable_check(p_uarte, rx_int_mask) != 0; + if (int_enabled) + { + nrfy_uarte_int_disable(p_uarte, rx_int_mask); + } + + if (!nrf_dma_accessible_check(p_uarte, p_data)) + { + // No cache buffer provided or blocking mode, transfer cannot be handled. + if (!RX_CACHE_SUPPORTED || !p_cb->rx.p_cache || !p_cb->handler) + { + err = NRFX_ERROR_INVALID_ADDR; + } + else + { + nrfx_uarte_rx_cache_t * p_cache = p_cb->rx.p_cache; + + if (!p_cache->user[0].p_buffer) { - uint8_t * p_data = p_cb->p_rx_buffer; - nrfy_uarte_shorts_disable(p_reg, NRF_UARTE_SHORT_ENDRX_STARTRX); - p_cb->rx_buffer_length = p_cb->rx_secondary_buffer_length; - p_cb->p_rx_buffer = p_cb->p_rx_secondary_buffer; - p_cb->rx_secondary_buffer_length = 0; - rx_done_event(p_cb, amount, p_data); + p_cache->started = 0; + p_cache->received = 0; + p_cache->user[0].p_buffer = p_data; + p_cache->user[0].length = length; + p_data = p_cache->cache[0].p_buffer; + length = get_cache_buf_len(p_cache); + p_cache->idx = 1; + p_cache->buf_req = true; + NRFX_ATOMIC_FETCH_OR(&p_cb->flags, UARTE_FLAG_RX_USE_CACHE); + cont = true; + } + else if (!p_cache->user[1].p_buffer) + { + p_cache->user[1].p_buffer = p_data; + p_cache->user[1].length = length; + err = NRFX_SUCCESS; + if (!p_cb->rx.next.p_buffer) + { + length = get_cache_buf_len(p_cache); + p_data = p_cache->cache[p_cache->idx++ & 0x1].p_buffer; + cont = true; + } } else { - p_cb->rx_buffer_length = 0; - rx_done_event(p_cb, amount, p_cb->p_rx_buffer); + err = NRFX_ERROR_BUSY; } } } + else if (RX_CACHE_SUPPORTED && (p_cb->flags & UARTE_FLAG_RX_USE_CACHE)) + { + // For first buffer cache was used. It is expected that following buffer will also + // be cached. + err = NRFX_ERROR_FORBIDDEN; + } + else + { + cont = true; + } + + if (cont) + { + err = rx_buffer_set(p_uarte, p_cb, p_data, length); + } + + if (int_enabled) + { + nrfy_uarte_int_enable(p_uarte, rx_int_mask); + } + + return err; +} + +static void rx_flush(NRF_UARTE_Type * p_uarte, uarte_control_block_t * p_cb) +{ + if (!(p_cb->flags & UARTE_FLAG_RX_KEEP_FIFO_CONTENT)) + { + p_cb->rx.flush.length = 0; + return; + } + + /* Flushing RX fifo requires buffer bigger than 4 bytes to empty fifo*/ + uint32_t prev_rx_amount = nrfy_uarte_rx_amount_get(p_uarte); + + if (USE_WORKAROUND_FOR_FLUSHRX_ANOMALY ) + { + /* There is a HW bug which results in rx amount value not being updated + * when fifo was empty. It is then hard to determine if fifo contained + * number of bytes equal to the last transfer or was empty. We try to + * determine that by watermarking flush buffer to check if it was overwritten. + * However, if fifo contained amount of bytes equal to last transfer and + * bytes are equal to watermarking it will be dropped. */ + memset(p_cb->rx.flush.p_buffer, 0xAA, UARTE_HW_RX_FIFO_SIZE); + } - if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_RXTO)) + nrfy_uarte_rx_buffer_set(p_uarte, p_cb->rx.flush.p_buffer, UARTE_HW_RX_FIFO_SIZE); + /* Final part of handling RXTO event is in ENDRX interrupt + * handler. ENDRX is generated as a result of FLUSHRX task. + */ + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDRX); + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_FLUSHRX); + while (!nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDRX)) { - if (p_cb->rx_buffer_length != 0) + /* empty */ + } + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXSTARTED); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDRX); + + p_cb->rx.flush.length = nrfy_uarte_rx_amount_get(p_uarte); + + if (USE_WORKAROUND_FOR_FLUSHRX_ANOMALY) + { + if ((uint32_t)p_cb->rx.flush.length == prev_rx_amount) { - p_cb->rx_buffer_length = 0; - // In case of using double-buffered reception both variables storing buffer length - // have to be cleared to prevent incorrect behaviour of the driver. - p_cb->rx_secondary_buffer_length = 0; - rx_done_event(p_cb, nrfy_uarte_rx_amount_get(p_reg), p_cb->p_rx_buffer); + for (size_t i = 0; i < UARTE_HW_RX_FIFO_SIZE; i++) + { + if (p_cb->rx.flush.p_buffer[i] != 0xAA) + { + return; + } + } + p_cb->rx.flush.length = 0; } } +} - if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDTX)) +static void wait_for_rx_completion(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb) +{ + while(nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_RXTO) == false) + {} + + rx_flush(p_uarte, p_cb); + disable_hw_from_rx(p_uarte); + + p_cb->rx.curr.p_buffer = NULL; + p_cb->rx.next.p_buffer = NULL; + release_rx(p_cb); +} + +static nrfx_err_t rx_abort(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb, + bool disable_all, + bool sync) +{ + uint32_t flag; + bool endrx_startrx = nrfy_uarte_shorts_get(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX) != 0; + + if (!(p_cb->flags & UARTE_FLAG_RX_ENABLED)) + { + return NRFX_ERROR_INVALID_STATE; + } + + if (disable_all || !endrx_startrx) + { + nrfy_uarte_shorts_disable(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX); + flag = UARTE_FLAG_RX_STOP_ON_END | UARTE_FLAG_RX_ABORTED; + } + else { - // Transmitter has to be stopped by triggering STOPTX task to achieve - // the lowest possible level of the UARTE power consumption. - nrfy_uarte_task_trigger(p_reg, NRF_UARTE_TASK_STOPTX); + flag = UARTE_FLAG_RX_RESTARTED; + } + + NRFX_ATOMIC_FETCH_OR(&p_cb->flags, flag); - if (p_cb->tx_buffer_length != 0) + if (sync || !p_cb->handler) + { + nrfy_uarte_int_disable(p_uarte, rx_int_mask); + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPRX); + wait_for_rx_completion(p_uarte, p_cb); + } + else + { + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPRX); + } + + return NRFX_SUCCESS; +} + +nrfx_err_t nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance, bool disable_all, bool sync) +{ + NRFX_ASSERT(p_instance); + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_INITIALIZED); + + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRF_UARTE_Type * p_uarte = p_instance->p_reg; + + return rx_abort(p_uarte, p_cb, disable_all, sync); +} + +nrfx_err_t nrfx_uarte_rx(nrfx_uarte_t const * p_instance, + uint8_t * p_data, + size_t length) +{ + nrfx_err_t err_code = nrfx_uarte_rx_buffer_set(p_instance, p_data, length); + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + NRFX_ASSERT(UARTE_LENGTH_VALIDATE(p_instance->drv_inst_idx, length)); + NRFX_ASSERT(p_data); + NRFX_ASSERT(length > 0); + + if (err_code != NRFX_SUCCESS) + { + return err_code; + } + + uint32_t flags = NRFX_UARTE_RX_ENABLE_CONT | NRFX_UARTE_RX_ENABLE_STOP_ON_END; + + err_code = nrfx_uarte_rx_enable(p_instance, flags); + if (err_code != NRFX_ERROR_BUSY && err_code != NRFX_SUCCESS) + { + return err_code; + } + err_code = NRFX_SUCCESS; + + if (p_cb->handler == NULL) + { + size_t rx_amount; + + while (nrfx_uarte_rx_ready(p_instance, &rx_amount) != NRFX_SUCCESS) + {} + + if (length > rx_amount) { - tx_done_event(p_cb, nrfy_uarte_tx_amount_get(p_reg)); + err_code = NRFX_ERROR_FORBIDDEN; + } + else + { + err_code = nrfx_uarte_rx_abort(p_instance, true, true); + NRFX_ASSERT(err_code == NRFX_SUCCESS); } } - if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_TXSTOPPED)) + return err_code; +} + +nrfx_err_t nrfx_uarte_rx_ready(nrfx_uarte_t const * p_instance, size_t * p_rx_amount) +{ + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + + if (p_cb->handler) + { + return NRFX_ERROR_FORBIDDEN; + } + + if (nrfy_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_ENDRX)) { - if (p_cb->tx_buffer_length != 0) + if (p_rx_amount) { - tx_done_event(p_cb, nrfy_uarte_tx_amount_get(p_reg)); + *p_rx_amount = nrfy_uarte_rx_amount_get(p_instance->p_reg); } + return NRFX_SUCCESS; + } + else + { + return NRFX_ERROR_BUSY; + } +} + +nrfx_err_t nrfx_uarte_int_trigger(nrfx_uarte_t const * p_instance) +{ + uarte_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + if (!p_cb->handler) + { + return NRFX_ERROR_FORBIDDEN; + } + + if (!(NRFX_ATOMIC_FETCH_OR(&p_cb->flags, UARTE_FLAG_TRIGGER) & UARTE_FLAG_TRIGGER)) + { + NRFX_IRQ_PENDING_SET(nrfx_get_irq_number((void *)p_instance->p_reg)); + } + + return NRFX_SUCCESS; +} + +uint32_t nrfx_uarte_errorsrc_get(nrfx_uarte_t const * p_instance) +{ + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state != NRFX_DRV_STATE_UNINITIALIZED); + /* Function must be used in blocking mode only. */ + NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].handler == NULL); + + nrfy_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ERROR); + return nrfy_uarte_errorsrc_get_and_clear(p_instance->p_reg); +} + +bool nrfx_uarte_rx_new_data_check(nrfx_uarte_t const * p_instance) +{ + if (nrfy_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_RXDRDY)) + { + nrfy_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_RXDRDY); + return true; + } + return false; +} + +static void rxstarted_irq_handler(NRF_UARTE_Type * p_reg, uarte_control_block_t * p_cb) +{ + bool cache_used = RX_CACHE_SUPPORTED && (p_cb->flags & UARTE_FLAG_RX_USE_CACHE); + + if (!cache_used) + { + user_handler(p_cb, NRFX_UARTE_EVT_RX_BUF_REQUEST); + return; + } + + size_t len = get_cache_buf_len(p_cb->rx.p_cache); + nrfx_uarte_rx_cache_t * p_cache = p_cb->rx.p_cache; + + if (len) + { + uint8_t * p_buf = p_cache->cache[p_cache->idx++ & 0x1].p_buffer; + nrfx_err_t err = rx_buffer_set(p_reg, p_cb, p_buf, len); + + (void)err; + NRFX_ASSERT(err == NRFX_SUCCESS); + } + + if (p_cache->buf_req) + { + user_handler(p_cb, NRFX_UARTE_EVT_RX_BUF_REQUEST); + p_cache->buf_req = false; + } +} + +static void handler_on_rx_done(uarte_control_block_t * p_cb, + uint8_t * p_data, + size_t len, + bool abort) +{ + bool cache_used = RX_CACHE_SUPPORTED && (p_cb->flags & UARTE_FLAG_RX_USE_CACHE); + nrfx_uarte_rx_cache_t * p_cache = p_cb->rx.p_cache; + + if (!cache_used) + { + user_handler_on_rx_done(p_cb, p_data, len); + return; + } + else if (!p_cache->user[0].p_buffer) + { + return; + } + + memcpy(&p_cache->user[0].p_buffer[p_cache->received], p_data, len); + p_cache->received += len; + + bool user_buf_end = p_cache->user[0].length == p_cache->received; + + if (user_buf_end || abort) + { + user_handler_on_rx_done(p_cb, p_cache->user[0].p_buffer, p_cache->received); + p_cache->received = 0; + p_cache->user[0] = p_cache->user[1]; + p_cache->user[1] = (nrfy_uarte_buffer_t){ NULL, 0 }; + if (p_cache->user[0].length) + { + p_cache->buf_req = true; + } + } +} + +static void rxto_irq_handler(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb) +{ + if (p_cb->rx.curr.p_buffer) + { + handler_on_rx_done(p_cb, p_cb->rx.curr.p_buffer, 0, true); + p_cb->rx.curr.p_buffer = NULL; + } + + rx_flush(p_uarte, p_cb); + + on_rx_disabled(p_uarte, p_cb, p_cb->rx.flush.length); +} + +static bool endrx_irq_handler(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb, + bool rxstarted) +{ + size_t rx_amount = (size_t)nrfy_uarte_rx_amount_get(p_uarte); + bool premature = p_cb->flags & (UARTE_FLAG_RX_RESTARTED | UARTE_FLAG_RX_ABORTED); + bool aborted = false; + bool late = false; + + handler_on_rx_done(p_cb, p_cb->rx.curr.p_buffer, rx_amount + p_cb->rx.off, premature); + p_cb->rx.off = 0; + + NRFX_CRITICAL_SECTION_ENTER(); + + p_cb->flags &= ~UARTE_FLAG_RX_RESTARTED; + p_cb->rx.curr = p_cb->rx.next; + p_cb->rx.next = (nrfy_uarte_buffer_t){ NULL, 0 }; + + nrfy_uarte_shorts_disable(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX); + if (p_cb->flags & UARTE_FLAG_RX_ABORTED) + { + aborted = true; + } + else if (p_cb->rx.curr.p_buffer == NULL) + { + if (p_cb->flags & UARTE_FLAG_RX_STOP_ON_END) + { + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPRX); + } + } + else if (!(p_cb->flags & UARTE_FLAG_RX_CONT && rxstarted)) + { + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STARTRX); + if (nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_RXTO)) + { + late = true; + } + } + + NRFX_CRITICAL_SECTION_EXIT(); + + if (late) + { + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXTO); + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXSTARTED); + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPRX); + user_handler(p_cb, NRFX_UARTE_EVT_RX_BUF_TOO_LATE); + } + + return aborted; +} + +static void pending_tx_handler(NRF_UARTE_Type * p_uarte, + uarte_tx_data_t * p_tx) +{ + /* If there is a pending tx request, it means that uart_tx() + * was called when there was ongoing blocking transfer. Handling + * TXSTOPPED interrupt means that blocking transfer has completed. + */ + NRFX_ASSERT(p_tx->next.p_buffer); + + NRFX_CRITICAL_SECTION_ENTER(); + + if (nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED)) + { + p_tx->curr.p_buffer = p_tx->next.p_buffer; + p_tx->next.p_buffer = NULL; + p_tx->amount = -1; + tx_start(p_uarte, p_tx->curr.p_buffer, p_tx->curr.length, true); + } + + NRFX_CRITICAL_SECTION_EXIT(); +} + +static void txstopped_irq_handler(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb) +{ + nrfy_uarte_int_disable(p_uarte, NRF_UARTE_INT_TXSTOPPED_MASK); + + NRFX_CRITICAL_SECTION_ENTER(); + disable_hw_from_tx(p_uarte, p_cb); + NRFX_CRITICAL_SECTION_EXIT(); + + // If no length set, it means that it was a blocking transfer. + if (p_cb->tx.curr.length == 0) + { + return; + } + + // if p_buf is null it indicates that tx setup interrupted poll out and + // tx buffer is pending. + if (p_cb->tx.curr.p_buffer == NULL) + { + pending_tx_handler(p_uarte, &p_cb->tx); + return; + } + + size_t amount; + bool use_cache; + bool aborted = p_cb->flags & UARTE_FLAG_TX_ABORTED; + NRFX_CRITICAL_SECTION_ENTER(); + if (p_cb->flags & UARTE_FLAG_TX_PENDING) + { + amount = 0; + use_cache = !nrf_dma_accessible_check(p_uarte, p_cb->tx.curr.p_buffer); + } + else + { + amount = p_cb->tx.amount >= 0 ? (size_t)p_cb->tx.amount : nrfy_uarte_tx_amount_get(p_uarte); + use_cache = true; + } + NRFX_CRITICAL_SECTION_EXIT(); + + p_cb->tx.off += amount; + if (p_cb->tx.off == p_cb->tx.curr.length || aborted) + { + uint32_t off = p_cb->tx.off; + + // Transfer completed. + p_cb->flags &= ~UARTE_FLAG_TX_ABORTED; + p_cb->tx.curr.length = 0; + p_cb->tx.off = 0; + user_handler_on_tx_done(p_cb, p_cb->tx.curr.p_buffer, off, aborted); + } + else + { + NRFX_CRITICAL_SECTION_ENTER(); + p_cb->flags &= ~UARTE_FLAG_TX_PENDING; + tx_prepare_start(p_uarte, p_cb, use_cache); + NRFX_CRITICAL_SECTION_EXIT(); + } +} + +static void error_irq_handler(NRF_UARTE_Type * p_uarte, + uarte_control_block_t * p_cb) +{ + user_handler_on_error(p_uarte, p_cb); +} + +static void endtx_irq_handler(NRF_UARTE_Type * p_uarte, uarte_control_block_t * p_cb) +{ + if (NRFX_IS_ENABLED(NRFX_UARTE_CONFIG_TX_LINK) && (p_cb->flags & UARTE_FLAG_TX_LINKED)) + { + uint8_t const * p_buf = p_cb->tx.curr.p_buffer; + uint32_t len = p_cb->tx.curr.length; + bool aborted; + + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX); +#if NRF_UARTE_HAS_ENDTX_STOPTX_SHORT + nrfy_uarte_shorts_enable(p_uarte, NRF_UARTE_SHORT_ENDTX_STOPTX); +#endif + NRFX_CRITICAL_SECTION_ENTER(); + p_cb->tx.curr = p_cb->tx.next; + p_cb->tx.next.length = 0; + p_cb->tx.next.p_buffer = NULL; + p_cb->flags &= ~UARTE_FLAG_TX_LINKED; + aborted = p_cb->flags & UARTE_FLAG_TX_ABORTED; + NRFX_CRITICAL_SECTION_EXIT(); + + if (aborted) + { + p_cb->tx.amount = 0; + len = nrfy_uarte_tx_amount_get(p_uarte); + } + + user_handler_on_tx_done(p_cb, p_buf, len, aborted); + } + else + { + // Locking since blocking transfer can interrupt at anytime. In that case we don't + // want to stop ongoing blocking transfer. + NRFX_CRITICAL_SECTION_ENTER(); + if (nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX)) + { + nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX); + nrfy_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPTX); + } + NRFX_CRITICAL_SECTION_EXIT(); + } +} + +static void int_trigger_handler(uarte_control_block_t * p_cb) +{ + user_handler(p_cb, NRFX_UARTE_EVT_TRIGGER); +} + +static void irq_handler(NRF_UARTE_Type * p_uarte, uarte_control_block_t * p_cb) +{ + // ENDTX must be handled before TXSTOPPED so we read event status in the reversed order of + // handling. + uint32_t mask = NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_TXSTOPPED); + bool txstopped = nrfy_uarte_int_enable_check(p_uarte, mask) && + nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED); + + mask = NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDTX); + + bool endtx = nrfy_uarte_int_enable_check(p_uarte, mask) && + nrfy_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX); + + if (p_cb->handler) + { + if (nrfy_uarte_events_process(p_uarte, NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ERROR), NULL)) + { + error_irq_handler(p_uarte, p_cb); + } + + // ENDRX must be handled before RXSTARTED. RXTO must be handled as the last one. We collect + // state of all 3 events before processing to prevent reordering in case of higher interrupt + // preemption. We read event status in the reversed order of handling. + bool rxto = nrfy_uarte_events_process(p_uarte, + NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_RXTO), + &p_cb->rx.curr); + bool rxstarted = nrfy_uarte_events_process(p_uarte, + NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_RXSTARTED), + NULL); + bool endrx = nrfy_uarte_events_process(p_uarte, + NRFY_EVENT_TO_INT_BITMASK(NRF_UARTE_EVENT_ENDRX), + &p_cb->rx.curr); + + if (endrx) + { + if (endrx_irq_handler(p_uarte, p_cb, rxstarted) == true) + { + rxstarted = false; + } + } + + if (rxstarted) + { + rxstarted_irq_handler(p_uarte, p_cb); + } + + if (rxto) + { + rxto_irq_handler(p_uarte, p_cb); + } + } + + if (endtx) + { + endtx_irq_handler(p_uarte, p_cb); + } + + if (txstopped) + { + txstopped_irq_handler(p_uarte, p_cb); + } + + if (NRFX_ATOMIC_FETCH_AND(&p_cb->flags, ~UARTE_FLAG_TRIGGER) & UARTE_FLAG_TRIGGER) + { + int_trigger_handler(p_cb); } } diff --git a/drivers/src/nrfx_usbd.c b/drivers/src/nrfx_usbd.c index d91db3411..0d280c94e 100644 --- a/drivers/src/nrfx_usbd.c +++ b/drivers/src/nrfx_usbd.c @@ -275,6 +275,11 @@ static nrfx_atomic_t m_ep_dma_waiting; */ static bool m_dma_pending; +/** + * @brief Tracks whether total bytes transferred by DMA is even or odd. + */ +static uint8_t m_dma_odd; + /** * @brief First time enabling after reset. Used in nRF52 errata 223. */ @@ -684,7 +689,7 @@ static inline usbd_ep_state_t* ep_state_access(nrfx_usbd_ep_t ep) static inline uint8_t ep2bit(nrfx_usbd_ep_t ep) { NRFX_USBD_ASSERT_EP_VALID(ep); - return NRFX_USBD_EP_BITPOS(ep); + return (uint8_t)NRFX_USBD_EP_BITPOS(ep); } /** @@ -803,7 +808,7 @@ static inline void usbd_ep_abort(nrfx_usbd_ep_t ep) if(ep != NRFX_USBD_EPIN0) { *((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x800)) = 0x7B6 + (2u * (NRF_USBD_EP_NR_GET(ep) - 1)); - uint8_t temp = *((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x804)); + uint8_t temp = (uint8_t)*((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x804)); temp |= (1U << 1); *((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x804)) |= temp; (void)(*((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x804))); @@ -811,7 +816,7 @@ static inline void usbd_ep_abort(nrfx_usbd_ep_t ep) else { *((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x800)) = 0x7B4; - uint8_t temp = *((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x804)); + uint8_t temp = (uint8_t)*((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x804)); temp |= (1U << 2); *((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x804)) |= temp; (void)(*((volatile uint32_t *)((uint32_t)(NRF_USBD) + 0x804))); @@ -848,7 +853,7 @@ static void usbd_ep_abort_all(void) uint32_t ep_waiting = m_ep_dma_waiting | (m_ep_ready & NRFX_USBD_EPOUT_BIT_MASK); while (0 != ep_waiting) { - uint8_t bitpos = NRF_CTZ(ep_waiting); + uint8_t bitpos = (uint8_t)NRF_CTZ(ep_waiting); if (!NRF_USBD_EPISO_CHECK(bit2ep(bitpos))) { usbd_ep_abort(bit2ep(bitpos)); @@ -1282,7 +1287,7 @@ static void ev_epdata_handler(void) /* All finished endpoint have to be marked as busy */ while (dataepstatus) { - uint8_t bitpos = NRF_CTZ(dataepstatus); + uint8_t bitpos = (uint8_t)NRF_CTZ(dataepstatus); nrfx_usbd_ep_t ep = bit2ep(bitpos); dataepstatus &= ~(1UL << bitpos); @@ -1311,7 +1316,7 @@ static void ev_epdata_handler(void) static uint8_t usbd_dma_scheduler_algorithm(uint32_t req) { /* Only prioritized scheduling mode is supported. */ - return NRF_CTZ(req); + return (uint8_t)NRF_CTZ(req); } /** @@ -1437,11 +1442,12 @@ static void usbd_dmareq_process(void) /* There is a lot of USBD registers that cannot be accessed during EasyDMA transfer. * This is quick fix to maintain stability of the stack. * It cost some performance but makes stack stable. */ - while (!nrf_usbd_event_check(NRF_USBD, nrfx_usbd_ep_to_endevent(ep)) && - !nrf_usbd_event_check(NRF_USBD, NRF_USBD_EVENT_USBRESET)) + while (!nrf_usbd_event_check(NRF_USBD, nrfx_usbd_ep_to_endevent(ep))) { /* Empty */ } + /* DMA finished, track if total bytes transferred is even or odd */ + m_dma_odd ^= nrf_usbd_ep_amount_get(NRF_USBD, ep) & 1; if (NRFX_USBD_DMAREQ_PROCESS_DEBUG) { @@ -1628,7 +1634,7 @@ void nrfx_usbd_irq_handler(void) /* Check all enabled interrupts */ while (to_process) { - uint8_t event_nr = NRF_CTZ(to_process); + uint8_t event_nr = (uint8_t)NRF_CTZ(to_process); if (nrf_usbd_event_get_and_clear(NRF_USBD, (nrf_usbd_event_t)nrfx_bitpos_to_event(event_nr))) { @@ -1639,11 +1645,11 @@ void nrfx_usbd_irq_handler(void) /* Process the active interrupts */ bool setup_active = 0 != (active & NRF_USBD_INT_EP0SETUP_MASK); - active &= ~NRF_USBD_INT_EP0SETUP_MASK; + active &= (uint32_t)~NRF_USBD_INT_EP0SETUP_MASK; while (active) { - uint8_t event_nr = NRF_CTZ(active); + uint8_t event_nr = (uint8_t)NRF_CTZ(active); m_isr[event_nr](); active &= ~(1UL << event_nr); } @@ -1664,7 +1670,11 @@ nrfx_err_t nrfx_usbd_init(nrfx_usbd_event_handler_t event_handler) if (m_drv_state != NRFX_DRV_STATE_UNINITIALIZED) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + return NRFX_ERROR_ALREADY; +#else return NRFX_ERROR_INVALID_STATE; +#endif } m_event_handler = event_handler; @@ -1704,6 +1714,10 @@ void nrfx_usbd_uninit(void) return; } +bool nrfx_usbd_init_check(void) +{ + return (m_drv_state != NRFX_DRV_STATE_UNINITIALIZED); +} void nrfx_usbd_enable(void) { @@ -1753,6 +1767,7 @@ void nrfx_usbd_enable(void) m_ep_ready = (((1U << NRF_USBD_EPIN_CNT) - 1U) << NRFX_USBD_EPIN_BITPOS_0); m_ep_dma_waiting = 0; + m_dma_odd = 0; usbd_dma_pending_clear(); m_last_setup_dir = NRFX_USBD_EPOUT0; @@ -1777,6 +1792,17 @@ void nrfx_usbd_disable(void) /* Disable all parts */ nrf_usbd_int_disable(NRF_USBD, nrf_usbd_int_enable_get(NRF_USBD)); + if (m_dma_odd) + { + /* Prevent invalid bus request after next USBD enable by ensuring + * that total number of bytes transferred by DMA is even. */ + nrf_usbd_event_clear(NRF_USBD, NRF_USBD_EVENT_ENDEPIN0); + nrf_usbd_ep_easydma_set(NRF_USBD, NRFX_USBD_EPIN0, (uint32_t)&m_dma_odd, 1); + usbd_dma_start(NRFX_USBD_EPIN0); + while (!nrf_usbd_event_check(NRF_USBD, NRF_USBD_EVENT_ENDEPIN0)) + {} + m_dma_odd = 0; + } nrf_usbd_disable(NRF_USBD); usbd_dma_pending_clear(); m_drv_state = NRFX_DRV_STATE_INITIALIZED; diff --git a/drivers/src/nrfx_usbreg.c b/drivers/src/nrfx_usbreg.c index d8aeac6e4..c03158c0e 100644 --- a/drivers/src/nrfx_usbreg.c +++ b/drivers/src/nrfx_usbreg.c @@ -80,6 +80,11 @@ void nrfx_usbreg_uninit(void) m_usbevt_handler = NULL; } +bool nrfx_usbreg_init_check(void) +{ + return (m_usbevt_handler != NULL); +} + void nrfx_usbreg_irq_handler(void) { if (nrf_usbreg_event_check(NRF_USBREGULATOR, NRF_USBREG_EVENT_USBDETECTED)) diff --git a/drivers/src/nrfx_wdt.c b/drivers/src/nrfx_wdt.c index ff00ee72a..bf486b556 100644 --- a/drivers/src/nrfx_wdt.c +++ b/drivers/src/nrfx_wdt.c @@ -51,6 +51,10 @@ typedef struct uint8_t alloc_index; #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) nrfx_wdt_event_handler_t wdt_event_handler; + void * p_context; +#endif +#if NRFX_WDT_HAS_STOP + bool stoppable; #endif } wdt_control_block_t; @@ -69,19 +73,36 @@ static void wdt_configure(nrfx_wdt_t const * p_instance, nrfy_wdt_periph_configure(p_instance->p_reg, &nrfy_conf); -#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + +#if NRFX_WDT_HAS_STOP + p_cb->stoppable = (bool)(p_config->behaviour & NRF_WDT_BEHAVIOUR_STOP_ENABLE_MASK); +#endif + +#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) if (p_cb->wdt_event_handler) { - nrfy_wdt_int_init(p_instance->p_reg, NRF_WDT_INT_TIMEOUT_MASK, - p_config->interrupt_priority, true); + uint32_t mask = NRF_WDT_INT_TIMEOUT_MASK; + +#if NRFX_WDT_HAS_STOP + if (p_cb->stoppable) + { + mask |= NRF_WDT_INT_STOPPED_MASK; + } +#endif + + nrfy_wdt_int_init(p_instance->p_reg, + mask, + p_config->interrupt_priority, + true); } #endif } -nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const * p_instance, - nrfx_wdt_config_t const * p_config, - nrfx_wdt_event_handler_t wdt_event_handler) +static nrfx_err_t wdt_init(nrfx_wdt_t const * p_instance, + nrfx_wdt_config_t const * p_config, + nrfx_wdt_event_handler_t wdt_event_handler, + void * p_context) { NRFX_ASSERT(p_config); nrfx_err_t err_code; @@ -90,8 +111,10 @@ nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const * p_instance, #if NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) (void)wdt_event_handler; + (void)p_context; #else p_cb->wdt_event_handler = wdt_event_handler; + p_cb->p_context = p_context; #endif if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) @@ -100,7 +123,11 @@ nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const * p_instance, } else { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + err_code = NRFX_ERROR_ALREADY; +#else err_code = NRFX_ERROR_INVALID_STATE; +#endif NRFX_LOG_WARNING("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code)); @@ -117,24 +144,73 @@ nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const * p_instance, return err_code; } +#if NRFX_API_VER_AT_LEAST(3, 2, 0) +nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const * p_instance, + nrfx_wdt_config_t const * p_config, + nrfx_wdt_event_handler_t wdt_event_handler, + void * p_context) +{ + return wdt_init(p_instance, p_config, wdt_event_handler, p_context); +} +#else +nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const * p_instance, + nrfx_wdt_config_t const * p_config, + nrfx_wdt_event_handler_t wdt_event_handler) +{ + return wdt_init(p_instance, p_config, wdt_event_handler, NULL); +} +#endif + nrfx_err_t nrfx_wdt_reconfigure(nrfx_wdt_t const * p_instance, nrfx_wdt_config_t const * p_config) { NRFX_ASSERT(p_config); + + nrfx_err_t err_code; wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED) { - return NRFX_ERROR_INVALID_STATE; + err_code = NRFX_ERROR_INVALID_STATE; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; } - if (p_cb->state == NRFX_DRV_STATE_POWERED_ON) + else if (p_cb->state == NRFX_DRV_STATE_POWERED_ON) { - return NRFX_ERROR_BUSY; + err_code = NRFX_ERROR_BUSY; + NRFX_LOG_WARNING("Function: %s, error code: %s.", + __func__, + NRFX_LOG_ERROR_STRING_GET(err_code)); + return err_code; } wdt_configure(p_instance, p_config); return NRFX_SUCCESS; } +void nrfx_wdt_uninit(nrfx_wdt_t const * p_instance) +{ + wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED); + +#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) + if (p_cb->wdt_event_handler) + { + nrfy_wdt_int_uninit(p_instance->p_reg); + } +#endif + p_cb->state = NRFX_DRV_STATE_UNINITIALIZED; + NRFX_LOG_INFO("Uninitialized."); +} + +bool nrfx_wdt_init_check(nrfx_wdt_t const * p_instance) +{ + wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + + return (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); +} + void nrfx_wdt_enable(nrfx_wdt_t const * p_instance) { wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; @@ -186,6 +262,32 @@ void nrfx_wdt_channel_feed(nrfx_wdt_t const * p_instance, nrfx_wdt_channel_id ch nrfy_wdt_reload_request_set(p_instance->p_reg, channel_id); } +#if NRFX_WDT_HAS_STOP +nrfx_err_t nrfx_wdt_stop(nrfx_wdt_t const * p_instance) +{ + wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx]; + NRFX_ASSERT(p_cb->state != NRFX_DRV_STATE_UNINITIALIZED); + + if (!p_cb->stoppable) + { + return NRFX_ERROR_FORBIDDEN; + } + + nrfy_wdt_task_stop_enable_set(p_instance->p_reg, true); + nrfy_wdt_task_trigger(p_instance->p_reg, NRF_WDT_TASK_STOP); + nrfy_wdt_task_stop_enable_set(p_instance->p_reg, false); + +#if NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) + while (!nrfy_wdt_events_process(p_instance->p_reg, + NRFY_EVENT_TO_INT_BITMASK(NRF_WDT_EVENT_STOPPED))) + {} + p_cb->state = NRFX_DRV_STATE_INITIALIZED; +#endif + + return NRFX_SUCCESS; +} +#endif + #if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) static void irq_handler(NRF_WDT_Type * p_reg, wdt_control_block_t * p_cb) { @@ -194,12 +296,30 @@ static void irq_handler(NRF_WDT_Type * p_reg, wdt_control_block_t * p_cb) uint32_t requests = nrf_wdt_request_status_get(p_reg); uint32_t evt_mask = nrfy_wdt_events_process(p_reg, - NRFY_EVENT_TO_INT_BITMASK(NRF_WDT_EVENT_TIMEOUT)); +#if NRFX_WDT_HAS_STOP + NRFY_EVENT_TO_INT_BITMASK(NRF_WDT_EVENT_STOPPED) | +#endif + NRFY_EVENT_TO_INT_BITMASK(NRF_WDT_EVENT_TIMEOUT) + ); if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_WDT_EVENT_TIMEOUT)) { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + p_cb->wdt_event_handler(NRF_WDT_EVENT_TIMEOUT, requests, p_cb->p_context); +#else p_cb->wdt_event_handler(requests); +#endif } + +#if NRFX_WDT_HAS_STOP + if (evt_mask & NRFY_EVENT_TO_INT_BITMASK(NRF_WDT_EVENT_STOPPED)) + { +#if NRFX_API_VER_AT_LEAST(3, 2, 0) + p_cb->state = NRFX_DRV_STATE_INITIALIZED; + p_cb->wdt_event_handler(NRF_WDT_EVENT_STOPPED, 0, p_cb->p_context); +#endif + } +#endif } NRFX_INSTANCE_IRQ_HANDLERS(WDT, wdt) diff --git a/drivers/src/prs/nrfx_prs.c b/drivers/src/prs/nrfx_prs.c index 86e162b25..35961b15e 100644 --- a/drivers/src/prs/nrfx_prs.c +++ b/drivers/src/prs/nrfx_prs.c @@ -85,6 +85,9 @@ PRS_BOX_DEFINE(7) #if defined(NRFX_PRS_BOX_8_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_8_ENABLED) PRS_BOX_DEFINE(8) #endif +#if defined(NRFX_PRS_BOX_9_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_9_ENABLED) +PRS_BOX_DEFINE(9) +#endif static prs_box_t * prs_box_get(void const * p_base_addr) { @@ -127,6 +130,10 @@ static prs_box_t * prs_box_get(void const * p_base_addr) #if defined(NRFX_PRS_BOX_8_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_8_ENABLED) if (IS_PRS_BOX(8, p_base_addr)) { return &m_prs_box_8; } else +#endif +#if defined(NRFX_PRS_BOX_9_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_9_ENABLED) + if (IS_PRS_BOX(9, p_base_addr)) { return &m_prs_box_9; } + else #endif { return NULL; diff --git a/drivers/src/prs/nrfx_prs.h b/drivers/src/prs/nrfx_prs.h index 493f85857..d16e31388 100644 --- a/drivers/src/prs/nrfx_prs.h +++ b/drivers/src/prs/nrfx_prs.h @@ -155,11 +155,11 @@ void nrfx_prs_release(void const * p_base_addr); * A specific interrupt handler for the driver instance can be retrieved by using * the NRFX_PRS_BOX_INST_HANDLER_GET macro. * - * Here is a sample of using the NRFX_PRS_BOX_INST_HANDLER_GET macro to directly map - * an interrupt handler in a Zephyr application: + * Here is a sample of using the NRFX_PRS_BOX_INST_HANDLER_GET macro to map an interrupt handler + * in a Zephyr application: * - * IRQ_DIRECT_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_PRS_BOX_INST_GET(\)), \, - * NRFX_PRS_BOX_INST_HANDLER_GET(\), 0); + * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_PRS_BOX_INST_GET(\)), \, + * NRFX_PRS_BOX_INST_HANDLER_GET(\), 0, 0); */ NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(PRS_BOX_, prs_box) diff --git a/hal/nrf_cache.h b/hal/nrf_cache.h index f4e784e90..095f23198 100644 --- a/hal/nrf_cache.h +++ b/hal/nrf_cache.h @@ -91,6 +91,13 @@ extern "C" { #define NRF_CACHE_HAS_TASK_FLUSH 0 #endif +#if defined(CACHE_TASKS_SAVE_TASKS_SAVE_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether save and restore tasks are supported. */ +#define NRF_CACHE_HAS_TASK_SAVE_RESTORE 1 +#else +#define NRF_CACHE_HAS_TASK_SAVE_RESTORE 0 +#endif + #if defined(CACHE_STATUS_READY_Msk) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether status check is supported. */ #define NRF_CACHE_HAS_STATUS 1 @@ -171,8 +178,10 @@ typedef enum NRF_CACHE_TASK_FLUSHCACHE = offsetof(NRF_CACHE_Type, TASKS_FLUSHCACHE), /**< Flush the whole cache. */ NRF_CACHE_TASK_FLUSHLINE = offsetof(NRF_CACHE_Type, TASKS_FLUSHLINE), /**< Flush the cache line. */ #endif +#if NRF_CACHE_HAS_TASK_SAVE_RESTORE NRF_CACHE_TASK_SAVE = offsetof(NRF_CACHE_Type, TASKS_SAVE), /**< Save the state to a retained memory space. */ NRF_CACHE_TASK_RESTORE = offsetof(NRF_CACHE_Type, TASKS_RESTORE), /**< Restore the state from a retained memory space. */ +#endif NRF_CACHE_TASK_INVALIDATECACHE = offsetof(NRF_CACHE_Type, TASKS_INVALIDATECACHE), /**< Invalidate the whole cache. */ NRF_CACHE_TASK_INVALIDATELINE = offsetof(NRF_CACHE_Type, TASKS_INVALIDATELINE), /**< Invalidate the cache line. */ NRF_CACHE_TASK_ERASE = offsetof(NRF_CACHE_Type, TASKS_ERASE), /**< Erase the whole cache. */ @@ -687,7 +696,7 @@ NRF_STATIC_INLINE uint32_t nrf_cache_data_get(NRF_CACHEDATA_Type const * p_reg, NRFX_ASSERT(set < NRF_CACHEDATA_SET_INDEX_MAX); uint8_t du = (word / NRF_CACHEDATA_DATA_WORDS_IN_UNIT_MAX); - uint8_t data = (word - (du * NRF_CACHEDATA_DATA_WORDS_IN_UNIT_MAX)); + uint8_t data = (uint8_t)(word - (du * NRF_CACHEDATA_DATA_WORDS_IN_UNIT_MAX)); return p_reg->SET[set].WAY[way].DU[du].DATA[data]; #else diff --git a/hal/nrf_ccm.h b/hal/nrf_ccm.h index d8f24a53e..f4b73f1ed 100644 --- a/hal/nrf_ccm.h +++ b/hal/nrf_ccm.h @@ -50,14 +50,14 @@ extern "C" { * @brief Hardware access layer for managing the AES CCM peripheral. */ -#if defined(CCM_TASKS_KSGEN_TASKS_KSGEN_Msk) || defined(__NRFX_DOXYGEN__) +#if defined(CCM_TASKS_KSGEN_TASKS_KSGEN_Msk) || defined(NRF51) || defined(__NRFX_DOXYGEN__) /** @brief Presence of the KSGEN task. */ #define NRF_CCM_HAS_TASK_KSGEN 1 #else #define NRF_CCM_HAS_TASK_KSGEN 0 #endif -#if defined(CCM_TASKS_CRYPT_TASKS_CRYPT_Msk) || defined(__NRFX_DOXYGEN__) +#if defined(CCM_TASKS_CRYPT_TASKS_CRYPT_Msk) || defined(NRF51) || defined(__NRFX_DOXYGEN__) /** @brief Presence of the CRYPT task. */ #define NRF_CCM_HAS_TASK_CRYPT 1 #else diff --git a/hal/nrf_clock.h b/hal/nrf_clock.h index 40f371969..2e9826126 100644 --- a/hal/nrf_clock.h +++ b/hal/nrf_clock.h @@ -232,9 +232,11 @@ typedef enum #endif #if defined(CLOCK_LFCLKSRC_SRC_Synth) || defined(__NRFX_DOXYGEN__) - NRF_CLOCK_LFCLK_SYNTH = CLOCK_LFCLKSRC_SRC_Synth, /**< Internal 32 kHz synthesized from HFCLK system clock. */ + NRF_CLOCK_LFCLK_SYNTH = CLOCK_LFCLKSRC_SRC_Synth, /**< Internal 32 kHz synthesized from HFCLK system clock. */ +#elif NRF_CLOCK_HAS_LFCLK_TYPE + NRF_CLOCK_LFCLK_SYNTH = CLOCK_LFCLK_SRC_SRC_LFSYNT, /**< Internal 32 kHz synthesized from HFCLK system clock. */ #elif defined(CLOCK_LFCLKSRC_SRC_LFSYNT) - NRF_CLOCK_LFCLK_SYNTH = CLOCK_LFCLKSRC_SRC_LFSYNT, /**< Internal 32 kHz synthesized from HFCLK system clock. */ + NRF_CLOCK_LFCLK_SYNTH = CLOCK_LFCLKSRC_SRC_LFSYNT, /**< Internal 32 kHz synthesized from HFCLK system clock. */ #endif #if defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__) diff --git a/hal/nrf_common.h b/hal/nrf_common.h index 133086e4f..0387f580e 100644 --- a/hal/nrf_common.h +++ b/hal/nrf_common.h @@ -65,17 +65,27 @@ extern "C" { #if defined(NRF_RADIO) #define NRF_SUBSCRIBE_PUBLISH_OFFSET_RADIO \ (NRFX_OFFSETOF(NRF_RADIO_Type, SUBSCRIBE_TXEN) - NRFX_OFFSETOF(NRF_RADIO_Type, TASKS_TXEN)) -#define NRF_SUBSCRIBE_PUBLISH_OFFSET(task_or_event) \ - ((NRFX_IN_RANGE(task_or_event, (uint32_t)NRF_RADIO, \ - (uint32_t)NRF_RADIO + NRF_SUBSCRIBE_PUBLISH_OFFSET_RADIO)) ? \ - (NRF_SUBSCRIBE_PUBLISH_OFFSET_RADIO) : \ +#define NRF_SUBSCRIBE_PUBLISH_OFFSET(task_or_event) \ + ((NRFX_IN_RANGE(task_or_event, (uint32_t)NRF_RADIO, \ + (uint32_t)NRF_RADIO + sizeof(NRF_RADIO_Type))) ? \ + (NRF_SUBSCRIBE_PUBLISH_OFFSET_RADIO) : \ (0x80uL)) #else #define NRF_SUBSCRIBE_PUBLISH_OFFSET(task_or_event) 0x80uL #endif // defined(NRF_RADIO) #endif // defined(DPPI_PRESENT) +#if !defined(NRFY_CACHE_WB) +#define NRFY_CACHE_WB(p_buffer, size) +#endif + +#if !defined(NRFY_CACHE_INV) +#define NRFY_CACHE_INV(p_buffer, size) +#endif +#if !defined(NRFY_CACHE_WBINV) +#define NRFY_CACHE_WBINV(p_buffer, size) +#endif #if defined(NRFX_CLZ) #define NRF_CLZ(value) NRFX_CLZ(value) diff --git a/hal/nrf_dppi.h b/hal/nrf_dppi.h index a3b7e4512..a4ad84bf7 100644 --- a/hal/nrf_dppi.h +++ b/hal/nrf_dppi.h @@ -229,6 +229,26 @@ NRF_STATIC_INLINE void nrf_dppi_subscribe_set(NRF_DPPIC_Type * p_reg, */ NRF_STATIC_INLINE void nrf_dppi_subscribe_clear(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t task); +/** + * @brief Function for setting multiple DPPI channels in a channel group. + * + * @details This function assigns all specified channels to the group. + * The bits in @p channel_mask value correspond to particular channels. It means that + * writing 1 to bit 0 includes channel 0, writing 1 to bit 1 includes channel 1, and so on. + * + * @warning All channels included previously will be overwritten. + * + * @warning Channel group configuration can be modified only if subscriptions for tasks + * associated with this group are disabled. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] channel_mask Channels to be assigned in the group. + * @param[in] channel_group Channel group. + */ +NRF_STATIC_INLINE void nrf_dppi_channels_group_set(NRF_DPPIC_Type * p_reg, + uint32_t channel_mask, + nrf_dppi_channel_group_t channel_group); + /** * @brief Function for including multiple DPPI channels in a channel group. * @@ -388,6 +408,13 @@ NRF_STATIC_INLINE void nrf_dppi_subscribe_clear(NRF_DPPIC_Type * p_reg, nrf_dppi *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0; } +NRF_STATIC_INLINE void nrf_dppi_channels_group_set(NRF_DPPIC_Type * p_reg, + uint32_t channel_mask, + nrf_dppi_channel_group_t channel_group) +{ + p_reg->CHG[(uint32_t) channel_group] = channel_mask; +} + NRF_STATIC_INLINE void nrf_dppi_channels_include_in_group(NRF_DPPIC_Type * p_reg, uint32_t channel_mask, nrf_dppi_channel_group_t channel_group) diff --git a/hal/nrf_egu.h b/hal/nrf_egu.h index 7e2152507..18ad61442 100644 --- a/hal/nrf_egu.h +++ b/hal/nrf_egu.h @@ -66,7 +66,7 @@ extern "C" { * * @return Pointer to the structure of registers of the EGU peripheral. */ -#define NRF_EGU_INST_GET(idx) NRFX_CONCAT_2(NRF_EGU, idx) +#define NRF_EGU_INST_GET(idx) NRFX_CONCAT(NRF_, EGU, idx) /** @brief EGU tasks. */ typedef enum diff --git a/hal/nrf_gpio.h b/hal/nrf_gpio.h index f572b9516..920b6fd0a 100644 --- a/hal/nrf_gpio.h +++ b/hal/nrf_gpio.h @@ -50,7 +50,7 @@ extern "C" { #define GPIO_PORT_NUM_LIST {NRFX_FOREACH_PRESENT(P, GPIO_PORT_NUM, (), (), _)} #define GPIO_REG_LIST {NRFX_FOREACH_PRESENT(P, GPIO_REG, (), (), _)} -#define NUMBER_OF_PINS {NRFX_FOREACH_PRESENT(P, GPIO_NUM_OF_PINS, (+), (0), _)} +#define NUMBER_OF_PINS (NRFX_FOREACH_PRESENT(P, GPIO_NUM_OF_PINS, (+), (0), _)) #if !defined(GPIO_REG_LIST) #error "Not supported." @@ -312,8 +312,8 @@ typedef enum * @note For configuring only one pin as output, use @ref nrf_gpio_cfg_output. * Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output. * - * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). + * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured. + * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured. */ NRF_STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end); @@ -324,8 +324,8 @@ NRF_STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint3 * @note For configuring only one pin as input, use @ref nrf_gpio_cfg_input. * Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable. * - * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). - * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30). + * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured. + * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured. * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high). */ NRF_STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, diff --git a/hal/nrf_gpiote.h b/hal/nrf_gpiote.h index 4195be923..16fb0a622 100644 --- a/hal/nrf_gpiote.h +++ b/hal/nrf_gpiote.h @@ -40,6 +40,28 @@ extern "C" { #endif +#if !defined(NRF_GPIOTE0) && defined(NRF_GPIOTE) +#define NRF_GPIOTE0 NRF_GPIOTE +#endif + +#if !defined(GPIOTE0_CH_NUM) && defined(GPIOTE_CH_NUM) && \ + (defined(NRF_GPIOTE) || defined(NRF_GPIOTE0)) +#define GPIOTE0_CH_NUM GPIOTE_CH_NUM +#endif + +#if !defined(GPIOTE1_CH_NUM) && defined(GPIOTE_CH_NUM) && defined(NRF_GPIOTE1) +#define GPIOTE1_CH_NUM GPIOTE_CH_NUM +#endif + +#if !defined(GPIOTE0_AVAILABLE_GPIO_PORTS) && defined(GPIO_COUNT) && \ + (defined(NRF_GPIOTE) || defined(NRF_GPIOTE0)) +#define GPIOTE0_AVAILABLE_GPIO_PORTS NRFX_BIT_MASK(GPIO_COUNT) +#endif + +#if !defined(GPIOTE1_AVAILABLE_GPIO_PORTS) && defined(GPIO_COUNT) && defined(NRF_GPIOTE1) +#define GPIOTE1_AVAILABLE_GPIO_PORTS NRFX_BIT_MASK(GPIO_COUNT) +#endif + /* Internal macro used for NRF_GPIOTE_INT_IN_MASK. */ #define NRF_GPIOTE_INT_IN(idx, _) NRFX_CONCAT(NRF_GPIOTE_INT_IN, idx, _MASK) @@ -50,6 +72,15 @@ extern "C" { * @brief Hardware access layer (HAL) for managing the GPIOTE peripheral. */ +/** + * @brief Macro for getting a pointer to the structure of registers of the GPIOTE peripheral. + * + * @param[in] idx GPIOTE instance index. + * + * @return Pointer to the structure of registers of the GPIOTE peripheral. + */ +#define NRF_GPIOTE_INST_GET(idx) NRFX_CONCAT(NRF_, GPIOTE, idx) + #if defined(GPIOTE_CONFIG_PORT_Msk) || defined(__NRFX_DOXYGEN__) /** @brief Mask for covering port and pin bits in registers. */ #define GPIOTE_CONFIG_PORT_PIN_Msk (GPIOTE_CONFIG_PORT_Msk | GPIOTE_CONFIG_PSEL_Msk) @@ -187,7 +218,11 @@ typedef enum NRF_GPIOTE_INT_IN6_MASK = NRFX_CONCAT(GPIOTE_INTENSET, NRF_GPIOTE_IRQ_GROUP, _IN6_Msk), ///< GPIOTE interrupt from IN6. NRF_GPIOTE_INT_IN7_MASK = NRFX_CONCAT(GPIOTE_INTENSET, NRF_GPIOTE_IRQ_GROUP, _IN7_Msk), ///< GPIOTE interrupt from IN7. #endif - NRF_GPIOTE_INT_PORT_MASK = (int)NRF_GPIOTE_INT_PORT_MASK_NAME ///< GPIOTE interrupt from PORT event. +#if defined(__CC_ARM) || defined(__NRFX_DOXYGEN__) + NRF_GPIOTE_INT_PORT_MASK = (int)NRF_GPIOTE_INT_PORT_MASK_NAME, ///< GPIOTE interrupt from PORT event. +#else + NRF_GPIOTE_INT_PORT_MASK = NRF_GPIOTE_INT_PORT_MASK_NAME, +#endif } nrf_gpiote_int_t; /** @brief Symbol specifying bitmask collecting all IN events interrupts. */ diff --git a/hal/nrf_i2s.h b/hal/nrf_i2s.h index 034d15c98..0da69210e 100644 --- a/hal/nrf_i2s.h +++ b/hal/nrf_i2s.h @@ -682,7 +682,11 @@ NRF_STATIC_INLINE void nrf_i2s_transfer_set(NRF_I2S_Type * p_reg, uint32_t * p_buffer_rx, uint32_t const * p_buffer_tx) { +#if defined(DMA_BUFFER_UNIFIED_BYTE_ACCESS) + p_reg->RXTXD.MAXCNT = size * sizeof(uint32_t); +#else p_reg->RXTXD.MAXCNT = size; +#endif nrf_i2s_rx_buffer_set(p_reg, p_buffer_rx); p_reg->CONFIG.RXEN = (p_buffer_rx != NULL) ? 1 : 0; diff --git a/hal/nrf_lpcomp.h b/hal/nrf_lpcomp.h index ab0d8e08c..1835c3203 100644 --- a/hal/nrf_lpcomp.h +++ b/hal/nrf_lpcomp.h @@ -54,179 +54,222 @@ extern "C" { #define NRF_LPCOMP_HAS_AIN_AS_PIN 0 #endif +#if defined(LPCOMP_HYST_HYST_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether the hysteresis is present. */ +#define NRF_LPCOMP_HAS_HYST 1 +#else +#define NRF_LPCOMP_HAS_HYST 0 +#endif + +/** @brief LPCOMP tasks. */ +typedef enum +{ + NRF_LPCOMP_TASK_START = offsetof(NRF_LPCOMP_Type, TASKS_START), ///< LPCOMP start sampling task. + NRF_LPCOMP_TASK_STOP = offsetof(NRF_LPCOMP_Type, TASKS_STOP), ///< LPCOMP stop sampling task. + NRF_LPCOMP_TASK_SAMPLE = offsetof(NRF_LPCOMP_Type, TASKS_SAMPLE) ///< Sample comparator value. +} nrf_lpcomp_task_t; + +/** @brief LPCOMP events. */ +typedef enum +{ + NRF_LPCOMP_EVENT_READY = offsetof(NRF_LPCOMP_Type, EVENTS_READY), ///< LPCOMP is ready and output is valid. + NRF_LPCOMP_EVENT_DOWN = offsetof(NRF_LPCOMP_Type, EVENTS_DOWN), ///< Input voltage crossed the threshold going down. + NRF_LPCOMP_EVENT_UP = offsetof(NRF_LPCOMP_Type, EVENTS_UP), ///< Input voltage crossed the threshold going up. + NRF_LPCOMP_EVENT_CROSS = offsetof(NRF_LPCOMP_Type, EVENTS_CROSS) ///< Input voltage crossed the threshold in any direction. +} nrf_lpcomp_event_t; + +/** @brief LPCOMP interrupts. */ +typedef enum +{ + NRF_LPCOMP_INT_READY_MASK = LPCOMP_INTENSET_READY_Msk, ///< Interrupt on READY event. + NRF_LPCOMP_INT_DOWN_MASK = LPCOMP_INTENSET_DOWN_Msk, ///< Interrupt on DOWN event. + NRF_LPCOMP_INT_UP_MASK = LPCOMP_INTENSET_UP_Msk, ///< Interrupt on UP event. + NRF_LPCOMP_INT_CROSS_MASK = LPCOMP_INTENSET_CROSS_Msk ///< Interrupt on CROSS event. +} nrf_lpcomp_int_mask_t; + +/** @brief LPCOMP shortcut masks. */ +typedef enum +{ + NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, ///< Shortcut between CROSS event and STOP task. + NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, ///< Shortcut between UP event and STOP task. + NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, ///< Shortcut between DOWN event and STOP task. + NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, ///< Shortcut between READY event and STOP task. + NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk ///< Shortcut between READY event and SAMPLE task. +} nrf_lpcomp_short_mask_t; + /** @brief LPCOMP reference selection. */ typedef enum { #if (LPCOMP_REFSEL_RESOLUTION == 8) || defined(__NRFX_DOXYGEN__) - NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling, /**< Use supply with a 1/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling, /**< Use supply with a 2/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling, /**< Use supply with a 3/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling, /**< Use supply with a 4/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling, /**< Use supply with a 5/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling, /**< Use supply with a 6/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling, /**< Use supply with a 7/8 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling, ///< Use supply with a 1/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling, ///< Use supply with a 2/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling, ///< Use supply with a 3/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling, ///< Use supply with a 4/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling, ///< Use supply with a 5/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling, ///< Use supply with a 6/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling, ///< Use supply with a 7/8 prescaler as reference. #elif (LPCOMP_REFSEL_RESOLUTION == 16) || defined(__NRFX_DOXYGEN__) - NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, /**< Use supply with a 4/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, /**< Use supply with a 5/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref11_16Vdd, /**< Use supply with a 11/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref13_16Vdd, /**< Use supply with a 13/16 prescaler as reference. */ - NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref15_16Vdd, /**< Use supply with a 15/16 prescaler as reference. */ + NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, ///< Use supply with a 1/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, ///< Use supply with a 2/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, ///< Use supply with a 3/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, ///< Use supply with a 4/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, ///< Use supply with a 5/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, ///< Use supply with a 6/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, ///< Use supply with a 7/8 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, ///< Use supply with a 1/16 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, ///< Use supply with a 3/16 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, ///< Use supply with a 5/16 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, ///< Use supply with a 7/16 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, ///< Use supply with a 9/16 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref11_16Vdd, ///< Use supply with a 11/16 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref13_16Vdd, ///< Use supply with a 13/16 prescaler as reference. + NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref15_16Vdd, ///< Use supply with a 15/16 prescaler as reference. #endif + NRF_LPCOMP_REF_EXT_REF = LPCOMP_REFSEL_REFSEL_ARef, ///< Use external analog reference. #if !NRF_LPCOMP_HAS_AIN_AS_PIN NRF_LPCOMP_REF_EXT_REF0 = LPCOMP_REFSEL_REFSEL_ARef | - (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */ + (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), ///< @deprecated Use @ref nrf_lpcomp_ext_ref_t instead. NRF_LPCOMP_REF_EXT_REF1 = LPCOMP_REFSEL_REFSEL_ARef | - (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 << 16), /**< External reference 1. */ + (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 << 16), ///< @deprecated Use @ref nrf_lpcomp_ext_ref_t instead. #endif } nrf_lpcomp_ref_t; +/** @brief LPCOMP external reference selection. */ +#if NRF_LPCOMP_HAS_AIN_AS_PIN +typedef uint32_t nrf_lpcomp_ext_ref_t; +#else +typedef enum +{ + NRF_LPCOMP_EXT_REF_REF0 = LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0, ///< External reference 0. + NRF_LPCOMP_EXT_REF_REF1 = LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1, ///< External reference 1. +} nrf_lpcomp_ext_ref_t; +#endif + /** @brief LPCOMP input selection. */ #if NRF_LPCOMP_HAS_AIN_AS_PIN typedef uint32_t nrf_lpcomp_input_t; #else typedef enum { - NRF_LPCOMP_INPUT_0 = LPCOMP_PSEL_PSEL_AnalogInput0, /**< Input 0. */ - NRF_LPCOMP_INPUT_1 = LPCOMP_PSEL_PSEL_AnalogInput1, /**< Input 1. */ - NRF_LPCOMP_INPUT_2 = LPCOMP_PSEL_PSEL_AnalogInput2, /**< Input 2. */ - NRF_LPCOMP_INPUT_3 = LPCOMP_PSEL_PSEL_AnalogInput3, /**< Input 3. */ - NRF_LPCOMP_INPUT_4 = LPCOMP_PSEL_PSEL_AnalogInput4, /**< Input 4. */ - NRF_LPCOMP_INPUT_5 = LPCOMP_PSEL_PSEL_AnalogInput5, /**< Input 5. */ - NRF_LPCOMP_INPUT_6 = LPCOMP_PSEL_PSEL_AnalogInput6, /**< Input 6. */ - NRF_LPCOMP_INPUT_7 = LPCOMP_PSEL_PSEL_AnalogInput7 /**< Input 7. */ + NRF_LPCOMP_INPUT_0 = LPCOMP_PSEL_PSEL_AnalogInput0, ///< Input 0. + NRF_LPCOMP_INPUT_1 = LPCOMP_PSEL_PSEL_AnalogInput1, ///< Input 1. + NRF_LPCOMP_INPUT_2 = LPCOMP_PSEL_PSEL_AnalogInput2, ///< Input 2. + NRF_LPCOMP_INPUT_3 = LPCOMP_PSEL_PSEL_AnalogInput3, ///< Input 3. + NRF_LPCOMP_INPUT_4 = LPCOMP_PSEL_PSEL_AnalogInput4, ///< Input 4. + NRF_LPCOMP_INPUT_5 = LPCOMP_PSEL_PSEL_AnalogInput5, ///< Input 5. + NRF_LPCOMP_INPUT_6 = LPCOMP_PSEL_PSEL_AnalogInput6, ///< Input 6. + NRF_LPCOMP_INPUT_7 = LPCOMP_PSEL_PSEL_AnalogInput7 ///< Input 7. } nrf_lpcomp_input_t; #endif /** @brief LPCOMP detection type selection. */ typedef enum { - NRF_LPCOMP_DETECT_CROSS = LPCOMP_ANADETECT_ANADETECT_Cross, /**< Generate ANADETEC on crossing, both upwards and downwards crossing. */ - NRF_LPCOMP_DETECT_UP = LPCOMP_ANADETECT_ANADETECT_Up, /**< Generate ANADETEC on upwards crossing only. */ - NRF_LPCOMP_DETECT_DOWN = LPCOMP_ANADETECT_ANADETECT_Down /**< Generate ANADETEC on downwards crossing only. */ + NRF_LPCOMP_DETECT_CROSS = LPCOMP_ANADETECT_ANADETECT_Cross, ///< Generate ANADETEC on crossing, both upwards and downwards crossing. + NRF_LPCOMP_DETECT_UP = LPCOMP_ANADETECT_ANADETECT_Up, ///< Generate ANADETEC on upwards crossing only. + NRF_LPCOMP_DETECT_DOWN = LPCOMP_ANADETECT_ANADETECT_Down ///< Generate ANADETEC on downwards crossing only. } nrf_lpcomp_detect_t; -/** @brief LPCOMP tasks. */ -typedef enum -{ - NRF_LPCOMP_TASK_START = offsetof(NRF_LPCOMP_Type, TASKS_START), /**< LPCOMP start sampling task. */ - NRF_LPCOMP_TASK_STOP = offsetof(NRF_LPCOMP_Type, TASKS_STOP), /**< LPCOMP stop sampling task. */ - NRF_LPCOMP_TASK_SAMPLE = offsetof(NRF_LPCOMP_Type, TASKS_SAMPLE) /**< Sample comparator value. */ -} nrf_lpcomp_task_t; - - -/** @brief LPCOMP events. */ -typedef enum -{ - NRF_LPCOMP_EVENT_READY = offsetof(NRF_LPCOMP_Type, EVENTS_READY), /**< LPCOMP is ready and output is valid. */ - NRF_LPCOMP_EVENT_DOWN = offsetof(NRF_LPCOMP_Type, EVENTS_DOWN), /**< Input voltage crossed the threshold going down. */ - NRF_LPCOMP_EVENT_UP = offsetof(NRF_LPCOMP_Type, EVENTS_UP), /**< Input voltage crossed the threshold going up. */ - NRF_LPCOMP_EVENT_CROSS = offsetof(NRF_LPCOMP_Type, EVENTS_CROSS) /**< Input voltage crossed the threshold in any direction. */ -} nrf_lpcomp_event_t; - -/** @brief LPCOMP interrupts. */ -typedef enum -{ - NRF_LPCOMP_INT_READY_MASK = LPCOMP_INTENSET_READY_Msk, /**< Interrupt on READY event. */ - NRF_LPCOMP_INT_DOWN_MASK = LPCOMP_INTENSET_DOWN_Msk, /**< Interrupt on DOWN event. */ - NRF_LPCOMP_INT_UP_MASK = LPCOMP_INTENSET_UP_Msk, /**< Interrupt on UP event. */ - NRF_LPCOMP_INT_CROSS_MASK = LPCOMP_INTENSET_CROSS_Msk /**< Interrupt on CROSS event. */ -} nrf_lpcomp_int_mask_t; - -/** @brief LPCOMP shortcut masks. */ -typedef enum -{ - NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, /*!< Shortcut between CROSS event and STOP task. */ - NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, /*!< Shortcut between UP event and STOP task. */ - NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, /*!< Shortcut between DOWN event and STOP task. */ - NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, /*!< Shortcut between READY event and STOP task. */ - NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Shortcut between READY event and SAMPLE task. */ -} nrf_lpcomp_short_mask_t; - -#if defined(LPCOMP_FEATURE_HYST_PRESENT) || defined(__NRFX_DOXYGEN__) +#if NRF_LPCOMP_HAS_HYST /** @brief LPCOMP hysteresis. */ typedef enum { #ifdef LPCOMP_HYST_HYST_NoHyst - NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_NoHyst, /**< Comparator hysteresis disabled. */ + NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_NoHyst, ///< Comparator hysteresis disabled. #else - NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_Disabled, /**< Comparator hysteresis disabled. */ + NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_Disabled, ///< Comparator hysteresis disabled. #endif #ifdef LPCOMP_HYST_HYST_Hyst50mV - NRF_LPCOMP_HYST_ENABLED = LPCOMP_HYST_HYST_Hyst50mV /**< Comparator hysteresis enabled (typically 50 mV). */ + NRF_LPCOMP_HYST_ENABLED = LPCOMP_HYST_HYST_Hyst50mV ///< Comparator hysteresis enabled (typically 50 mV). #else - NRF_LPCOMP_HYST_ENABLED = LPCOMP_HYST_HYST_Enabled /**< Comparator hysteresis enabled (typically 50 mV). */ + NRF_LPCOMP_HYST_ENABLED = LPCOMP_HYST_HYST_Enabled ///< Comparator hysteresis enabled (typically 50 mV). #endif -}nrf_lpcomp_hysteresis_t; -#endif // LPCOMP_FEATURE_HYST_PRESENT +} nrf_lpcomp_hyst_t; +#endif // NRF_LPCOMP_HAS_HYST /** @brief LPCOMP configuration. */ typedef struct { - nrf_lpcomp_ref_t reference; /**< LPCOMP reference. */ - nrf_lpcomp_detect_t detection; /**< LPCOMP detection type. */ -#if defined(LPCOMP_FEATURE_HYST_PRESENT) || defined(__NRFX_DOXYGEN__) - nrf_lpcomp_hysteresis_t hyst; /**< LPCOMP hysteresis. */ + nrf_lpcomp_ref_t reference; ///< LPCOMP reference. + nrf_lpcomp_detect_t detection; ///< LPCOMP detection type. +#if NRF_LPCOMP_HAS_HYST + nrf_lpcomp_hyst_t hyst; ///< LPCOMP hysteresis. #endif // LPCOMP_FEATURE_HYST_PRESENT } nrf_lpcomp_config_t; /** - * @brief Function for configuring LPCOMP. - * - * This function powers on LPCOMP and configures it. LPCOMP is in DISABLE state after configuration, - * so it must be enabled before using it. All shorts are inactive, events are cleared, and LPCOMP is stopped. + * @brief Function for setting the specified LPCOMP task. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] p_config Configuration. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] task LPCOMP task to be set. */ -NRF_STATIC_INLINE void nrf_lpcomp_configure(NRF_LPCOMP_Type * p_reg, - nrf_lpcomp_config_t const * p_config); +NRF_STATIC_INLINE void nrf_lpcomp_task_trigger(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_task_t task); /** - * @brief Function for selecting the LPCOMP input. - * - * This function selects the active input of LPCOMP. + * @brief Function for getting the address of the specified LPCOMP task register. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] input Input to be selected. + * @param[in] task LPCOMP task. + * + * @return The address of the specified LPCOMP task. */ -NRF_STATIC_INLINE void nrf_lpcomp_input_select(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_input_t input); +NRF_STATIC_INLINE uint32_t nrf_lpcomp_task_address_get(NRF_LPCOMP_Type const * p_reg, + nrf_lpcomp_task_t task); /** - * @brief Function for enabling the Low Power Comparator. + * @brief Function for retrieving the state of the LPCOMP event. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] event Event to be checked. * - * This function enables LPCOMP. + * @retval true The event has been generated. + * @retval false The event has not been generated. + */ +NRF_STATIC_INLINE bool nrf_lpcomp_event_check(NRF_LPCOMP_Type const * p_reg, + nrf_lpcomp_event_t event); + +/** + * @brief Function for clearing the specified LPCOMP event. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] event LPCOMP event to be cleared. */ -NRF_STATIC_INLINE void nrf_lpcomp_enable(NRF_LPCOMP_Type * p_reg); +NRF_STATIC_INLINE void nrf_lpcomp_event_clear(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_event_t event); /** - * @brief Function for disabling the Low Power Comparator. + * @brief Function for getting the address of the specified LPCOMP event register. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] event LPCOMP event. * - * This function disables LPCOMP. + * @return The address of the specified LPCOMP event. + */ +NRF_STATIC_INLINE uint32_t nrf_lpcomp_event_address_get(NRF_LPCOMP_Type const * p_reg, + nrf_lpcomp_event_t event); + +/** + * @brief Function for setting LPCOMP shorts. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] mask Mask of shortcuts. */ -NRF_STATIC_INLINE void nrf_lpcomp_disable(NRF_LPCOMP_Type * p_reg); +NRF_STATIC_INLINE void nrf_lpcomp_shorts_enable(NRF_LPCOMP_Type * p_reg, uint32_t mask); /** - * @brief Function for getting the last LPCOMP compare result. + * @brief Function for clearing LPCOMP shorts by mask. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] mask Mask of shortcuts. + */ +NRF_STATIC_INLINE void nrf_lpcomp_shorts_disable(NRF_LPCOMP_Type * p_reg, uint32_t mask); + +/** + * @brief Function for for setting the specified shortcuts. * - * @return The last compare result. If 0 then VIN+ < VIN-, if 1 then the opposite. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] mask Mask of shortcuts. */ -NRF_STATIC_INLINE uint32_t nrf_lpcomp_result_get(NRF_LPCOMP_Type const * p_reg); +NRF_STATIC_INLINE void nrf_lpcomp_shorts_set(NRF_LPCOMP_Type * p_reg, uint32_t mask); /** * @brief Function for enabling interrupts from LPCOMP. @@ -261,120 +304,186 @@ NRF_STATIC_INLINE void nrf_lpcomp_int_disable(NRF_LPCOMP_Type * p_reg, uint32_t NRF_STATIC_INLINE uint32_t nrf_lpcomp_int_enable_check(NRF_LPCOMP_Type const * p_reg, uint32_t mask); +#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) /** - * @brief Function for getting the address of the specified LPCOMP task register. + * @brief Function for setting subscribe configuration for a given LPCOMP task. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] task Task for which the configuration is set. + * @param[in] channel Channel through which events are subscribed. + */ +NRF_STATIC_INLINE void nrf_lpcomp_subscribe_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_task_t task, + uint8_t channel); + +/** + * @brief Function for clearing subscribe configuration for a given LPCOMP task. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] task LPCOMP task. + * @param[in] task Task for which the configuration is cleared. + */ +NRF_STATIC_INLINE void nrf_lpcomp_subscribe_clear(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_task_t task); + +/** + * @brief Function for setting publish configuration for a given LPCOMP event. * - * @return The address of the specified LPCOMP task. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] event Event for which the configuration is set. + * @param[in] channel Channel through which the event is published. */ -NRF_STATIC_INLINE uint32_t nrf_lpcomp_task_address_get(NRF_LPCOMP_Type const * p_reg, - nrf_lpcomp_task_t task); +NRF_STATIC_INLINE void nrf_lpcomp_publish_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_event_t event, + uint8_t channel); /** - * @brief Function for getting the address of the specified LPCOMP event register. + * @brief Function for clearing publish configuration for a given LPCOMP event. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] event LPCOMP event. + * @param[in] event Event for which the configuration is cleared. + */ +NRF_STATIC_INLINE void nrf_lpcomp_publish_clear(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_event_t event); +#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) + +/** + * @brief Function for configuring LPCOMP. * - * @return The address of the specified LPCOMP event. + * This function powers on LPCOMP and configures it. LPCOMP is in DISABLE state after configuration, + * so it must be enabled before using it. All shorts are inactive, events are cleared, and LPCOMP is stopped. + * + * @deprecated Use the dedicated functions instead. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] p_config Configuration. */ -NRF_STATIC_INLINE uint32_t nrf_lpcomp_event_address_get(NRF_LPCOMP_Type const * p_reg, - nrf_lpcomp_event_t event); +NRF_STATIC_INLINE void nrf_lpcomp_configure(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_config_t const * p_config); + +/** + * @brief Function for setting the reference source. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] reference LPCOMP reference selection. + */ +NRF_STATIC_INLINE void nrf_lpcomp_ref_set(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_ref_t reference); /** - * @brief Function for setting LPCOMP shorts. + * @brief Function for setting the external analog reference source. + * + * To use external reference first call @ref nrf_lpcomp_ref_set with NRF_LPCOMP_REF_EXT_REF argument. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] ext_ref LPCOMP external analog reference selection. + */ +NRF_STATIC_INLINE void nrf_lpcomp_ext_ref_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_ext_ref_t ext_ref); + +/** + * @brief Function for selecting an active LPCOMP input. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] mask Mask of shortcuts. + * @param[in] input Input to be selected. */ -NRF_STATIC_INLINE void nrf_lpcomp_shorts_enable(NRF_LPCOMP_Type * p_reg, uint32_t mask); +NRF_STATIC_INLINE void nrf_lpcomp_input_select(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_input_t input); /** - * @brief Function for clearing LPCOMP shorts by mask. + * @brief Function for setting the detection type. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] detection LPCOMP detection type. + */ +NRF_STATIC_INLINE void nrf_lpcomp_detection_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_detect_t detection); + +#if NRF_LPCOMP_HAS_HYST +/** + * @brief Function for setting the hysteresis. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] mask Mask of shortcuts. + * @param[in] hyst LPCOMP comparator hysteresis. */ -NRF_STATIC_INLINE void nrf_lpcomp_shorts_disable(NRF_LPCOMP_Type * p_reg, uint32_t mask); +NRF_STATIC_INLINE void nrf_lpcomp_hysteresis_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_hyst_t hyst); +#endif /** - * @brief Function for setting the specified LPCOMP task. + * @brief Function for enabling the LPCOMP. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] task LPCOMP task to be set. */ -NRF_STATIC_INLINE void nrf_lpcomp_task_trigger(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_task_t task); +NRF_STATIC_INLINE void nrf_lpcomp_enable(NRF_LPCOMP_Type * p_reg); /** - * @brief Function for clearing the specified LPCOMP event. + * @brief Function for disabling the LPCOMP. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] event LPCOMP event to be cleared. */ -NRF_STATIC_INLINE void nrf_lpcomp_event_clear(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_event_t event); +NRF_STATIC_INLINE void nrf_lpcomp_disable(NRF_LPCOMP_Type * p_reg); /** - * @brief Function for retrieving the state of the LPCOMP event. + * @brief Function for checking if the LPCOMP peripheral is enabled. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] event Event to be checked. * - * @retval true The event has been generated. - * @retval false The event has not been generated. + * @retval true The LPCOMP peripheral is enabled. + * @retval false The LPCOMP peripheral is not enabled. */ -NRF_STATIC_INLINE bool nrf_lpcomp_event_check(NRF_LPCOMP_Type const * p_reg, - nrf_lpcomp_event_t event); +NRF_STATIC_INLINE bool nrf_lpcomp_enable_check(NRF_LPCOMP_Type * p_reg); + +/** + * @brief Function for getting the last LPCOMP compare result. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN- < VIN+. + */ +NRF_STATIC_INLINE uint32_t nrf_lpcomp_result_get(NRF_LPCOMP_Type const * p_reg); #ifndef NRF_DECLARE_ONLY -NRF_STATIC_INLINE void nrf_lpcomp_configure(NRF_LPCOMP_Type * p_reg, - nrf_lpcomp_config_t const * p_config) +NRF_STATIC_INLINE void nrf_lpcomp_task_trigger(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_task_t task) { - p_reg->REFSEL = (p_config->reference << LPCOMP_REFSEL_REFSEL_Pos) & LPCOMP_REFSEL_REFSEL_Msk; + *( (volatile uint32_t *)( (uint8_t *)p_reg + (uint32_t)task) ) = 1; +} -#if !NRF_LPCOMP_HAS_AIN_AS_PIN - //If external source is choosen extract analog reference index. - if ((p_config->reference & LPCOMP_REFSEL_REFSEL_ARef)==LPCOMP_REFSEL_REFSEL_ARef) - { - uint32_t extref = p_config->reference >> 16; - p_reg->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) & - LPCOMP_EXTREFSEL_EXTREFSEL_Msk; - } -#endif +NRF_STATIC_INLINE uint32_t nrf_lpcomp_task_address_get(NRF_LPCOMP_Type const * p_reg, + nrf_lpcomp_task_t task) +{ + return (uint32_t)((uint8_t *)p_reg + task); +} - p_reg->ANADETECT = (p_config->detection << LPCOMP_ANADETECT_ANADETECT_Pos) & - LPCOMP_ANADETECT_ANADETECT_Msk; -#ifdef LPCOMP_FEATURE_HYST_PRESENT - p_reg->HYST = ((p_config->hyst) << LPCOMP_HYST_HYST_Pos) & LPCOMP_HYST_HYST_Msk; -#endif //LPCOMP_FEATURE_HYST_PRESENT +NRF_STATIC_INLINE bool nrf_lpcomp_event_check(NRF_LPCOMP_Type const * p_reg, + nrf_lpcomp_event_t event) +{ + return (bool) (*(volatile uint32_t *)( (uint8_t *)p_reg + (uint32_t)event)); } -NRF_STATIC_INLINE void nrf_lpcomp_input_select(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_input_t input) +NRF_STATIC_INLINE void nrf_lpcomp_event_clear(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_event_t event) { -#if NRF_LPCOMP_HAS_AIN_AS_PIN - p_reg->PSEL = (NRF_PIN_NUMBER_TO_PORT(input) << LPCOMP_PSEL_PORT_Pos) | - (NRF_PIN_NUMBER_TO_PIN(input) << LPCOMP_PSEL_PIN_Pos) | - (p_reg->PSEL & ~(LPCOMP_PSEL_PORT_Msk | LPCOMP_PSEL_PIN_Msk)); -#else - p_reg->PSEL = ((uint32_t)input << LPCOMP_PSEL_PSEL_Pos) | (p_reg->PSEL & ~LPCOMP_PSEL_PSEL_Msk); -#endif + *( (volatile uint32_t *)( (uint8_t *)p_reg + (uint32_t)event) ) = 0; + nrf_event_readback((uint8_t *)p_reg + (uint32_t)event); } -NRF_STATIC_INLINE void nrf_lpcomp_enable(NRF_LPCOMP_Type * p_reg) +NRF_STATIC_INLINE uint32_t nrf_lpcomp_event_address_get(NRF_LPCOMP_Type const * p_reg, + nrf_lpcomp_event_t event) { - p_reg->ENABLE = LPCOMP_ENABLE_ENABLE_Enabled << LPCOMP_ENABLE_ENABLE_Pos; + return (uint32_t)((uint8_t *)p_reg + event); } -NRF_STATIC_INLINE void nrf_lpcomp_disable(NRF_LPCOMP_Type * p_reg) +NRF_STATIC_INLINE void nrf_lpcomp_shorts_enable(NRF_LPCOMP_Type * p_reg, uint32_t mask) { - p_reg->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; + p_reg->SHORTS |= mask; } -NRF_STATIC_INLINE uint32_t nrf_lpcomp_result_get(NRF_LPCOMP_Type const * p_reg) +NRF_STATIC_INLINE void nrf_lpcomp_shorts_disable(NRF_LPCOMP_Type * p_reg, uint32_t mask) { - return (uint32_t)p_reg->RESULT; + p_reg->SHORTS &= ~mask; +} + +NRF_STATIC_INLINE void nrf_lpcomp_shorts_set(NRF_LPCOMP_Type * p_reg, uint32_t mask) +{ + p_reg->SHORTS = mask; } NRF_STATIC_INLINE void nrf_lpcomp_int_enable(NRF_LPCOMP_Type * p_reg, uint32_t mask) @@ -393,43 +502,121 @@ NRF_STATIC_INLINE uint32_t nrf_lpcomp_int_enable_check(NRF_LPCOMP_Type const * p return p_reg->INTENSET & mask; // when read this register will return the value of INTEN. } -NRF_STATIC_INLINE uint32_t nrf_lpcomp_task_address_get(NRF_LPCOMP_Type const * p_reg, - nrf_lpcomp_task_t task) +#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) +NRF_STATIC_INLINE void nrf_lpcomp_subscribe_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_task_t task, + uint8_t channel) { - return (uint32_t)((uint8_t *)p_reg + task); + *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = + ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); } -NRF_STATIC_INLINE uint32_t nrf_lpcomp_event_address_get(NRF_LPCOMP_Type const * p_reg, - nrf_lpcomp_event_t event) +NRF_STATIC_INLINE void nrf_lpcomp_subscribe_clear(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_task_t task) { - return (uint32_t)((uint8_t *)p_reg + event); + *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0; } -NRF_STATIC_INLINE void nrf_lpcomp_shorts_enable(NRF_LPCOMP_Type * p_reg, uint32_t short_mask) +NRF_STATIC_INLINE void nrf_lpcomp_publish_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_event_t event, + uint8_t channel) { - p_reg->SHORTS |= short_mask; + *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = + ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); } -NRF_STATIC_INLINE void nrf_lpcomp_shorts_disable(NRF_LPCOMP_Type * p_reg, uint32_t short_mask) +NRF_STATIC_INLINE void nrf_lpcomp_publish_clear(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_event_t event) { - p_reg->SHORTS &= ~short_mask; + *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0; } +#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) -NRF_STATIC_INLINE void nrf_lpcomp_task_trigger(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_task_t task) +NRF_STATIC_INLINE void nrf_lpcomp_configure(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_config_t const * p_config) { - *( (volatile uint32_t *)( (uint8_t *)p_reg + (uint32_t)task) ) = 1; + p_reg->REFSEL = (p_config->reference << LPCOMP_REFSEL_REFSEL_Pos) & LPCOMP_REFSEL_REFSEL_Msk; + +#if !NRF_LPCOMP_HAS_AIN_AS_PIN + //If external source is choosen extract analog reference index. + if ((p_config->reference & LPCOMP_REFSEL_REFSEL_ARef)==LPCOMP_REFSEL_REFSEL_ARef) + { + uint32_t extref = p_config->reference >> 16; + p_reg->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) & + LPCOMP_EXTREFSEL_EXTREFSEL_Msk; + } +#endif + + p_reg->ANADETECT = (p_config->detection << LPCOMP_ANADETECT_ANADETECT_Pos) & + LPCOMP_ANADETECT_ANADETECT_Msk; +#if NRF_LPCOMP_HAS_HYST + p_reg->HYST = ((p_config->hyst) << LPCOMP_HYST_HYST_Pos) & LPCOMP_HYST_HYST_Msk; +#endif } -NRF_STATIC_INLINE void nrf_lpcomp_event_clear(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_event_t event) +NRF_STATIC_INLINE void nrf_lpcomp_ref_set(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_ref_t reference) { - *( (volatile uint32_t *)( (uint8_t *)p_reg + (uint32_t)event) ) = 0; - nrf_event_readback((uint8_t *)p_reg + (uint32_t)event); + p_reg->REFSEL = (reference << LPCOMP_REFSEL_REFSEL_Pos) & LPCOMP_REFSEL_REFSEL_Msk; } -NRF_STATIC_INLINE bool nrf_lpcomp_event_check(NRF_LPCOMP_Type const * p_reg, - nrf_lpcomp_event_t event) +NRF_STATIC_INLINE void nrf_lpcomp_ext_ref_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_ext_ref_t ext_ref) { - return (bool) (*(volatile uint32_t *)( (uint8_t *)p_reg + (uint32_t)event)); +#if NRF_LPCOMP_HAS_AIN_AS_PIN + p_reg->EXTREFSEL = ((NRF_PIN_NUMBER_TO_PIN(ext_ref) << LPCOMP_EXTREFSEL_PIN_Pos) & + LPCOMP_EXTREFSEL_PIN_Msk) + | ((NRF_PIN_NUMBER_TO_PORT(ext_ref) << LPCOMP_EXTREFSEL_PORT_Pos) & + LPCOMP_EXTREFSEL_PORT_Msk); +#else + p_reg->EXTREFSEL = (ext_ref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) & + LPCOMP_EXTREFSEL_EXTREFSEL_Msk; +#endif +} + +NRF_STATIC_INLINE void nrf_lpcomp_input_select(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_input_t input) +{ +#if NRF_LPCOMP_HAS_AIN_AS_PIN + p_reg->PSEL = (NRF_PIN_NUMBER_TO_PORT(input) << LPCOMP_PSEL_PORT_Pos) | + (NRF_PIN_NUMBER_TO_PIN(input) << LPCOMP_PSEL_PIN_Pos) | + (p_reg->PSEL & ~(LPCOMP_PSEL_PORT_Msk | LPCOMP_PSEL_PIN_Msk)); +#else + p_reg->PSEL = ((uint32_t)input << LPCOMP_PSEL_PSEL_Pos) | (p_reg->PSEL & ~LPCOMP_PSEL_PSEL_Msk); +#endif +} + +NRF_STATIC_INLINE void nrf_lpcomp_detection_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_detect_t detection) +{ + p_reg->ANADETECT = (detection << LPCOMP_ANADETECT_ANADETECT_Pos) & + LPCOMP_ANADETECT_ANADETECT_Msk; +} + +#if NRF_LPCOMP_HAS_HYST +NRF_STATIC_INLINE void nrf_lpcomp_hysteresis_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_hyst_t hyst) +{ + p_reg->HYST = ((hyst) << LPCOMP_HYST_HYST_Pos) & LPCOMP_HYST_HYST_Msk; +} +#endif + +NRF_STATIC_INLINE void nrf_lpcomp_enable(NRF_LPCOMP_Type * p_reg) +{ + p_reg->ENABLE = LPCOMP_ENABLE_ENABLE_Enabled << LPCOMP_ENABLE_ENABLE_Pos; +} + +NRF_STATIC_INLINE void nrf_lpcomp_disable(NRF_LPCOMP_Type * p_reg) +{ + p_reg->ENABLE = LPCOMP_ENABLE_ENABLE_Disabled << LPCOMP_ENABLE_ENABLE_Pos; +} + +NRF_STATIC_INLINE bool nrf_lpcomp_enable_check(NRF_LPCOMP_Type * p_reg) +{ + return ((p_reg->ENABLE) & LPCOMP_ENABLE_ENABLE_Enabled) >> LPCOMP_ENABLE_ENABLE_Pos; +} + +NRF_STATIC_INLINE uint32_t nrf_lpcomp_result_get(NRF_LPCOMP_Type const * p_reg) +{ + return (uint32_t)p_reg->RESULT; } #endif // NRF_DECLARE_ONLY diff --git a/hal/nrf_oscillators.h b/hal/nrf_oscillators.h index 0dc02ff01..cbd89afc9 100644 --- a/hal/nrf_oscillators.h +++ b/hal/nrf_oscillators.h @@ -47,6 +47,98 @@ extern "C" { * @brief Hardware access layer for managing the OSCILLATORS peripheral. */ +#if defined(OSCILLATORS_PLL_FREQ_FREQ_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether PLL is present. */ +#define NRF_OSCILLATORS_HAS_PLL 1 +#else +#define NRF_OSCILLATORS_HAS_PLL 0 +#endif + +#if defined(OSCILLATORS_XOSC32M_CLOCKQUALITY_INDICATOR_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether clock quality indicator is present. */ +#define NRF_OSCILLATORS_HAS_CLOCK_QUALITY_IND 1 +#else +#define NRF_OSCILLATORS_HAS_CLOCK_QUALITY_IND 0 +#endif + +#if defined(OSCILLATORS_XOSC32KI_INTCAP_VAL_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether configuration of internal capacitor using integer value is present. */ +#define NRF_OSCILLATORS_HAS_LFXO_CAP_AS_INT_VALUE 1 +#else +#define NRF_OSCILLATORS_HAS_LFXO_CAP_AS_INT_VALUE 0 +#endif + +#if defined(OSCILLATORS_XOSC32KI_Type) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether LFXO bypass is present. */ +#define NRF_OSCILLATORS_HAS_LFXO_BYPASS 1 +#else +#define NRF_OSCILLATORS_HAS_LFXO_BYPASS 0 +#endif + +#if defined(NRF5340_XXAA_APPLICATION) || defined(__NRFX_DOXYGEN__) +/** + * @brief Macro for calculating HFXO internal capacitor value. + * + * Depending on the SoC used, a range of capacitance of internal capacitors is as follows: + * - From 7 pF to 20 pF in 0.5 pF steps for nRF5340. + * - From 4 pF to 17 pF in 0.25 pF steps for other SoCs. + * This macro should be used to calculate argument's value for @ref nrf_oscillators_hfxo_cap_set function. +*/ +#define OSCILLATORS_HFXO_CAP_CALCULATE(p_ficr_reg, cap_val) \ + ((((p_ficr_reg->XOSC32MTRIM & FICR_XOSC32MTRIM_SLOPE_Msk) \ + << FICR_XOSC32MTRIM_SLOPE_Pos) / 16 + 1) * \ + (cap_val * 2 - 14) + \ + ((p_ficr_reg->XOSC32MTRIM & FICR_XOSC32MTRIM_OFFSET_Msk) \ + << FICR_XOSC32MTRIM_OFFSET_Pos)) +#else +#define OSCILLATORS_HFXO_CAP_CALCULATE(p_ficr_reg, cap_val) \ + (((cap_val - 5.5) * \ + (((p_ficr_reg->XOSC32MTRIM & FICR_XOSC32MTRIM_SLOPE_Msk) \ + << FICR_XOSC32MTRIM_SLOPE_Pos) + 791) + \ + (((p_ficr_reg->XOSC32MTRIM & FICR_XOSC32MTRIM_OFFSET_Msk) \ + << FICR_XOSC32MTRIM_OFFSET_Pos) << 2)) >> 8) +#endif + +#if NRF_OSCILLATORS_HAS_LFXO_CAP_AS_INT_VALUE +/** + * @brief Macro for calculating LFXO internal capacitor value. + * + * The capacitance of internal capacitors ranges from 4 pF to 18 pF in 0.5 pF steps. + * This macro should be used to calculate argument's value for @ref nrf_oscillators_lfxo_cap_set function. +*/ +#define OSCILLATORS_LFXO_CAP_CALCULATE(p_ficr_reg, cap_val) \ + ((((cap_val - 4) * (((p_ficr_reg->XOSC32KTRIM & FICR_XOSC32KTRIM_SLOPE_Msk) \ + << FICR_XOSC32KTRIM_SLOPE_Pos)) + 392) >> 3 + \ + ((p_ficr_reg->XOSC32KTRIM & FICR_XOSC32KTRIM_OFFSET_Msk) \ + << FICR_XOSC32KTRIM_OFFSET_Pos)) >> 6) +#endif + +#if NRF_OSCILLATORS_HAS_CLOCK_QUALITY_IND +/** @brief HFXO clock quality indicator. */ +typedef enum +{ + NRF_OSCILLATORS_HFXO_CLOCK_QUALITY_NONE = OSCILLATORS_XOSC32M_CLOCKQUALITY_INDICATOR_NoStatus, ///< Clock XOSC32M status is not defined. + NRF_OSCILLATORS_HFXO_CLOCK_QUALITY_STARTING = OSCILLATORS_XOSC32M_CLOCKQUALITY_INDICATOR_Starting, ///< Clock XOSC32M has started but has not yet reached the specified frequency tolerance requirement fTOL_HFXO. + NRF_OSCILLATORS_HFXO_CLOCK_QUALITY_STARTED = OSCILLATORS_XOSC32M_CLOCKQUALITY_INDICATOR_Started ///< Clock XOSC32M has started and is operating with the specified frequency tolerance requirement fTOL_HFXO. +} nrf_oscillators_hfxo_clock_quality_t; +#endif + +#if NRF_OSCILLATORS_HAS_PLL +/** @brief PLL frequencies. */ +typedef enum +{ + NRF_OSCILLATORS_PLL_FREQ_64M = OSCILLATORS_PLL_FREQ_FREQ_CK64M, ///< PLL 64 MHz frequency. + NRF_OSCILLATORS_PLL_FREQ_128M = OSCILLATORS_PLL_FREQ_FREQ_CK128M, ///< PLL 128 MHz frequency. +} nrf_oscillators_pll_freq_t; +#endif + +#if NRF_OSCILLATORS_HAS_LFXO_CAP_AS_INT_VALUE +/** @brief LFXO capacitance type. */ +typedef uint32_t nrf_oscillators_lfxo_cap_t; + +/** @brief Symbol specifying usage of external capacitors. */ +#define NRF_OSCILLATORS_LFXO_CAP_EXTERNAL ((nrf_oscillators_lfxo_cap_t)0) +#else /** @brief Capacitors configuration for LFXO. */ typedef enum { @@ -58,7 +150,42 @@ typedef enum NRF_OSCILLATORS_LFXO_CAP_11PF = OSCILLATORS_XOSC32KI_INTCAP_INTCAP_C11PF, ///< Use 11 pF internal capacitors. #endif } nrf_oscillators_lfxo_cap_t; +#endif +#if NRF_OSCILLATORS_HAS_CLOCK_QUALITY_IND +/** + * @brief Function for reading HFXO clock quality indicator. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @return Clock quality indicator value. + */ +NRF_STATIC_INLINE nrf_oscillators_hfxo_clock_quality_t +nrf_oscillators_hfxo_clock_quality_get(NRF_OSCILLATORS_Type * p_reg); +#endif + +#if NRF_OSCILLATORS_HAS_PLL +/** + * @brief Function for setting PLL frequency. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] freq New PLL frequency. + */ +NRF_STATIC_INLINE void nrf_oscillators_pll_freq_set(NRF_OSCILLATORS_Type * p_reg, + nrf_oscillators_pll_freq_t freq); + +/** + * @brief Function for getting PLL frequency. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @return Current PLL frequency value. + */ +NRF_STATIC_INLINE +nrf_oscillators_pll_freq_t nrf_oscillators_pll_freq_get(NRF_OSCILLATORS_Type * p_reg); +#endif + +#if NRF_OSCILLATORS_HAS_LFXO_BYPASS /** * @brief Function for enabling or disabling the bypass of LFXO with external clock source. * @@ -67,10 +194,13 @@ typedef enum * False if bypass is to be disabled (use with xtal or low-swing external source). */ NRF_STATIC_INLINE void nrf_oscillators_lfxo_bypass_set(NRF_OSCILLATORS_Type * p_reg, bool enable); +#endif /** * @brief Function for configuring the internal capacitors of LFXO. * + * For SoCs other than nRF5340, to calculate the correct @p cap_value, use @ref OSCILLATORS_LFXO_CAP_CALCULATE macro. + * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] cap Capacitors configuration. */ @@ -78,11 +208,9 @@ NRF_STATIC_INLINE void nrf_oscillators_lfxo_cap_set(NRF_OSCILLATORS_Type * p nrf_oscillators_lfxo_cap_t cap); /** - * @brief Function for configuring the internal capacitors of HXFO. + * @brief Function for configuring the internal capacitors of HFXO. * - * The capacitance of internal capacitors ranges from 7 pF to 20 pF in 0.5 pF steps. - * To calculate the correct @p cap_value, use the following equation: - * CAPVALUE = (1+FICR->XOSC32MTRIM.SLOPE/16) * (CAPACITANCE*2-14) + FICR->XOSC32MTRIM.OFFSET + * To calculate the correct @p cap_value, use @ref OSCILLATORS_HFXO_CAP_CALCULATE macro. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] enable True if internal capacitors are to be enabled, false otherwise. @@ -94,11 +222,36 @@ NRF_STATIC_INLINE void nrf_oscillators_hfxo_cap_set(NRF_OSCILLATORS_Type * p_reg uint32_t cap_value); #ifndef NRF_DECLARE_ONLY + +#if NRF_OSCILLATORS_HAS_CLOCK_QUALITY_IND +NRF_STATIC_INLINE nrf_oscillators_hfxo_clock_quality_t +nrf_oscillators_hfxo_clock_quality_get(NRF_OSCILLATORS_Type * p_reg) +{ + return (nrf_oscillators_hfxo_clock_quality_t)(p_reg->XOSC32M.CLOCKQUALITY); +} +#endif + +#if NRF_OSCILLATORS_HAS_PLL +NRF_STATIC_INLINE void nrf_oscillators_pll_freq_set(NRF_OSCILLATORS_Type * p_reg, + nrf_oscillators_pll_freq_t freq) +{ + p_reg->PLL.FREQ = (uint32_t)freq; +} + +NRF_STATIC_INLINE +nrf_oscillators_pll_freq_t nrf_oscillators_pll_freq_get(NRF_OSCILLATORS_Type * p_reg) +{ + return (nrf_oscillators_pll_freq_t)(p_reg->PLL.CURRENTFREQ); +} +#endif + +#if NRF_OSCILLATORS_HAS_LFXO_BYPASS NRF_STATIC_INLINE void nrf_oscillators_lfxo_bypass_set(NRF_OSCILLATORS_Type * p_reg, bool enable) { p_reg->XOSC32KI.BYPASS = (enable ? OSCILLATORS_XOSC32KI_BYPASS_BYPASS_Enabled : OSCILLATORS_XOSC32KI_BYPASS_BYPASS_Disabled); } +#endif NRF_STATIC_INLINE void nrf_oscillators_lfxo_cap_set(NRF_OSCILLATORS_Type * p_reg, nrf_oscillators_lfxo_cap_t cap) @@ -110,10 +263,14 @@ NRF_STATIC_INLINE void nrf_oscillators_hfxo_cap_set(NRF_OSCILLATORS_Type * p_reg bool enable, uint32_t cap_value) { +#if defined(OSCILLATORS_XOSC32MCAPS_CAPVALUE_Msk) p_reg->XOSC32MCAPS = (enable ? ((OSCILLATORS_XOSC32MCAPS_ENABLE_Enabled << OSCILLATORS_XOSC32MCAPS_ENABLE_Pos) | (cap_value << OSCILLATORS_XOSC32MCAPS_CAPVALUE_Pos)) : (OSCILLATORS_XOSC32MCAPS_ENABLE_Disabled << OSCILLATORS_XOSC32MCAPS_ENABLE_Pos)); +#else + p_reg->XOSC32M.CONFIG.INTCAP = enable ? cap_value : 0; +#endif } #endif // NRF_DECLARE_ONLY diff --git a/hal/nrf_pdm.h b/hal/nrf_pdm.h index 33719845f..5ad86c5f8 100644 --- a/hal/nrf_pdm.h +++ b/hal/nrf_pdm.h @@ -612,8 +612,8 @@ NRF_STATIC_INLINE void nrf_pdm_gain_get(NRF_PDM_Type const * p_reg, nrf_pdm_gain_t * p_gain_l, nrf_pdm_gain_t * p_gain_r) { - *p_gain_l = p_reg->GAINL; - *p_gain_r = p_reg->GAINR; + *p_gain_l = (nrf_pdm_gain_t)p_reg->GAINL; + *p_gain_r = (nrf_pdm_gain_t)p_reg->GAINR; } NRF_STATIC_INLINE void nrf_pdm_buffer_set(NRF_PDM_Type * p_reg, uint32_t * p_buffer, uint32_t num) diff --git a/hal/nrf_power.h b/hal/nrf_power.h index ec9338a0c..fd73370da 100644 --- a/hal/nrf_power.h +++ b/hal/nrf_power.h @@ -112,12 +112,40 @@ extern "C" { #endif #if defined(POWER_RESETREAS_RESETPIN_Msk) || defined(__NRFX_DOXYGEN__) -/** @brief Auxiliary definition to mark the fact that RESETREAS register is present in POWER */ +/** @brief Symbol indicating whether RESETREAS register is present in POWER */ #define NRF_POWER_HAS_RESETREAS 1 #else #define NRF_POWER_HAS_RESETREAS 0 #endif +#if defined(POWER_RESETREAS_CTRLAP_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether RESETREAS CTRLAP is present. */ +#define NRF_POWER_HAS_RESETREAS_CTRLAP 1 +#else +#define NRF_POWER_HAS_RESETREAS_CTRLAP 0 +#endif + +#if defined(POWER_RESETREAS_LPCOMP_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether RESETREAS LPCOMP is present. */ +#define NRF_POWER_HAS_RESETREAS_LPCOMP 1 +#else +#define NRF_POWER_HAS_RESETREAS_LPCOMP 0 +#endif + +#if defined(POWER_RESETREAS_NFC_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether RESETREAS NFC is present. */ +#define NRF_POWER_HAS_RESETREAS_NFC 1 +#else +#define NRF_POWER_HAS_RESETREAS_NFC 0 +#endif + +#if defined(POWER_RESETREAS_VBUS_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether RESETREAS VBUS is present. */ +#define NRF_POWER_HAS_RESETREAS_VBUS 1 +#else +#define NRF_POWER_HAS_RESETREAS_VBUS 0 +#endif + #if defined(POWER_MAINREGSTATUS_MAINREGSTATUS_Msk) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether MAINREGSTATUS register is present. */ #define NRF_POWER_HAS_MAINREGSTATUS 1 @@ -139,6 +167,13 @@ extern "C" { #define NRF_POWER_HAS_GPREGRET_ARRAY 0 #endif +#if NRF_POWER_HAS_GPREGRET_ARRAY && defined(POWER_GPREGRET_MaxCount) || defined(__NRFX_DOXYGEN__) +/** @brief Size of GPREGRET register when defined as array. */ +#define NRFX_POWER_GPREGRET_COUNT POWER_GPREGRET_MaxCount +#elif NRF_POWER_HAS_GPREGRET_ARRAY +#define NRFX_POWER_GPREGRET_COUNT 2 +#endif + #if defined(POWER_TASKS_SEMAPHORE_ACQUIRE_ACQUIRE_Msk) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether semaphore for regulator voltage scaling procedure is present. */ #define NRF_POWER_HAS_SEMAPHORE 1 @@ -277,14 +312,14 @@ typedef enum NRF_POWER_RESETREAS_SREQ_MASK = POWER_RESETREAS_SREQ_Msk , /**< Bit mask of SREQ field. */ NRF_POWER_RESETREAS_LOCKUP_MASK = POWER_RESETREAS_LOCKUP_Msk , /**< Bit mask of LOCKUP field. */ NRF_POWER_RESETREAS_OFF_MASK = POWER_RESETREAS_OFF_Msk , /**< Bit mask of OFF field. */ -#if defined(POWER_RESETREAS_LPCOMP_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_POWER_HAS_RESETREAS_LPCOMP NRF_POWER_RESETREAS_LPCOMP_MASK = POWER_RESETREAS_LPCOMP_Msk , /**< Bit mask of LPCOMP field. */ #endif NRF_POWER_RESETREAS_DIF_MASK = POWER_RESETREAS_DIF_Msk , /**< Bit mask of DIF field. */ -#if defined(POWER_RESETREAS_NFC_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_POWER_HAS_RESETREAS_NFC NRF_POWER_RESETREAS_NFC_MASK = POWER_RESETREAS_NFC_Msk , /**< Bit mask of NFC field. */ #endif -#if defined(POWER_RESETREAS_VBUS_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_POWER_HAS_RESETREAS_VBUS NRF_POWER_RESETREAS_VBUS_MASK = POWER_RESETREAS_VBUS_Msk , /**< Bit mask of VBUS field. */ #endif } nrf_power_resetreas_mask_t; @@ -821,63 +856,23 @@ NRF_STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(NRF_POWER_Ty /** * @brief Function for setting the general purpose retention register. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] val Value to be set in the register. - */ -NRF_STATIC_INLINE void nrf_power_gpregret_set(NRF_POWER_Type * p_reg, uint8_t val); - -/** - * @brief Function for getting general purpose retention register. - * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * - * @return The value from the register. - */ -NRF_STATIC_INLINE uint8_t nrf_power_gpregret_get(NRF_POWER_Type const * p_reg); - -#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__NRFX_DOXYGEN__) -/** - * @brief Function for setting the general purpose retention register 2. - * - * @note This register is not available in the nRF51 MCU family. - * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] val Value to be set in the register. - */ -NRF_STATIC_INLINE void nrf_power_gpregret2_set(NRF_POWER_Type * p_reg, uint8_t val); - -/** - * @brief Function for getting the general purpose retention register 2. - * - * @note This register is not available in all MCUs. - * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * - * @return The value from the register. - */ -NRF_STATIC_INLINE uint8_t nrf_power_gpregret2_get(NRF_POWER_Type const * p_reg); -#endif // defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__NRFX_DOXYGEN__) - -/** - * @brief Function for getting value of the particular general purpose retention register - * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] reg_num General purpose retention register number. - * - * @return The value from the register + * @param[in] val Value to be set in the register. */ -NRF_STATIC_INLINE uint8_t nrf_power_gpregret_ext_get(NRF_POWER_Type const * p_reg, uint8_t reg_num); +NRF_STATIC_INLINE void nrf_power_gpregret_set(NRF_POWER_Type * p_reg, + uint32_t reg_num, + uint32_t val); /** - * @brief Function for setting particular general purpose retention register. + * @brief Function for getting general purpose retention register. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] reg_num General purpose retention register number. - * @param[in] val Value to be set in the register + * + * @return Value from the register. */ -NRF_STATIC_INLINE void nrf_power_gpregret_ext_set(NRF_POWER_Type * p_reg, - uint8_t reg_num, - uint8_t val); +NRF_STATIC_INLINE uint32_t nrf_power_gpregret_get(NRF_POWER_Type const * p_reg, uint32_t reg_num); #endif // NRF_POWER_HAS_GPREGRET #if NRF_POWER_HAS_DCDCEN @@ -1403,67 +1398,63 @@ NRF_STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(NRF_POWER_Ty #endif // NRF_POWER_HAS_POFCON_VDDH #if NRF_POWER_HAS_GPREGRET -NRF_STATIC_INLINE void nrf_power_gpregret_set(NRF_POWER_Type * p_reg, uint8_t val) +NRF_STATIC_INLINE void nrf_power_gpregret_set(NRF_POWER_Type * p_reg, + uint32_t reg_num, + uint32_t val) { - volatile uint32_t * p_gpregret; - if (sizeof(p_reg->GPREGRET) > sizeof(uint32_t)) - { - p_gpregret = &((volatile uint32_t *)p_reg->GPREGRET)[0]; - } - else - { - p_gpregret = &((volatile uint32_t *)&p_reg->GPREGRET)[0]; - } - *p_gpregret = val; -} +#if NRF_POWER_HAS_GPREGRET_ARRAY + NRFX_ASSERT(reg_num < NRFX_POWER_GPREGRET_COUNT); +#elif defined(POWER_GPREGRET2_GPREGRET_Msk) + NRFX_ASSERT(reg_num < 2); +#else + NRFX_ASSERT(reg_num < 1); +#endif -NRF_STATIC_INLINE uint8_t nrf_power_gpregret_get(NRF_POWER_Type const * p_reg) -{ - volatile uint32_t * p_gpregret; - if (sizeof(p_reg->GPREGRET) > sizeof(uint32_t)) - { - p_gpregret = &((volatile uint32_t *)p_reg->GPREGRET)[0]; - } - else +#if NRF_POWER_HAS_GPREGRET_ARRAY + p_reg->GPREGRET[reg_num] = (val & POWER_GPREGRET_GPREGRET_Msk) << POWER_GPREGRET_GPREGRET_Pos; +#else + switch (reg_num) { - p_gpregret = &((volatile uint32_t *)&p_reg->GPREGRET)[0]; + case 0: + p_reg->GPREGRET = (val & POWER_GPREGRET_GPREGRET_Msk) << POWER_GPREGRET_GPREGRET_Pos; + break; +#if defined(POWER_GPREGRET2_GPREGRET_Msk) + case 1: + p_reg->GPREGRET2 = (val & POWER_GPREGRET2_GPREGRET_Msk) << POWER_GPREGRET2_GPREGRET_Pos; + break; +#endif + default: + break; } - return (uint8_t)*p_gpregret; +#endif } -NRF_STATIC_INLINE void nrf_power_gpregret_ext_set(NRF_POWER_Type * p_reg, - uint8_t reg_num, - uint8_t val) +NRF_STATIC_INLINE uint32_t nrf_power_gpregret_get(NRF_POWER_Type const * p_reg, uint32_t reg_num) { #if NRF_POWER_HAS_GPREGRET_ARRAY - p_reg->GPREGRET[reg_num] = val; + NRFX_ASSERT(reg_num < NRFX_POWER_GPREGRET_COUNT); +#elif defined(POWER_GPREGRET2_GPREGRET_Msk) + NRFX_ASSERT(reg_num < 2); #else NRFX_ASSERT(reg_num < 1); - p_reg->GPREGRET = val; #endif -} -NRF_STATIC_INLINE uint8_t nrf_power_gpregret_ext_get(NRF_POWER_Type const * p_reg, uint8_t reg_num) -{ #if NRF_POWER_HAS_GPREGRET_ARRAY return p_reg->GPREGRET[reg_num]; #else - NRFX_ASSERT(reg_num < 1); - return (uint8_t)p_reg->GPREGRET; -#endif -} - + switch (reg_num) + { + case 0: + return p_reg->GPREGRET; #if defined(POWER_GPREGRET2_GPREGRET_Msk) -NRF_STATIC_INLINE void nrf_power_gpregret2_set(NRF_POWER_Type * p_reg, uint8_t val) -{ - p_reg->GPREGRET2 = val; -} - -NRF_STATIC_INLINE uint8_t nrf_power_gpregret2_get(NRF_POWER_Type const * p_reg) -{ - return (uint8_t)p_reg->GPREGRET2; -} + case 1: + return p_reg->GPREGRET2; #endif + default: + return 0; + } +#endif +} #endif // NRF_POWER_HAS_GPREGRET #if NRF_POWER_HAS_DCDCEN diff --git a/hal/nrf_ppi.h b/hal/nrf_ppi.h index 91f423c10..03c602dd2 100644 --- a/hal/nrf_ppi.h +++ b/hal/nrf_ppi.h @@ -271,6 +271,21 @@ NRF_STATIC_INLINE void nrf_ppi_channel_include_in_group(NRF_PPI_Type * nrf_ppi_channel_t channel, nrf_ppi_channel_group_t channel_group); +/** + * @brief Function for setting multiple PPI channels in a channel group. + * + * @details This function adds all specified channels to the group. + * + * @warning All channels included previously will be overwritten. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] channel_mask Channels to be assgined in the group. + * @param[in] channel_group Channel group. + */ +NRF_STATIC_INLINE void nrf_ppi_channels_group_set(NRF_PPI_Type * p_reg, + uint32_t channel_mask, + nrf_ppi_channel_group_t channel_group); + /** * @brief Function for including multiple PPI channels in a channel group. * @@ -488,6 +503,13 @@ NRF_STATIC_INLINE void nrf_ppi_channel_include_in_group(NRF_PPI_Type * p_reg->CHG[(uint32_t) channel_group] |= (PPI_CHG_CH0_Included << ((uint32_t) channel)); } +NRF_STATIC_INLINE void nrf_ppi_channels_group_set(NRF_PPI_Type * p_reg, + uint32_t channel_mask, + nrf_ppi_channel_group_t channel_group) +{ + p_reg->CHG[(uint32_t) channel_group] = channel_mask; +} + NRF_STATIC_INLINE void nrf_ppi_channels_include_in_group(NRF_PPI_Type * p_reg, uint32_t channel_mask, nrf_ppi_channel_group_t channel_group) diff --git a/hal/nrf_pwm.h b/hal/nrf_pwm.h index 64d107780..f87425010 100644 --- a/hal/nrf_pwm.h +++ b/hal/nrf_pwm.h @@ -83,7 +83,7 @@ extern "C" { * * @return Pointer to the structure of registers of the PWM peripheral. */ - #define NRF_PWM_INST_GET(idx) NRFX_CONCAT_2(NRF_PWM, idx) + #define NRF_PWM_INST_GET(idx) NRFX_CONCAT(NRF_, PWM, idx) /** * @brief This value can be provided as a parameter for the @ref nrf_pwm_pins_set diff --git a/hal/nrf_qdec.h b/hal/nrf_qdec.h index 3ed16852c..0f2c96987 100644 --- a/hal/nrf_qdec.h +++ b/hal/nrf_qdec.h @@ -66,9 +66,9 @@ extern "C" { #if defined(QDEC_TASKS_RDCLRDBL_TASKS_RDCLRDBL_Msk) || defined(__NRFX_DOXYGEN__) /** @brief Presence of the RDCLRDBL task. */ -#define NRF_QDEC_HAS_RDCLRDBL 1 +#define NRF_QDEC_HAS_TASK_RDCLRDBL 1 #else -#define NRF_QDEC_HAS_RDCLRDBL 0 +#define NRF_QDEC_HAS_TASK_RDCLRDBL 0 #endif #if defined(QDEC_EVENTS_DBLRDY_EVENTS_DBLRDY_Msk) || defined(__NRFX_DOXYGEN__) @@ -85,6 +85,9 @@ extern "C" { #define NRF_QDEC_HAS_EVENT_STOPPED 0 #endif +/** @brief Reset value of LEDPRE register. */ +#define NRF_QDEC_LEDPRE_DEFAULT 0x10 + /** @brief QDEC tasks. */ typedef enum { diff --git a/hal/nrf_regulators.h b/hal/nrf_regulators.h index 4a92108dc..0ffd07894 100644 --- a/hal/nrf_regulators.h +++ b/hal/nrf_regulators.h @@ -47,103 +47,193 @@ extern "C" { * @brief Hardware access layer for managing the REGULATORS peripheral. */ -#if defined(REGULATORS_MAINREGSTATUS_VREGH_Msk) || defined(__NRFX_DOXYGEN__) -/** @brief Symbol indicating whether MAINREGSTATUS register is present. */ -#define NRF_REGULATORS_HAS_MAINREGSTATUS 1 +#if defined(REGULATORS_VREGH_DCDCEN_DCDCEN_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether high voltage regulator (VREGH) is present. */ +#define NRF_REGULATORS_HAS_VREG_HIGH 1 +#else +#define NRF_REGULATORS_HAS_VREG_HIGH 0 +#endif + +#if defined(REGULATORS_VREGM_ENABLE_ENABLE_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether medium voltage regulator (VREGM) is present. */ +#define NRF_REGULATORS_HAS_VREG_MEDIUM 1 +#else +#define NRF_REGULATORS_HAS_VREG_MEDIUM 0 +#endif + +#if defined(REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether radio regulator (VREGRADIO) is present. */ +#define NRF_REGULATORS_HAS_VREG_RADIO 1 #else -#define NRF_REGULATORS_HAS_MAINREGSTATUS 0 +#define NRF_REGULATORS_HAS_VREG_RADIO 0 #endif #if defined(REGULATORS_POFCON_POF_Msk) || defined(__NRFX_DOXYGEN__) -/** @brief Symbol indicating whether power failure comparator is present. */ -#define NRF_REGULATORS_HAS_POFCON 1 +/** @brief Symbol indicating whether Power-On-Fail Comparator (POF Comparator) is present. */ +#define NRF_REGULATORS_HAS_POF 1 #else -#define NRF_REGULATORS_HAS_POFCON 0 +#define NRF_REGULATORS_HAS_POF 0 #endif #if defined(REGULATORS_POFCON_THRESHOLDVDDH_Msk) || defined(__NRFX_DOXYGEN__) -/** @brief Symbol indicating whether power failure comparator for VDDH is present. */ -#define NRF_REGULATORS_HAS_POFCON_VDDH 1 +/** @brief Symbol indicating whether POF Comparator for VDDH is present. */ +#define NRF_REGULATORS_HAS_POF_VDDH 1 #else -#define NRF_REGULATORS_HAS_POFCON_VDDH 0 +#define NRF_REGULATORS_HAS_POF_VDDH 0 #endif -#if defined(REGULATORS_VREGH_DCDCEN_DCDCEN_Msk) || defined(__NRFX_DOXYGEN__) -/** @brief Symbol indicating whether high voltage regulator is present. */ -#define NRF_REGULATORS_HAS_DCDCEN_VDDH 1 +#if defined(REGULATORS_POFCON_EVENTDISABLE_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether POF Comparator can disable POFWARN event. */ +#define NRF_REGULATORS_HAS_POF_WARN_DISABLE 1 #else -#define NRF_REGULATORS_HAS_DCDCEN_VDDH 0 +#define NRF_REGULATORS_HAS_POF_WARN_DISABLE 0 #endif -#if defined(REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Msk) || defined(__NRFX_DOXYGEN__) -/** @brief Symbol indicating whether radio regulator is present. */ -#define NRF_REGULATORS_HAS_DCDCEN_RADIO 1 +#if defined(REGULATORS_POFSTAT_COMPARATOR_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether POF Comparator status is present. */ +#define NRF_REGULATORS_HAS_POF_STATUS 1 #else -#define NRF_REGULATORS_HAS_DCDCEN_RADIO 0 +#define NRF_REGULATORS_HAS_POF_STATUS 0 #endif -#if NRF_REGULATORS_HAS_MAINREGSTATUS -/** @brief Main regulator status. */ +#if defined(REGULATORS_TRIM_ResetValue) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether TRIM register is present. */ +#define NRF_REGULATORS_HAS_TRIM 1 +#else +#define NRF_REGULATORS_HAS_TRIM 0 +#endif + +#if defined(REGULATORS_MAINREGSTATUS_VREGH_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether main supply status is present. */ +#define NRF_REGULATORS_HAS_MAIN_STATUS 1 +#else +#define NRF_REGULATORS_HAS_MAIN_STATUS 0 +#endif + +#if defined(REGULATORS_VREGMAIN_INDUCTORDET_DETECTED_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether inductor detection is present. */ +#define NRF_REGULATORS_HAS_INDUCTOR_DET 1 +#else +#define NRF_REGULATORS_HAS_INDUCTOR_DET 0 +#endif + +/** @brief Voltage regulators. */ typedef enum { - NRF_REGULATORS_MAINREGSTATUS_NORMAL = REGULATORS_MAINREGSTATUS_VREGH_Inactive, /**< Normal voltage mode. Voltage supplied on VDD and VDDH. */ - NRF_REGULATORS_MAINREGSTATUS_HIGH = REGULATORS_MAINREGSTATUS_VREGH_Active /**< High voltage mode. Voltage supplied on VDDH. */ -} nrf_regulators_mainregstatus_t; + NRF_REGULATORS_VREG_MAIN, ///< Main voltage regulator (VREGMAIN). +#if NRF_REGULATORS_HAS_VREG_HIGH + NRF_REGULATORS_VREG_HIGH, ///< High voltage regulator (VREGH). +#endif +#if NRF_REGULATORS_HAS_VREG_MEDIUM + NRF_REGULATORS_VREG_MEDIUM, ///< Medium voltage regulator (VREGM). +#endif +#if NRF_REGULATORS_HAS_VREG_RADIO + NRF_REGULATORS_VREG_RADIO, ///< Radio voltage regulator (VREGRADIO). #endif +} nrf_regulators_vreg_t; -#if NRF_REGULATORS_HAS_POFCON -/** @brief Power failure comparator thresholds. */ +#if NRF_REGULATORS_HAS_POF +/** @brief POF Comparator thresholds. */ typedef enum { - NRF_REGULATORS_POFTHR_V19 = REGULATORS_POFCON_THRESHOLD_V19, /**< Set threshold to 1.9 V. */ - NRF_REGULATORS_POFTHR_V20 = REGULATORS_POFCON_THRESHOLD_V20, /**< Set threshold to 2.0 V. */ - NRF_REGULATORS_POFTHR_V21 = REGULATORS_POFCON_THRESHOLD_V21, /**< Set threshold to 2.1 V. */ - NRF_REGULATORS_POFTHR_V22 = REGULATORS_POFCON_THRESHOLD_V22, /**< Set threshold to 2.2 V. */ - NRF_REGULATORS_POFTHR_V23 = REGULATORS_POFCON_THRESHOLD_V23, /**< Set threshold to 2.3 V. */ - NRF_REGULATORS_POFTHR_V24 = REGULATORS_POFCON_THRESHOLD_V24, /**< Set threshold to 2.4 V. */ - NRF_REGULATORS_POFTHR_V25 = REGULATORS_POFCON_THRESHOLD_V25, /**< Set threshold to 2.5 V. */ - NRF_REGULATORS_POFTHR_V26 = REGULATORS_POFCON_THRESHOLD_V26, /**< Set threshold to 2.6 V. */ - NRF_REGULATORS_POFTHR_V27 = REGULATORS_POFCON_THRESHOLD_V27, /**< Set threshold to 2.7 V. */ - NRF_REGULATORS_POFTHR_V28 = REGULATORS_POFCON_THRESHOLD_V28, /**< Set threshold to 2.8 V. */ +#if defined(REGULATORS_POFCON_THRESHOLD_V17) || defined(__NRFX_DOXYGEN__) + NRF_REGULATORS_POF_THR_1V7 = REGULATORS_POFCON_THRESHOLD_V17, ///< Set threshold to 1.7 V. +#endif +#if defined(REGULATORS_POFCON_THRESHOLD_V18) || defined(__NRFX_DOXYGEN__) + NRF_REGULATORS_POF_THR_1V8 = REGULATORS_POFCON_THRESHOLD_V18, ///< Set threshold to 1.8 V. +#endif + NRF_REGULATORS_POF_THR_1V9 = REGULATORS_POFCON_THRESHOLD_V19, ///< Set threshold to 1.9 V. + NRF_REGULATORS_POF_THR_2V0 = REGULATORS_POFCON_THRESHOLD_V20, ///< Set threshold to 2.0 V. + NRF_REGULATORS_POF_THR_2V1 = REGULATORS_POFCON_THRESHOLD_V21, ///< Set threshold to 2.1 V. + NRF_REGULATORS_POF_THR_2V2 = REGULATORS_POFCON_THRESHOLD_V22, ///< Set threshold to 2.2 V. + NRF_REGULATORS_POF_THR_2V3 = REGULATORS_POFCON_THRESHOLD_V23, ///< Set threshold to 2.3 V. + NRF_REGULATORS_POF_THR_2V4 = REGULATORS_POFCON_THRESHOLD_V24, ///< Set threshold to 2.4 V. + NRF_REGULATORS_POF_THR_2V5 = REGULATORS_POFCON_THRESHOLD_V25, ///< Set threshold to 2.5 V. + NRF_REGULATORS_POF_THR_2V6 = REGULATORS_POFCON_THRESHOLD_V26, ///< Set threshold to 2.6 V. + NRF_REGULATORS_POF_THR_2V7 = REGULATORS_POFCON_THRESHOLD_V27, ///< Set threshold to 2.7 V. + NRF_REGULATORS_POF_THR_2V8 = REGULATORS_POFCON_THRESHOLD_V28, ///< Set threshold to 2.8 V. } nrf_regulators_pof_thr_t; #endif -#if NRF_REGULATORS_HAS_POFCON_VDDH -/** @brief Power failure comparator thresholds for VDDH. */ +#if NRF_REGULATORS_HAS_POF_VDDH +/** @brief POF Comparator thresholds for VDDH. */ +typedef enum +{ + NRF_REGULATORS_POF_THR_VDDH_2V7 = REGULATORS_POFCON_THRESHOLDVDDH_V27, ///< Set threshold to 2.7 V. + NRF_REGULATORS_POF_THR_VDDH_2V8 = REGULATORS_POFCON_THRESHOLDVDDH_V28, ///< Set threshold to 2.8 V. + NRF_REGULATORS_POF_THR_VDDH_2V9 = REGULATORS_POFCON_THRESHOLDVDDH_V29, ///< Set threshold to 2.9 V. + NRF_REGULATORS_POF_THR_VDDH_3V0 = REGULATORS_POFCON_THRESHOLDVDDH_V30, ///< Set threshold to 3.0 V. + NRF_REGULATORS_POF_THR_VDDH_3V1 = REGULATORS_POFCON_THRESHOLDVDDH_V31, ///< Set threshold to 3.1 V. + NRF_REGULATORS_POF_THR_VDDH_3V2 = REGULATORS_POFCON_THRESHOLDVDDH_V32, ///< Set threshold to 3.2 V. + NRF_REGULATORS_POF_THR_VDDH_3V3 = REGULATORS_POFCON_THRESHOLDVDDH_V33, ///< Set threshold to 3.3 V. + NRF_REGULATORS_POF_THR_VDDH_3V4 = REGULATORS_POFCON_THRESHOLDVDDH_V34, ///< Set threshold to 3.4 V. + NRF_REGULATORS_POF_THR_VDDH_3V5 = REGULATORS_POFCON_THRESHOLDVDDH_V35, ///< Set threshold to 3.5 V. + NRF_REGULATORS_POF_THR_VDDH_3V6 = REGULATORS_POFCON_THRESHOLDVDDH_V36, ///< Set threshold to 3.6 V. + NRF_REGULATORS_POF_THR_VDDH_3V7 = REGULATORS_POFCON_THRESHOLDVDDH_V37, ///< Set threshold to 3.7 V. + NRF_REGULATORS_POF_THR_VDDH_3V8 = REGULATORS_POFCON_THRESHOLDVDDH_V38, ///< Set threshold to 3.8 V. + NRF_REGULATORS_POF_THR_VDDH_3V9 = REGULATORS_POFCON_THRESHOLDVDDH_V39, ///< Set threshold to 3.9 V. + NRF_REGULATORS_POF_THR_VDDH_4V0 = REGULATORS_POFCON_THRESHOLDVDDH_V40, ///< Set threshold to 4.0 V. + NRF_REGULATORS_POF_THR_VDDH_4V1 = REGULATORS_POFCON_THRESHOLDVDDH_V41, ///< Set threshold to 4.1 V. + NRF_REGULATORS_POF_THR_VDDH_4V2 = REGULATORS_POFCON_THRESHOLDVDDH_V42, ///< Set threshold to 4.2 V. +} nrf_regulators_pof_thr_vddh_t; +#endif + +#if NRF_REGULATORS_HAS_TRIM +/** @brief Components allowed to introduce ELV mode. */ +typedef enum +{ + NRF_REGULATORS_ELV_MODE_ALLOW_MASK_EXT ///< Reserved. For internal use only. +} nrf_regulators_elv_mode_allow_mask_t; +#endif // NRF_REGULATORS_HAS_TRIM + +#if NRF_REGULATORS_HAS_POF +/** @brief POF Comparator configuration structure. */ +typedef struct { + bool enable; ///< Enable or disable POF Comparator. + nrf_regulators_pof_thr_t thr; ///< Threshold to be set for POF Comparator. +#if NRF_REGULATORS_HAS_POF_VDDH + nrf_regulators_pof_thr_vddh_t thr_vddh; ///< Threshold to be set for POF Comparator for VDDH. +#endif +#if NRF_REGULATORS_HAS_POF_WARN_DISABLE + bool warn_disable; ///< Disable or enable POFWARN event. +#endif +} nrf_regulators_pof_config_t; +#endif + +#if NRF_REGULATORS_HAS_MAIN_STATUS +/** @brief Main supply status. */ typedef enum { - NRF_REGULATORS_POFTHRVDDH_V27 = REGULATORS_POFCON_THRESHOLDVDDH_V27, /**< Set threshold to 2.7 V. */ - NRF_REGULATORS_POFTHRVDDH_V28 = REGULATORS_POFCON_THRESHOLDVDDH_V28, /**< Set threshold to 2.8 V. */ - NRF_REGULATORS_POFTHRVDDH_V29 = REGULATORS_POFCON_THRESHOLDVDDH_V29, /**< Set threshold to 2.9 V. */ - NRF_REGULATORS_POFTHRVDDH_V30 = REGULATORS_POFCON_THRESHOLDVDDH_V30, /**< Set threshold to 3.0 V. */ - NRF_REGULATORS_POFTHRVDDH_V31 = REGULATORS_POFCON_THRESHOLDVDDH_V31, /**< Set threshold to 3.1 V. */ - NRF_REGULATORS_POFTHRVDDH_V32 = REGULATORS_POFCON_THRESHOLDVDDH_V32, /**< Set threshold to 3.2 V. */ - NRF_REGULATORS_POFTHRVDDH_V33 = REGULATORS_POFCON_THRESHOLDVDDH_V33, /**< Set threshold to 3.3 V. */ - NRF_REGULATORS_POFTHRVDDH_V34 = REGULATORS_POFCON_THRESHOLDVDDH_V34, /**< Set threshold to 3.4 V. */ - NRF_REGULATORS_POFTHRVDDH_V35 = REGULATORS_POFCON_THRESHOLDVDDH_V35, /**< Set threshold to 3.5 V. */ - NRF_REGULATORS_POFTHRVDDH_V36 = REGULATORS_POFCON_THRESHOLDVDDH_V36, /**< Set threshold to 3.6 V. */ - NRF_REGULATORS_POFTHRVDDH_V37 = REGULATORS_POFCON_THRESHOLDVDDH_V37, /**< Set threshold to 3.7 V. */ - NRF_REGULATORS_POFTHRVDDH_V38 = REGULATORS_POFCON_THRESHOLDVDDH_V38, /**< Set threshold to 3.8 V. */ - NRF_REGULATORS_POFTHRVDDH_V39 = REGULATORS_POFCON_THRESHOLDVDDH_V39, /**< Set threshold to 3.9 V. */ - NRF_REGULATORS_POFTHRVDDH_V40 = REGULATORS_POFCON_THRESHOLDVDDH_V40, /**< Set threshold to 4.0 V. */ - NRF_REGULATORS_POFTHRVDDH_V41 = REGULATORS_POFCON_THRESHOLDVDDH_V41, /**< Set threshold to 4.1 V. */ - NRF_REGULATORS_POFTHRVDDH_V42 = REGULATORS_POFCON_THRESHOLDVDDH_V42, /**< Set threshold to 4.2 V. */ -} nrf_regulators_pof_thrvddh_t; + NRF_REGULATORS_MAIN_STATUS_NORMAL = REGULATORS_MAINREGSTATUS_VREGH_Inactive, ///< Normal voltage mode. Voltage supplied on VDD and VDDH. + NRF_REGULATORS_MAIN_STATUS_HIGH = REGULATORS_MAINREGSTATUS_VREGH_Active ///< High voltage mode. Voltage supplied on VDDH. +} nrf_regulators_main_status_t; #endif /** - * @brief Function for enabling or disabling DCDC converter. + * @brief Function for enabling or disabling the specified voltage regulator. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] enable True if DCDC converter is to be enabled, false otherwise. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] regulator Regulator to be enabled or disabled. + * @param[in] enable True if specified voltage regulator is to be enabled, false otherwise. */ -NRF_STATIC_INLINE void nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg, bool enable); +NRF_STATIC_INLINE void nrf_regulators_vreg_enable_set(NRF_REGULATORS_Type * p_reg, + nrf_regulators_vreg_t regulator, + bool enable); /** - * @brief Function for putting CPU in system OFF mode. + * @brief Function for checking whether the specified voltage regulator is enabled. * - * This function puts the CPU into system off mode. - * The only way to wake up the CPU is by reset. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] regulator Regulator to be checked. + * + * @retval true Specified voltage regulator is enabled. + * @retval false Specified voltage regulator is disabled. + */ +NRF_STATIC_INLINE bool nrf_regulators_vreg_enable_check(NRF_REGULATORS_Type const * p_reg, + nrf_regulators_vreg_t regulator); + +/** + * @brief Function for putting the CPU in System OFF mode. * * @note This function never returns. * @@ -151,7 +241,7 @@ NRF_STATIC_INLINE void nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg, bo */ NRF_STATIC_INLINE void nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg); -#if NRF_REGULATORS_HAS_MAINREGSTATUS +#if NRF_REGULATORS_HAS_MAIN_STATUS /** * @brief Function for getting the main supply status. * @@ -160,86 +250,172 @@ NRF_STATIC_INLINE void nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg); * @return The current main supply status. */ NRF_STATIC_INLINE -nrf_regulators_mainregstatus_t nrf_regulators_mainregstatus_get(NRF_REGULATORS_Type const * p_reg); +nrf_regulators_main_status_t nrf_regulators_main_status_get(NRF_REGULATORS_Type const * p_reg); #endif -#if NRF_REGULATORS_HAS_POFCON +#if NRF_REGULATORS_HAS_POF /** - * @brief Function for setting the power failure comparator configuration. + * @brief Function for setting the POF Comparator configuration. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] enable True if power failure comparator is to be enabled, false otherwise. - * @param[in] thr Voltage threshold value. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] p_config Pointer to the structure containing POF Comparator configuration. */ -NRF_STATIC_INLINE void nrf_regulators_pofcon_set(NRF_REGULATORS_Type * p_reg, - bool enable, - nrf_regulators_pof_thr_t thr); +NRF_STATIC_INLINE void nrf_regulators_pof_config_set(NRF_REGULATORS_Type * p_reg, + nrf_regulators_pof_config_t const * p_config); /** - * @brief Function for getting the power failure comparator configuration. - * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[out] p_enabled Function sets this boolean variable to true - * if power failure comparator is enabled. - * The pointer can be NULL if we do not need this information. + * @brief Function for getting the POF Comparator configuration. * - * @return Threshold setting for power failure comparator. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[out] p_config Pointer to the structure to be filled with POF Comparator configuration. */ -NRF_STATIC_INLINE -nrf_regulators_pof_thr_t nrf_regulators_pofcon_get(NRF_REGULATORS_Type const * p_reg, - bool * p_enabled); -#endif // NRF_REGULATORS_HAS_POFCON +NRF_STATIC_INLINE void nrf_regulators_pof_config_get(NRF_REGULATORS_Type const * p_reg, + nrf_regulators_pof_config_t * p_config); +#endif // NRF_REGULATORS_HAS_POF -#if NRF_REGULATORS_HAS_POFCON_VDDH +#if NRF_REGULATORS_HAS_POF_STATUS /** - * @brief Function for setting the VDDH power failure comparator threshold. + * @brief Function for checking if the detected voltage is below or above the threshold of VPOF (POF Comparator's threshold voltage). * * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] thr Threshold to be set. + * + * @retval true Voltage below VPOF threshold has been detected. + * @retval false Voltage above VPOF threshold has been detected. */ -NRF_STATIC_INLINE void nrf_regulators_pofcon_vddh_set(NRF_REGULATORS_Type * p_reg, - nrf_regulators_pof_thrvddh_t thr); +NRF_STATIC_INLINE bool nrf_regulators_pof_below_thr_check(NRF_REGULATORS_Type const * p_reg); +#endif +#if NRF_REGULATORS_HAS_TRIM /** - * @brief Function for getting the VDDH regulators failure comparator threshold. + * @brief Function for setting components that are allowed to introduce the ELV mode. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @warning This register is retained when retention is enabled. * - * @return Threshold setting for regulators failure comparator. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] mask Mask of components to be set, created using @ref nrf_regulators_elv_mode_allow_mask_t. */ -NRF_STATIC_INLINE -nrf_regulators_pof_thrvddh_t nrf_regulators_pofcon_vddh_get(NRF_REGULATORS_Type const * p_reg); -#endif // NRF_REGULATORS_HAS_POFCON_VDDH +NRF_STATIC_INLINE void nrf_regulators_elv_mode_allow_set(NRF_REGULATORS_Type * p_reg, + uint32_t mask); -#if NRF_REGULATORS_HAS_DCDCEN_VDDH /** - * @brief Function for enabling or disabling the high voltage regulator. + * @brief Function for geting components that are allowed to introduce the ELV mode. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] enable True if the high voltage regulator is to be enabled, false otherwise. + * @warning This register is retained when retention is enabled. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @return Mask of components allowed to introduce ELV mode, + * created using @ref nrf_regulators_elv_mode_allow_mask_t. */ -NRF_STATIC_INLINE void nrf_regulators_dcdcen_vddh_set(NRF_REGULATORS_Type * p_reg, bool enable); -#endif +NRF_STATIC_INLINE uint32_t nrf_regulators_elv_mode_allow_get(NRF_REGULATORS_Type const * p_reg); +#endif // NRF_REGULATORS_HAS_TRIM -#if NRF_REGULATORS_HAS_DCDCEN_RADIO +#if NRF_REGULATORS_HAS_INDUCTOR_DET /** - * @brief Function for enabling or disabling the radio regulator. + * @brief Function for checking whether an inductor is connected to the DCC pin. + * + * @note The detection can only take place if the VREG_MAIN DC/DC converter is not enabled. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] enable True if the radio regulator is to be enabled, false otherwise. + * @retval true Inductor detected. + * @retval false Inductor not detected. */ -NRF_STATIC_INLINE void nrf_regulators_dcdcen_radio_set(NRF_REGULATORS_Type * p_reg, bool enable); +NRF_STATIC_INLINE bool nrf_regulators_inductor_check(NRF_REGULATORS_Type const * p_reg); #endif #ifndef NRF_DECLARE_ONLY -NRF_STATIC_INLINE void nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg, bool enable) +NRF_STATIC_INLINE void nrf_regulators_vreg_enable_set(NRF_REGULATORS_Type * p_reg, + nrf_regulators_vreg_t regulator, + bool enable) { + switch (regulator) + { + case NRF_REGULATORS_VREG_MAIN: #if defined(REGULATORS_DCDCEN_DCDCEN_Msk) - p_reg->DCDCEN = (enable ? REGULATORS_DCDCEN_DCDCEN_Msk : 0); + p_reg->DCDCEN = (enable ? REGULATORS_DCDCEN_DCDCEN_Enabled : + REGULATORS_DCDCEN_DCDCEN_Disabled) << REGULATORS_DCDCEN_DCDCEN_Pos; +#elif defined(REGULATORS_VREGMAIN_DCDCEN_VAL_Msk) + p_reg->VREGMAIN.DCDCEN = (enable ? REGULATORS_VREGMAIN_DCDCEN_VAL_Enabled : + REGULATORS_VREGMAIN_DCDCEN_VAL_Disabled) + << REGULATORS_VREGMAIN_DCDCEN_VAL_Pos; #else - p_reg->VREGMAIN.DCDCEN = (enable ? REGULATORS_VREGMAIN_DCDCEN_DCDCEN_Msk : 0); + p_reg->VREGMAIN.DCDCEN = (enable ? REGULATORS_VREGMAIN_DCDCEN_DCDCEN_Enabled : + REGULATORS_VREGMAIN_DCDCEN_DCDCEN_Disabled) + << REGULATORS_VREGMAIN_DCDCEN_DCDCEN_Pos; +#endif + break; + +#if NRF_REGULATORS_HAS_VREG_HIGH + case NRF_REGULATORS_VREG_HIGH: + p_reg->VREGH.DCDCEN = (enable ? REGULATORS_VREGH_DCDCEN_DCDCEN_Enabled : + REGULATORS_VREGH_DCDCEN_DCDCEN_Disabled) + << REGULATORS_VREGH_DCDCEN_DCDCEN_Pos; + break; #endif + +#if NRF_REGULATORS_HAS_VREG_MEDIUM + case NRF_REGULATORS_VREG_MEDIUM: + p_reg->VREGM.ENABLE = (enable ? REGULATORS_VREGM_ENABLE_ENABLE_Enabled : + REGULATORS_VREGM_ENABLE_ENABLE_Disabled) + << REGULATORS_VREGM_ENABLE_ENABLE_Pos; + break; +#endif + +#if NRF_REGULATORS_HAS_VREG_RADIO + case NRF_REGULATORS_VREG_RADIO: + p_reg->VREGRADIO.DCDCEN = (enable ? REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Enabled : + REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Disabled) + << REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Pos; + break; +#endif + + default: + NRFX_ASSERT(false); + break; + } +} + +NRF_STATIC_INLINE bool nrf_regulators_vreg_enable_check(NRF_REGULATORS_Type const * p_reg, + nrf_regulators_vreg_t regulator) +{ + switch (regulator) + { + case NRF_REGULATORS_VREG_MAIN: +#if defined(REGULATORS_DCDCEN_DCDCEN_Msk) + return (p_reg->DCDCEN >> REGULATORS_DCDCEN_DCDCEN_Pos) == + REGULATORS_DCDCEN_DCDCEN_Enabled; +#elif defined(REGULATORS_VREGMAIN_DCDCEN_VAL_Msk) + return (p_reg->VREGMAIN.DCDCEN >> REGULATORS_VREGMAIN_DCDCEN_VAL_Pos) == + REGULATORS_VREGMAIN_DCDCEN_VAL_Enabled; +#else + return (p_reg->VREGMAIN.DCDCEN >> REGULATORS_VREGMAIN_DCDCEN_DCDCEN_Pos) == + REGULATORS_VREGMAIN_DCDCEN_DCDCEN_Enabled; +#endif + +#if NRF_REGULATORS_HAS_VREG_HIGH + case NRF_REGULATORS_VREG_HIGH: + return (p_reg->VREGH.DCDCEN >> REGULATORS_VREGH_DCDCEN_DCDCEN_Pos) == + REGULATORS_VREGH_DCDCEN_DCDCEN_Enabled; +#endif + +#if NRF_REGULATORS_HAS_VREG_MEDIUM + case NRF_REGULATORS_VREG_MEDIUM: + return (p_reg->VREGM.ENABLE >> REGULATORS_VREGM_ENABLE_ENABLE_Pos) == + REGULATORS_VREGM_ENABLE_ENABLE_Enabled; +#endif + +#if NRF_REGULATORS_HAS_VREG_RADIO + case NRF_REGULATORS_VREG_RADIO: + return (p_reg->VREGRADIO.DCDCEN >> REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Pos) == + REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Enabled; +#endif + + default: + NRFX_ASSERT(false); + return false; + } } NRF_STATIC_INLINE void nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg) @@ -254,82 +430,88 @@ NRF_STATIC_INLINE void nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg) } } -#if NRF_REGULATORS_HAS_MAINREGSTATUS +#if NRF_REGULATORS_HAS_MAIN_STATUS NRF_STATIC_INLINE -nrf_regulators_mainregstatus_t nrf_regulators_mainregstatus_get(NRF_REGULATORS_Type const * p_reg) +nrf_regulators_main_status_t nrf_regulators_main_status_get(NRF_REGULATORS_Type const * p_reg) { - return (nrf_regulators_mainregstatus_t)p_reg->MAINREGSTATUS; + return (nrf_regulators_main_status_t)p_reg->MAINREGSTATUS; } #endif -#if NRF_REGULATORS_HAS_POFCON -NRF_STATIC_INLINE void nrf_regulators_pofcon_set(NRF_REGULATORS_Type * p_reg, - bool enable, - nrf_regulators_pof_thr_t thr) +#if NRF_REGULATORS_HAS_POF +NRF_STATIC_INLINE void nrf_regulators_pof_config_set(NRF_REGULATORS_Type * p_reg, + nrf_regulators_pof_config_t const * p_config) { -#if NRF_REGULATORS_HAS_POFCON_VDDH - uint32_t pofcon = p_reg->POFCON; - pofcon &= ~(REGULATORS_POFCON_THRESHOLD_Msk | REGULATORS_POFCON_POF_Msk); - pofcon |= -#else // NRF_REGULATORS_HAS_POFCON_VDDH - p_reg->POFCON = -#endif - (((uint32_t)thr) << REGULATORS_POFCON_THRESHOLD_Pos) | - (enable ? - (REGULATORS_POFCON_POF_Enabled << REGULATORS_POFCON_POF_Pos) - : - (REGULATORS_POFCON_POF_Disabled << REGULATORS_POFCON_POF_Pos)); -#if NRF_REGULATORS_HAS_POFCON_VDDH - p_reg->POFCON = pofcon; + NRFX_ASSERT(p_config); + + p_reg->POFCON = ((p_config->enable ? REGULATORS_POFCON_POF_Enabled : + REGULATORS_POFCON_POF_Disabled) << REGULATORS_POFCON_POF_Pos) | + (((uint32_t)p_config->thr) << REGULATORS_POFCON_THRESHOLD_Pos) | +#if NRF_REGULATORS_HAS_POF_VDDH + (((uint32_t)p_config->thr_vddh) << REGULATORS_POFCON_THRESHOLDVDDH_Pos) | +#endif +#if NRF_REGULATORS_HAS_POF_WARN_DISABLE + ((p_config->warn_disable ? REGULATORS_POFCON_EVENTDISABLE_Disabled : + REGULATORS_POFCON_EVENTDISABLE_Enabled) + << REGULATORS_POFCON_EVENTDISABLE_Pos) | #endif + 0; } -NRF_STATIC_INLINE -nrf_regulators_pof_thr_t nrf_regulators_pofcon_get(NRF_REGULATORS_Type const * p_reg, - bool * p_enabled) +NRF_STATIC_INLINE void nrf_regulators_pof_config_get(NRF_REGULATORS_Type const * p_reg, + nrf_regulators_pof_config_t * p_config) { - uint32_t pofcon = p_reg->POFCON; - if (NULL != p_enabled) - { - (*p_enabled) = ((pofcon & REGULATORS_POFCON_POF_Msk) >> REGULATORS_POFCON_POF_Pos) - == REGULATORS_POFCON_POF_Enabled; - } - return (nrf_regulators_pof_thr_t)((pofcon & REGULATORS_POFCON_THRESHOLD_Msk) >> - REGULATORS_POFCON_THRESHOLD_Pos); + NRFX_ASSERT(p_config); + + p_config->enable = ((p_reg->POFCON & REGULATORS_POFCON_POF_Msk) >> REGULATORS_POFCON_POF_Pos) + == REGULATORS_POFCON_POF_Enabled; + + p_config->thr = (nrf_regulators_pof_thr_t)((p_reg->POFCON & REGULATORS_POFCON_THRESHOLD_Msk) + >> REGULATORS_POFCON_THRESHOLD_Pos); + + +#if NRF_REGULATORS_HAS_POF_VDDH + p_config->thr_vddh = (nrf_regulators_pof_thr_vddh_t)((p_reg->POFCON & + REGULATORS_POFCON_THRESHOLDVDDH_Msk) + >> REGULATORS_POFCON_THRESHOLDVDDH_Pos); +#endif + +#if NRF_REGULATORS_HAS_POF_WARN_DISABLE + p_config->warn_disable = ((p_reg->POFCON & REGULATORS_POFCON_EVENTDISABLE_Msk) + >> REGULATORS_POFCON_EVENTDISABLE_Pos) + == REGULATORS_POFCON_EVENTDISABLE_Disabled; +#endif } -#endif // NRF_REGULATORS_HAS_POFCON +#endif // NRF_REGULATORS_HAS_POF -#if NRF_REGULATORS_HAS_POFCON_VDDH -NRF_STATIC_INLINE void nrf_regulators_pofcon_vddh_set(NRF_REGULATORS_Type * p_reg, - nrf_regulators_pof_thrvddh_t thr) +#if NRF_REGULATORS_HAS_POF_STATUS +NRF_STATIC_INLINE bool nrf_regulators_pof_below_thr_check(NRF_REGULATORS_Type const * p_reg) { - uint32_t pofcon = p_reg->POFCON; - pofcon &= ~REGULATORS_POFCON_THRESHOLDVDDH_Msk; - pofcon |= (((uint32_t)thr) << REGULATORS_POFCON_THRESHOLDVDDH_Pos); - p_reg->POFCON = pofcon; + return (p_reg->POFSTAT & REGULATORS_POFSTAT_COMPARATOR_Msk) >> REGULATORS_POFSTAT_COMPARATOR_Pos + == REGULATORS_POFSTAT_COMPARATOR_Below; } +#endif -NRF_STATIC_INLINE -nrf_regulators_pof_thrvddh_t nrf_regulators_pofcon_vddh_get(NRF_REGULATORS_Type const * p_reg) +#if NRF_REGULATORS_HAS_TRIM +NRF_STATIC_INLINE void nrf_regulators_elv_mode_allow_set(NRF_REGULATORS_Type * p_reg, + uint32_t mask) { - return (nrf_regulators_pof_thrvddh_t)((p_reg->POFCON & REGULATORS_POFCON_THRESHOLDVDDH_Msk) >> - REGULATORS_POFCON_THRESHOLDVDDH_Pos); + p_reg->TRIM = ((p_reg->TRIM & ~NRF_REGULATORS_ELV_MODE_ALL_MASK) | + (mask & NRF_REGULATORS_ELV_MODE_ALL_MASK)); } -#endif // NRF_REGULATORS_HAS_POFCON_VDDH -#if NRF_REGULATORS_HAS_DCDCEN_VDDH -NRF_STATIC_INLINE void nrf_regulators_dcdcen_vddh_set(NRF_REGULATORS_Type * p_reg, bool enable) +NRF_STATIC_INLINE uint32_t nrf_regulators_elv_mode_allow_get(NRF_REGULATORS_Type const * p_reg) { - p_reg->VREGH.DCDCEN = (enable) ? REGULATORS_VREGH_DCDCEN_DCDCEN_Enabled : - REGULATORS_VREGH_DCDCEN_DCDCEN_Disabled; + return p_reg->TRIM & NRF_REGULATORS_ELV_MODE_ALL_MASK; } -#endif +#endif // NRF_REGULATORS_HAS_TRIM -#if NRF_REGULATORS_HAS_DCDCEN_RADIO -NRF_STATIC_INLINE void nrf_regulators_dcdcen_radio_set(NRF_REGULATORS_Type * p_reg, bool enable) +#if NRF_REGULATORS_HAS_INDUCTOR_DET +NRF_STATIC_INLINE bool nrf_regulators_inductor_check(NRF_REGULATORS_Type const * p_reg) { - p_reg->VREGRADIO.DCDCEN = (enable) ? REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Enabled : - REGULATORS_VREGRADIO_DCDCEN_DCDCEN_Disabled; + return (p_reg->VREGMAIN.INDUCTORDET & REGULATORS_VREGMAIN_INDUCTORDET_DETECTED_Msk) + >> REGULATORS_VREGMAIN_INDUCTORDET_DETECTED_Pos + == REGULATORS_VREGMAIN_INDUCTORDET_DETECTED_InductorDetected; } #endif diff --git a/hal/nrf_reset.h b/hal/nrf_reset.h index b7950c075..58ec48f18 100644 --- a/hal/nrf_reset.h +++ b/hal/nrf_reset.h @@ -62,6 +62,76 @@ extern "C" { #define NRF_RESET_HAS_APPLICATION 0 #endif +#if defined(RESET_RESETREAS_VBUS_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether VBUS reset is present. */ +#define NRF_RESET_HAS_VBUS_RESET 1 +#else +#define NRF_RESET_HAS_VBUS_RESET 0 +#endif + +#if defined(RESET_RESETREAS_CTRLAP_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether CTRAP reset is present. */ +#define NRF_RESET_HAS_CTRLAP_RESET 1 +#else +#define NRF_RESET_HAS_CTRLAP_RESET 0 +#endif + +#if defined(RESET_RESETREAS_CTRLAPSOFT_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether CTRAPSOFT reset is present. */ +#define NRF_RESET_HAS_CTRLAPSOFT_RESET 1 +#else +#define NRF_RESET_HAS_CTRLAPSOFT_RESET 0 +#endif + +#if defined(RESET_RESETREAS_CTRLAPHARD_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether CTRAPHARD reset is present. */ +#define NRF_RESET_HAS_CTRLAPHARD_RESET 1 +#else +#define NRF_RESET_HAS_CTRLAPHARD_RESET 0 +#endif + +#if defined(RESET_RESETREAS_CTRLAPPIN_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether CTRAPPIN reset is present. */ +#define NRF_RESET_HAS_CTRLAPPIN_RESET 1 +#else +#define NRF_RESET_HAS_CTRLAPPIN_RESET 0 +#endif + +#if defined(RESET_RESETREAS_LPCOMP_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether LPCOMP reset is present. */ +#define NRF_RESET_HAS_LPCOMP_RESET 1 +#else +#define NRF_RESET_HAS_LPCOMP_RESET 0 +#endif + +#if defined(RESET_RESETREAS_LLOCKUP_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether LLOCKUP reset is present. */ +#define NRF_RESET_HAS_LLOCKUP_RESET 1 +#else +#define NRF_RESET_HAS_LLOCKUP_RESET 0 +#endif + +#if defined(RESET_RESETREAS_LDOG_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether LDOG reset is present. */ +#define NRF_RESET_HAS_LDOG_RESET 1 +#else +#define NRF_RESET_HAS_LDOG_RESET 0 +#endif + +#if defined(RESET_RESETREAS_MFORCEOFF_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether MFORCEOFF reset is present. */ +#define NRF_RESET_HAS_MFORCEOFF_RESET 1 +#else +#define NRF_RESET_HAS_MFORCEOFF_RESET 0 +#endif + +#if defined(RESET_RESETREAS_GRTC_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether GRTC reset is present. */ +#define NRF_RESET_HAS_GRTC_RESET 1 +#else +#define NRF_RESET_HAS_GRTC_RESET 0 +#endif + /** @brief Reset reason bit masks. */ typedef enum { @@ -73,45 +143,42 @@ typedef enum NRF_RESET_RESETREAS_DIF_MASK = RESET_RESETREAS_DIF_Msk, ///< Bit mask of DIF field. NRF_RESET_RESETREAS_NFC_MASK = RESET_RESETREAS_NFC_Msk, ///< Bit mask of NFC field. NRF_RESET_RESETREAS_DOG1_MASK = RESET_RESETREAS_DOG1_Msk, ///< Bit mask of DOG1 field. -#if defined(RESET_RESETREAS_CTRLAPSOFT_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_CTRLAPSOFT_RESET NRF_RESET_RESETREAS_CTRLAPSOFT_MASK = RESET_RESETREAS_CTRLAPSOFT_Msk, ///< Bit mask of CTRLAPSOFT field. #endif -#if defined(RESET_RESETREAS_CTRLAPHARD_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_CTRLAPHARD_RESET NRF_RESET_RESETREAS_CTRLAPHARD_MASK = RESET_RESETREAS_CTRLAPHARD_Msk, ///< Bit mask of CTRLAPHARD field. #endif -#if defined(RESET_RESETREAS_CTRLAPPIN_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_CTRLAPPIN_RESET NRF_RESET_RESETREAS_CTRLAPPIN_MASK = RESET_RESETREAS_CTRLAPPIN_Msk, ///< Bit mask of CTRLAPPIN field. #endif -#if defined(RESET_RESETREAS_CTRLAP_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_CTRLAP_RESET NRF_RESET_RESETREAS_CTRLAP_MASK = RESET_RESETREAS_CTRLAP_Msk, ///< Bit mask of CTRLAP field. #endif -#if defined(RESET_RESETREAS_LPCOMP_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_LPCOMP_RESET NRF_RESET_RESETREAS_LPCOMP_MASK = RESET_RESETREAS_LPCOMP_Msk, ///< Bit mask of LPCOMP field. #endif #if NRF_RESET_HAS_NETWORK NRF_RESET_RESETREAS_LSREQ_MASK = RESET_RESETREAS_LSREQ_Msk, ///< Bit mask of LSREQ field. #endif -#if defined(RESET_RESETREAS_LLOCKUP_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_LLOCKUP_RESET NRF_RESET_RESETREAS_LLOCKUP_MASK = RESET_RESETREAS_LLOCKUP_Msk, ///< Bit mask of LLOCKUP field. #endif -#if defined(RESET_RESETREAS_LDOG_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_LDOG_RESET NRF_RESET_RESETREAS_LDOG_MASK = RESET_RESETREAS_LDOG_Msk, ///< Bit mask of LDOG field. #endif -#if defined(RESET_RESETREAS_MFORCEOFF_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_MFORCEOFF_RESET NRF_RESET_RESETREAS_MFORCEOFF_MASK = RESET_RESETREAS_MFORCEOFF_Msk, ///< Bit mask of MFORCEOFF field. #endif -#if defined(RESET_RESETREAS_GRTC_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_GRTC_RESET NRF_RESET_RESETREAS_GRTC_MASK = RESET_RESETREAS_GRTC_Msk, ///< Bit mask of GRTC field. #endif -#if defined(RESET_RESETREAS_VBUS_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_RESET_HAS_VBUS_RESET NRF_RESET_RESETREAS_VBUS_MASK = RESET_RESETREAS_VBUS_Msk, ///< Bit mask of VBUS field. #endif #if NRF_RESET_HAS_NETWORK NRF_RESET_RESETREAS_LCTRLAP_MASK = RESET_RESETREAS_LCTRLAP_Msk, ///< Bit mask of LCTRLAP field. #endif -#if defined(RESET_RESETREAS_VMON_Msk) || defined(__NRFX_DOXYGEN__) - NRF_RESET_RESETREAS_VMON_MASK = RESET_RESETREAS_VMON_Msk, ///< Bit mask of VMON field. -#endif #if defined(NRF_RESET_RESETREAS_EXT) NRF_RESET_RESETREAS_EXT #endif diff --git a/hal/nrf_rtc.h b/hal/nrf_rtc.h index 655212d11..67df25ea5 100644 --- a/hal/nrf_rtc.h +++ b/hal/nrf_rtc.h @@ -54,7 +54,7 @@ extern "C" { * * @return Pointer to the structure of registers of the RTC peripheral. */ -#define NRF_RTC_INST_GET(idx) NRFX_CONCAT_2(NRF_RTC, idx) +#define NRF_RTC_INST_GET(idx) NRFX_CONCAT(NRF_, RTC, idx) /** @brief Macro for getting the number of compare channels available in a given RTC instance. */ #define NRF_RTC_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(RTC, id, _CC_NUM) diff --git a/hal/nrf_saadc.h b/hal/nrf_saadc.h index 0e5bdb73d..3f759d56a 100644 --- a/hal/nrf_saadc.h +++ b/hal/nrf_saadc.h @@ -122,6 +122,11 @@ extern "C" { #define NRF_SAADC_LIN_CAL_MAX SAADC_TRIM_LINCALCOEFF_VAL_Max #endif +#if !defined(NRF_SAADC_8BIT_SAMPLE_WIDTH) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol specifying width of the 8-bit sample in bits. */ +#define NRF_SAADC_8BIT_SAMPLE_WIDTH 16 +#endif + /** @brief Resolution of the analog-to-digital converter. */ typedef enum { @@ -136,7 +141,7 @@ typedef enum typedef uint32_t nrf_saadc_input_t; /** @brief Symbol specifying disconnected analog input. */ -#define NRF_SAADC_INPUT_DISABLED ((nrf_saadc_input_t)0) +#define NRF_SAADC_INPUT_DISABLED ((nrf_saadc_input_t)UINT32_MAX) #else /** @brief Input selection for the analog-to-digital converter. */ typedef enum @@ -355,8 +360,12 @@ typedef enum NRF_SAADC_LIMIT_HIGH = 1 ///< High limit type. } nrf_saadc_limit_t; +#if NRFX_API_VER_AT_LEAST(3, 2, 0) || defined(__NRFX_DOXYGEN__) /** @brief Type of a single ADC conversion result. */ -typedef int16_t nrf_saadc_value_t; +typedef void nrf_saadc_value_t; +#else +typedef uint16_t nrf_saadc_value_t; +#endif /** @brief Analog-to-digital converter configuration structure. */ typedef struct @@ -619,7 +628,7 @@ NRF_STATIC_INLINE bool nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg); * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] p_buffer Pointer to the result buffer. - * @param[in] size Size of the buffer (in 16-bit samples). + * @param[in] size Size of the buffer (in 8-bit or 16-bit samples). */ NRF_STATIC_INLINE void nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg, nrf_saadc_value_t * p_buffer, @@ -649,7 +658,7 @@ NRF_STATIC_INLINE nrf_saadc_value_t * nrf_saadc_buffer_pointer_get(NRF_SAADC_Typ * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * - * @return Number of 16-bit samples written to the buffer. + * @return Number of 8-bit or 16-bit samples written to the buffer. */ NRF_STATIC_INLINE uint16_t nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg); @@ -789,7 +798,7 @@ NRF_STATIC_INLINE void nrf_saadc_burst_set(NRF_SAADC_Type * p_reg, * * @return Minimum value of the conversion result. */ -NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution); +NRF_STATIC_INLINE int16_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution); /** * @brief Function for getting the maximum value of the conversion result. @@ -800,7 +809,7 @@ NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_min_get(nrf_saadc_resolution * * @return Maximum value of the conversion result. */ -NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution); +NRF_STATIC_INLINE int16_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution); #ifndef NRF_DECLARE_ONLY @@ -879,12 +888,16 @@ NRF_STATIC_INLINE void nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg, nrf_saadc_input_t pseln) { #if NRF_SAADC_HAS_AIN_AS_PIN - p_reg->CH[channel].PSELN = (NRF_PIN_NUMBER_TO_PIN(pseln) << SAADC_CH_PSELP_PIN_Pos) - | (NRF_PIN_NUMBER_TO_PORT(pseln) << SAADC_CH_PSELP_PORT_Pos) - | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos); - p_reg->CH[channel].PSELP = (NRF_PIN_NUMBER_TO_PIN(pselp) << SAADC_CH_PSELP_PIN_Pos) + p_reg->CH[channel].PSELN = (pseln != NRF_SAADC_INPUT_DISABLED) ? + ((NRF_PIN_NUMBER_TO_PIN(pseln) << SAADC_CH_PSELN_PIN_Pos) + | (NRF_PIN_NUMBER_TO_PORT(pseln) << SAADC_CH_PSELN_PORT_Pos) + | (SAADC_CH_PSELN_CONNECT_AnalogInput << SAADC_CH_PSELN_CONNECT_Pos) + ) : 0; + p_reg->CH[channel].PSELP = (pselp != NRF_SAADC_INPUT_DISABLED) ? + ((NRF_PIN_NUMBER_TO_PIN(pselp) << SAADC_CH_PSELP_PIN_Pos) | (NRF_PIN_NUMBER_TO_PORT(pselp) << SAADC_CH_PSELP_PORT_Pos) - | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos); + | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos) + ) : 0; #else p_reg->CH[channel].PSELN = pseln; p_reg->CH[channel].PSELP = pselp; @@ -896,9 +909,11 @@ NRF_STATIC_INLINE void nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg, nrf_saadc_input_t pselp) { #if NRF_SAADC_HAS_AIN_AS_PIN - p_reg->CH[channel].PSELP = (NRF_PIN_NUMBER_TO_PIN(pselp) << SAADC_CH_PSELP_PIN_Pos) + p_reg->CH[channel].PSELP = (pselp != NRF_SAADC_INPUT_DISABLED) ? + ((NRF_PIN_NUMBER_TO_PIN(pselp) << SAADC_CH_PSELP_PIN_Pos) | (NRF_PIN_NUMBER_TO_PORT(pselp) << SAADC_CH_PSELP_PORT_Pos) - | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos); + | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos) + ) : 0; #else p_reg->CH[channel].PSELP = pselp; #endif @@ -967,6 +982,13 @@ NRF_STATIC_INLINE void nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg, nrf_saadc_value_t * p_buffer, uint32_t size) { +#if (NRF_SAADC_8BIT_SAMPLE_WIDTH == 8) + if (nrf_saadc_resolution_get(p_reg) != NRF_SAADC_RESOLUTION_8BIT) + { + size = size * 2; + } +#endif + #if NRF_SAADC_HAS_DMA_REG p_reg->DMA.PTR = (uint32_t)p_buffer; p_reg->DMA.MAXCNT = size; @@ -998,10 +1020,19 @@ NRF_STATIC_INLINE nrf_saadc_value_t * nrf_saadc_buffer_pointer_get(NRF_SAADC_Typ NRF_STATIC_INLINE uint16_t nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg) { #if NRF_SAADC_HAS_DMA_REG - return (uint16_t)p_reg->DMA.AMOUNT; + uint16_t result = (uint16_t)p_reg->DMA.AMOUNT; #else - return (uint16_t)p_reg->RESULT.AMOUNT; + uint16_t result = (uint16_t)p_reg->RESULT.AMOUNT; #endif + +#if (NRF_SAADC_8BIT_SAMPLE_WIDTH == 8) + if (nrf_saadc_resolution_get(p_reg) != NRF_SAADC_RESOLUTION_8BIT) + { + result = result / 2; + } +#endif + + return result; } NRF_STATIC_INLINE void nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg, @@ -1081,7 +1112,7 @@ NRF_STATIC_INLINE void nrf_saadc_channel_init(NRF_SAADC_Type * ((config->gain << SAADC_CH_CONFIG_GAIN_Pos) & SAADC_CH_CONFIG_GAIN_Msk) | ((config->reference << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk) | ((config->acq_time << SAADC_CH_CONFIG_TACQ_Pos) & SAADC_CH_CONFIG_TACQ_Msk) -#if NRF_SAADC_HAS_CH_CONTROL_RES +#if NRF_SAADC_HAS_CH_CONFIG_RES | ((config->resistor_p << SAADC_CH_CONFIG_RESP_Pos) & SAADC_CH_CONFIG_RESP_Msk) | ((config->resistor_n << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk) #endif @@ -1100,7 +1131,7 @@ NRF_STATIC_INLINE void nrf_saadc_burst_set(NRF_SAADC_Type * p_reg, (burst << SAADC_CH_CONFIG_BURST_Pos); } -NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution) +NRF_STATIC_INLINE int16_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution) { uint8_t res_bits = 0; switch (resolution) @@ -1120,10 +1151,10 @@ NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_min_get(nrf_saadc_resolution default: NRFX_ASSERT(false); } - return (nrf_saadc_value_t)(-(1 << res_bits)); + return (int16_t)(-(1 << res_bits)); } -NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution) +NRF_STATIC_INLINE int16_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution) { uint8_t res_bits = 0; switch (resolution) @@ -1143,7 +1174,7 @@ NRF_STATIC_INLINE nrf_saadc_value_t nrf_saadc_value_max_get(nrf_saadc_resolution default: NRFX_ASSERT(false); } - return (nrf_saadc_value_t)((1 << res_bits) - 1); + return (int16_t)((1 << res_bits) - 1); } #endif // NRF_DECLARE_ONLY diff --git a/hal/nrf_spi.h b/hal/nrf_spi.h index ce81a52e5..341b6eebb 100644 --- a/hal/nrf_spi.h +++ b/hal/nrf_spi.h @@ -54,7 +54,7 @@ extern "C" { * * @return Pointer to the structure of registers of the SPI peripheral. */ -#define NRF_SPI_INST_GET(idx) NRFX_CONCAT_2(NRF_SPI, idx) +#define NRF_SPI_INST_GET(idx) NRFX_CONCAT(NRF_, SPI, idx) /** * @brief This value can be used as a parameter for the @ref nrf_spi_pins_set diff --git a/hal/nrf_spim.h b/hal/nrf_spim.h index 1d4e49fc0..8063cbb43 100644 --- a/hal/nrf_spim.h +++ b/hal/nrf_spim.h @@ -54,7 +54,7 @@ extern "C" { * * @return Pointer to the structure of registers of the SPIM peripheral. */ -#define NRF_SPIM_INST_GET(idx) NRFX_CONCAT_2(NRF_SPIM, idx) +#define NRF_SPIM_INST_GET(idx) NRFX_CONCAT(NRF_, SPIM, idx) #if defined(SPIM_FREQUENCY_FREQUENCY_M16) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether 16 MHz clock frequency is available. */ diff --git a/hal/nrf_spis.h b/hal/nrf_spis.h index d301a558c..0b3898085 100644 --- a/hal/nrf_spis.h +++ b/hal/nrf_spis.h @@ -61,7 +61,7 @@ extern "C" { * * @return Pointer to the structure of registers of the SPIS peripheral. */ -#define NRF_SPIS_INST_GET(idx) NRFX_CONCAT_2(NRF_SPIS, idx) +#define NRF_SPIS_INST_GET(idx) NRFX_CONCAT(NRF_, SPIS, idx) /** * @brief This value can be used as a parameter for the @ref nrf_spis_pins_set diff --git a/hal/nrf_temp.h b/hal/nrf_temp.h index 2ead00958..54d7ee540 100644 --- a/hal/nrf_temp.h +++ b/hal/nrf_temp.h @@ -178,6 +178,52 @@ NRF_STATIC_INLINE void nrf_temp_calibration_coeff_set(NRF_TEMP_Type * p_reg, uin NRF_STATIC_INLINE uint32_t nrf_temp_calibration_coeff_get(NRF_TEMP_Type const * p_reg); #endif +#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for setting the subscribe configuration for a given + * TEMP task. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] task Task for which to set the configuration. + * @param[in] channel Channel through which to subscribe events. + */ +NRF_STATIC_INLINE void nrf_temp_subscribe_set(NRF_TEMP_Type * p_reg, + nrf_temp_task_t task, + uint8_t channel); + +/** + * @brief Function for clearing the subscribe configuration for a given + * TEMP task. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] task Task for which to clear the configuration. + */ +NRF_STATIC_INLINE void nrf_temp_subscribe_clear(NRF_TEMP_Type * p_reg, + nrf_temp_task_t task); + +/** + * @brief Function for setting the publish configuration for a given + * TEMP event. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] event Event for which to set the configuration. + * @param[in] channel Channel through which to publish the event. + */ +NRF_STATIC_INLINE void nrf_temp_publish_set(NRF_TEMP_Type * p_reg, + nrf_temp_event_t event, + uint8_t channel); + +/** + * @brief Function for clearing the publish configuration for a given + * TEMP event. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] event Event for which to clear the configuration. + */ +NRF_STATIC_INLINE void nrf_temp_publish_clear(NRF_TEMP_Type * p_reg, + nrf_temp_event_t event); +#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) + #ifndef NRF_DECLARE_ONLY NRF_STATIC_INLINE void nrf_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask) @@ -231,7 +277,7 @@ NRF_STATIC_INLINE int32_t nrf_temp_result_get(NRF_TEMP_Type const * p_reg) /* Apply workaround for the nRF51 series anomaly 28 - TEMP: Negative measured values are not represented correctly. */ if ((raw_measurement & 0x00000200) != 0) { - raw_measurement |= 0xFFFFFC00UL; + raw_measurement |= (int32_t)0xFFFFFC00; } #endif @@ -250,6 +296,36 @@ NRF_STATIC_INLINE uint32_t nrf_temp_calibration_coeff_get(NRF_TEMP_Type const * } #endif +#if defined(DPPI_PRESENT) +NRF_STATIC_INLINE void nrf_temp_subscribe_set(NRF_TEMP_Type * p_reg, + nrf_temp_task_t task, + uint8_t channel) +{ + *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = + ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); +} + +NRF_STATIC_INLINE void nrf_temp_subscribe_clear(NRF_TEMP_Type * p_reg, + nrf_temp_task_t task) +{ + *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0; +} + +NRF_STATIC_INLINE void nrf_temp_publish_set(NRF_TEMP_Type * p_reg, + nrf_temp_event_t event, + uint8_t channel) +{ + *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = + ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); +} + +NRF_STATIC_INLINE void nrf_temp_publish_clear(NRF_TEMP_Type * p_reg, + nrf_temp_event_t event) +{ + *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0; +} +#endif // defined(DPPI_PRESENT) + #endif // NRF_DECLARE_ONLY /** @} */ diff --git a/hal/nrf_timer.h b/hal/nrf_timer.h index 2a74108f1..64541442e 100644 --- a/hal/nrf_timer.h +++ b/hal/nrf_timer.h @@ -54,7 +54,7 @@ extern "C" { * * @return Pointer to the structure of registers of the TIMER peripheral. */ -#define NRF_TIMER_INST_GET(idx) NRFX_CONCAT_2(NRF_TIMER, idx) +#define NRF_TIMER_INST_GET(idx) NRFX_CONCAT(NRF_, TIMER, idx) #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether timer has capture/compare channel 4. */ diff --git a/hal/nrf_twi.h b/hal/nrf_twi.h index 010fae074..75e3b8874 100644 --- a/hal/nrf_twi.h +++ b/hal/nrf_twi.h @@ -54,7 +54,7 @@ extern "C" { * * @return Pointer to the structure of registers of the TWI peripheral. */ -#define NRF_TWI_INST_GET(idx) NRFX_CONCAT_2(NRF_TWI, idx) +#define NRF_TWI_INST_GET(idx) NRFX_CONCAT(NRF_, TWI, idx) /** @brief TWI tasks. */ typedef enum diff --git a/hal/nrf_twim.h b/hal/nrf_twim.h index fbfbc66e2..7c982b59a 100644 --- a/hal/nrf_twim.h +++ b/hal/nrf_twim.h @@ -54,7 +54,7 @@ extern "C" { * * @return Pointer to the structure of registers of the TWIM peripheral. */ -#define NRF_TWIM_INST_GET(idx) NRFX_CONCAT_2(NRF_TWIM, idx) +#define NRF_TWIM_INST_GET(idx) NRFX_CONCAT(NRF_, TWIM, idx) #if defined(TWIM_FREQUENCY_FREQUENCY_K1000) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether 1000 kHz clock frequency is available. */ diff --git a/hal/nrf_twis.h b/hal/nrf_twis.h index ed2a337c2..193ffdc88 100644 --- a/hal/nrf_twis.h +++ b/hal/nrf_twis.h @@ -55,7 +55,7 @@ extern "C" { * * @return Pointer to the structure of registers of the TWIS peripheral. */ -#define NRF_TWIS_INST_GET(idx) NRFX_CONCAT_2(NRF_TWIS, idx) +#define NRF_TWIS_INST_GET(idx) NRFX_CONCAT(NRF_, TWIS, idx) #if defined(TWIS_DMA_RX_PTR_PTR_Msk) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether dedicated DMA register is present. */ @@ -73,69 +73,77 @@ extern "C" { #define NRF_TWIS_HAS_DMA_TASKS_EVENTS 0 #endif +#if defined(TWIS_TXD_LIST_LIST_Msk) || defined(TWIS_RXD_LIST_LIST_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether TX or RX LIST is present. */ +#define NRF_TWIS_HAS_LIST_REG 1 +#else +#define NRF_TWIS_HAS_LIST_REG 0 +#endif + /** @brief TWIS tasks. */ typedef enum { - NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction. */ - NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction. */ - NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction. */ - NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command. */ - NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command. */ + NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), ///< Stop TWIS transaction. + NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), ///< Suspend TWIS transaction. + NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), ///< Resume TWIS transaction. + NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), ///< Prepare the TWIS slave to respond to a write command. + NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) ///< Prepare the TWIS slave to respond to a read command. } nrf_twis_task_t; /** @brief TWIS events. */ typedef enum { - NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped. */ - NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error. */ + NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), ///< TWIS stopped. + NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), ///< TWIS error. #if NRF_TWIS_HAS_DMA_TASKS_EVENTS - NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_DMA.RX.READY), /**< Receive sequence started. */ - NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_DMA.TX.READY), /**< Transmit sequence started. */ + NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_DMA.RX.READY), ///< Receive sequence started. + NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_DMA.TX.READY), ///< Transmit sequence started. #else - NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started. */ - NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started. */ + NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), ///< Receive sequence started. + NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), ///< Transmit sequence started. #endif - NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received. */ - NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received. */ + NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), ///< Write command received. + NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) ///< Read command received. } nrf_twis_event_t; /** @brief TWIS shortcuts. */ typedef enum { - NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task. */ - NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task. */ + NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, ///< Shortcut between WRITE event and SUSPEND task. + NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, ///< Shortcut between READ event and SUSPEND task. } nrf_twis_short_mask_t; /** @brief TWIS interrupts. */ typedef enum { - NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event. */ - NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event. */ + NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, ///< Interrupt on STOPPED event. + NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, ///< Interrupt on ERROR event. #if NRF_TWIS_HAS_DMA_TASKS_EVENTS - NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_DMARXREADY_Msk, /**< Interrupt on RXSTARTED event. */ - NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_DMATXREADY_Msk, /**< Interrupt on TXSTARTED event. */ + NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_DMARXREADY_Msk, ///< Interrupt on RXSTARTED event. + NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_DMATXREADY_Msk, ///< Interrupt on TXSTARTED event. #else - NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event. */ - NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event. */ + NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event. + NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event. #endif - NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event. */ - NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event. */ + NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, ///< Interrupt on WRITE event. + NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, ///< Interrupt on READ event. } nrf_twis_int_mask_t; /** @brief TWIS error source. */ typedef enum { - NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented. */ - NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte. */ - NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented. */ + NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, ///< RX buffer overflow detected, and prevented. + NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, ///< NACK sent after receiving a data byte. + NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk ///< TX buffer over-read detected, and prevented. } nrf_twis_error_t; /** @brief TWIS address matching configuration. */ typedef enum { - NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0]. */ - NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1]. */ - NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching. */ + NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, ///< Enable or disable address matching on ADDRESS[0]. + NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, ///< Enable or disable address matching on ADDRESS[1]. + NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | + TWIS_CONFIG_ADDRESS1_Msk ///< Enable both address matching. } nrf_twis_config_addr_mask_t; /** @@ -173,8 +181,7 @@ NRF_STATIC_INLINE uint32_t nrf_twis_task_address_get(NRF_TWIS_Type const * p_reg * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] event The specified event. */ -NRF_STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg, - nrf_twis_event_t event); +NRF_STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event); /** * @brief Function for retrieving the state of the TWIS event. @@ -185,8 +192,7 @@ NRF_STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg, * @retval true The event has been generated. * @retval false The event has not been generated. */ -NRF_STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg, - nrf_twis_event_t event); +NRF_STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg, nrf_twis_event_t event); /** * @brief Function for getting and clearing the state of the specified event. @@ -199,8 +205,7 @@ NRF_STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg, * @retval true The event was set. * @retval false The event was not set. */ -NRF_STATIC_INLINE bool nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg, - nrf_twis_event_t event); +NRF_STATIC_INLINE bool nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event); /** * @brief Function for returning the address of the specified TWIS event register. @@ -268,8 +273,7 @@ NRF_STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * p_reg, uint32_t mask #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) /** - * @brief Function for setting the subscribe configuration for a given - * TWIS task. + * @brief Function for setting the subscribe configuration for a given TWIS task. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] task Task for which to set the configuration. @@ -286,12 +290,10 @@ NRF_STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg, * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] task Task for which to clear the configuration. */ -NRF_STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg, - nrf_twis_task_t task); +NRF_STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg, nrf_twis_task_t task); /** - * @brief Function for setting the publish configuration for a given - * TWIS event. + * @brief Function for setting the publish configuration for a given TWIS event. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] event Event for which to set the configuration. @@ -302,14 +304,12 @@ NRF_STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type * p_reg, uint8_t channel); /** - * @brief Function for clearing the publish configuration for a given - * TWIS event. + * @brief Function for clearing the publish configuration for a given TWIS event. * * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] event Event for which to clear the configuration. */ -NRF_STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg, - nrf_twis_event_t event); +NRF_STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event); #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) /** @@ -387,6 +387,15 @@ NRF_STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg, uint8_t * p_buf, size_t length); +/** + * @brief Function for getting the receive buffer. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @return Pointer to the receive buffer. + */ +NRF_STATIC_INLINE uint8_t * nrf_twis_rx_buffer_get(NRF_TWIS_Type const * p_reg); + /** * @brief Function that prepares TWIS for receiving * @@ -396,16 +405,14 @@ NRF_STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg, * @param[in] p_buf Pointer to the buffer for received data. * @param[in] length Maximum number of data bytes to receive. */ -NRF_STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg, - uint8_t * p_buf, - size_t length); +NRF_STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg, uint8_t * p_buf, size_t length); /** * @brief Function for getting number of bytes received in the last transaction. * * @param[in] p_reg TWIS instance. * - * @return Amount of bytes received. + * @return Amount of received bytes. * */ NRF_STATIC_INLINE size_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * p_reg); @@ -420,6 +427,15 @@ NRF_STATIC_INLINE void nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg, uint8_t const * p_buf, size_t length); +/** + * @brief Function for getting the transmit buffer. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @return Pointer to the transmit buffer. + */ +NRF_STATIC_INLINE uint8_t * nrf_twis_tx_buffer_get(NRF_TWIS_Type const * p_reg); + /** * @brief Function for preparing TWIS for transmitting. * @@ -489,8 +505,8 @@ NRF_STATIC_INLINE void nrf_twis_config_address_set(NRF_TWIS_Type * p * * @return Mask of address indexes of what device should answer to. */ -NRF_STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get( - NRF_TWIS_Type const * p_reg); +NRF_STATIC_INLINE +nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * p_reg); /** * @brief Function for setting the over-read character. @@ -499,8 +515,7 @@ NRF_STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get( * @param[in] orc Over-read character. Character clocked out in case of * over-read of the TXD buffer. */ -NRF_STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg, - uint8_t orc); +NRF_STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg, uint8_t orc); /** * @brief Function for setting the over-read character. @@ -511,7 +526,7 @@ NRF_STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg, */ NRF_STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * p_reg); -#if defined(TWIS_TXD_LIST_LIST_Msk) || defined(__NRFX_DOXYGEN__) +#if NRF_TWIS_HAS_LIST_REG /** * @brief Function for enabling the TX list feature. * @@ -525,9 +540,7 @@ NRF_STATIC_INLINE void nrf_twis_tx_list_enable(NRF_TWIS_Type * p_reg); * @param[in] p_reg Pointer to the structure of registers of the peripheral. */ NRF_STATIC_INLINE void nrf_twis_tx_list_disable(NRF_TWIS_Type * p_reg); -#endif // defined(TWIS_TXD_LIST_LIST_Msk) || defined(__NRFX_DOXYGEN__) -#if defined(TWIS_RXD_LIST_LIST_Msk) || defined(__NRFX_DOXYGEN__) /** * @brief Function for enabling the RX list feature. * @@ -541,7 +554,7 @@ NRF_STATIC_INLINE void nrf_twis_rx_list_enable(NRF_TWIS_Type * p_reg); * @param[in] p_reg Pointer to the structure of registers of the peripheral. */ NRF_STATIC_INLINE void nrf_twis_rx_list_disable(NRF_TWIS_Type * p_reg); -#endif // defined(TWIS_RXD_LIST_LIST_Msk) || defined(__NRFX_DOXYGEN__) +#endif /** @} */ /* End of nrf_twis_hal */ @@ -673,8 +686,7 @@ NRF_STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg, ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); } -NRF_STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg, - nrf_twis_task_t task) +NRF_STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg, nrf_twis_task_t task) { *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0; } @@ -687,8 +699,7 @@ NRF_STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type * p_reg, ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); } -NRF_STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg, - nrf_twis_event_t event) +NRF_STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event) { *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0; } @@ -732,9 +743,7 @@ NRF_STATIC_INLINE uint32_t nrf_twis_sda_pin_get(NRF_TWIS_Type const * p_reg) return p_reg->PSEL.SDA; } -NRF_STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg, - uint8_t * p_buf, - size_t length) +NRF_STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg, uint8_t * p_buf, size_t length) { #if NRF_TWIS_HAS_DMA_REG p_reg->DMA.RX.PTR = (uint32_t)p_buf; @@ -745,9 +754,16 @@ NRF_STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg, #endif } -NRF_STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg, - uint8_t * p_buf, - size_t length) +NRF_STATIC_INLINE uint8_t * nrf_twis_rx_buffer_get(NRF_TWIS_Type const * p_reg) +{ +#if NRF_TWIS_HAS_DMA_REG + return (uint8_t *)p_reg->DMA.RX.PTR; +#else + return (uint8_t *)p_reg->RXD.PTR; +#endif +} + +NRF_STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg, uint8_t * p_buf, size_t length) { nrf_twis_rx_buffer_set(p_reg, p_buf, length); nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX); @@ -775,6 +791,15 @@ NRF_STATIC_INLINE void nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg, #endif } +NRF_STATIC_INLINE uint8_t * nrf_twis_tx_buffer_get(NRF_TWIS_Type const * p_reg) +{ +#if NRF_TWIS_HAS_DMA_REG + return (uint8_t *)p_reg->DMA.TX.PTR; +#else + return (uint8_t *)p_reg->TXD.PTR; +#endif +} + NRF_STATIC_INLINE void nrf_twis_tx_prepare(NRF_TWIS_Type * p_reg, uint8_t const * p_buf, size_t length) @@ -796,7 +821,8 @@ NRF_STATIC_INLINE void nrf_twis_address_set(NRF_TWIS_Type * p_reg, uint_fast8_t n, nrf_twis_address_t addr) { - p_reg->ADDRESS[n] = addr; + NRFX_ASSERT((uint32_t)addr <= TWIS_ADDRESS_ADDRESS_Msk); + p_reg->ADDRESS[n] = (uint32_t)addr; } NRF_STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(NRF_TWIS_Type const * p_reg, @@ -804,17 +830,18 @@ NRF_STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(NRF_TWIS_Type const * { return (nrf_twis_address_t)p_reg->ADDRESS[n]; } + NRF_STATIC_INLINE void nrf_twis_config_address_set(NRF_TWIS_Type * p_reg, nrf_twis_config_addr_mask_t addr_mask) { - /* This is the only configuration in TWIS - just write it without masking */ - p_reg->CONFIG = addr_mask; + /* This is the only configuration in TWIS - just write it without masking. */ + p_reg->CONFIG = (uint32_t)addr_mask; } -NRF_STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get( - NRF_TWIS_Type const * p_reg) +NRF_STATIC_INLINE +nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * p_reg) { - return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk); + return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & NRF_TWIS_CONFIG_ADDRESS01_MASK); } NRF_STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg, uint8_t orc) @@ -827,7 +854,7 @@ NRF_STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * p_reg) return (uint8_t)p_reg->ORC; } -#if defined(TWIS_TXD_LIST_LIST_Msk) +#if NRF_TWIS_HAS_LIST_REG NRF_STATIC_INLINE void nrf_twis_tx_list_enable(NRF_TWIS_Type * p_reg) { p_reg->TXD.LIST = TWIS_TXD_LIST_LIST_ArrayList << TWIS_TXD_LIST_LIST_Pos; @@ -838,9 +865,6 @@ NRF_STATIC_INLINE void nrf_twis_tx_list_disable(NRF_TWIS_Type * p_reg) p_reg->TXD.LIST = TWIS_TXD_LIST_LIST_Disabled << TWIS_TXD_LIST_LIST_Pos; } -#endif // defined(TWIS_TXD_LIST_LIST_Msk) - -#if defined(TWIS_RXD_LIST_LIST_Msk) NRF_STATIC_INLINE void nrf_twis_rx_list_enable(NRF_TWIS_Type * p_reg) { p_reg->RXD.LIST = TWIS_RXD_LIST_LIST_ArrayList << TWIS_RXD_LIST_LIST_Pos; @@ -850,7 +874,7 @@ NRF_STATIC_INLINE void nrf_twis_rx_list_disable(NRF_TWIS_Type * p_reg) { p_reg->RXD.LIST = TWIS_RXD_LIST_LIST_Disabled << TWIS_RXD_LIST_LIST_Pos; } -#endif // defined(TWIS_RXD_LIST_LIST_Msk) +#endif #endif /* NRF_DECLARE_ONLY */ diff --git a/hal/nrf_uarte.h b/hal/nrf_uarte.h index 1aecb3a2c..1427e9867 100644 --- a/hal/nrf_uarte.h +++ b/hal/nrf_uarte.h @@ -56,7 +56,7 @@ extern "C" { * * @return Pointer to the structure of registers of the UARTE peripheral. */ -#define NRF_UARTE_INST_GET(idx) NRFX_CONCAT_2(NRF_UARTE, idx) +#define NRF_UARTE_INST_GET(idx) NRFX_CONCAT(NRF_, UARTE, idx) #if defined(UARTE_DMA_RX_PTR_PTR_Msk) || defined(__NRFX_DOXYGEN__) /** @brief Symbol indicating whether dedicated DMA register is present. */ @@ -73,6 +73,13 @@ extern "C" { #define NRF_UARTE_HAS_DMA_TASKS_EVENTS 0 #endif +#if defined(UARTE_SHORTS_ENDTX_STOPTX_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether UARTE ENDTX_STOPTX shortcut is present. */ +#define NRF_UARTE_HAS_ENDTX_STOPTX_SHORT 1 +#else +#define NRF_UARTE_HAS_ENDTX_STOPTX_SHORT 0 +#endif + /** @brief UARTE tasks. */ typedef enum { @@ -117,7 +124,10 @@ typedef enum typedef enum { NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk, ///< Shortcut between ENDRX event and STARTRX task. - NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk ///< Shortcut between ENDRX event and STOPRX task. + NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk, ///< Shortcut between ENDRX event and STOPRX task. +#if NRF_UARTE_HAS_ENDTX_STOPTX_SHORT + NRF_UARTE_SHORT_ENDTX_STOPTX = UARTE_SHORTS_ENDTX_STOPTX_Msk ///< Shortcut between ENDTX event and STOPTX task. +#endif } nrf_uarte_short_t; @@ -252,6 +262,24 @@ NRF_STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type const * p_reg, NRF_STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type const * p_reg, nrf_uarte_event_t event); +/** + * @brief Function for configuring UARTE shortcuts. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] mask Shortcuts to be set. + */ +NRF_STATIC_INLINE void nrf_uarte_shorts_set(NRF_UARTE_Type * p_reg, uint32_t mask); + +/** + * @brief Function for getting UARTE shortcuts. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] mask Shortcuts to be checked. + * + * @return Mask of requested shortcuts which were enabled. + */ +NRF_STATIC_INLINE uint32_t nrf_uarte_shorts_get(NRF_UARTE_Type * p_reg, uint32_t mask); + /** * @brief Function for enabling UARTE shortcuts. * @@ -363,6 +391,16 @@ NRF_STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg); */ NRF_STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg); +/** + * @brief Function for checking if the UARTE is enabled. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @retval true The UARTE is enabled. + * @retval false The UARTE is not enabled. + */ +NRF_STATIC_INLINE bool nrf_uarte_enable_check(NRF_UARTE_Type const * p_reg); + /** * @brief Function for configuring TX/RX pins. * @@ -483,6 +521,15 @@ NRF_STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, uint8_t const * p_buffer, size_t length); +/** + * @brief Function for getting the transmit buffer address. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @return Pointer to the transmit buffer. + */ +NRF_STATIC_INLINE uint8_t const * nrf_uarte_tx_buffer_get(NRF_UARTE_Type * p_reg); + /** * @brief Function for getting number of bytes transmitted in the last transaction. * @@ -503,6 +550,15 @@ NRF_STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg, uint8_t * p_buffer, size_t length); +/** + * @brief Function for getting the reception buffer address. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * + * @return Pointer to the reception buffer. + */ +NRF_STATIC_INLINE uint8_t * nrf_uarte_rx_buffer_get(NRF_UARTE_Type * p_reg); + /** * @brief Function for getting number of bytes received in the last transaction. * @@ -531,6 +587,16 @@ NRF_STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type const * p_ return (uint32_t)((uint8_t *)p_reg + (uint32_t)event); } +NRF_STATIC_INLINE void nrf_uarte_shorts_set(NRF_UARTE_Type * p_reg, uint32_t mask) +{ + p_reg->SHORTS = mask; +} + +NRF_STATIC_INLINE uint32_t nrf_uarte_shorts_get(NRF_UARTE_Type * p_reg, uint32_t mask) +{ + return p_reg->SHORTS & mask; +} + NRF_STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t mask) { p_reg->SHORTS |= mask; @@ -603,6 +669,11 @@ NRF_STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg) p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled; } +NRF_STATIC_INLINE bool nrf_uarte_enable_check(NRF_UARTE_Type const * p_reg) +{ + return p_reg->ENABLE == UARTE_ENABLE_ENABLE_Enabled; +} + NRF_STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd) @@ -691,6 +762,15 @@ NRF_STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, #endif } +NRF_STATIC_INLINE uint8_t const * nrf_uarte_tx_buffer_get(NRF_UARTE_Type * p_reg) +{ +#if NRF_UARTE_HAS_DMA_REG + return (uint8_t const *)p_reg->DMA.TX.PTR; +#else + return (uint8_t const *)p_reg->TXD.PTR; +#endif +} + NRF_STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type const * p_reg) { #if NRF_UARTE_HAS_DMA_REG @@ -713,6 +793,15 @@ NRF_STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg, #endif } +NRF_STATIC_INLINE uint8_t * nrf_uarte_rx_buffer_get(NRF_UARTE_Type * p_reg) +{ +#if NRF_UARTE_HAS_DMA_REG + return (uint8_t *)p_reg->DMA.RX.PTR; +#else + return (uint8_t *)p_reg->RXD.PTR; +#endif +} + NRF_STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type const * p_reg) { #if NRF_UARTE_HAS_DMA_REG diff --git a/hal/nrf_usbd.h b/hal/nrf_usbd.h index c42cf4caf..d66dfa7c4 100644 --- a/hal/nrf_usbd.h +++ b/hal/nrf_usbd.h @@ -1185,19 +1185,19 @@ NRF_STATIC_INLINE uint8_t nrf_usbd_setup_brequest_get(NRF_USBD_Type const * p_re NRF_STATIC_INLINE uint16_t nrf_usbd_setup_wvalue_get(NRF_USBD_Type const * p_reg) { - const uint16_t val = p_reg->WVALUEL; + const uint16_t val = (uint16_t)p_reg->WVALUEL; return (uint16_t)(val | ((p_reg->WVALUEH) << 8)); } NRF_STATIC_INLINE uint16_t nrf_usbd_setup_windex_get(NRF_USBD_Type const * p_reg) { - const uint16_t val = p_reg->WINDEXL; + const uint16_t val = (uint16_t)p_reg->WINDEXL; return (uint16_t)(val | ((p_reg->WINDEXH) << 8)); } NRF_STATIC_INLINE uint16_t nrf_usbd_setup_wlength_get(NRF_USBD_Type const * p_reg) { - const uint16_t val = p_reg->WLENGTHL; + const uint16_t val = (uint16_t)p_reg->WLENGTHL; return (uint16_t)(val | ((p_reg->WLENGTHH) << 8)); } @@ -1274,7 +1274,7 @@ NRF_STATIC_INLINE void nrf_usbd_dtoggle_set(NRF_USBD_Type * p_reg, NRFX_ASSERT(NRF_USBD_EP_VALIDATE(ep)); NRFX_ASSERT(!NRF_USBD_EPISO_CHECK(ep)); p_reg->DTOGGLE = ep | (NRF_USBD_DTOGGLE_NOP << USBD_DTOGGLE_VALUE_Pos); - p_reg->DTOGGLE = ep | (op << USBD_DTOGGLE_VALUE_Pos); + p_reg->DTOGGLE = ep | ((uint32_t)op << USBD_DTOGGLE_VALUE_Pos); (void) p_reg->DTOGGLE; } diff --git a/hal/nrf_vmc.h b/hal/nrf_vmc.h index 1f96ea829..0af92eabc 100644 --- a/hal/nrf_vmc.h +++ b/hal/nrf_vmc.h @@ -40,6 +40,20 @@ extern "C" { #endif +/** + * Value representing number of RAM sections. + * + * This symbol is needed to determine elements in enumerators. + */ +#if defined(NRF5340_XXAA_APPLICATION) + #define VMC_RAM_SECTION_COUNT 16 +#elif defined(NRF5340_XXAA_NETWORK) || defined(NRF9160_XXAA) || defined(NRF9120_XXAA) + #define VMC_RAM_SECTION_COUNT 4 + #if !defined(VMC_FEATURE_RAM_REGISTERS_COUNT) + #define VMC_FEATURE_RAM_REGISTERS_COUNT 4 + #endif +#endif + /** * @defgroup nrf_vmc_hal VMC HAL * @{ @@ -50,19 +64,47 @@ extern "C" { /** @brief Power configuration bits for each section in particular RAM block. */ typedef enum { - NRF_VMC_POWER_S0 = VMC_RAM_POWER_S0POWER_Msk, ///< Keep retention on RAM section S0 of the particular RAM block when RAM section is switched off. - NRF_VMC_POWER_S1 = VMC_RAM_POWER_S1POWER_Msk, ///< Keep retention on RAM section S1 of the particular RAM block when RAM section is switched off. - NRF_VMC_POWER_S2 = VMC_RAM_POWER_S2POWER_Msk, ///< Keep retention on RAM section S2 of the particular RAM block when RAM section is switched off. - NRF_VMC_POWER_S3 = VMC_RAM_POWER_S3POWER_Msk, ///< Keep retention on RAM section S3 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S0 = VMC_RAM_POWER_S0POWER_Msk, ///< Keep retention on RAM section S0 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S1 = VMC_RAM_POWER_S1POWER_Msk, ///< Keep retention on RAM section S1 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S2 = VMC_RAM_POWER_S2POWER_Msk, ///< Keep retention on RAM section S2 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S3 = VMC_RAM_POWER_S3POWER_Msk, ///< Keep retention on RAM section S3 of the particular RAM block when RAM section is switched off. +#if (VMC_RAM_SECTION_COUNT > 4) || defined(__NRFX_DOXYGEN__) + NRF_VMC_POWER_S4 = VMC_RAM_POWER_S4POWER_Msk, ///< Keep retention on RAM section S4 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S5 = VMC_RAM_POWER_S5POWER_Msk, ///< Keep retention on RAM section S5 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S6 = VMC_RAM_POWER_S6POWER_Msk, ///< Keep retention on RAM section S6 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S7 = VMC_RAM_POWER_S7POWER_Msk, ///< Keep retention on RAM section S7 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S8 = VMC_RAM_POWER_S8POWER_Msk, ///< Keep retention on RAM section S8 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S9 = VMC_RAM_POWER_S9POWER_Msk, ///< Keep retention on RAM section S9 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S10 = VMC_RAM_POWER_S10POWER_Msk, ///< Keep retention on RAM section S10 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S11 = VMC_RAM_POWER_S11POWER_Msk, ///< Keep retention on RAM section S11 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S12 = VMC_RAM_POWER_S12POWER_Msk, ///< Keep retention on RAM section S12 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S13 = VMC_RAM_POWER_S13POWER_Msk, ///< Keep retention on RAM section S13 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S14 = VMC_RAM_POWER_S14POWER_Msk, ///< Keep retention on RAM section S14 of the particular RAM block when RAM section is switched off. + NRF_VMC_POWER_S15 = VMC_RAM_POWER_S15POWER_Msk, ///< Keep retention on RAM section S15 of the particular RAM block when RAM section is switched off. +#endif } nrf_vmc_power_t; /** @brief Retention configuration bits for each section in particular RAM block. */ typedef enum { - NRF_VMC_RETENTION_S0 = VMC_RAM_POWER_S0RETENTION_Msk, ///< Keep RAM section S0 of the particular RAM block on or off in System ON mode. - NRF_VMC_RETENTION_S1 = VMC_RAM_POWER_S1RETENTION_Msk, ///< Keep RAM section S1 of the particular RAM block on or off in System ON mode. - NRF_VMC_RETENTION_S2 = VMC_RAM_POWER_S2RETENTION_Msk, ///< Keep RAM section S2 of the particular RAM block on or off in System ON mode. - NRF_VMC_RETENTION_S3 = VMC_RAM_POWER_S3RETENTION_Msk, ///< Keep RAM section S3 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S0 = VMC_RAM_POWER_S0RETENTION_Msk, ///< Keep RAM section S0 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S1 = VMC_RAM_POWER_S1RETENTION_Msk, ///< Keep RAM section S1 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S2 = VMC_RAM_POWER_S2RETENTION_Msk, ///< Keep RAM section S2 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S3 = VMC_RAM_POWER_S3RETENTION_Msk, ///< Keep RAM section S3 of the particular RAM block on or off in System ON mode. +#if (VMC_RAM_SECTION_COUNT > 4) || defined(__NRFX_DOXYGEN__) + NRF_VMC_RETENTION_S4 = VMC_RAM_POWER_S4RETENTION_Msk, ///< Keep RAM section S4 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S5 = VMC_RAM_POWER_S5RETENTION_Msk, ///< Keep RAM section S5 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S6 = VMC_RAM_POWER_S6RETENTION_Msk, ///< Keep RAM section S6 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S7 = VMC_RAM_POWER_S7RETENTION_Msk, ///< Keep RAM section S7 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S8 = VMC_RAM_POWER_S8RETENTION_Msk, ///< Keep RAM section S8 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S9 = VMC_RAM_POWER_S9RETENTION_Msk, ///< Keep RAM section S9 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S10 = VMC_RAM_POWER_S10RETENTION_Msk, ///< Keep RAM section S10 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S11 = VMC_RAM_POWER_S11RETENTION_Msk, ///< Keep RAM section S11 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S12 = VMC_RAM_POWER_S12RETENTION_Msk, ///< Keep RAM section S12 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S13 = VMC_RAM_POWER_S13RETENTION_Msk, ///< Keep RAM section S13 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S14 = VMC_RAM_POWER_S14RETENTION_Msk, ///< Keep RAM section S14 of the particular RAM block on or off in System ON mode. + NRF_VMC_RETENTION_S15 = VMC_RAM_POWER_S15RETENTION_Msk, ///< Keep RAM section S15 of the particular RAM block on or off in System ON mode. +#endif } nrf_vmc_retention_t; /** @@ -101,6 +143,13 @@ NRF_STATIC_INLINE void nrf_vmc_ram_block_power_set(NRF_VMC_Type * p_reg, uint8_t ram_block_num, nrf_vmc_power_t sect_power); +/** + * @brief Function for setting power configuration for all available RAM blocks. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + */ +NRF_STATIC_INLINE void nrf_vmc_ram_block_power_all_set(NRF_VMC_Type * p_reg); + /** * @brief Function for clearing power configuration for the particular RAM block. * @@ -134,6 +183,13 @@ NRF_STATIC_INLINE void nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg uint8_t ram_block_num, nrf_vmc_retention_t sect_retention); +/** + * @brief Function for setting retention configuration for all available RAM blocks. + * + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + */ +NRF_STATIC_INLINE void nrf_vmc_ram_block_retention_all_set(NRF_VMC_Type * p_reg); + /** * @brief Function for clearing retention configuration for the particular RAM block. * @@ -164,20 +220,11 @@ NRF_STATIC_INLINE void nrf_vmc_ram_block_config(NRF_VMC_Type * p_reg, uint32_t retention_mask) { p_reg->RAM[ram_block_num].POWER = - (power_mask & ( - VMC_RAM_POWER_S0POWER_Msk | - VMC_RAM_POWER_S1POWER_Msk | - VMC_RAM_POWER_S2POWER_Msk | - VMC_RAM_POWER_S3POWER_Msk)) | - (retention_mask & ( - VMC_RAM_POWER_S0RETENTION_Msk | - VMC_RAM_POWER_S1RETENTION_Msk | - VMC_RAM_POWER_S2RETENTION_Msk | - VMC_RAM_POWER_S3RETENTION_Msk)); - // Perform dummy read of the POWER register to ensure that configuration of sections was - // written to the VMC peripheral. - volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWER; - (void)dummy; + (power_mask & (NRFX_BIT_MASK(VMC_RAM_SECTION_COUNT) << VMC_RAM_POWER_S0POWER_Pos)) | + (retention_mask & (NRFX_BIT_MASK(VMC_RAM_SECTION_COUNT) << + VMC_RAM_POWER_S0RETENTION_Pos)); + // Ensure that memory write operation is completed. + __DSB(); } NRF_STATIC_INLINE void nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg, uint8_t ram_block_num) @@ -190,10 +237,28 @@ NRF_STATIC_INLINE void nrf_vmc_ram_block_power_set(NRF_VMC_Type * p_reg, nrf_vmc_power_t sect_power) { p_reg->RAM[ram_block_num].POWERSET = (uint32_t)sect_power; - // Perform dummy read of the POWERSET register to ensure that configuration of sections was - // written to the VMC peripheral. - volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWERSET; - (void)dummy; + // Ensure that memory write operation is completed. + __DSB(); +} + +NRF_STATIC_INLINE void nrf_vmc_ram_block_power_all_set(NRF_VMC_Type * p_reg) +{ + for (size_t i = 0; i < VMC_FEATURE_RAM_REGISTERS_COUNT; i++) + { + p_reg->RAM[i].POWERSET = NRF_VMC_POWER_S0 | NRF_VMC_POWER_S1 | + NRF_VMC_POWER_S2 | NRF_VMC_POWER_S3 | +#if (VMC_RAM_SECTION_COUNT > 4) + NRF_VMC_POWER_S4 | NRF_VMC_POWER_S5 | + NRF_VMC_POWER_S6 | NRF_VMC_POWER_S7 | + NRF_VMC_POWER_S8 | NRF_VMC_POWER_S9 | + NRF_VMC_POWER_S10 | NRF_VMC_POWER_S11 | + NRF_VMC_POWER_S12 | NRF_VMC_POWER_S13 | + NRF_VMC_POWER_S14 | NRF_VMC_POWER_S15 | +#endif + 0; + } + // Ensure that memory write operation is completed. + __DSB(); } NRF_STATIC_INLINE void nrf_vmc_ram_block_power_clear(NRF_VMC_Type * p_reg, @@ -206,11 +271,8 @@ NRF_STATIC_INLINE void nrf_vmc_ram_block_power_clear(NRF_VMC_Type * p_reg, NRF_STATIC_INLINE uint32_t nrf_vmc_ram_block_power_mask_get(NRF_VMC_Type const * p_reg, uint8_t ram_block_num) { - return p_reg->RAM[ram_block_num].POWER & ( - VMC_RAM_POWER_S0POWER_Msk | - VMC_RAM_POWER_S1POWER_Msk | - VMC_RAM_POWER_S2POWER_Msk | - VMC_RAM_POWER_S3POWER_Msk); + return p_reg->RAM[ram_block_num].POWER & (NRFX_BIT_MASK(VMC_RAM_SECTION_COUNT) << + VMC_RAM_POWER_S0POWER_Pos); } NRF_STATIC_INLINE void nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg, @@ -218,10 +280,28 @@ NRF_STATIC_INLINE void nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg nrf_vmc_retention_t sect_retention) { p_reg->RAM[ram_block_num].POWERSET = (uint32_t)sect_retention; - // Perform dummy read of the POWERSET register to ensure that configuration of sections was - // written to the VMC peripheral. - volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWERSET; - (void)dummy; + // Ensure that memory write operation is completed. + __DSB(); +} + +NRF_STATIC_INLINE void nrf_vmc_ram_block_retention_all_set(NRF_VMC_Type * p_reg) +{ + for (size_t i = 0; i < VMC_FEATURE_RAM_REGISTERS_COUNT; i++) + { + p_reg->RAM[i].POWERSET = NRF_VMC_RETENTION_S0 | NRF_VMC_RETENTION_S1 | + NRF_VMC_RETENTION_S2 | NRF_VMC_RETENTION_S3 | +#if (VMC_RAM_SECTION_COUNT > 4) + NRF_VMC_RETENTION_S4 | NRF_VMC_RETENTION_S5 | + NRF_VMC_RETENTION_S6 | NRF_VMC_RETENTION_S7 | + NRF_VMC_RETENTION_S8 | NRF_VMC_RETENTION_S9 | + NRF_VMC_RETENTION_S10 | NRF_VMC_RETENTION_S11 | + NRF_VMC_RETENTION_S12 | NRF_VMC_RETENTION_S13 | + NRF_VMC_RETENTION_S14 | NRF_VMC_RETENTION_S15 | +#endif + 0; + } + // Ensure that memory write operation is completed. + __DSB(); } NRF_STATIC_INLINE void nrf_vmc_ram_block_retention_clear(NRF_VMC_Type * p_reg, @@ -234,11 +314,8 @@ NRF_STATIC_INLINE void nrf_vmc_ram_block_retention_clear(NRF_VMC_Type * p_r NRF_STATIC_INLINE uint32_t nrf_vmc_ram_block_retention_mask_get(NRF_VMC_Type const * p_reg, uint8_t ram_block_num) { - return p_reg->RAM[ram_block_num].POWER & ( - VMC_RAM_POWER_S0RETENTION_Msk | - VMC_RAM_POWER_S1RETENTION_Msk | - VMC_RAM_POWER_S2RETENTION_Msk | - VMC_RAM_POWER_S3RETENTION_Msk); + return p_reg->RAM[ram_block_num].POWER & (NRFX_BIT_MASK(VMC_RAM_SECTION_COUNT) << + VMC_RAM_POWER_S0RETENTION_Pos); } #endif // NRF_DECLARE_ONLY diff --git a/hal/nrf_wdt.h b/hal/nrf_wdt.h index 496a73605..67826c263 100644 --- a/hal/nrf_wdt.h +++ b/hal/nrf_wdt.h @@ -58,7 +58,7 @@ extern "C" { * * @return Pointer to the structure of registers of the WDT peripheral. */ -#define NRF_WDT_INST_GET(idx) NRFX_CONCAT_2(NRF_WDT, idx) +#define NRF_WDT_INST_GET(idx) NRFX_CONCAT(NRF_, WDT, idx) #if defined(WDT_TASKS_STOP_TASKS_STOP_Msk) || defined (__NRFX_DOXYGEN__) /** @brief Presence of Task STOP functionality. */ @@ -80,7 +80,6 @@ extern "C" { /** @brief WDT register reload value. */ #define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value; should not be modified. */ - /** @brief WDT tasks. */ typedef enum { @@ -104,7 +103,7 @@ typedef enum { NRF_WDT_BEHAVIOUR_RUN_SLEEP_MASK = WDT_CONFIG_SLEEP_Msk, /**< WDT will run when CPU is in SLEEP mode. */ NRF_WDT_BEHAVIOUR_RUN_HALT_MASK = WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in HALT mode. */ -#if defined(WDT_CONFIG_STOPEN_Msk) +#if NRF_WDT_HAS_STOP NRF_WDT_BEHAVIOUR_STOP_ENABLE_MASK = WDT_CONFIG_STOPEN_Msk, /**< WDT allows stopping. */ #endif } nrf_wdt_behaviour_mask_t; @@ -386,13 +385,14 @@ NRF_STATIC_INLINE bool nrf_wdt_reload_request_enable_check(NRF_WDT_Type const * NRF_STATIC_INLINE void nrf_wdt_reload_request_set(NRF_WDT_Type * p_reg, nrf_wdt_rr_register_t rr_register); -#if defined(WDT_TSEN_TSEN_Msk) +#if NRF_WDT_HAS_STOP /** - * @brief Function for enabling task stop. + * @brief Function for enabling or disabling stopping the watchdog. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] enable True if stopping is to be enabled, false otherwise. */ -NRF_STATIC_INLINE void nrf_wdt_task_stop_enable(NRF_WDT_Type * p_reg); +NRF_STATIC_INLINE void nrf_wdt_task_stop_enable_set(NRF_WDT_Type * p_reg, bool enable); #endif #ifndef NRF_DECLARE_ONLY @@ -544,10 +544,10 @@ NRF_STATIC_INLINE void nrf_wdt_reload_request_set(NRF_WDT_Type * p_reg, p_reg->RR[rr_register] = NRF_WDT_RR_VALUE; } -#if defined(WDT_TSEN_TSEN_Msk) -NRF_STATIC_INLINE void nrf_wdt_task_stop_enable(NRF_WDT_Type * p_reg) +#if NRF_WDT_HAS_STOP +NRF_STATIC_INLINE void nrf_wdt_task_stop_enable_set(NRF_WDT_Type * p_reg, bool enable) { - p_reg->TSEN = NRF_WDT_RR_VALUE; + p_reg->TSEN = enable ? NRF_WDT_RR_VALUE : 0; } #endif diff --git a/haly/nrfy_common.h b/haly/nrfy_common.h index 203502f15..6524ee445 100644 --- a/haly/nrfy_common.h +++ b/haly/nrfy_common.h @@ -52,7 +52,16 @@ extern "C" { * * @return Interrupt bit position. */ -#define NRFY_EVENT_TO_INT_BITPOS(event) ((((uint32_t)event) - 0x100) >> 2) +#define NRFY_EVENT_TO_INT_BITPOS(event) ((((uint32_t)(event)) - 0x100) >> 2) + +/** + * @brief Macro for converting interrupt bit position to the specified event. + * + * @param[in] bitpos Interrupt bit position. + * + * @return Event. + */ +#define NRFY_INT_BITPOS_TO_EVENT(bitpos) (((bitpos) << 2) + 0x100) /** * @brief Macro for calculating interrupt bitmask associated with the specified event. diff --git a/haly/nrfy_dppi.h b/haly/nrfy_dppi.h index 0f8abb270..879f143de 100644 --- a/haly/nrfy_dppi.h +++ b/haly/nrfy_dppi.h @@ -73,13 +73,13 @@ NRFY_STATIC_INLINE void nrfy_dppi_channels_set(NRF_DPPIC_Type * p_reg, uint32_t } /** @refhal{nrf_dppi_channel_number_get} */ -NRF_STATIC_INLINE uint8_t nrfy_dppi_channel_number_get(NRF_DPPIC_Type const * p_reg) +NRFY_STATIC_INLINE uint8_t nrfy_dppi_channel_number_get(NRF_DPPIC_Type const * p_reg) { return nrf_dppi_channel_number_get(p_reg); } /** @refhal{nrf_dppi_group_number_get} */ -NRF_STATIC_INLINE uint8_t nrfy_dppi_group_number_get(NRF_DPPIC_Type const * p_reg) +NRFY_STATIC_INLINE uint8_t nrfy_dppi_group_number_get(NRF_DPPIC_Type const * p_reg) { return nrf_dppi_group_number_get(p_reg); } @@ -144,6 +144,15 @@ NRFY_STATIC_INLINE void nrfy_dppi_subscribe_clear(NRF_DPPIC_Type * p_reg, nrf_dp nrf_barrier_w(); } +/** @refhal{nrf_dppi_channels_group_set} */ +NRFY_STATIC_INLINE void nrfy_dppi_channels_group_set(NRF_DPPIC_Type * p_reg, + uint32_t channel_mask, + nrf_dppi_channel_group_t channel_group) +{ + nrf_dppi_channels_group_set(p_reg, channel_mask, channel_group); + nrf_barrier_w(); +} + /** @refhal{nrf_dppi_channels_include_in_group} */ NRFY_STATIC_INLINE void nrfy_dppi_channels_include_in_group(NRF_DPPIC_Type * p_reg, uint32_t channel_mask, diff --git a/haly/nrfy_gpiote.h b/haly/nrfy_gpiote.h index 48f855ac9..1da07814c 100644 --- a/haly/nrfy_gpiote.h +++ b/haly/nrfy_gpiote.h @@ -51,7 +51,8 @@ NRFY_STATIC_INLINE bool __nrfy_internal_gpiote_event_handle(NRF_GPIOTE_Type * p uint32_t * p_evt_mask); NRFY_STATIC_INLINE uint32_t __nrfy_internal_gpiote_events_process(NRF_GPIOTE_Type * p_reg, - uint32_t mask); + uint32_t mask, + uint32_t channels_number); /** * @defgroup nrfy_gpiote GPIOTE HALY @@ -70,25 +71,36 @@ NRFY_STATIC_INLINE uint32_t __nrfy_internal_gpiote_events_process(NRF_GPIOTE_Typ /** * @brief Function for initializing the specified GPIOTE interrupts. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] mask Mask of interrupts to be initialized. - * @param[in] irq_priority Interrupt priority. - * @param[in] enable True if the interrupts are to be enabled, false otherwise. + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] mask Mask of interrupts to be initialized. + * @param[in] irq_priority Interrupt priority. + * @param[in] enable True if the interrupts are to be enabled, false otherwise. + * @param[in] channels_number Number of channels for specified GPIOTE peripheral. */ NRFY_STATIC_INLINE void nrfy_gpiote_int_init(NRF_GPIOTE_Type * p_reg, uint32_t mask, uint8_t irq_priority, - bool enable) + bool enable, + uint32_t channels_number) { - for (uint8_t i = 0; i < GPIOTE_CH_NUM; i++) + for (uint32_t i = 0; i < channels_number; i++) { - __nrfy_internal_gpiote_event_enabled_clear(p_reg, mask, nrf_gpiote_in_event_get(i)); + __nrfy_internal_gpiote_event_enabled_clear(p_reg, + mask, + nrf_gpiote_in_event_get((uint8_t)i)); } __nrfy_internal_gpiote_event_enabled_clear(p_reg, mask, NRF_GPIOTE_EVENT_PORT); #if defined(NRF_GPIOTE_IRQn_EXT) IRQn_Type irqn = NRF_GPIOTE_IRQn_EXT; +#elif !defined(NRF_TRUSTZONE_NONSECURE) +#if defined(NRF_GPIOTE0) +#define GPIOTE_IRQ_OFFSET (p_reg == NRF_GPIOTE0 ? 0 : 1) +#else +#define GPIOTE_IRQ_OFFSET 1 +#endif + IRQn_Type irqn = (IRQn_Type)(nrfx_get_irq_number(p_reg) + GPIOTE_IRQ_OFFSET); #else IRQn_Type irqn = nrfx_get_irq_number(p_reg); #endif @@ -104,16 +116,18 @@ NRFY_STATIC_INLINE void nrfy_gpiote_int_init(NRF_GPIOTE_Type * p_reg, /** * @brief Function for processing the specified GPIOTE events. * - * @param[in] p_reg Pointer to the structure of registers of the peripheral. - * @param[in] mask Mask of events to be processed, created by @ref NRFY_EVENT_TO_INT_BITMASK(). + * @param[in] p_reg Pointer to the structure of registers of the peripheral. + * @param[in] mask Mask of events to be processed, created by @ref NRFY_EVENT_TO_INT_BITMASK(). + * @param[in] channels_number Number of channels for specified GPIOTE peripheral. * * @return Mask of events that were generated and processed. * To be checked against the result of @ref NRFY_EVENT_TO_INT_BITMASK(). */ NRFY_STATIC_INLINE uint32_t nrfy_gpiote_events_process(NRF_GPIOTE_Type * p_reg, - uint32_t mask) + uint32_t mask, + uint32_t channels_number) { - uint32_t evt_mask = __nrfy_internal_gpiote_events_process(p_reg, mask); + uint32_t evt_mask = __nrfy_internal_gpiote_events_process(p_reg, mask, channels_number); nrf_barrier_w(); return evt_mask; } @@ -387,16 +401,17 @@ NRFY_STATIC_INLINE bool __nrfy_internal_gpiote_event_handle(NRF_GPIOTE_Type * p } NRFY_STATIC_INLINE uint32_t __nrfy_internal_gpiote_events_process(NRF_GPIOTE_Type * p_reg, - uint32_t mask) + uint32_t mask, + uint32_t channels_number) { uint32_t event_mask = 0; nrf_barrier_r(); - for (uint8_t i = 0; i < GPIOTE_CH_NUM; i++) + for (uint32_t i = 0; i < channels_number; i++) { (void)__nrfy_internal_gpiote_event_handle(p_reg, mask, - nrf_gpiote_in_event_get(i), + nrf_gpiote_in_event_get((uint8_t)i), &event_mask); } diff --git a/haly/nrfy_lpcomp.h b/haly/nrfy_lpcomp.h index dc6e0e9d2..fc88635d8 100644 --- a/haly/nrfy_lpcomp.h +++ b/haly/nrfy_lpcomp.h @@ -63,8 +63,14 @@ NRFY_STATIC_INLINE uint32_t __nrfy_internal_lpcomp_events_process(NRF_LPCOMP_Typ /** @brief LPCOMP configuration structure. */ typedef struct { - nrf_lpcomp_config_t config; ///< Peripheral configuration. - nrf_lpcomp_input_t input; ///< Input to be monitored. + nrf_lpcomp_config_t config; ///< Peripheral configuration. @deprecated Use other fields instead. + nrf_lpcomp_ref_t reference; ///< Reference selection. + nrf_lpcomp_ext_ref_t ext_ref; ///< External analog reference selection. + nrf_lpcomp_detect_t detection; ///< Detection type. +#if NRF_LPCOMP_HAS_HYST + nrf_lpcomp_hyst_t hyst; ///< Comparator hysteresis. +#endif + nrf_lpcomp_input_t input; ///< Input to be monitored. } nrfy_lpcomp_config_t; /** @@ -76,7 +82,16 @@ typedef struct NRFY_STATIC_INLINE void nrfy_lpcomp_periph_configure(NRF_LPCOMP_Type * p_reg, nrfy_lpcomp_config_t const * p_config) { - nrf_lpcomp_configure(p_reg, &p_config->config); + nrf_lpcomp_ref_set(p_reg, p_config->reference); + if (p_config->reference == NRF_LPCOMP_REF_EXT_REF) + { + nrf_lpcomp_ext_ref_set(p_reg, p_config->ext_ref); + } + nrf_lpcomp_detection_set(p_reg, p_config->detection); +#if defined(LPCOMP_FEATURE_HYST_PRESENT) + nrf_lpcomp_hysteresis_set(p_reg, p_config->hyst); +#endif + nrf_lpcomp_input_select(p_reg, p_config->input); nrf_barrier_w(); } @@ -94,7 +109,6 @@ NRFY_STATIC_INLINE void nrfy_lpcomp_int_init(NRF_LPCOMP_Type * p_reg, uint8_t irq_priority, bool enable) { - __nrfy_internal_lpcomp_event_enabled_clear(p_reg, mask, NRF_LPCOMP_EVENT_READY); __nrfy_internal_lpcomp_event_enabled_clear(p_reg, mask, NRF_LPCOMP_EVENT_DOWN); __nrfy_internal_lpcomp_event_enabled_clear(p_reg, mask, NRF_LPCOMP_EVENT_UP); @@ -115,11 +129,11 @@ NRFY_STATIC_INLINE void nrfy_lpcomp_int_init(NRF_LPCOMP_Type * p_reg, * * @param[in] p_reg Pointer to the structure of registers of the peripheral. */ - NRFY_STATIC_INLINE void nrfy_lpcomp_int_uninit(NRF_LPCOMP_Type * p_reg) - { +NRFY_STATIC_INLINE void nrfy_lpcomp_int_uninit(NRF_LPCOMP_Type * p_reg) +{ NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_reg)); nrf_barrier_w(); - } +} /** * @brief Function for processing the specified LPCOMP events. @@ -155,6 +169,39 @@ NRFY_STATIC_INLINE bool nrfy_lpcomp_sample_check(NRF_LPCOMP_Type * p_reg) return sample; } +/** @refhal{nrf_lpcomp_ref_set} */ +NRFY_STATIC_INLINE void nrfy_lpcomp_ref_set(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_ref_t reference) +{ + nrf_lpcomp_ref_set(p_reg, reference); + nrf_barrier_w(); +} + +/** @refhal{nrf_lpcomp_ext_ref_set} */ +NRFY_STATIC_INLINE void nrfy_lpcomp_ext_ref_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_ext_ref_t ext_ref) +{ + nrf_lpcomp_ext_ref_set(p_reg, ext_ref); + nrf_barrier_w(); +} + +/** @refhal{nrf_lpcomp_detection_set} */ +NRFY_STATIC_INLINE void nrfy_lpcomp_detection_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_detect_t detection) +{ + nrf_lpcomp_detection_set(p_reg, detection); + nrf_barrier_w(); +} + +#if defined(LPCOMP_FEATURE_HYST_PRESENT) || defined(__NRFX_DOXYGEN__) +/** @refhal{nrf_lpcomp_hysteresis_set} */ +NRFY_STATIC_INLINE void nrfy_lpcomp_hysteresis_set(NRF_LPCOMP_Type * p_reg, + nrf_lpcomp_hyst_t hyst) +{ + nrf_lpcomp_hysteresis_set(p_reg, hyst); + nrf_barrier_w(); +} +#endif + /** @refhal{nrf_lpcomp_configure} */ NRFY_STATIC_INLINE void nrfy_lpcomp_configure(NRF_LPCOMP_Type * p_reg, nrf_lpcomp_config_t const * p_config) diff --git a/haly/nrfy_nfct.h b/haly/nrfy_nfct.h index c96cecc29..571a991a0 100644 --- a/haly/nrfy_nfct.h +++ b/haly/nrfy_nfct.h @@ -228,7 +228,7 @@ NRFY_STATIC_INLINE void nrfy_nfct_parameters_restore(NRF_NFCT_Type * nrfy_nfct_parameters_t const * p_params) { nrf_nfct_frame_delay_max_set(p_reg, p_params->fdmax); - nrf_nfct_frame_delay_min_set(p_reg, p_params->fdmin); + nrf_nfct_frame_delay_min_set(p_reg, (uint16_t)p_params->fdmin); nrf_nfct_nfcid1_set(p_reg, p_params->nfcid1, p_params->nfcid1_size); nrf_nfct_selres_protocol_set(p_reg, p_params->protocol); diff --git a/haly/nrfy_qdec.h b/haly/nrfy_qdec.h index a88b97d62..2c39e990b 100644 --- a/haly/nrfy_qdec.h +++ b/haly/nrfy_qdec.h @@ -105,6 +105,10 @@ NRFY_STATIC_INLINE void nrfy_qdec_periph_configure(NRF_QDEC_Type * p_ nrf_qdec_ledpre_set(p_reg, p_config->ledpre); nrf_qdec_ledpol_set(p_reg, p_config->ledpol); } + else + { + nrf_qdec_ledpre_set(p_reg, NRF_QDEC_LEDPRE_DEFAULT); + } if (!p_config->skip_psel_cfg) { diff --git a/haly/nrfy_rtc.h b/haly/nrfy_rtc.h index 01ba2e4b6..7af11f681 100644 --- a/haly/nrfy_rtc.h +++ b/haly/nrfy_rtc.h @@ -95,7 +95,7 @@ NRFY_STATIC_INLINE void nrfy_rtc_int_init(NRF_RTC_Type * p_reg, __nrfy_internal_rtc_event_enabled_clear(p_reg, mask, NRF_RTC_EVENT_TICK); __nrfy_internal_rtc_event_enabled_clear(p_reg, mask, NRF_RTC_EVENT_OVERFLOW); - for (size_t i = 0; i < NRF_RTC_CC_COUNT_MAX; i++) + for (uint8_t i = 0; i < NRF_RTC_CC_COUNT_MAX; i++) { __nrfy_internal_rtc_event_enabled_clear(p_reg, mask, nrf_rtc_compare_event_get(i)); } @@ -394,7 +394,7 @@ NRFY_STATIC_INLINE uint32_t __nrfy_internal_rtc_events_process(NRF_RTC_Type * p_ uint32_t event_mask = 0; nrf_barrier_r(); - for (uint32_t i = 0; i < NRF_RTC_CC_COUNT_MAX; i++) + for (uint8_t i = 0; i < NRF_RTC_CC_COUNT_MAX; i++) { (void)__nrfy_internal_rtc_event_handle(p_reg, mask, diff --git a/haly/nrfy_saadc.h b/haly/nrfy_saadc.h index fea0a5ba4..8739ca94f 100644 --- a/haly/nrfy_saadc.h +++ b/haly/nrfy_saadc.h @@ -123,7 +123,7 @@ NRFY_STATIC_INLINE void nrfy_saadc_int_init(NRF_SAADC_Type * p_reg, __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, NRF_SAADC_EVENT_CALIBRATEDONE); __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, NRF_SAADC_EVENT_STOPPED); - for (uint32_t i = 0; i < SAADC_CH_NUM; i++) + for (uint8_t i = 0; i < SAADC_CH_NUM; i++) { nrf_saadc_event_t event = nrf_saadc_limit_event_get(i, NRF_SAADC_LIMIT_LOW); __nrfy_internal_saadc_event_enabled_clear(p_reg, mask, event); @@ -603,13 +603,13 @@ NRFY_STATIC_INLINE void nrfy_saadc_burst_set(NRF_SAADC_Type * p_reg, } /** @refhal{nrf_saadc_value_min_get} */ -NRFY_STATIC_INLINE nrf_saadc_value_t nrfy_saadc_value_min_get(nrf_saadc_resolution_t resolution) +NRFY_STATIC_INLINE int16_t nrfy_saadc_value_min_get(nrf_saadc_resolution_t resolution) { return nrf_saadc_value_min_get(resolution); } /** @refhal{nrf_saadc_value_max_get} */ -NRFY_STATIC_INLINE nrf_saadc_value_t nrfy_saadc_value_max_get(nrf_saadc_resolution_t resolution) +NRFY_STATIC_INLINE int16_t nrfy_saadc_value_max_get(nrf_saadc_resolution_t resolution) { return nrf_saadc_value_max_get(resolution); } @@ -657,7 +657,7 @@ uint32_t __nrfy_internal_saadc_events_process(NRF_SAADC_Type * p_reg, if (mask & NRF_SAADC_ALL_CHANNELS_LIMITS_INT_MASK) { - for (uint32_t i = 0; i < SAADC_CH_NUM; i++) + for (uint8_t i = 0; i < SAADC_CH_NUM; i++) { nrf_saadc_event_t event = nrf_saadc_limit_event_get(i, NRF_SAADC_LIMIT_LOW); __nrfy_internal_saadc_event_handle(p_reg, mask, event, &evt_mask); diff --git a/haly/nrfy_spim.h b/haly/nrfy_spim.h index f849009f8..7342caa73 100644 --- a/haly/nrfy_spim.h +++ b/haly/nrfy_spim.h @@ -400,7 +400,9 @@ NRFY_STATIC_INLINE void nrfy_spim_ext_pins_get(NRF_SPIM_Type const * p_reg, nrfy_spim_ext_pins_t * p_pins) { p_pins->dcx_pin = nrf_spim_dcx_pin_get(p_reg); +#if NRFY_SPIM_HAS_HW_CSN p_pins->csn_pin = nrf_spim_csn_pin_get(p_reg); +#endif } #endif @@ -719,14 +721,14 @@ NRFY_STATIC_INLINE void nrfy_spim_frequency_set(NRF_SPIM_Type * p_reg, #if NRFY_SPIM_HAS_PRESCALER /** @refhal{nrf_spim_prescaler_set} */ -NRF_STATIC_INLINE void nrfy_spim_prescaler_set(NRF_SPIM_Type * p_reg, uint32_t prescaler) +NRFY_STATIC_INLINE void nrfy_spim_prescaler_set(NRF_SPIM_Type * p_reg, uint32_t prescaler) { nrf_spim_prescaler_set(p_reg, prescaler); nrf_barrier_w(); } /** @refhal{nrf_spim_prescaler_get} */ -NRF_STATIC_INLINE uint32_t nrfy_spim_prescaler_get(NRF_SPIM_Type const * p_reg) +NRFY_STATIC_INLINE uint32_t nrfy_spim_prescaler_get(NRF_SPIM_Type const * p_reg) { nrf_barrier_rw(); uint32_t prescaler = nrf_spim_prescaler_get(p_reg); diff --git a/haly/nrfy_temp.h b/haly/nrfy_temp.h index 049661c00..e6f6de93c 100644 --- a/haly/nrfy_temp.h +++ b/haly/nrfy_temp.h @@ -94,21 +94,21 @@ NRFY_STATIC_INLINE void nrfy_temp_int_uninit(NRF_TEMP_Type * p_reg) } /** @refhal{nrf_temp_int_enable} */ -NRF_STATIC_INLINE void nrfy_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask) +NRFY_STATIC_INLINE void nrfy_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask) { nrf_temp_int_enable(p_reg, mask); nrf_barrier_w(); } /** @refhal{nrf_temp_int_disable} */ -NRF_STATIC_INLINE void nrfy_temp_int_disable(NRF_TEMP_Type * p_reg, uint32_t mask) +NRFY_STATIC_INLINE void nrfy_temp_int_disable(NRF_TEMP_Type * p_reg, uint32_t mask) { nrf_temp_int_disable(p_reg, mask); nrf_barrier_w(); } /** @refhal{nrf_temp_int_enable_check} */ -NRF_STATIC_INLINE uint32_t nrfy_temp_int_enable_check(NRF_TEMP_Type const * p_reg, uint32_t mask) +NRFY_STATIC_INLINE uint32_t nrfy_temp_int_enable_check(NRF_TEMP_Type const * p_reg, uint32_t mask) { nrf_barrier_rw(); uint32_t check = nrf_temp_int_enable_check(p_reg, mask); @@ -117,35 +117,35 @@ NRF_STATIC_INLINE uint32_t nrfy_temp_int_enable_check(NRF_TEMP_Type const * p_re } /** @refhal{nrf_temp_task_address_get} */ -NRF_STATIC_INLINE uint32_t nrfy_temp_task_address_get(NRF_TEMP_Type const * p_reg, - nrf_temp_task_t task) +NRFY_STATIC_INLINE uint32_t nrfy_temp_task_address_get(NRF_TEMP_Type const * p_reg, + nrf_temp_task_t task) { return nrf_temp_task_address_get(p_reg, task); } /** @refhal{nrf_temp_task_trigger} */ -NRF_STATIC_INLINE void nrfy_temp_task_trigger(NRF_TEMP_Type * p_reg, nrf_temp_task_t task) +NRFY_STATIC_INLINE void nrfy_temp_task_trigger(NRF_TEMP_Type * p_reg, nrf_temp_task_t task) { nrf_temp_task_trigger(p_reg, task); nrf_barrier_w(); } /** @refhal{nrf_temp_event_address_get} */ -NRF_STATIC_INLINE uint32_t nrfy_temp_event_address_get(NRF_TEMP_Type const * p_reg, - nrf_temp_event_t event) +NRFY_STATIC_INLINE uint32_t nrfy_temp_event_address_get(NRF_TEMP_Type const * p_reg, + nrf_temp_event_t event) { return nrf_temp_event_address_get(p_reg, event); } /** @refhal{nrf_temp_event_clear} */ -NRF_STATIC_INLINE void nrfy_temp_event_clear(NRF_TEMP_Type * p_reg, nrf_temp_event_t event) +NRFY_STATIC_INLINE void nrfy_temp_event_clear(NRF_TEMP_Type * p_reg, nrf_temp_event_t event) { nrf_temp_event_clear(p_reg, event); nrf_barrier_w(); } /** @refhal{nrf_temp_event_check} */ -NRF_STATIC_INLINE bool nrfy_temp_event_check(NRF_TEMP_Type const * p_reg, nrf_temp_event_t event) +NRFY_STATIC_INLINE bool nrfy_temp_event_check(NRF_TEMP_Type const * p_reg, nrf_temp_event_t event) { nrf_barrier_rw(); uint32_t check = nrf_temp_event_check(p_reg, event); @@ -154,7 +154,7 @@ NRF_STATIC_INLINE bool nrfy_temp_event_check(NRF_TEMP_Type const * p_reg, nrf_te } /** @refhal{nrf_temp_result_get} */ -NRF_STATIC_INLINE int32_t nrfy_temp_result_get(NRF_TEMP_Type const * p_reg) +NRFY_STATIC_INLINE int32_t nrfy_temp_result_get(NRF_TEMP_Type const * p_reg) { nrf_barrier_r(); int32_t temperature = nrf_temp_result_get(p_reg); @@ -164,14 +164,14 @@ NRF_STATIC_INLINE int32_t nrfy_temp_result_get(NRF_TEMP_Type const * p_reg) #if NRFY_TEMP_HAS_CALIBRATION /** @refhal{nrf_temp_calibration_coeff_set} */ -NRF_STATIC_INLINE void nrfy_temp_calibration_coeff_set(NRF_TEMP_Type * p_reg, uint32_t coeff) +NRFY_STATIC_INLINE void nrfy_temp_calibration_coeff_set(NRF_TEMP_Type * p_reg, uint32_t coeff) { nrf_temp_calibration_coeff_set(p_reg, coeff); nrf_barrier_w(); } /** @refhal{nrf_temp_calibration_coeff_get} */ -NRF_STATIC_INLINE uint32_t nrfy_temp_calibration_coeff_get(NRF_TEMP_Type const * p_reg) +NRFY_STATIC_INLINE uint32_t nrfy_temp_calibration_coeff_get(NRF_TEMP_Type const * p_reg) { nrf_barrier_rw(); uint32_t coeff = nrf_temp_calibration_coeff_get(p_reg); @@ -180,6 +180,40 @@ NRF_STATIC_INLINE uint32_t nrfy_temp_calibration_coeff_get(NRF_TEMP_Type const * } #endif +#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) +/** @refhal{nrf_temp_subscribe_set} */ +NRFY_STATIC_INLINE void nrfy_temp_subscribe_set(NRF_TEMP_Type * p_reg, + nrf_temp_task_t task, + uint8_t channel) +{ + nrf_temp_subscribe_set(p_reg, task, channel); + nrf_barrier_w(); +} + +/** @refhal{nrf_temp_subscribe_clear} */ +NRFY_STATIC_INLINE void nrfy_temp_subscribe_clear(NRF_TEMP_Type * p_reg, nrf_temp_task_t task) +{ + nrf_temp_subscribe_clear(p_reg, task); + nrf_barrier_w(); +} + +/** @refhal{nrf_temp_publish_set} */ +NRFY_STATIC_INLINE void nrfy_temp_publish_set(NRF_TEMP_Type * p_reg, + nrf_temp_event_t event, + uint8_t channel) +{ + nrf_temp_publish_set(p_reg, event, channel); + nrf_barrier_w(); +} + +/** @refhal{nrf_temp_publish_clear} */ +NRFY_STATIC_INLINE void nrfy_temp_publish_clear(NRF_TEMP_Type * p_reg, nrf_temp_event_t event) +{ + nrf_temp_publish_clear(p_reg, event); + nrf_barrier_w(); +} +#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) + /** @} */ #ifdef __cplusplus diff --git a/haly/nrfy_timer.h b/haly/nrfy_timer.h index e058312f2..860b83c04 100644 --- a/haly/nrfy_timer.h +++ b/haly/nrfy_timer.h @@ -103,7 +103,7 @@ NRFY_STATIC_INLINE void nrfy_timer_int_init(NRF_TIMER_Type * p_reg, uint8_t irq_priority, bool enable) { - for (size_t i = 0; i < NRF_TIMER_CC_COUNT_MAX; i++) + for (uint8_t i = 0; i < NRF_TIMER_CC_COUNT_MAX; i++) { __nrfy_internal_timer_event_enabled_clear(p_reg, mask, nrf_timer_compare_event_get(i)); } @@ -329,14 +329,14 @@ NRFY_STATIC_INLINE nrf_timer_bit_width_t nrfy_timer_bit_width_get(NRF_TIMER_Type } /** @refhal{nrf_timer_prescaler_set} */ -NRF_STATIC_INLINE void nrfy_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor) +NRFY_STATIC_INLINE void nrfy_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor) { nrf_timer_prescaler_set(p_reg, prescaler_factor); nrf_barrier_w(); } /** @refhal{nrf_timer_prescaler_get} */ -NRF_STATIC_INLINE uint32_t nrfy_timer_prescaler_get(NRF_TIMER_Type const * p_reg) +NRFY_STATIC_INLINE uint32_t nrfy_timer_prescaler_get(NRF_TIMER_Type const * p_reg) { nrf_barrier_rw(); uint32_t prescaler = nrf_timer_prescaler_get(p_reg); @@ -434,7 +434,7 @@ NRFY_STATIC_INLINE uint32_t __nrfy_internal_timer_events_process(NRF_TIMER_Type uint32_t event_mask = 0; nrf_barrier_r(); - for (uint32_t i = 0; i < NRF_TIMER_CC_COUNT_MAX; i++) + for (uint8_t i = 0; i < NRF_TIMER_CC_COUNT_MAX; i++) { __nrfy_internal_timer_event_handle(p_reg, mask, diff --git a/haly/nrfy_uarte.h b/haly/nrfy_uarte.h index 082acd3ac..eaf6ae2a7 100644 --- a/haly/nrfy_uarte.h +++ b/haly/nrfy_uarte.h @@ -41,7 +41,7 @@ extern "C" { #endif -typedef struct nrfy_uarte_xfer_desc_t nrfy_uarte_xfer_desc_t; +typedef struct nrfy_uarte_buffer_t nrfy_uarte_buffer_t; NRFY_STATIC_INLINE void __nrfy_internal_uarte_event_enabled_clear(NRF_UARTE_Type * p_reg, uint32_t mask, @@ -53,9 +53,9 @@ NRFY_STATIC_INLINE bool __nrfy_internal_uarte_event_handle(NRF_UARTE_Type * p_r uint32_t * p_evt_mask); NRFY_STATIC_INLINE -uint32_t __nrfy_internal_uarte_events_process(NRF_UARTE_Type * p_reg, - uint32_t mask, - nrfy_uarte_xfer_desc_t const * p_xfer); +uint32_t __nrfy_internal_uarte_events_process(NRF_UARTE_Type * p_reg, + uint32_t mask, + nrfy_uarte_buffer_t const * p_xfer); /** * @defgroup nrfy_uarte UARTE HALY @@ -91,10 +91,10 @@ typedef struct } nrfy_uarte_config_t; /** @brief Structure describing an UARTE transfer. */ -struct nrfy_uarte_xfer_desc_t +struct nrfy_uarte_buffer_t { - uint8_t * p_buffer; ///< Pointer to transferred data. - size_t length; ///< Number of bytes transferred. + uint8_t * p_buffer; ///< Buffer address. + size_t length; ///< Data length. }; /** @@ -177,9 +177,9 @@ NRFY_STATIC_INLINE void nrfy_uarte_int_uninit(NRF_UARTE_Type * p_reg) * @return Mask of events that were generated and processed. * To be checked against the result of @ref NRFY_EVENT_TO_INT_BITMASK(). */ -NRFY_STATIC_INLINE uint32_t nrfy_uarte_events_process(NRF_UARTE_Type * p_reg, - uint32_t mask, - nrfy_uarte_xfer_desc_t const * p_xfer) +NRFY_STATIC_INLINE uint32_t nrfy_uarte_events_process(NRF_UARTE_Type * p_reg, + uint32_t mask, + nrfy_uarte_buffer_t const * p_xfer) { uint32_t evt_mask = __nrfy_internal_uarte_events_process(p_reg, mask, p_xfer); nrf_barrier_w(); @@ -213,8 +213,8 @@ NRFY_STATIC_INLINE void nrfy_uarte_tx_abort(NRF_UARTE_Type * p_reg, * @param[in] p_reg Pointer to the structure of registers of the peripheral. * @param[in] p_xfer Pointer to the structure containing reception buffer. Can be NULL. */ -NRFY_STATIC_INLINE void nrfy_uarte_stop(NRF_UARTE_Type * p_reg, - nrfy_uarte_xfer_desc_t const * p_xfer) +NRFY_STATIC_INLINE void nrfy_uarte_stop(NRF_UARTE_Type * p_reg, + nrfy_uarte_buffer_t const * p_xfer) { nrf_uarte_task_trigger(p_reg, NRF_UARTE_TASK_STOPTX); nrf_barrier_w(); @@ -270,8 +270,8 @@ NRFY_STATIC_INLINE uint32_t nrfy_uarte_tx_start(NRF_UARTE_Type * p_reg, * @return Mask of events occured, created by @ref NRFY_EVENT_TO_INT_BITMASK(). * Always 0 for non-blocking reception. */ -NRFY_STATIC_INLINE uint32_t nrfy_uarte_rx_start(NRF_UARTE_Type * p_reg, - nrfy_uarte_xfer_desc_t const * p_xfer) +NRFY_STATIC_INLINE uint32_t nrfy_uarte_rx_start(NRF_UARTE_Type * p_reg, + nrfy_uarte_buffer_t const * p_xfer) { uint32_t evt_mask = 0; nrf_uarte_task_trigger(p_reg, NRF_UARTE_TASK_STARTRX); @@ -342,6 +342,23 @@ NRFY_STATIC_INLINE uint32_t nrfy_uarte_event_address_get(NRF_UARTE_Type const * return nrf_uarte_event_address_get(p_reg, event); } +/** @refhal{nrf_uarte_shorts_set} */ +NRFY_STATIC_INLINE void nrfy_uarte_shorts_set(NRF_UARTE_Type * p_reg, uint32_t mask) +{ + nrf_uarte_shorts_set(p_reg, mask); + nrf_barrier_w(); +} + +/** @refhal{nrf_uarte_shorts_get} */ +NRFY_STATIC_INLINE uint32_t nrfy_uarte_shorts_get(NRF_UARTE_Type * p_reg, uint32_t mask) +{ + nrf_barrier_rw(); + uint32_t ret = nrf_uarte_shorts_get(p_reg, mask); + nrf_barrier_r(); + + return ret; +} + /** @refhal{nrf_uarte_shorts_enable} */ NRFY_STATIC_INLINE void nrfy_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t mask) { @@ -548,6 +565,15 @@ NRFY_STATIC_INLINE void nrfy_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg, } } +/** @refhal{nrf_uarte_tx_buffer_get} */ +NRFY_STATIC_INLINE uint8_t const * nrfy_uarte_tx_buffer_get(NRF_UARTE_Type * p_reg) +{ + nrf_barrier_r(); + uint8_t const * ptr = nrf_uarte_tx_buffer_get(p_reg); + nrf_barrier_r(); + return ptr; +} + /** @refhal{nrf_uarte_tx_amount_get} */ NRFY_STATIC_INLINE uint32_t nrfy_uarte_tx_amount_get(NRF_UARTE_Type const * p_reg) { @@ -604,9 +630,9 @@ NRFY_STATIC_INLINE bool __nrfy_internal_uarte_event_handle(NRF_UARTE_Type * p_r } NRFY_STATIC_INLINE -uint32_t __nrfy_internal_uarte_events_process(NRF_UARTE_Type * p_reg, - uint32_t mask, - nrfy_uarte_xfer_desc_t const * p_xfer) +uint32_t __nrfy_internal_uarte_events_process(NRF_UARTE_Type * p_reg, + uint32_t mask, + nrfy_uarte_buffer_t const * p_xfer) { uint32_t evt_mask = 0; @@ -633,6 +659,7 @@ uint32_t __nrfy_internal_uarte_events_process(NRF_UARTE_Type * p_r nrf_barrier_rw(); NRFY_CACHE_INV(p_xfer->p_buffer, size); } + nrf_barrier_w(); return evt_mask; } diff --git a/haly/nrfy_wdt.h b/haly/nrfy_wdt.h index be0c93227..d7b532939 100644 --- a/haly/nrfy_wdt.h +++ b/haly/nrfy_wdt.h @@ -59,6 +59,13 @@ NRFY_STATIC_INLINE void __nrfy_internal_wdt_event_enabled_clear(NRF_WDT_Type * * @brief Hardware access layer with cache and barrier support for managing the WDT peripheral. */ +#if NRF_WDT_HAS_STOP || defined(__NRFX_DOXYGEN__) +/** @refhal{NRF_WDT_HAS_STOP} */ +#define NRFY_WDT_HAS_STOP 1 +#else +#define NRFY_WDT_HAS_STOP 0 +#endif + /** @brief WDT configuration structure. */ typedef struct { @@ -94,6 +101,9 @@ NRFY_STATIC_INLINE void nrfy_wdt_int_init(NRF_WDT_Type * p_reg, bool enable) { __nrfy_internal_wdt_event_enabled_clear(p_reg, mask, NRF_WDT_EVENT_TIMEOUT); +#if NRFY_WDT_HAS_STOP + __nrfy_internal_wdt_event_enabled_clear(p_reg, mask, NRF_WDT_EVENT_STOPPED); +#endif nrf_barrier_w(); NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_reg), irq_priority); @@ -312,6 +322,15 @@ NRFY_STATIC_INLINE void nrfy_wdt_reload_request_set(NRF_WDT_Type * p_reg, nrf_barrier_w(); } +#if NRFY_WDT_HAS_STOP +/** @refhal{nrf_wdt_task_stop_enable_set} */ +NRFY_STATIC_INLINE void nrfy_wdt_task_stop_enable_set(NRF_WDT_Type * p_reg, bool enable) +{ + nrf_wdt_task_stop_enable_set(p_reg, enable); + nrf_barrier_w(); +} +#endif + /** @} */ NRFY_STATIC_INLINE bool __nrfy_internal_wdt_event_handle(NRF_WDT_Type * p_reg, @@ -337,6 +356,9 @@ NRFY_STATIC_INLINE uint32_t __nrfy_internal_wdt_events_process(NRF_WDT_Type * p_ nrf_barrier_r(); (void)__nrfy_internal_wdt_event_handle(p_reg, mask, NRF_WDT_EVENT_TIMEOUT, &evt_mask); +#if NRFY_WDT_HAS_STOP + (void)__nrfy_internal_wdt_event_handle(p_reg, mask, NRF_WDT_EVENT_STOPPED, &evt_mask); +#endif return evt_mask; } diff --git a/helpers/nrfx_flag32_allocator.c b/helpers/nrfx_flag32_allocator.c index 99dd6f486..2832ecc20 100644 --- a/helpers/nrfx_flag32_allocator.c +++ b/helpers/nrfx_flag32_allocator.c @@ -57,7 +57,7 @@ bool nrfx_flag32_is_allocated(nrfx_atomic_t mask, uint8_t bitpos) nrfx_err_t nrfx_flag32_alloc(nrfx_atomic_t * p_mask, uint8_t *p_flag) { - int8_t idx; + uint8_t idx; uint32_t new_mask, prev_mask; do { @@ -66,8 +66,11 @@ nrfx_err_t nrfx_flag32_alloc(nrfx_atomic_t * p_mask, uint8_t *p_flag) { return NRFX_ERROR_NO_MEM; } + else + { + idx = (uint8_t)(31UL - NRF_CLZ(prev_mask)); + } - idx = 31 - NRF_CLZ(prev_mask); new_mask = prev_mask & ~NRFX_BIT(idx); } while (!NRFX_ATOMIC_CAS(p_mask, prev_mask, new_mask)); diff --git a/helpers/nrfx_gppi.h b/helpers/nrfx_gppi.h index 7128c8f46..f6103bb43 100644 --- a/helpers/nrfx_gppi.h +++ b/helpers/nrfx_gppi.h @@ -297,6 +297,15 @@ void nrfx_gppi_fork_endpoint_setup(uint8_t channel, uint32_t fork_tep); void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep); #endif // defined(PPI_FEATURE_FORKS_PRESENT) || defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) +/** + * @brief Function for setting multiple channels in a channel group. + * + * @param[in] channel_mask Channels to be set in the group. + * @param[in] channel_group Channel group. + */ +void nrfx_gppi_channels_group_set(uint32_t channel_mask, + nrfx_gppi_channel_group_t channel_group); + /** * @brief Function for including multiple channels in a channel group. * diff --git a/helpers/nrfx_gppi_dppi.c b/helpers/nrfx_gppi_dppi.c index cf7994772..e10d01de9 100644 --- a/helpers/nrfx_gppi_dppi.c +++ b/helpers/nrfx_gppi_dppi.c @@ -111,6 +111,14 @@ void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep) nrfx_gppi_task_endpoint_clear(channel, fork_tep); } +void nrfx_gppi_channels_group_set(uint32_t channel_mask, + nrfx_gppi_channel_group_t channel_group) +{ + nrfy_dppi_channels_group_set(NRF_DPPIC, + channel_mask, + (nrf_dppi_channel_group_t)channel_group); +} + void nrfx_gppi_channels_include_in_group(uint32_t channel_mask, nrfx_gppi_channel_group_t channel_group) { diff --git a/helpers/nrfx_gppi_ppi.c b/helpers/nrfx_gppi_ppi.c index 35e75f2cb..2d257817b 100644 --- a/helpers/nrfx_gppi_ppi.c +++ b/helpers/nrfx_gppi_ppi.c @@ -106,6 +106,14 @@ void nrfx_gppi_fork_endpoint_clear(uint8_t channel, uint32_t fork_tep) } #endif +void nrfx_gppi_channels_group_set(uint32_t channel_mask, + nrfx_gppi_channel_group_t channel_group) +{ + nrf_ppi_channels_group_set(NRF_PPI, + channel_mask, + (nrf_ppi_channel_group_t)channel_group); +} + void nrfx_gppi_channels_include_in_group(uint32_t channel_mask, nrfx_gppi_channel_group_t channel_group) { diff --git a/helpers/nrfx_ram_ctrl.c b/helpers/nrfx_ram_ctrl.c new file mode 100644 index 000000000..2d51c7fe7 --- /dev/null +++ b/helpers/nrfx_ram_ctrl.c @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2023, Nordic Semiconductor ASA + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +typedef struct +{ + uint8_t block:4; + uint8_t section:4; +} ram_block_section_t; + +typedef union +{ + ram_block_section_t decoded; + uint8_t raw; +} ram_unit_t; + +#if !defined(NRF_MEMORY_RAM_BASE) && defined(NRF_MEMORY_RAM0_BASE) +#define NRF_MEMORY_RAM_BASE NRF_MEMORY_RAM0_BASE +#endif + +#define RAM_NON_UNIFORM_SECTION_DECLARE(i, _block, _section) {.decoded = {_block, _section}} + +#if defined(NRF51) +#define RAM_SECTION_UNIT_SIZE 8192 +#define RAM_UNIFORM_BLOCKS 4 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 1 +#define RAM_UNIFORM_SECTIONS_TOTAL 4 +#error "Unsupported device." +#elif defined(NRF52805_XXAA) || defined(NRF52810_XXAA) || defined(NRF52811_XXAA) +#define RAM_SECTION_UNIT_SIZE 4096 +#define RAM_UNIFORM_BLOCKS 3 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 2 +#define RAM_UNIFORM_SECTIONS_TOTAL 6 +#elif defined(NRF52820_XXAA) +#define RAM_SECTION_UNIT_SIZE 4096 +#define RAM_UNIFORM_BLOCKS 4 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 2 +#define RAM_UNIFORM_SECTIONS_TOTAL 8 +#elif defined(NRF52832_XXAA) +#define RAM_SECTION_UNIT_SIZE 4096 +#define RAM_UNIFORM_BLOCKS 8 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 2 +#define RAM_UNIFORM_SECTIONS_TOTAL 16 +#elif defined(NRF52833_XXAA) +#define RAM_SECTION_UNIT_SIZE 4096 +#define RAM_UNIFORM_BLOCKS 8 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 2 +#define RAM_UNIFORM_SECTIONS_TOTAL 16 +#define RAM_NON_UNIFORM_BLOCK_INDEX 8 +#define RAM_NON_UNIFORM_BLOCK_UNITS 8 +#define RAM_NON_UNIFORM_SECTIONS \ + NRFX_LISTIFY(RAM_NON_UNIFORM_BLOCK_UNITS, \ + RAM_NON_UNIFORM_SECTION_DECLARE, (,), \ + RAM_NON_UNIFORM_BLOCK_INDEX, 0), /* Section 0 of block 8 - 8 * 4 kB units. */ \ + NRFX_LISTIFY(RAM_NON_UNIFORM_BLOCK_UNITS, \ + RAM_NON_UNIFORM_SECTION_DECLARE, (,), \ + RAM_NON_UNIFORM_BLOCK_INDEX, 1) /* Section 1 of block 8 - 8 * 4 kB units. */ +#elif defined(NRF52840_XXAA) +#define RAM_SECTION_UNIT_SIZE 4096 +#define RAM_UNIFORM_BLOCKS 8 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 2 +#define RAM_UNIFORM_SECTIONS_TOTAL 16 +#define RAM_NON_UNIFORM_BLOCK_INDEX 8 +#define RAM_NON_UNIFORM_BLOCK_UNITS 8 +#define RAM_NON_UNIFORM_SECTIONS \ + NRFX_LISTIFY(RAM_NON_UNIFORM_BLOCK_UNITS, \ + RAM_NON_UNIFORM_SECTION_DECLARE, (,), \ + RAM_NON_UNIFORM_BLOCK_INDEX, 0), /* Section 0 of block 8 - 8 * 4 kB units. */ \ + NRFX_LISTIFY(RAM_NON_UNIFORM_BLOCK_UNITS, \ + RAM_NON_UNIFORM_SECTION_DECLARE, (,), \ + RAM_NON_UNIFORM_BLOCK_INDEX, 1), /* Section 1 of block 8 - 8 * 4 kB units. */ \ + NRFX_LISTIFY(RAM_NON_UNIFORM_BLOCK_UNITS, \ + RAM_NON_UNIFORM_SECTION_DECLARE, (,), \ + RAM_NON_UNIFORM_BLOCK_INDEX, 2), /* Section 2 of block 8 - 8 * 4 kB units. */ \ + NRFX_LISTIFY(RAM_NON_UNIFORM_BLOCK_UNITS, \ + RAM_NON_UNIFORM_SECTION_DECLARE, (,), \ + RAM_NON_UNIFORM_BLOCK_INDEX, 3), /* Section 3 of block 8 - 8 * 4 kB units. */ \ + NRFX_LISTIFY(RAM_NON_UNIFORM_BLOCK_UNITS, \ + RAM_NON_UNIFORM_SECTION_DECLARE, (,), \ + RAM_NON_UNIFORM_BLOCK_INDEX, 4), /* Section 4 of block 8 - 8 * 4 kB units. */ \ + NRFX_LISTIFY(RAM_NON_UNIFORM_BLOCK_UNITS, \ + RAM_NON_UNIFORM_SECTION_DECLARE, (,), \ + RAM_NON_UNIFORM_BLOCK_INDEX, 5) /* Section 5 of block 8 - 8 * 4 kB units. */ +#elif defined(NRF5340_XXAA_APPLICATION) +#define RAM_SECTION_UNIT_SIZE 4096 +#define RAM_UNIFORM_BLOCKS 8 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 16 +#define RAM_UNIFORM_SECTIONS_TOTAL 128 +#elif defined(NRF5340_XXAA_NETWORK) +#define RAM_SECTION_UNIT_SIZE 4096 +#define RAM_UNIFORM_BLOCKS 4 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 4 +#define RAM_UNIFORM_SECTIONS_TOTAL 16 +#elif defined(NRF9120_XXAA) || defined(NRF9160_XXAA) +#define RAM_SECTION_UNIT_SIZE 8192 +#define RAM_UNIFORM_BLOCKS 8 +#define RAM_UNIFORM_SECTIONS_PER_BLOCK 4 +#define RAM_UNIFORM_SECTIONS_TOTAL 32 +#elif !defined(RAM_SECTION_UNIT_SIZE) +#error "Unsupported device." +#endif + +#define RAM_UNIFORM_SECTION_DECLARE(i, ...) \ + {.decoded = {i / RAM_UNIFORM_SECTIONS_PER_BLOCK, i % RAM_UNIFORM_SECTIONS_PER_BLOCK}} + +#if defined(RAM_NON_UNIFORM_SECTIONS) +static const ram_unit_t unit_to_block_section_lut[] = +{ +#if defined(RAM_UNIFORM_SECTIONS_TOTAL) + NRFX_LISTIFY(RAM_UNIFORM_SECTIONS_TOTAL, RAM_UNIFORM_SECTION_DECLARE, (,)), +#endif + RAM_NON_UNIFORM_SECTIONS, +}; +#endif + +typedef void (* ram_ctrl_block_section_op_t)(uint8_t block_idx, + uint32_t section_mask, + bool enable); + +static void ram_ctrl_block_section_power_enable_set(uint8_t block_idx, + uint32_t section_mask, + bool enable) +{ + nrfx_ram_ctrl_section_power_mask_enable_set(block_idx, section_mask, enable); +} + +static void ram_ctrl_block_section_retention_enable_set(uint8_t block_idx, + uint32_t section_mask, + bool enable) +{ + nrfx_ram_ctrl_section_retention_mask_enable_set(block_idx, section_mask, enable); +} + +static void ram_ctrl_block_section_iterate(void const * p_object, + size_t length, + bool enable, + ram_ctrl_block_section_op_t handler) +{ + NRFX_ASSERT(nrfx_is_in_ram(p_object)); + NRFX_ASSERT(length); + + size_t rel_obj_adr = (size_t)p_object - NRF_MEMORY_RAM_BASE; + size_t obj_start_addr = rel_obj_adr; + size_t obj_end_addr = rel_obj_adr + length; + + /* Handle case when the object is aligned to section boundaries, + * which could cause additional section being incorrectly iterated over. */ + obj_end_addr--; + + size_t ram_unit_start_idx = obj_start_addr / RAM_SECTION_UNIT_SIZE; + size_t ram_unit_end_idx = obj_end_addr / RAM_SECTION_UNIT_SIZE; + + uint8_t block; + uint8_t section; + ram_unit_t prev_ram_unit = {.raw = UINT8_MAX}; + for (size_t idx = ram_unit_start_idx; idx <= ram_unit_end_idx; idx++) + { +#if defined(RAM_NON_UNIFORM_SECTIONS) + ram_unit_t const * p_ram_unit = &unit_to_block_section_lut[idx]; + block = p_ram_unit->decoded.block; + section = p_ram_unit->decoded.section; + + ram_unit_t prev_ram_unit_copy = prev_ram_unit; + prev_ram_unit.raw = p_ram_unit->raw; + if (p_ram_unit->raw == prev_ram_unit_copy.raw) + { + continue; + } +#else + block = (uint8_t)idx / RAM_UNIFORM_SECTIONS_PER_BLOCK; + section = idx % RAM_UNIFORM_SECTIONS_PER_BLOCK; + (void)prev_ram_unit; +#endif + handler(block, 1UL << section, enable); + } +} + +void nrfx_ram_ctrl_power_enable_set(void const * p_object, size_t length, bool enable) +{ + ram_ctrl_block_section_iterate(p_object, + length, + enable, + ram_ctrl_block_section_power_enable_set); +} + +void nrfx_ram_ctrl_retention_enable_set(void const * p_object, size_t length, bool enable) +{ + ram_ctrl_block_section_iterate(p_object, + length, + enable, + ram_ctrl_block_section_retention_enable_set); +} diff --git a/helpers/nrfx_ram_ctrl.h b/helpers/nrfx_ram_ctrl.h new file mode 100644 index 000000000..89d42b694 --- /dev/null +++ b/helpers/nrfx_ram_ctrl.h @@ -0,0 +1,165 @@ +/* + * Copyright (c) 2023, Nordic Semiconductor ASA + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NRFX_RAM_CTRL_H +#define NRFX_RAM_CTRL_H + +#include + +#if defined(MEMCONF_PRESENT) +#include +#elif defined(NRF_VMC) +#include +#elif defined(POWER_PRESENT) +#include +#else +#error "Unsupported." +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @defgroup nrfx_ram_ctrl Generic RAM Control layer + * @{ + * @ingroup nrfx + * + * @brief Helper layer that provides a uniform way of controlling the RAM power and retention settings. + */ + +/** + * @brief Function for setting if the RAM sections containing specified object + * are to be powered on or off. + * + * @param[in] p_object Pointer to the object. + * @param[in] length Object size in bytes. + * @param[in] enable True if RAM sections are to be powered on, false otherwise. + */ +void nrfx_ram_ctrl_power_enable_set(void const * p_object, size_t length, bool enable); + +/** + * @brief Function for setting if the RAM sections containing specified object + * are to be retained or not. + * + * @param[in] p_object Pointer to the object. + * @param[in] length Object size in bytes. + * @param[in] enable True if RAM sections are to be retained, false otherwise. + */ +void nrfx_ram_ctrl_retention_enable_set(void const * p_object, size_t length, bool enable); + +/** + * @brief Function for setting if the specified mask of RAM sections contained within given RAM block + * is to be powered on or off. + * + * @param[in] block_idx RAM block index. + * @param[in] section_mask Mask of RAM sections. + * @param[in] enable True if RAM sections are to be powered on, false otherwise. + */ +__STATIC_INLINE void nrfx_ram_ctrl_section_power_mask_enable_set(uint8_t block_idx, + uint32_t section_mask, + bool enable) +{ +#if defined(MEMCONF_PRESENT) + nrf_memconf_ramblock_control_mask_enable_set(NRF_MEMCONF, block_idx, section_mask, enable); + +#elif defined(NRF_VMC) + if (enable) + { + nrf_vmc_ram_block_power_set(NRF_VMC, block_idx, (nrf_vmc_power_t)section_mask); + } + else + { + nrf_vmc_ram_block_power_clear(NRF_VMC, block_idx, (nrf_vmc_power_t)section_mask); + } + +#elif defined(POWER_PRESENT) + section_mask <<= POWER_RAM_POWER_S0POWER_Pos; + if (enable) + { + nrf_power_rampower_mask_on(NRF_POWER, block_idx, section_mask); + } + else + { + nrf_power_rampower_mask_off(NRF_POWER, block_idx, section_mask); + } + +#endif +} + +/** + * @brief Function for setting if the specified mask of RAM sections contained within given RAM block + * is to be retained or not. + * + * @param[in] block_idx RAM block index. + * @param[in] section_mask Mask of RAM sections. + * @param[in] enable True if RAM sections are to be retained, false otherwise. + */ +__STATIC_INLINE void nrfx_ram_ctrl_section_retention_mask_enable_set(uint8_t block_idx, + uint32_t section_mask, + bool enable) +{ +#if defined(MEMCONF_PRESENT) + nrf_memconf_ramblock_ret_mask_enable_set(NRF_MEMCONF, block_idx, section_mask, enable); + +#elif defined(NRF_VMC) + if (enable) + { + nrf_vmc_ram_block_retention_set(NRF_VMC, block_idx, (nrf_vmc_retention_t)section_mask); + } + else + { + nrf_vmc_ram_block_retention_clear(NRF_VMC, block_idx, (nrf_vmc_retention_t)section_mask); + } + +#elif defined(POWER_PRESENT) + section_mask <<= POWER_RAM_POWER_S0RETENTION_Pos; + if (enable) + { + nrf_power_rampower_mask_on(NRF_POWER, block_idx, section_mask); + } + else + { + nrf_power_rampower_mask_off(NRF_POWER, block_idx, section_mask); + } + +#endif +} + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif // NRFX_RAM_CTRL_H diff --git a/helpers/nrfx_reset_reason.h b/helpers/nrfx_reset_reason.h index 5ab1df0bd..0582b48ff 100644 --- a/helpers/nrfx_reset_reason.h +++ b/helpers/nrfx_reset_reason.h @@ -55,6 +55,70 @@ extern "C" { * @brief Helper layer that provides a uniform way of checking the reset reason. */ +#if NRF_POWER_HAS_RESETREAS_CTRLAP || NRF_RESET_HAS_CTRLAP_RESET || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether CTRAP reset reason is present. */ +#define NRFX_RESET_REASON_HAS_CTRLAP 1 +#else +#define NRFX_RESET_REASON_HAS_CTRLAP 0 +#endif + +#if NRF_RESET_HAS_NETWORK || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether network reset reasons are present. */ +#define NRFX_RESET_REASON_HAS_NETWORK 1 +#else +#define NRFX_RESET_REASON_HAS_NETWORK 0 +#endif + +#if NRF_POWER_HAS_RESETREAS_LPCOMP || defined(RESET_RESETREAS_LPCOMP_Msk) || \ + defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether LPCOMP reset reason is present. */ +#define NRFX_RESET_REASON_HAS_LPCOMP 1 +#else +#define NRFX_RESET_REASON_HAS_LPCOMP 0 +#endif + +#if NRF_POWER_HAS_RESETREAS_NFC || defined(RESET_RESETREAS_NFC_Msk) || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether NFC reset reason is present. */ +#define NRFX_RESET_REASON_HAS_NFC 1 +#else +#define NRFX_RESET_REASON_HAS_NFC 0 +#endif + +#if NRF_POWER_HAS_RESETREAS_VBUS || NRF_RESET_HAS_VBUS_RESET || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether VBUS reset reason is present. */ +#define NRFX_RESET_REASON_HAS_VBUS 1 +#else +#define NRFX_RESET_REASON_HAS_VBUS 0 +#endif + +#if NRF_RESET_HAS_CTRLAPSOFT_RESET || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether CTRL-AP reset reason is present. */ +#define NRFX_RESET_REASON_HAS_CTRLAPSOFT 1 +#else +#define NRFX_RESET_REASON_HAS_CTRLAPSOFT 0 +#endif + +#if NRF_RESET_HAS_CTRLAPHARD_RESET || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether CTRL-AP hard reset reason is present. */ +#define NRFX_RESET_REASON_HAS_CTRLAPHARD 1 +#else +#define NRFX_RESET_REASON_HAS_CTRLAPHARD 0 +#endif + +#if NRF_RESET_HAS_CTRLAPPIN_RESET || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether CTRL-AP pin reset reason is present. */ +#define NRFX_RESET_REASON_HAS_CTRLAPPIN 1 +#else +#define NRFX_RESET_REASON_HAS_CTRLAPPIN 0 +#endif + +#if NRF_RESET_HAS_GRTC_RESET || defined(__NRFX_DOXYGEN__) +/** @brief Symbol indicating whether GRTC reset reason is present. */ +#define NRFX_RESET_REASON_HAS_GRTC 1 +#else +#define NRFX_RESET_REASON_HAS_GRTC 0 +#endif + /** @brief Reset reason bit masks. */ typedef enum { @@ -65,8 +129,10 @@ typedef enum NRFX_RESET_REASON_DOG0_MASK = RESET_RESETREAS_DOG0_Msk, /**< Reset from watchdog/application watchdog timer 0 detected. */ NRFX_RESET_REASON_DOG_MASK = NRFX_RESET_REASON_DOG0_MASK, +#if NRFX_RESET_REASON_HAS_CTRLAP /**< Reset from application CTRL-AP detected. */ NRFX_RESET_REASON_CTRLAP_MASK = RESET_RESETREAS_CTRLAP_Msk, +#endif /**< Reset from soft reset/application soft reset detected. Deprecated. */ NRFX_RESETREAS_SREQ_MASK = RESET_RESETREAS_SREQ_Msk, /**< Reset from soft reset/application soft reset detected. */ @@ -82,7 +148,7 @@ typedef enum /**< Reset due to wakeup from System OFF mode when wakeup is triggered by entering the debug * interface mode. */ NRFX_RESET_REASON_DIF_MASK = RESET_RESETREAS_DIF_Msk, -#if NRF_RESET_HAS_NETWORK +#if NRFX_RESET_REASON_HAS_NETWORK /**< Reset from network soft reset detected. */ NRFX_RESET_REASON_LSREQ_MASK = RESET_RESETREAS_LSREQ_Msk, /**< Reset from network CPU lockup detected. */ @@ -91,34 +157,55 @@ typedef enum NRFX_RESET_REASON_LDOG_MASK = RESET_RESETREAS_LDOG_Msk, /**< Force off reset from application core detected. */ NRFX_RESET_REASON_MFORCEOFF_MASK = RESET_RESETREAS_MFORCEOFF_Msk, -#endif // NRF_RESET_HAS_NETWORK +#endif // NRFX_RESET_REASON_HAS_NETWORK /**< Reset after wakeup from System OFF mode due to NFC field being detected. */ NRFX_RESET_REASON_NFC_MASK = RESET_RESETREAS_NFC_Msk, /**< Reset from application watchdog timer 1 detected. */ NRFX_RESET_REASON_DOG1_MASK = RESET_RESETREAS_DOG1_Msk, +#if NRFX_RESET_REASON_HAS_VBUS /**< Reset after wakeup from System OFF mode due to VBUS rising into valid range. */ NRFX_RESET_REASON_VBUS_MASK = RESET_RESETREAS_VBUS_Msk, -#if NRF_RESET_HAS_NETWORK +#endif +#if NRFX_RESET_REASON_HAS_NETWORK /**< Reset from network CTRL-AP detected. */ NRFX_RESET_REASON_LCTRLAP_MASK = RESET_RESETREAS_LCTRLAP_Msk, #endif // NRF_RESET_HAS_NETWORK +#if NRF_RESET_HAS_CTRLAPSOFT_RESET + /**< Soft reset from CTRL-AP detected. */ + NRFX_RESET_REASON_CTRLAPSOFT_MASK = RESET_RESETREAS_CTRLAPSOFT_Msk, +#endif +#if NRFX_RESET_REASON_HAS_CTRLAPSOFT + /**< Reset due to CTRL-AP hard reset. */ + NRFX_RESET_REASON_CTRLAPHARD_MASK = RESET_RESETREAS_CTRLAPHARD_Msk, +#endif +#if NRFX_RESET_REASON_HAS_CTRLAPPIN + /**< Reset due to CTRL-AP pin reset. */ + NRFX_RESET_REASON_CTRLAPPIN_MASK = RESET_RESETREAS_CTRLAPPIN_Msk, +#endif +#if NRFX_RESET_REASON_HAS_GRTC + /**< Reset due to wakeup from GRTC. */ + NRFX_RESET_REASON_GRTC_MASK = RESET_RESETREAS_GRTC_Msk, +#endif +#if defined(NRFX_RESET_REASON_EXT) + NRFX_RESET_REASON_EXT +#endif #else NRFX_RESET_REASON_RESETPIN_MASK = POWER_RESETREAS_RESETPIN_Msk, NRFX_RESET_REASON_DOG_MASK = POWER_RESETREAS_DOG_Msk, NRFX_RESET_REASON_SREQ_MASK = POWER_RESETREAS_SREQ_Msk , NRFX_RESET_REASON_LOCKUP_MASK = POWER_RESETREAS_LOCKUP_Msk, NRFX_RESET_REASON_OFF_MASK = POWER_RESETREAS_OFF_Msk, -#if defined(POWER_RESETREAS_CTRLAP_Msk) +#if NRFX_RESET_REASON_HAS_CTRLAP NRFX_RESET_REASON_CTRLAP_MASK = POWER_RESETREAS_CTRLAP_Msk, #endif -#if defined(POWER_RESETREAS_LPCOMP_Msk) +#if NRFX_RESET_REASON_HAS_LPCOMP NRFX_RESET_REASON_LPCOMP_MASK = POWER_RESETREAS_LPCOMP_Msk, #endif NRFX_RESET_REASON_DIF_MASK = POWER_RESETREAS_DIF_Msk, -#if defined(POWER_RESETREAS_NFC_Msk) +#if NRFX_RESET_REASON_HAS_NFC NRFX_RESET_REASON_NFC_MASK = POWER_RESETREAS_NFC_Msk, #endif -#if defined(POWER_RESETREAS_VBUS_Msk) +#if NRFX_RESET_REASON_HAS_VBUS NRFX_RESET_REASON_VBUS_MASK = POWER_RESETREAS_VBUS_Msk, #endif #endif // !NRF_POWER_HAS_RESETREAS || defined(__NRFX_DOXYGEN__) diff --git a/mdk/nrf.h b/mdk/nrf.h index 89fa9ec49..3855b3076 100644 --- a/mdk/nrf.h +++ b/mdk/nrf.h @@ -37,7 +37,7 @@ POSSIBILITY OF SUCH DAMAGE. /* MDK version */ #define MDK_MAJOR_VERSION 8 -#define MDK_MINOR_VERSION 55 +#define MDK_MINOR_VERSION 58 #define MDK_MICRO_VERSION 0 diff --git a/mdk/nrf51.h b/mdk/nrf51.h index ccef50e19..c939ba111 100644 --- a/mdk/nrf51.h +++ b/mdk/nrf51.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.\n * @file nrf51.h * @brief CMSIS HeaderFile * @version 522 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:07 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:27 * from File 'nrf51.svd', - * last modified on Thursday, 22.06.2023 06:51:53 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf52.h b/mdk/nrf52.h index 26d2d36a4..43bea8242 100644 --- a/mdk/nrf52.h +++ b/mdk/nrf52.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE. * @file nrf52.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:14 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:31 * from File 'nrf52.svd', - * last modified on Thursday, 22.06.2023 06:51:53 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf52805.h b/mdk/nrf52805.h index 7a8c94b60..60973c868 100644 --- a/mdk/nrf52805.h +++ b/mdk/nrf52805.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.\n * @file nrf52805.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:08 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:28 * from File 'nrf52805.svd', - * last modified on Thursday, 22.06.2023 06:51:53 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf52810.h b/mdk/nrf52810.h index 1a05c2d79..687ce83b0 100644 --- a/mdk/nrf52810.h +++ b/mdk/nrf52810.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.\n * @file nrf52810.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:10 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:28 * from File 'nrf52810.svd', - * last modified on Thursday, 22.06.2023 06:51:53 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf52811.h b/mdk/nrf52811.h index bf488d971..5d067746f 100644 --- a/mdk/nrf52811.h +++ b/mdk/nrf52811.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.\n * @file nrf52811.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:11 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:29 * from File 'nrf52811.svd', - * last modified on Thursday, 22.06.2023 06:51:53 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf52820.h b/mdk/nrf52820.h index 76ed69045..873bcc8bb 100644 --- a/mdk/nrf52820.h +++ b/mdk/nrf52820.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.\n * @file nrf52820.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:12 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:30 * from File 'nrf52820.svd', - * last modified on Thursday, 22.06.2023 06:51:53 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf52833.h b/mdk/nrf52833.h index 57fe49de9..4aca39ed0 100644 --- a/mdk/nrf52833.h +++ b/mdk/nrf52833.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.\n * @file nrf52833.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:16 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:32 * from File 'nrf52833.svd', - * last modified on Thursday, 22.06.2023 06:51:53 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf52840.h b/mdk/nrf52840.h index a16969c21..fb3e701ab 100644 --- a/mdk/nrf52840.h +++ b/mdk/nrf52840.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE.\n * @file nrf52840.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:18 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:33 * from File 'nrf52840.svd', - * last modified on Thursday, 22.06.2023 06:51:54 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf52_erratas.h b/mdk/nrf52_erratas.h index 2dfb5b889..fbc75fe79 100644 --- a/mdk/nrf52_erratas.h +++ b/mdk/nrf52_erratas.h @@ -10733,7 +10733,7 @@ static bool nrf52_errata_210(void) #endif #ifndef NRF52_ERRATA_211_ENABLE_WORKAROUND - #define NRF52_ERRATA_211_ENABLE_WORKAROUND 0 + #define NRF52_ERRATA_211_ENABLE_WORKAROUND NRF52_ERRATA_211_PRESENT #endif static bool nrf52_errata_211(void) @@ -12108,7 +12108,6 @@ static bool nrf52_errata_233(void) /* ========= Errata 236 ========= */ #if defined (NRF52810_XXAA) || defined (DEVELOP_IN_NRF52810) \ || defined (NRF52811_XXAA) || defined (DEVELOP_IN_NRF52811) \ - || defined (NRF52820_XXAA) || defined (DEVELOP_IN_NRF52820) \ || defined (NRF52833_XXAA) || defined (DEVELOP_IN_NRF52833) \ || defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840) #define NRF52_ERRATA_236_PRESENT 1 @@ -12127,7 +12126,6 @@ static bool nrf52_errata_236(void) #else #if defined (NRF52810_XXAA) || defined (DEVELOP_IN_NRF52810)\ || defined (NRF52811_XXAA) || defined (DEVELOP_IN_NRF52811)\ - || defined (NRF52820_XXAA) || defined (DEVELOP_IN_NRF52820)\ || defined (NRF52833_XXAA) || defined (DEVELOP_IN_NRF52833)\ || defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840) uint32_t var1 = *(uint32_t *)0x10000130ul; @@ -12199,24 +12197,6 @@ static bool nrf52_errata_236(void) } } #endif - #if defined (NRF52820_XXAA) || defined (DEVELOP_IN_NRF52820) - if (var1 == 0x10) - { - switch(var2) - { - case 0x00ul: - return true; - case 0x01ul: - return true; - case 0x02ul: - return false; - case 0x03ul: - return false; - default: - return false; - } - } - #endif return false; #endif } @@ -12437,9 +12417,9 @@ static bool nrf52_errata_241(void) case 0x01ul: return true; case 0x02ul: - return false; + return true; default: - return false; + return true; } } #endif @@ -12465,9 +12445,9 @@ static bool nrf52_errata_241(void) case 0x00ul: return true; case 0x01ul: - return false; + return true; default: - return false; + return true; } } #endif diff --git a/mdk/nrf5340_application.h b/mdk/nrf5340_application.h index 4df3121d9..3da4b55bd 100644 --- a/mdk/nrf5340_application.h +++ b/mdk/nrf5340_application.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE. * @file nrf5340_application.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:20 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:35 * from File 'nrf5340_application.svd', - * last modified on Thursday, 22.06.2023 06:51:54 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf5340_network.h b/mdk/nrf5340_network.h index 957504833..16dcc4797 100644 --- a/mdk/nrf5340_network.h +++ b/mdk/nrf5340_network.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE. * @file nrf5340_network.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:31 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:43 * from File 'nrf5340_network.svd', - * last modified on Thursday, 22.06.2023 06:51:54 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf53_erratas.h b/mdk/nrf53_erratas.h index 9ad1038fa..84915bbba 100644 --- a/mdk/nrf53_erratas.h +++ b/mdk/nrf53_erratas.h @@ -142,10 +142,14 @@ static bool nrf53_errata_140(void) __UNUSED; static bool nrf53_errata_152(void) __UNUSED; static bool nrf53_errata_153(void) __UNUSED; static bool nrf53_errata_154(void) __UNUSED; +static bool nrf53_errata_155(void) __UNUSED; static bool nrf53_errata_157(void) __UNUSED; static bool nrf53_errata_158(void) __UNUSED; static bool nrf53_errata_160(void) __UNUSED; static bool nrf53_errata_161(void) __UNUSED; +static bool nrf53_errata_162(void) __UNUSED; +static bool nrf53_errata_163(void) __UNUSED; +static bool nrf53_errata_165(void) __UNUSED; /* ========= Errata 1 ========= */ #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) @@ -5749,10 +5753,59 @@ static bool nrf53_errata_154(void) #endif } +/* ========= Errata 155 ========= */ +#if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined(NRF_NETWORK) + #define NRF53_ERRATA_155_PRESENT 1 + #else + #define NRF53_ERRATA_155_PRESENT 0 + #endif +#else + #define NRF53_ERRATA_155_PRESENT 0 +#endif + +#ifndef NRF53_ERRATA_155_ENABLE_WORKAROUND + #define NRF53_ERRATA_155_ENABLE_WORKAROUND NRF53_ERRATA_155_PRESENT +#endif + +static bool nrf53_errata_155(void) +{ + #ifndef NRF53_SERIES + return false; + #else + #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined(NRF_NETWORK) + uint32_t var1 = *(uint32_t *)0x01FF0130ul; + uint32_t var2 = *(uint32_t *)0x01FF0134ul; + #endif + #endif + #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined (NRF_NETWORK) + if (var1 == 0x07) + { + switch(var2) + { + case 0x02ul: + return false; + case 0x03ul: + return false; + case 0x04ul: + return false; + case 0x05ul: + return true; + default: + return true; + } + } + #endif + #endif + return false; + #endif +} + /* ========= Errata 157 ========= */ #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) - #if defined(NRF_APPLICATION) || \ - defined(NRF_NETWORK) + #if defined(NRF_NETWORK) #define NRF53_ERRATA_157_PRESENT 1 #else #define NRF53_ERRATA_157_PRESENT 0 @@ -5771,22 +5824,13 @@ static bool nrf53_errata_157(void) return false; #else #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) - #if defined(NRF_APPLICATION) - #if defined(NRF_TRUSTZONE_NONSECURE) - uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000130ul)); - uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000134ul)); - #else - uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000130ul)); - uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000134ul)); - #endif - #elif defined(NRF_NETWORK) + #if defined(NRF_NETWORK) uint32_t var1 = *(uint32_t *)0x01FF0130ul; uint32_t var2 = *(uint32_t *)0x01FF0134ul; #endif #endif #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) - #if defined (NRF_APPLICATION)\ - || defined (NRF_NETWORK) + #if defined (NRF_NETWORK) if (var1 == 0x07) { switch(var2) @@ -5921,7 +5965,8 @@ static bool nrf53_errata_160(void) /* ========= Errata 161 ========= */ #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) - #if defined(NRF_NETWORK) + #if defined(NRF_APPLICATION) || \ + defined(NRF_NETWORK) #define NRF53_ERRATA_161_PRESENT 1 #else #define NRF53_ERRATA_161_PRESENT 0 @@ -5978,4 +6023,179 @@ static bool nrf53_errata_161(void) #endif } +/* ========= Errata 162 ========= */ +#if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined(NRF_APPLICATION) || \ + defined(NRF_NETWORK) + #define NRF53_ERRATA_162_PRESENT 1 + #else + #define NRF53_ERRATA_162_PRESENT 0 + #endif +#else + #define NRF53_ERRATA_162_PRESENT 0 +#endif + +#ifndef NRF53_ERRATA_162_ENABLE_WORKAROUND + #define NRF53_ERRATA_162_ENABLE_WORKAROUND NRF53_ERRATA_162_PRESENT +#endif + +static bool nrf53_errata_162(void) +{ + #ifndef NRF53_SERIES + return false; + #else + #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined(NRF_APPLICATION) + #if defined(NRF_TRUSTZONE_NONSECURE) + uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000130ul)); + uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000134ul)); + #else + uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000130ul)); + uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000134ul)); + #endif + #elif defined(NRF_NETWORK) + uint32_t var1 = *(uint32_t *)0x01FF0130ul; + uint32_t var2 = *(uint32_t *)0x01FF0134ul; + #endif + #endif + #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined (NRF_APPLICATION)\ + || defined (NRF_NETWORK) + if (var1 == 0x07) + { + switch(var2) + { + case 0x02ul: + return false; + case 0x03ul: + return false; + case 0x04ul: + return false; + case 0x05ul: + return true; + default: + return true; + } + } + #endif + #endif + return false; + #endif +} + +/* ========= Errata 163 ========= */ +#if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined(NRF_APPLICATION) + #define NRF53_ERRATA_163_PRESENT 1 + #else + #define NRF53_ERRATA_163_PRESENT 0 + #endif +#else + #define NRF53_ERRATA_163_PRESENT 0 +#endif + +#ifndef NRF53_ERRATA_163_ENABLE_WORKAROUND + #define NRF53_ERRATA_163_ENABLE_WORKAROUND NRF53_ERRATA_163_PRESENT +#endif + +static bool nrf53_errata_163(void) +{ + #ifndef NRF53_SERIES + return false; + #else + #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined(NRF_APPLICATION) + #if defined(NRF_TRUSTZONE_NONSECURE) + uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000130ul)); + uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000134ul)); + #else + uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000130ul)); + uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000134ul)); + #endif + #endif + #endif + #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined (NRF_APPLICATION) + if (var1 == 0x07) + { + switch(var2) + { + case 0x02ul: + return false; + case 0x03ul: + return false; + case 0x04ul: + return false; + case 0x05ul: + return true; + default: + return true; + } + } + #endif + #endif + return false; + #endif +} + +/* ========= Errata 165 ========= */ +#if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined(NRF_APPLICATION) || \ + defined(NRF_NETWORK) + #define NRF53_ERRATA_165_PRESENT 1 + #else + #define NRF53_ERRATA_165_PRESENT 0 + #endif +#else + #define NRF53_ERRATA_165_PRESENT 0 +#endif + +#ifndef NRF53_ERRATA_165_ENABLE_WORKAROUND + #define NRF53_ERRATA_165_ENABLE_WORKAROUND NRF53_ERRATA_165_PRESENT +#endif + +static bool nrf53_errata_165(void) +{ + #ifndef NRF53_SERIES + return false; + #else + #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined(NRF_APPLICATION) + #if defined(NRF_TRUSTZONE_NONSECURE) + uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000130ul)); + uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000134ul)); + #else + uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000130ul)); + uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000134ul)); + #endif + #elif defined(NRF_NETWORK) + uint32_t var1 = *(uint32_t *)0x01FF0130ul; + uint32_t var2 = *(uint32_t *)0x01FF0134ul; + #endif + #endif + #if defined (NRF5340_XXAA) || defined (DEVELOP_IN_NRF5340) + #if defined (NRF_APPLICATION)\ + || defined (NRF_NETWORK) + if (var1 == 0x07) + { + switch(var2) + { + case 0x02ul: + return false; + case 0x03ul: + return false; + case 0x04ul: + return false; + case 0x05ul: + return true; + default: + return true; + } + } + #endif + #endif + return false; + #endif +} + #endif /* NRF53_ERRATAS_H */ diff --git a/mdk/nrf9120.h b/mdk/nrf9120.h index 3fe331f1b..41462922e 100644 --- a/mdk/nrf9120.h +++ b/mdk/nrf9120.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE. * @file nrf9120.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:33 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:44 * from File 'nrf9120.svd', - * last modified on Thursday, 22.06.2023 06:51:54 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf9160.h b/mdk/nrf9160.h index 82c4936b1..a3dc20c89 100644 --- a/mdk/nrf9160.h +++ b/mdk/nrf9160.h @@ -32,10 +32,10 @@ POSSIBILITY OF SUCH DAMAGE. * @file nrf9160.h * @brief CMSIS HeaderFile * @version 1 - * @date 22. June 2023 - * @note Generated by SVDConv V3.3.35 on Thursday, 22.06.2023 08:53:38 + * @date 20. September 2023 + * @note Generated by SVDConv V3.3.35 on Wednesday, 20.09.2023 12:45:48 * from File 'nrf9160.svd', - * last modified on Thursday, 22.06.2023 06:51:54 + * last modified on Wednesday, 20.09.2023 10:44:18 */ diff --git a/mdk/nrf_mem.h b/mdk/nrf_mem.h index cc17da007..271c225c3 100644 --- a/mdk/nrf_mem.h +++ b/mdk/nrf_mem.h @@ -118,4 +118,4 @@ POSSIBILITY OF SUCH DAMAGE. #define __HEAP_ALIGNMENT __STACK_ALIGNMENT #endif -#endif \ No newline at end of file +#endif diff --git a/mdk/startup_nrf_common.c b/mdk/startup_nrf_common.c index 246d2aa89..5d9c6e4a2 100644 --- a/mdk/startup_nrf_common.c +++ b/mdk/startup_nrf_common.c @@ -41,6 +41,11 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA. #define __HEAP_BASE ((uint32_t)(__HEAP)) #endif +/*--------------------------------------------------------------------------- + Define __PROGRAM_START to avoid conflict with CMSIS + *---------------------------------------------------------------------------*/ +#define __PROGRAM_START + /*--------------------------------------------------------------------------- Interrupt vector tables *---------------------------------------------------------------------------*/ @@ -70,7 +75,7 @@ typedef struct __zero_table { uint32_t wlen; } __zero_table_t; -void __STATIC_FORCEINLINE copy_region(const __copy_table_t * table) +__STATIC_FORCEINLINE void copy_region(const __copy_table_t * table) { for (uint32_t i = 0; i < table->wlen; ++i) { @@ -78,7 +83,7 @@ void __STATIC_FORCEINLINE copy_region(const __copy_table_t * table) } } -void __STATIC_FORCEINLINE zero_region(const __zero_table_t * table) +__STATIC_FORCEINLINE void zero_region(const __zero_table_t * table) { for (uint32_t i = 0; i < table->wlen; ++i) { @@ -86,7 +91,7 @@ void __STATIC_FORCEINLINE zero_region(const __zero_table_t * table) } } -void __STATIC_FORCEINLINE GNUInitializeMemories() +__STATIC_FORCEINLINE void GNUInitializeMemories() { /* Perform C memory initialization */ #ifndef NRF_SKIP_VARIABLE_INIT @@ -234,4 +239,4 @@ void InitializeUserMemorySections() #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #pragma clang diagnostic pop -#endif \ No newline at end of file +#endif diff --git a/mdk/system_nrf51.c b/mdk/system_nrf51.c index 7abedc0ba..be240b580 100644 --- a/mdk/system_nrf51.c +++ b/mdk/system_nrf51.c @@ -59,8 +59,8 @@ void SystemInit(void) example) will not be available. */ if (nrf51_errata_26()) { - *(uint32_t volatile *)0x40000504 = 0xC007FFDF; - *(uint32_t volatile *)0x40006C18 = 0x00008000; + *(uint32_t volatile *)0x40000504ul = 0xC007FFDFul; + *(uint32_t volatile *)0x40006C18ul = 0x00008000ul; } /* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG @@ -75,12 +75,12 @@ void SystemInit(void) as indicated by PAN 76 "System: Excessive current in sleep mode with retention" found at Product Anomaly document for your device found at https://infocenter.nordicsemi.com/index.jsp */ if (nrf51_errata_76()){ - if (*(uint32_t volatile *)0x4006EC00 != 1){ - *(uint32_t volatile *)0x4006EC00 = 0x9375; - while (*(uint32_t volatile *)0x4006EC00 != 1){ + if (*(uint32_t volatile *)0x4006EC00ul != 1ul){ + *(uint32_t volatile *)0x4006EC00ul = 0x9375ul; + while (*(uint32_t volatile *)0x4006EC00ul != 1ul){ } } - *(uint32_t volatile *)0x4006EC14 = 0xC0; + *(uint32_t volatile *)0x4006EC14ul = 0xC0ul; } } diff --git a/mdk/system_nrf52.c b/mdk/system_nrf52.c index cc482c3f0..fbf02a50b 100644 --- a/mdk/system_nrf52.c +++ b/mdk/system_nrf52.c @@ -42,33 +42,33 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA. /* Simplify later device detection macros. Check DEVELOP_IN first, as they take precedence. */ #if defined (DEVELOP_IN_NRF52805) - #define IS_NRF52805 1 + #define IS_NRF52805 1ul #elif defined (DEVELOP_IN_NRF52810) - #define IS_NRF52810 1 + #define IS_NRF52810 1ul #elif defined (DEVELOP_IN_NRF52811) - #define IS_NRF52811 1 + #define IS_NRF52811 1ul #elif defined (DEVELOP_IN_NRF52820) - #define IS_NRF52820 1 + #define IS_NRF52820 1ul #elif defined (DEVELOP_IN_NRF52832) #define IS_NRF52832 1 #elif defined (DEVELOP_IN_NRF52833) #define IS_NRF52833 1 #elif defined (DEVELOP_IN_NRF52840) - #define IS_NRF52840 1 + #define IS_NRF52840 1ul #elif defined (NRF52805_XXAA) - #define IS_NRF52805 1 + #define IS_NRF52805 1ul #elif defined (NRF52810_XXAA) - #define IS_NRF52810 1 + #define IS_NRF52810 1ul #elif defined (NRF52811_XXAA) - #define IS_NRF52811 1 + #define IS_NRF52811 1ul #elif defined (NRF52820_XXAA) - #define IS_NRF52820 1 + #define IS_NRF52820 1ul #elif defined (NRF52832_XXAA) || defined (NRF52832_XXAB) - #define IS_NRF52832 1 + #define IS_NRF52832 1ul #elif defined (NRF52833_XXAA) - #define IS_NRF52833 1 + #define IS_NRF52833 1ul #elif defined (NRF52840_XXAA) - #define IS_NRF52840 1 + #define IS_NRF52840 1ul #else #error "A supported device macro must be defined." #endif @@ -97,9 +97,9 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA. /* Select correct reset pin */ /* Handle DEVELOP_IN-targets first as they take precedence over the later macros */ #if IS_NRF52805 || IS_NRF52810 || IS_NRF52811 || IS_NRF52832 - #define RESET_PIN 21 + #define RESET_PIN 21ul #elif IS_NRF52820 || IS_NRF52833 || IS_NRF52840 - #define RESET_PIN 18 + #define RESET_PIN 18ul #else #error "A supported device macro must be defined." #endif @@ -182,9 +182,9 @@ void SystemInit(void) /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document for your device located at https://infocenter.nordicsemi.com/index.jsp */ if (nrf52_errata_36()){ - NRF_CLOCK->EVENTS_DONE = 0; - NRF_CLOCK->EVENTS_CTTO = 0; - NRF_CLOCK->CTIV = 0; + NRF_CLOCK->EVENTS_DONE = 0ul; + NRF_CLOCK->EVENTS_CTTO = 0ul; + NRF_CLOCK->CTIV = 0ul; } #endif @@ -259,7 +259,7 @@ void SystemInit(void) /* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document for your device located at https://infocenter.nordicsemi.com/index.jsp */ if (nrf52_errata_115()){ - *(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F); + *(volatile uint32_t *)0x40000EE4ul = (*(volatile uint32_t *)0x40000EE4ul & 0xFFFFFFF0ul) | (*(uint32_t *)0x10000258ul & 0x0000000Ful); } #endif @@ -285,7 +285,7 @@ void SystemInit(void) /* Workaround for Errata 182 "RADIO: Fixes for anomalies #102, #106, and #107 do not take effect" found at the Errata document for your device located at https://infocenter.nordicsemi.com/index.jsp */ if (nrf52_errata_182()){ - *(volatile uint32_t *) 0x4000173C |= (0x1 << 10); + *(volatile uint32_t *) 0x4000173Cul |= (0x1ul << 10ul); } #endif @@ -301,7 +301,7 @@ void SystemInit(void) * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit * operations are not used in your code. */ #if (__FPU_USED == 1) - SCB->CPACR |= (3UL << 20) | (3UL << 22); + SCB->CPACR |= (3UL << 20ul) | (3UL << 22ul); __DSB(); __ISB(); #endif @@ -309,12 +309,12 @@ void SystemInit(void) nrf52_handle_approtect(); #if NRF52_CONFIGURATION_249_ENABLE && (defined(NRF52805_XXAA) || defined(NRF52810_XXAA) || defined(NRF52811_XXAA)) - if (nrf52_configuration_249() && (NRF_UICR->NRFMDK[0] == 0xFFFFFFFF || NRF_UICR->NRFMDK[1] == 0xFFFFFFFF)) + if (nrf52_configuration_249() && (NRF_UICR->NRFMDK[0] == 0xFFFFFFFFul || NRF_UICR->NRFMDK[1] == 0xFFFFFFFFul)) { nvmc_config(NVMC_CONFIG_WEN_Wen); - NRF_UICR->NRFMDK[0] = 0; + NRF_UICR->NRFMDK[0] = 0ul; nvmc_wait(); - NRF_UICR->NRFMDK[1] = 0; + NRF_UICR->NRFMDK[1] = 0ul; nvmc_wait(); nvmc_config(NVMC_CONFIG_WEN_Ren); } @@ -353,9 +353,9 @@ void SystemInit(void) make sure NFC pins are mapped as GPIO. */ #if defined (DEVELOP_IN_NRF52832) && defined(NRF52810_XXAA) \ || defined (DEVELOP_IN_NRF52840) && defined(NRF52811_XXAA) - if ((*((uint32_t *)0x1000120C) & (1 << 0)) != 0){ + if ((*((uint32_t *)0x1000120Cul) & (1ul << 0ul)) != 0ul){ nvmc_config(NVMC_CONFIG_WEN_Wen); - *((uint32_t *)0x1000120C) = 0; + *((uint32_t *)0x1000120Cul) = 0ul; nvmc_wait(); nvmc_config(NVMC_CONFIG_WEN_Ren); NVIC_SystemReset(); diff --git a/mdk/system_nrf5340_application.c b/mdk/system_nrf5340_application.c index b774c37a0..009844bfc 100644 --- a/mdk/system_nrf5340_application.c +++ b/mdk/system_nrf5340_application.c @@ -75,14 +75,14 @@ void SystemInit(void) /* Set all ARM SAU regions to NonSecure if TrustZone extensions are enabled. * Nordic SPU should handle Secure Attribution tasks */ #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - SAU->CTRL |= (1 << SAU_CTRL_ALLNS_Pos); + SAU->CTRL |= (1ul << SAU_CTRL_ALLNS_Pos); #endif /* Workaround for Errata 97 "ERASEPROTECT, APPROTECT, or startup problems" found at the Errata document for your device located at https://infocenter.nordicsemi.com/index.jsp */ if (nrf53_errata_97()) { - if (*((volatile uint32_t *)0x50004A20ul) == 0) + if (*((volatile uint32_t *)0x50004A20ul) == 0ul) { *((volatile uint32_t *)0x50004A20ul) = 0xDul; *((volatile uint32_t *)0x5000491Cul) = 0x1ul; @@ -92,8 +92,8 @@ void SystemInit(void) /* Trimming of the device. Copy all the trimming values from FICR into the target addresses. Trim until one ADDR is not initialized. */ - uint32_t index = 0; - for (index = 0; index < 32ul && NRF_FICR_S->TRIMCNF[index].ADDR != 0xFFFFFFFFul; index++){ + uint32_t index = 0ul; + for (index = 0ul; index < 32ul && NRF_FICR_S->TRIMCNF[index].ADDR != 0xFFFFFFFFul; index++){ #if defined ( __ICCARM__ ) /* IAR will complain about the order of volatile pointer accesses. */ #pragma diag_suppress=Pa082 @@ -125,7 +125,7 @@ void SystemInit(void) for your device located at https://infocenter.nordicsemi.com/index.jsp */ if (nrf53_errata_46()) { - *((volatile uint32_t *)0x5003254Cul) = 0; + *((volatile uint32_t *)0x5003254Cul) = 0ul; } /* Workaround for Errata 49 "SLEEPENTER and SLEEPEXIT events asserted after pin reset" found at the Errata document @@ -134,8 +134,8 @@ void SystemInit(void) { if (NRF_RESET_S->RESETREAS & RESET_RESETREAS_RESETPIN_Msk) { - NRF_POWER_S->EVENTS_SLEEPENTER = 0; - NRF_POWER_S->EVENTS_SLEEPEXIT = 0; + NRF_POWER_S->EVENTS_SLEEPENTER = 0ul; + NRF_POWER_S->EVENTS_SLEEPEXIT = 0ul; } } @@ -157,29 +157,29 @@ void SystemInit(void) if (nrf53_errata_140()) { - if (*(volatile uint32_t *)0x50032420 & 0x80000000) + if (*(volatile uint32_t *)0x50032420ul & 0x80000000ul) { /* Reset occured during calibration */ NRF_CLOCK_S->LFCLKSRC = CLOCK_LFCLKSRC_SRC_LFSYNT; - NRF_CLOCK_S->TASKS_LFCLKSTART = 1; - while (NRF_CLOCK_S->EVENTS_LFCLKSTARTED == 0) {} - NRF_CLOCK_S->EVENTS_LFCLKSTARTED = 0; - NRF_CLOCK_S->TASKS_LFCLKSTOP = 1; + NRF_CLOCK_S->TASKS_LFCLKSTART = 1ul; + while (NRF_CLOCK_S->EVENTS_LFCLKSTARTED == 0ul) {} + NRF_CLOCK_S->EVENTS_LFCLKSTARTED = 0ul; + NRF_CLOCK_S->TASKS_LFCLKSTOP = 1ul; NRF_CLOCK_S->LFCLKSRC = CLOCK_LFCLKSRC_SRC_LFRC; } } if (nrf53_errata_160()) { - *((volatile uint32_t *)0x5000470C) = 0x7Eul; - *((volatile uint32_t *)0x5000493C) = 0x7Eul; - *((volatile uint32_t *)0x50002118) = 0x7Ful; - *((volatile uint32_t *)0x50039E04) = 0x0ul; - *((volatile uint32_t *)0x50039E08) = 0x0ul; - *((volatile uint32_t *)0x50101110) = 0x0ul; - *((volatile uint32_t *)0x50002124) = 0x0ul; - *((volatile uint32_t *)0x5000212C) = 0x0ul; - *((volatile uint32_t *)0x502012A0) = 0x0ul; + *((volatile uint32_t *)0x5000470Cul) = 0x7Eul; + *((volatile uint32_t *)0x5000493Cul) = 0x7Eul; + *((volatile uint32_t *)0x50002118ul) = 0x7Ful; + *((volatile uint32_t *)0x50039E04ul) = 0x0ul; + *((volatile uint32_t *)0x50039E08ul) = 0x0ul; + *((volatile uint32_t *)0x50101110ul) = 0x0ul; + *((volatile uint32_t *)0x50002124ul) = 0x0ul; + *((volatile uint32_t *)0x5000212Cul) = 0x0ul; + *((volatile uint32_t *)0x502012A0ul) = 0x0ul; } #if !defined(NRF_SKIP_FICR_NS_COPY_TO_RAM) @@ -212,7 +212,7 @@ void SystemInit(void) NRF_TAD_S->CLOCKSTART = TAD_CLOCKSTART_START_Msk; // Set up Trace pad SPU firewall - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA0_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA0_PIN); // Configure trace port pad NRF_P0_S->PIN_CNF[TRACE_TRACEDATA0_PIN] = TRACE_PIN_CNF_VALUE; @@ -232,11 +232,11 @@ void SystemInit(void) NRF_TAD_S->CLOCKSTART = TAD_CLOCKSTART_START_Msk; // Set up Trace pads SPU firewall - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACECLK_PIN); - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA0_PIN); - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA1_PIN); - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA2_PIN); - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA3_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACECLK_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA0_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA1_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA2_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA3_PIN); // Configure trace port pads NRF_P0_S->PIN_CNF[TRACE_TRACECLK_PIN] = TRACE_PIN_CNF_VALUE; @@ -259,7 +259,7 @@ void SystemInit(void) /* Allow Non-Secure code to run FPU instructions. * If only the secure code should control FPU power state these registers should be configured accordingly in the secure application code. */ - SCB->NSACR |= (3UL << 10); + SCB->NSACR |= (3UL << 10ul); /* Handle fw-branch APPROTECT setup. */ nrf53_handle_approtect(); @@ -269,8 +269,8 @@ void SystemInit(void) /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit * operations are not used in your code. */ - #if (__FPU_USED == 1) - SCB->CPACR |= (3UL << 20) | (3UL << 22); + #if (__FPU_USED == 1ul) + SCB->CPACR |= (3UL << 20ul) | (3UL << 22ul); __DSB(); __ISB(); #endif @@ -300,7 +300,7 @@ void SystemStoreFICRNS() /* Make RAM region NS. */ uint32_t ram_region = ((uint32_t)NRF_FICR_NS - (uint32_t)RAM_BASE) / SPU_RAMREGION_SIZE; - NRF_SPU_S->RAMREGION[ram_region].PERM &= ~(1 << SPU_RAMREGION_PERM_SECATTR_Pos); + NRF_SPU_S->RAMREGION[ram_region].PERM &= ~(1ul << SPU_RAMREGION_PERM_SECATTR_Pos); } /* Block write and execute access to FICR RAM region */ @@ -315,10 +315,10 @@ void SystemLockFICRNS() uint32_t ram_region = ((uint32_t)NRF_FICR_NS - (uint32_t)RAM_BASE) / SPU_RAMREGION_SIZE; NRF_SPU_S->RAMREGION[ram_region].PERM &= ~( - (1 << SPU_RAMREGION_PERM_WRITE_Pos) | - (1 << SPU_RAMREGION_PERM_EXECUTE_Pos) + (1ul << SPU_RAMREGION_PERM_WRITE_Pos) | + (1ul << SPU_RAMREGION_PERM_EXECUTE_Pos) ); - NRF_SPU_S->RAMREGION[ram_region].PERM |= 1 << SPU_RAMREGION_PERM_LOCK_Pos; + NRF_SPU_S->RAMREGION[ram_region].PERM |= 1ul << SPU_RAMREGION_PERM_LOCK_Pos; } /*lint --flb "Leave library region" */ diff --git a/mdk/system_nrf5340_network.c b/mdk/system_nrf5340_network.c index 0222b7dd7..9904d919a 100644 --- a/mdk/system_nrf5340_network.c +++ b/mdk/system_nrf5340_network.c @@ -68,8 +68,8 @@ void SystemInit(void) { if (NRF_RESET_NS->RESETREAS & RESET_RESETREAS_RESETPIN_Msk) { - NRF_POWER_NS->EVENTS_SLEEPENTER = 0; - NRF_POWER_NS->EVENTS_SLEEPEXIT = 0; + NRF_POWER_NS->EVENTS_SLEEPENTER = 0ul; + NRF_POWER_NS->EVENTS_SLEEPEXIT = 0ul; } } @@ -84,12 +84,12 @@ void SystemInit(void) if (nrf53_errata_160()) { - *((volatile uint32_t *)0x41002118) = 0x7Ful; - *((volatile uint32_t *)0x41080E04) = 0x0ul; - *((volatile uint32_t *)0x41080E08) = 0x0ul; - *((volatile uint32_t *)0x41002124) = 0x0ul; - *((volatile uint32_t *)0x4100212C) = 0x0ul; - *((volatile uint32_t *)0x41101110) = 0x0ul; + *((volatile uint32_t *)0x41002118ul) = 0x7Ful; + *((volatile uint32_t *)0x41080E04ul) = 0x0ul; + *((volatile uint32_t *)0x41080E08ul) = 0x0ul; + *((volatile uint32_t *)0x41002124ul) = 0x0ul; + *((volatile uint32_t *)0x4100212Cul) = 0x0ul; + *((volatile uint32_t *)0x41101110ul) = 0x0ul; } /* Handle fw-branch APPROTECT setup. */ diff --git a/mdk/system_nrf91.c b/mdk/system_nrf91.c index 575c4c8cf..e896c2794 100644 --- a/mdk/system_nrf91.c +++ b/mdk/system_nrf91.c @@ -42,11 +42,11 @@ void SystemStoreFICRNS(); (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | \ (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | \ (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) ) -#define TRACE_TRACECLK_PIN (21) -#define TRACE_TRACEDATA0_PIN (22) -#define TRACE_TRACEDATA1_PIN (23) -#define TRACE_TRACEDATA2_PIN (24) -#define TRACE_TRACEDATA3_PIN (25) +#define TRACE_TRACECLK_PIN (21ul) +#define TRACE_TRACEDATA0_PIN (22ul) +#define TRACE_TRACEDATA1_PIN (23ul) +#define TRACE_TRACEDATA2_PIN (24ul) +#define TRACE_TRACEDATA3_PIN (25ul) #if defined ( __CC_ARM ) uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_DEFAULT; @@ -78,7 +78,7 @@ void SystemInit(void) /* Set all ARM SAU regions to NonSecure if TrustZone extensions are enabled. * Nordic SPU should handle Secure Attribution tasks */ #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) - SAU->CTRL |= (1 << SAU_CTRL_ALLNS_Pos); + SAU->CTRL |= (1ul << SAU_CTRL_ALLNS_Pos); #endif /* Workaround for Errata 6 "POWER: SLEEPENTER and SLEEPEXIT events asserted after pin reset" found at the Errata document @@ -91,7 +91,7 @@ void SystemInit(void) /* Workaround for Errata 14 "REGULATORS: LDO mode at startup" found at the Errata document for your device located at https://infocenter.nordicsemi.com/index.jsp */ if (nrf91_errata_14()){ - *((volatile uint32_t *)0x50004A38) = 0x01ul; + *((volatile uint32_t *)0x50004A38ul) = 0x01ul; NRF_REGULATORS_S->DCDCEN = REGULATORS_DCDCEN_DCDCEN_Enabled << REGULATORS_DCDCEN_DCDCEN_Pos; } @@ -104,14 +104,14 @@ void SystemInit(void) /* Workaround for Errata 20 "RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document for your device located at https://infocenter.nordicsemi.com/index.jsp */ if (nrf91_errata_20()){ - *((volatile uint32_t *)0x5003AEE4) = 0xE; + *((volatile uint32_t *)0x5003AEE4ul) = 0xEul; } /* Workaround for Errata 31 "XOSC32k Startup Failure" found at the Errata document for your device located at https://infocenter.nordicsemi.com/index.jsp */ if (nrf91_errata_31()){ - *((volatile uint32_t *)0x5000470Cul) = 0x0; - *((volatile uint32_t *)0x50004710ul) = 0x1; + *((volatile uint32_t *)0x5000470Cul) = 0x0ul; + *((volatile uint32_t *)0x50004710ul) = 0x1ul; } #if !defined(NRF_SKIP_FICR_NS_COPY_TO_RAM) @@ -121,7 +121,7 @@ void SystemInit(void) /* Trimming of the device. Copy all the trimming values from FICR into the target addresses. Trim until one ADDR is not initialized. */ - for (uint32_t index = 0; index < 256ul && !is_empty_word(&NRF_FICR_S->TRIMCNF[index].ADDR); index++){ + for (uint32_t index = 0ul; index < 256ul && !is_empty_word(&NRF_FICR_S->TRIMCNF[index].ADDR); index++){ #if defined ( __ICCARM__ ) #pragma diag_suppress=Pa082 #endif @@ -132,6 +132,7 @@ void SystemInit(void) } #if !defined(NRF_SKIP_UICR_HFXO_WORKAROUND) + bool irq_disabled = __get_PRIMASK() == 1; uint32_t uicr_erased_value; uint32_t uicr_new_value; /* Set UICR->HFXOSRC and UICR->HFXOCNT to working defaults if UICR was erased */ @@ -144,6 +145,10 @@ void SystemInit(void) NRF_NVMC_S->CONFIG = NVMC_CONFIG_WEN_Wen; while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready); + if (!irq_disabled && nrf91_errata_7()){ + __disable_irq(); + } + if (uicr_HFXOSRC_erased()){ /* Write default value to UICR->HFXOSRC */ uicr_erased_value = NRF_UICR_S->HFXOSRC; @@ -161,6 +166,10 @@ void SystemInit(void) __DSB(); while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready); } + + if(!irq_disabled && nrf91_errata_7()){ + __enable_irq(); + } /* Enable read mode in NVMC */ NRF_NVMC_S->CONFIG = NVMC_CONFIG_WEN_Ren; @@ -179,11 +188,11 @@ void SystemInit(void) NRF_TAD_S->TASKS_CLOCKSTART = TAD_TASKS_CLOCKSTART_TASKS_CLOCKSTART_Msk; // Set up Trace pads SPU firewall - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACECLK_PIN); - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA0_PIN); - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA1_PIN); - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA2_PIN); - NRF_SPU_S->GPIOPORT[0].PERM &= ~(1 << TRACE_TRACEDATA3_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACECLK_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA0_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA1_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA2_PIN); + NRF_SPU_S->GPIOPORT[0].PERM &= ~(1ul << TRACE_TRACEDATA3_PIN); // Configure trace port pads NRF_P0_S->PIN_CNF[TRACE_TRACECLK_PIN] = TRACE_PIN_CNF_VALUE; @@ -230,7 +239,7 @@ void SystemInit(void) /* Allow Non-Secure code to run FPU instructions. * If only the secure code should control FPU power state these registers should be configured accordingly in the secure application code. */ - SCB->NSACR |= (3UL << 10); + SCB->NSACR |= (3UL << 10ul); nrf91_handle_approtect(); #endif @@ -239,7 +248,7 @@ void SystemInit(void) * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit * operations are not used in your code. */ #if (__FPU_USED == 1) - SCB->CPACR |= (3UL << 20) | (3UL << 22); + SCB->CPACR |= (3UL << 20ul) | (3UL << 22ul); __DSB(); __ISB(); #endif @@ -251,21 +260,31 @@ void SystemInit(void) #if !defined(NRF_SKIP_UICR_HFXO_WORKAROUND) bool uicr_HFXOCNT_erased() { - if (is_empty_word(&NRF_UICR_S->HFXOCNT)) { - return true; + bool irq_disabled = __get_PRIMASK() == 1; + if (!irq_disabled && nrf91_errata_7()){ + __disable_irq(); } - return false; + bool is_empty = is_empty_word(&NRF_UICR_S->HFXOCNT); + if (!irq_disabled && nrf91_errata_7()){ + __enable_irq(); + } + return is_empty; } bool uicr_HFXOSRC_erased() { + bool irq_disabled = __get_PRIMASK() == 1; + if (!irq_disabled && nrf91_errata_7()){ + __disable_irq(); + } uint32_t HFXOSRC_readout = NRF_UICR_S->HFXOSRC; __DSB(); - if ((HFXOSRC_readout & UICR_HFXOSRC_HFXOSRC_Msk) != UICR_HFXOSRC_HFXOSRC_TCXO) { - return true; + bool erased = (HFXOSRC_readout & UICR_HFXOSRC_HFXOSRC_Msk) != UICR_HFXOSRC_HFXOSRC_TCXO; + if (!irq_disabled && nrf91_errata_7()){ + __enable_irq(); } - return false; + return erased; } #endif @@ -303,7 +322,7 @@ void SystemStoreFICRNS() /* Make RAM region NS. */ uint32_t ram_region = ((uint32_t)NRF_FICR_NS - (uint32_t)RAM_BASE) / SPU_RAMREGION_SIZE; __DSB(); - NRF_SPU_S->RAMREGION[ram_region].PERM &= ~(1 << SPU_RAMREGION_PERM_SECATTR_Pos); + NRF_SPU_S->RAMREGION[ram_region].PERM &= ~(1ul << SPU_RAMREGION_PERM_SECATTR_Pos); } /* Block write and execute access to FICR RAM region */ @@ -319,10 +338,10 @@ void SystemLockFICRNS() __DSB(); NRF_SPU_S->RAMREGION[ram_region].PERM &= ~( - (1 << SPU_RAMREGION_PERM_WRITE_Pos) | - (1 << SPU_RAMREGION_PERM_EXECUTE_Pos) + (1ul << SPU_RAMREGION_PERM_WRITE_Pos) | + (1ul << SPU_RAMREGION_PERM_EXECUTE_Pos) ); - NRF_SPU_S->RAMREGION[ram_region].PERM |= 1 << SPU_RAMREGION_PERM_LOCK_Pos; + NRF_SPU_S->RAMREGION[ram_region].PERM |= 1ul << SPU_RAMREGION_PERM_LOCK_Pos; } /*lint --flb "Leave library region" */ diff --git a/soc/nrfx_coredep.h b/soc/nrfx_coredep.h index bf95cce13..c523f0d62 100644 --- a/soc/nrfx_coredep.h +++ b/soc/nrfx_coredep.h @@ -81,7 +81,7 @@ #if ISA_RISCV /** @brief Slowdown for RISCV cores. */ -#define NRFX_DELAY_RISCV_SLOWDOWN 110 +#define NRFX_DELAY_RISCV_SLOWDOWN 50 #endif /** diff --git a/soc/nrfx_irqs_nrf51.h b/soc/nrfx_irqs_nrf51.h index dd0fc44f4..a541fb702 100644 --- a/soc/nrfx_irqs_nrf51.h +++ b/soc/nrfx_irqs_nrf51.h @@ -65,7 +65,7 @@ extern "C" { #endif // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // ADC_IRQn #define nrfx_adc_irq_handler ADC_IRQHandler diff --git a/soc/nrfx_irqs_nrf52805.h b/soc/nrfx_irqs_nrf52805.h index 7ec856f0c..81f3daa86 100644 --- a/soc/nrfx_irqs_nrf52805.h +++ b/soc/nrfx_irqs_nrf52805.h @@ -71,7 +71,7 @@ extern "C" { #endif // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // SAADC_IRQn #define nrfx_saadc_irq_handler SAADC_IRQHandler diff --git a/soc/nrfx_irqs_nrf52810.h b/soc/nrfx_irqs_nrf52810.h index 3b73f6387..f217f070b 100644 --- a/soc/nrfx_irqs_nrf52810.h +++ b/soc/nrfx_irqs_nrf52810.h @@ -71,7 +71,7 @@ extern "C" { #endif // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // SAADC_IRQn #define nrfx_saadc_irq_handler SAADC_IRQHandler diff --git a/soc/nrfx_irqs_nrf52811.h b/soc/nrfx_irqs_nrf52811.h index ede7eb4f9..21a1455af 100644 --- a/soc/nrfx_irqs_nrf52811.h +++ b/soc/nrfx_irqs_nrf52811.h @@ -74,7 +74,7 @@ extern "C" { #endif // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // SAADC_IRQn #define nrfx_saadc_irq_handler SAADC_IRQHandler diff --git a/soc/nrfx_irqs_nrf52820.h b/soc/nrfx_irqs_nrf52820.h index 9205b1cc5..ef17d0666 100644 --- a/soc/nrfx_irqs_nrf52820.h +++ b/soc/nrfx_irqs_nrf52820.h @@ -77,7 +77,7 @@ extern "C" { #endif // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // TIMER0_IRQn #define nrfx_timer_0_irq_handler TIMER0_IRQHandler diff --git a/soc/nrfx_irqs_nrf52832.h b/soc/nrfx_irqs_nrf52832.h index 67dfaf59e..7cf329d82 100644 --- a/soc/nrfx_irqs_nrf52832.h +++ b/soc/nrfx_irqs_nrf52832.h @@ -80,7 +80,7 @@ extern "C" { #define nrfx_nfct_irq_handler NFCT_IRQHandler // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // SAADC_IRQn #define nrfx_saadc_irq_handler SAADC_IRQHandler diff --git a/soc/nrfx_irqs_nrf52833.h b/soc/nrfx_irqs_nrf52833.h index 648f63e4a..8e44b2c48 100644 --- a/soc/nrfx_irqs_nrf52833.h +++ b/soc/nrfx_irqs_nrf52833.h @@ -80,7 +80,7 @@ extern "C" { #define nrfx_nfct_irq_handler NFCT_IRQHandler // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // SAADC_IRQn #define nrfx_saadc_irq_handler SAADC_IRQHandler diff --git a/soc/nrfx_irqs_nrf52840.h b/soc/nrfx_irqs_nrf52840.h index c24cc6689..8adf89380 100644 --- a/soc/nrfx_irqs_nrf52840.h +++ b/soc/nrfx_irqs_nrf52840.h @@ -80,7 +80,7 @@ extern "C" { #define nrfx_nfct_irq_handler NFCT_IRQHandler // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // SAADC_IRQn #define nrfx_saadc_irq_handler SAADC_IRQHandler diff --git a/soc/nrfx_irqs_nrf5340_application.h b/soc/nrfx_irqs_nrf5340_application.h index d8d0dad7f..3278204fc 100644 --- a/soc/nrfx_irqs_nrf5340_application.h +++ b/soc/nrfx_irqs_nrf5340_application.h @@ -95,7 +95,10 @@ extern "C" { #endif // GPIOTE0_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE0_IRQHandler + +// GPIOTE1_IRQn +#define nrfx_gpiote_1_irq_handler GPIOTE1_IRQHandler // SAADC_IRQn #define nrfx_saadc_irq_handler SAADC_IRQHandler diff --git a/soc/nrfx_irqs_nrf5340_network.h b/soc/nrfx_irqs_nrf5340_network.h index 951acb82f..3ee419edf 100644 --- a/soc/nrfx_irqs_nrf5340_network.h +++ b/soc/nrfx_irqs_nrf5340_network.h @@ -47,7 +47,7 @@ extern "C" { #define nrfx_rng_irq_handler RNG_IRQHandler // GPIOTE_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE_IRQHandler // WDT_IRQn #define nrfx_wdt_0_irq_handler WDT_IRQHandler diff --git a/soc/nrfx_irqs_nrf91.h b/soc/nrfx_irqs_nrf91.h index 912973daa..a5d13ddaf 100644 --- a/soc/nrfx_irqs_nrf91.h +++ b/soc/nrfx_irqs_nrf91.h @@ -89,7 +89,10 @@ extern "C" { #endif // GPIOTE0_IRQn -#define nrfx_gpiote_irq_handler GPIOTE_IRQHandler +#define nrfx_gpiote_0_irq_handler GPIOTE0_IRQHandler + +// GPIOTE1_IRQn +#define nrfx_gpiote_1_irq_handler GPIOTE1_IRQHandler // SAADC_IRQn #define nrfx_saadc_irq_handler SAADC_IRQHandler diff --git a/templates/nrfx_config_nrf51.h b/templates/nrfx_config_nrf51.h index 9060d2b1a..df41b052b 100644 --- a/templates/nrfx_config_nrf51.h +++ b/templates/nrfx_config_nrf51.h @@ -42,7 +42,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 3 @@ -51,7 +51,7 @@ /** * @brief NRFX_ADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_ADC_ENABLED #define NRFX_ADC_ENABLED 0 @@ -60,7 +60,7 @@ /** * @brief NRFX_ADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_ADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_ADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -69,7 +69,7 @@ /** * @brief NRFX_ADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_ADC_CONFIG_LOG_ENABLED #define NRFX_ADC_CONFIG_LOG_ENABLED 0 @@ -93,7 +93,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -115,7 +115,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -124,7 +124,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -133,7 +133,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -157,7 +157,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -166,7 +166,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -175,7 +175,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -184,7 +184,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -208,7 +208,7 @@ /** * @brief NRFX_LPCOMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_ENABLED #define NRFX_LPCOMP_ENABLED 0 @@ -217,7 +217,7 @@ /** * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -226,7 +226,7 @@ /** * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 @@ -250,7 +250,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -259,7 +259,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -268,7 +268,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -277,7 +277,7 @@ /** * @brief NRFX_PPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_ENABLED #define NRFX_PPI_ENABLED 0 @@ -286,7 +286,7 @@ /** * @brief NRFX_PPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_CONFIG_LOG_ENABLED #define NRFX_PPI_CONFIG_LOG_ENABLED 0 @@ -310,7 +310,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -319,7 +319,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -343,7 +343,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -352,7 +352,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -361,7 +361,7 @@ /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -370,7 +370,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -379,7 +379,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -403,7 +403,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -412,7 +412,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -421,7 +421,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -445,7 +445,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -454,7 +454,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -463,7 +463,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -487,7 +487,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -496,7 +496,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -505,7 +505,7 @@ /** * @brief NRFX_SPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_ENABLED #define NRFX_SPI_ENABLED 0 @@ -514,7 +514,7 @@ /** * @brief NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -523,7 +523,7 @@ /** * @brief NRFX_SPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_CONFIG_LOG_ENABLED #define NRFX_SPI_CONFIG_LOG_ENABLED 0 @@ -547,7 +547,7 @@ /** * @brief NRFX_SPI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI0_ENABLED #define NRFX_SPI0_ENABLED 0 @@ -556,7 +556,7 @@ /** * @brief NRFX_SPI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI1_ENABLED #define NRFX_SPI1_ENABLED 0 @@ -565,7 +565,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -574,7 +574,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -583,7 +583,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -607,7 +607,7 @@ /** * @brief NRFX_SPIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS1_ENABLED #define NRFX_SPIS1_ENABLED 0 @@ -616,7 +616,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -625,7 +625,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -634,7 +634,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -643,7 +643,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -667,7 +667,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -676,7 +676,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -685,7 +685,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -709,7 +709,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -718,7 +718,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -727,7 +727,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -736,7 +736,7 @@ /** * @brief NRFX_TWI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 0 @@ -745,7 +745,7 @@ /** * @brief NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -754,7 +754,7 @@ /** * @brief NRFX_TWI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 @@ -778,7 +778,7 @@ /** * @brief NRFX_TWI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 @@ -787,7 +787,7 @@ /** * @brief NRFX_TWI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED 0 @@ -796,7 +796,7 @@ /** * @brief NRFX_UART_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 0 @@ -805,7 +805,7 @@ /** * @brief NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -814,7 +814,7 @@ /** * @brief NRFX_UART_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 @@ -838,7 +838,7 @@ /** * @brief NRFX_UART0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 @@ -847,7 +847,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -856,7 +856,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 3 + * Integer value. Minimum: 0. Maximum: 3. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -865,7 +865,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -874,7 +874,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf52805.h b/templates/nrfx_config_nrf52805.h index 81efe57e0..f5aadcbc3 100644 --- a/templates/nrfx_config_nrf52805.h +++ b/templates/nrfx_config_nrf52805.h @@ -42,7 +42,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -51,7 +51,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -75,7 +75,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -84,7 +84,7 @@ /** * @brief NRFX_CLOCK_CONFIG_CT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_CT_ENABLED #define NRFX_CLOCK_CONFIG_CT_ENABLED 1 @@ -93,7 +93,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -102,7 +102,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -111,7 +111,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -135,7 +135,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -144,7 +144,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -153,7 +153,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -162,7 +162,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -171,7 +171,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -180,7 +180,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -189,7 +189,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -198,7 +198,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -222,7 +222,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -231,7 +231,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -240,7 +240,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -249,7 +249,7 @@ /** * @brief NRFX_PPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_ENABLED #define NRFX_PPI_ENABLED 0 @@ -258,7 +258,7 @@ /** * @brief NRFX_PPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_CONFIG_LOG_ENABLED #define NRFX_PPI_CONFIG_LOG_ENABLED 0 @@ -282,7 +282,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -291,7 +291,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -315,7 +315,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -324,7 +324,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -333,25 +333,16 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 #endif -/** - * @brief NRFX_PRS_BOX_4_ENABLED - * - * Boolean. Accepted values 0 and 1. - */ -#ifndef NRFX_PRS_BOX_4_ENABLED -#define NRFX_PRS_BOX_4_ENABLED 0 -#endif - /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -360,7 +351,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -369,7 +360,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -393,7 +384,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -402,7 +393,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -411,7 +402,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -435,7 +426,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -444,7 +435,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -453,7 +444,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -477,7 +468,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -486,7 +477,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -495,7 +486,7 @@ /** * @brief NRFX_SAADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_ENABLED #define NRFX_SAADC_ENABLED 0 @@ -504,7 +495,7 @@ /** * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -513,7 +504,7 @@ /** * @brief NRFX_SAADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 @@ -537,7 +528,7 @@ /** * @brief NRFX_SPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_ENABLED #define NRFX_SPI_ENABLED 0 @@ -546,7 +537,7 @@ /** * @brief NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -555,7 +546,7 @@ /** * @brief NRFX_SPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_CONFIG_LOG_ENABLED #define NRFX_SPI_CONFIG_LOG_ENABLED 0 @@ -579,7 +570,7 @@ /** * @brief NRFX_SPI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI0_ENABLED #define NRFX_SPI0_ENABLED 0 @@ -588,7 +579,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -597,7 +588,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -606,7 +597,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -630,7 +621,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -639,7 +630,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -648,7 +639,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -657,7 +648,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -681,7 +672,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -690,7 +681,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -699,7 +690,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -708,7 +699,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -717,7 +708,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -741,7 +732,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -750,7 +741,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -759,7 +750,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -783,7 +774,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -792,7 +783,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -801,7 +792,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -810,7 +801,7 @@ /** * @brief NRFX_TWI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 0 @@ -819,7 +810,7 @@ /** * @brief NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -828,7 +819,7 @@ /** * @brief NRFX_TWI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 @@ -852,7 +843,7 @@ /** * @brief NRFX_TWI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 @@ -861,7 +852,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -870,7 +861,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -879,7 +870,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -903,7 +894,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -912,7 +903,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -921,7 +912,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -930,7 +921,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -939,7 +930,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -948,7 +939,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -972,7 +963,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -981,7 +972,7 @@ /** * @brief NRFX_UART_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 0 @@ -990,7 +981,7 @@ /** * @brief NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -999,7 +990,7 @@ /** * @brief NRFX_UART_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 @@ -1023,7 +1014,7 @@ /** * @brief NRFX_UART0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 @@ -1032,16 +1023,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1050,7 +1068,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1074,7 +1092,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1083,7 +1101,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1092,7 +1110,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1101,7 +1119,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1110,7 +1128,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf52810.h b/templates/nrfx_config_nrf52810.h index 05064a4eb..ce40fab21 100644 --- a/templates/nrfx_config_nrf52810.h +++ b/templates/nrfx_config_nrf52810.h @@ -42,7 +42,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -51,7 +51,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -75,7 +75,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -84,7 +84,7 @@ /** * @brief NRFX_CLOCK_CONFIG_CT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_CT_ENABLED #define NRFX_CLOCK_CONFIG_CT_ENABLED 1 @@ -93,7 +93,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -102,7 +102,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -111,7 +111,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -135,7 +135,7 @@ /** * @brief NRFX_COMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_ENABLED #define NRFX_COMP_ENABLED 0 @@ -144,7 +144,7 @@ /** * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -153,7 +153,7 @@ /** * @brief NRFX_COMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_CONFIG_LOG_ENABLED #define NRFX_COMP_CONFIG_LOG_ENABLED 0 @@ -177,7 +177,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -186,7 +186,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -195,7 +195,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -204,7 +204,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -213,7 +213,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -222,7 +222,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -231,7 +231,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -240,7 +240,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -264,7 +264,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -273,7 +273,7 @@ /** * @brief NRFX_PDM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_ENABLED #define NRFX_PDM_ENABLED 0 @@ -282,7 +282,7 @@ /** * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -291,7 +291,7 @@ /** * @brief NRFX_PDM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_CONFIG_LOG_ENABLED #define NRFX_PDM_CONFIG_LOG_ENABLED 0 @@ -315,7 +315,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -324,7 +324,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -333,7 +333,7 @@ /** * @brief NRFX_PPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_ENABLED #define NRFX_PPI_ENABLED 0 @@ -342,7 +342,7 @@ /** * @brief NRFX_PPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_CONFIG_LOG_ENABLED #define NRFX_PPI_CONFIG_LOG_ENABLED 0 @@ -366,7 +366,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -375,7 +375,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -399,7 +399,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -408,7 +408,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -417,25 +417,16 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 #endif -/** - * @brief NRFX_PRS_BOX_4_ENABLED - * - * Boolean. Accepted values 0 and 1. - */ -#ifndef NRFX_PRS_BOX_4_ENABLED -#define NRFX_PRS_BOX_4_ENABLED 0 -#endif - /** * @brief NRFX_PWM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_ENABLED #define NRFX_PWM_ENABLED 0 @@ -444,7 +435,7 @@ /** * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -453,7 +444,7 @@ /** * @brief NRFX_PWM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_CONFIG_LOG_ENABLED #define NRFX_PWM_CONFIG_LOG_ENABLED 0 @@ -477,7 +468,7 @@ /** * @brief NRFX_PWM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM0_ENABLED #define NRFX_PWM0_ENABLED 0 @@ -486,7 +477,7 @@ /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -495,7 +486,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -504,7 +495,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -528,7 +519,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -537,7 +528,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -546,7 +537,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -570,7 +561,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -579,7 +570,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -588,7 +579,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -612,7 +603,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -621,7 +612,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -630,7 +621,7 @@ /** * @brief NRFX_SAADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_ENABLED #define NRFX_SAADC_ENABLED 0 @@ -639,7 +630,7 @@ /** * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -648,7 +639,7 @@ /** * @brief NRFX_SAADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 @@ -672,7 +663,7 @@ /** * @brief NRFX_SPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_ENABLED #define NRFX_SPI_ENABLED 0 @@ -681,7 +672,7 @@ /** * @brief NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -690,7 +681,7 @@ /** * @brief NRFX_SPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_CONFIG_LOG_ENABLED #define NRFX_SPI_CONFIG_LOG_ENABLED 0 @@ -714,7 +705,7 @@ /** * @brief NRFX_SPI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI0_ENABLED #define NRFX_SPI0_ENABLED 0 @@ -723,7 +714,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -732,7 +723,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -741,7 +732,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -765,7 +756,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -774,7 +765,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -783,7 +774,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -792,7 +783,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -816,7 +807,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -825,7 +816,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -834,7 +825,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -843,7 +834,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -852,7 +843,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -876,7 +867,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -885,7 +876,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -894,7 +885,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -918,7 +909,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -927,7 +918,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -936,7 +927,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -945,7 +936,7 @@ /** * @brief NRFX_TWI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 0 @@ -954,7 +945,7 @@ /** * @brief NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -963,7 +954,7 @@ /** * @brief NRFX_TWI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 @@ -987,7 +978,7 @@ /** * @brief NRFX_TWI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 @@ -996,7 +987,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -1005,7 +996,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1014,7 +1005,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -1038,7 +1029,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -1047,7 +1038,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -1056,7 +1047,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1065,7 +1056,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -1074,7 +1065,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -1083,7 +1074,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -1107,7 +1098,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -1116,7 +1107,7 @@ /** * @brief NRFX_UART_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 0 @@ -1125,7 +1116,7 @@ /** * @brief NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1134,7 +1125,7 @@ /** * @brief NRFX_UART_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 @@ -1158,7 +1149,7 @@ /** * @brief NRFX_UART0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 @@ -1167,16 +1158,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1185,7 +1203,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1209,7 +1227,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1218,7 +1236,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1227,7 +1245,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1236,7 +1254,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1245,7 +1263,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf52811.h b/templates/nrfx_config_nrf52811.h index 4f17097f1..c4f588648 100644 --- a/templates/nrfx_config_nrf52811.h +++ b/templates/nrfx_config_nrf52811.h @@ -42,7 +42,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -51,7 +51,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -75,7 +75,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -84,7 +84,7 @@ /** * @brief NRFX_CLOCK_CONFIG_CT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_CT_ENABLED #define NRFX_CLOCK_CONFIG_CT_ENABLED 1 @@ -93,7 +93,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -102,7 +102,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -111,7 +111,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -135,7 +135,7 @@ /** * @brief NRFX_COMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_ENABLED #define NRFX_COMP_ENABLED 0 @@ -144,7 +144,7 @@ /** * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -153,7 +153,7 @@ /** * @brief NRFX_COMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_CONFIG_LOG_ENABLED #define NRFX_COMP_CONFIG_LOG_ENABLED 0 @@ -177,7 +177,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -186,7 +186,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -195,7 +195,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -204,7 +204,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -213,7 +213,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -222,7 +222,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -231,7 +231,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -240,7 +240,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -264,7 +264,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -273,7 +273,7 @@ /** * @brief NRFX_PDM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_ENABLED #define NRFX_PDM_ENABLED 0 @@ -282,7 +282,7 @@ /** * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -291,7 +291,7 @@ /** * @brief NRFX_PDM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_CONFIG_LOG_ENABLED #define NRFX_PDM_CONFIG_LOG_ENABLED 0 @@ -315,7 +315,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -324,7 +324,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -333,7 +333,7 @@ /** * @brief NRFX_PPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_ENABLED #define NRFX_PPI_ENABLED 0 @@ -342,7 +342,7 @@ /** * @brief NRFX_PPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_CONFIG_LOG_ENABLED #define NRFX_PPI_CONFIG_LOG_ENABLED 0 @@ -366,7 +366,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -375,7 +375,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -399,7 +399,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -408,7 +408,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -417,25 +417,16 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 #endif -/** - * @brief NRFX_PRS_BOX_4_ENABLED - * - * Boolean. Accepted values 0 and 1. - */ -#ifndef NRFX_PRS_BOX_4_ENABLED -#define NRFX_PRS_BOX_4_ENABLED 0 -#endif - /** * @brief NRFX_PWM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_ENABLED #define NRFX_PWM_ENABLED 0 @@ -444,7 +435,7 @@ /** * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -453,7 +444,7 @@ /** * @brief NRFX_PWM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_CONFIG_LOG_ENABLED #define NRFX_PWM_CONFIG_LOG_ENABLED 0 @@ -477,7 +468,7 @@ /** * @brief NRFX_PWM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM0_ENABLED #define NRFX_PWM0_ENABLED 0 @@ -486,7 +477,7 @@ /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -495,7 +486,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -504,7 +495,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -528,7 +519,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -537,7 +528,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -546,7 +537,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -570,7 +561,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -579,7 +570,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -588,7 +579,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -612,7 +603,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -621,7 +612,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -630,7 +621,7 @@ /** * @brief NRFX_SAADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_ENABLED #define NRFX_SAADC_ENABLED 0 @@ -639,7 +630,7 @@ /** * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -648,7 +639,7 @@ /** * @brief NRFX_SAADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 @@ -672,7 +663,7 @@ /** * @brief NRFX_SPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_ENABLED #define NRFX_SPI_ENABLED 0 @@ -681,7 +672,7 @@ /** * @brief NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -690,7 +681,7 @@ /** * @brief NRFX_SPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_CONFIG_LOG_ENABLED #define NRFX_SPI_CONFIG_LOG_ENABLED 0 @@ -714,7 +705,7 @@ /** * @brief NRFX_SPI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI1_ENABLED #define NRFX_SPI1_ENABLED 0 @@ -723,7 +714,7 @@ /** * @brief NRFX_SPI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI0_ENABLED #define NRFX_SPI0_ENABLED 0 @@ -732,7 +723,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -741,7 +732,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -750,7 +741,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -774,7 +765,7 @@ /** * @brief NRFX_SPIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM1_ENABLED #define NRFX_SPIM1_ENABLED 0 @@ -783,7 +774,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -792,7 +783,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -801,7 +792,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -810,7 +801,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -834,7 +825,7 @@ /** * @brief NRFX_SPIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS1_ENABLED #define NRFX_SPIS1_ENABLED 0 @@ -843,7 +834,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -852,7 +843,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -861,7 +852,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -870,7 +861,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -879,7 +870,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -903,7 +894,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -912,7 +903,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -921,7 +912,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -945,7 +936,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -954,7 +945,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -963,7 +954,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -972,7 +963,7 @@ /** * @brief NRFX_TWI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 0 @@ -981,7 +972,7 @@ /** * @brief NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -990,7 +981,7 @@ /** * @brief NRFX_TWI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 @@ -1014,7 +1005,7 @@ /** * @brief NRFX_TWI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 @@ -1023,7 +1014,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -1032,7 +1023,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1041,7 +1032,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -1065,7 +1056,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -1074,7 +1065,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -1083,7 +1074,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1092,7 +1083,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -1101,7 +1092,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -1110,7 +1101,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -1134,7 +1125,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -1143,7 +1134,7 @@ /** * @brief NRFX_UART_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 0 @@ -1152,7 +1143,7 @@ /** * @brief NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1161,7 +1152,7 @@ /** * @brief NRFX_UART_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 @@ -1185,7 +1176,7 @@ /** * @brief NRFX_UART0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 @@ -1194,16 +1185,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1212,7 +1230,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1236,7 +1254,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1245,7 +1263,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1254,7 +1272,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1263,7 +1281,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1272,7 +1290,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf52820.h b/templates/nrfx_config_nrf52820.h index f39de0661..b3074db2e 100644 --- a/templates/nrfx_config_nrf52820.h +++ b/templates/nrfx_config_nrf52820.h @@ -42,7 +42,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -51,7 +51,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -75,7 +75,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -84,7 +84,7 @@ /** * @brief NRFX_CLOCK_CONFIG_CT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_CT_ENABLED #define NRFX_CLOCK_CONFIG_CT_ENABLED 1 @@ -93,7 +93,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -102,7 +102,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -111,7 +111,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -135,7 +135,7 @@ /** * @brief NRFX_COMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_ENABLED #define NRFX_COMP_ENABLED 0 @@ -144,7 +144,7 @@ /** * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -153,7 +153,7 @@ /** * @brief NRFX_COMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_CONFIG_LOG_ENABLED #define NRFX_COMP_CONFIG_LOG_ENABLED 0 @@ -177,7 +177,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -186,7 +186,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -195,7 +195,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -204,7 +204,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -213,7 +213,7 @@ /** * @brief NRFX_EGU2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU2_ENABLED #define NRFX_EGU2_ENABLED 0 @@ -222,7 +222,7 @@ /** * @brief NRFX_EGU3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU3_ENABLED #define NRFX_EGU3_ENABLED 0 @@ -231,7 +231,7 @@ /** * @brief NRFX_EGU4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU4_ENABLED #define NRFX_EGU4_ENABLED 0 @@ -240,7 +240,7 @@ /** * @brief NRFX_EGU5_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU5_ENABLED #define NRFX_EGU5_ENABLED 0 @@ -249,7 +249,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -258,7 +258,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -267,7 +267,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -276,7 +276,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -300,7 +300,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -309,7 +309,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -318,7 +318,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -327,7 +327,7 @@ /** * @brief NRFX_PPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_ENABLED #define NRFX_PPI_ENABLED 0 @@ -336,7 +336,7 @@ /** * @brief NRFX_PPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_CONFIG_LOG_ENABLED #define NRFX_PPI_CONFIG_LOG_ENABLED 0 @@ -360,7 +360,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -369,7 +369,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -393,7 +393,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -402,7 +402,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -411,25 +411,16 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 #endif -/** - * @brief NRFX_PRS_BOX_4_ENABLED - * - * Boolean. Accepted values 0 and 1. - */ -#ifndef NRFX_PRS_BOX_4_ENABLED -#define NRFX_PRS_BOX_4_ENABLED 0 -#endif - /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -438,7 +429,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -447,7 +438,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -471,7 +462,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -480,7 +471,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -489,7 +480,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -513,7 +504,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -522,7 +513,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -531,7 +522,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -555,7 +546,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -564,7 +555,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -573,7 +564,7 @@ /** * @brief NRFX_SPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_ENABLED #define NRFX_SPI_ENABLED 0 @@ -582,7 +573,7 @@ /** * @brief NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -591,7 +582,7 @@ /** * @brief NRFX_SPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_CONFIG_LOG_ENABLED #define NRFX_SPI_CONFIG_LOG_ENABLED 0 @@ -615,7 +606,7 @@ /** * @brief NRFX_SPI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI0_ENABLED #define NRFX_SPI0_ENABLED 0 @@ -624,7 +615,7 @@ /** * @brief NRFX_SPI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI1_ENABLED #define NRFX_SPI1_ENABLED 0 @@ -633,7 +624,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -642,7 +633,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -651,7 +642,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -675,7 +666,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -684,7 +675,7 @@ /** * @brief NRFX_SPIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM1_ENABLED #define NRFX_SPIM1_ENABLED 0 @@ -693,7 +684,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -702,7 +693,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -711,7 +702,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -735,7 +726,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -744,7 +735,7 @@ /** * @brief NRFX_SPIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS1_ENABLED #define NRFX_SPIS1_ENABLED 0 @@ -753,7 +744,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -762,7 +753,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -771,7 +762,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -780,7 +771,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -804,7 +795,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -813,7 +804,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -822,7 +813,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -846,7 +837,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -855,7 +846,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -864,7 +855,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -873,7 +864,7 @@ /** * @brief NRFX_TIMER3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER3_ENABLED #define NRFX_TIMER3_ENABLED 0 @@ -882,7 +873,7 @@ /** * @brief NRFX_TWI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 0 @@ -891,7 +882,7 @@ /** * @brief NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -900,7 +891,7 @@ /** * @brief NRFX_TWI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 @@ -924,7 +915,7 @@ /** * @brief NRFX_TWI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 @@ -933,7 +924,7 @@ /** * @brief NRFX_TWI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED 0 @@ -942,7 +933,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -951,7 +942,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -960,7 +951,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -984,7 +975,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -993,7 +984,7 @@ /** * @brief NRFX_TWIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 @@ -1002,7 +993,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -1011,7 +1002,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1020,7 +1011,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -1029,7 +1020,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -1038,7 +1029,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -1062,7 +1053,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -1071,7 +1062,7 @@ /** * @brief NRFX_TWIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS1_ENABLED #define NRFX_TWIS1_ENABLED 0 @@ -1080,7 +1071,7 @@ /** * @brief NRFX_UART_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 0 @@ -1089,7 +1080,7 @@ /** * @brief NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1098,7 +1089,7 @@ /** * @brief NRFX_UART_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 @@ -1122,7 +1113,7 @@ /** * @brief NRFX_UART0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 @@ -1131,16 +1122,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1149,7 +1167,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1173,7 +1191,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1182,7 +1200,7 @@ /** * @brief NRFX_USBD_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_ENABLED #define NRFX_USBD_ENABLED 0 @@ -1191,7 +1209,7 @@ /** * @brief NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1200,7 +1218,7 @@ /** * @brief NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST #define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1 @@ -1209,7 +1227,7 @@ /** * @brief NRFX_USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_ISO_IN_ZLP #define NRFX_USBD_CONFIG_ISO_IN_ZLP 0 @@ -1218,7 +1236,7 @@ /** * @brief NRFX_USBD_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_LOG_ENABLED #define NRFX_USBD_CONFIG_LOG_ENABLED 0 @@ -1242,7 +1260,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1251,7 +1269,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1260,7 +1278,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1269,7 +1287,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf52832.h b/templates/nrfx_config_nrf52832.h index aa968b7cc..f59e3148f 100644 --- a/templates/nrfx_config_nrf52832.h +++ b/templates/nrfx_config_nrf52832.h @@ -42,7 +42,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -51,7 +51,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -75,7 +75,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -84,7 +84,7 @@ /** * @brief NRFX_CLOCK_CONFIG_CT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_CT_ENABLED #define NRFX_CLOCK_CONFIG_CT_ENABLED 1 @@ -93,7 +93,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -102,7 +102,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -111,7 +111,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -135,7 +135,7 @@ /** * @brief NRFX_COMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_ENABLED #define NRFX_COMP_ENABLED 0 @@ -144,7 +144,7 @@ /** * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -153,7 +153,7 @@ /** * @brief NRFX_COMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_CONFIG_LOG_ENABLED #define NRFX_COMP_CONFIG_LOG_ENABLED 0 @@ -177,7 +177,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -186,7 +186,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -195,7 +195,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -204,7 +204,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -213,7 +213,7 @@ /** * @brief NRFX_EGU2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU2_ENABLED #define NRFX_EGU2_ENABLED 0 @@ -222,7 +222,7 @@ /** * @brief NRFX_EGU3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU3_ENABLED #define NRFX_EGU3_ENABLED 0 @@ -231,7 +231,7 @@ /** * @brief NRFX_EGU4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU4_ENABLED #define NRFX_EGU4_ENABLED 0 @@ -240,7 +240,7 @@ /** * @brief NRFX_EGU5_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU5_ENABLED #define NRFX_EGU5_ENABLED 0 @@ -249,7 +249,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -258,7 +258,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -267,7 +267,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -276,7 +276,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -300,7 +300,7 @@ /** * @brief NRFX_I2S_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_ENABLED #define NRFX_I2S_ENABLED 0 @@ -309,7 +309,7 @@ /** * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -318,7 +318,7 @@ /** * @brief NRFX_I2S_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_CONFIG_LOG_ENABLED #define NRFX_I2S_CONFIG_LOG_ENABLED 0 @@ -342,7 +342,7 @@ /** * @brief NRFX_LPCOMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_ENABLED #define NRFX_LPCOMP_ENABLED 0 @@ -351,7 +351,7 @@ /** * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -360,7 +360,7 @@ /** * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 @@ -384,7 +384,7 @@ /** * @brief NRFX_NFCT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NFCT_ENABLED #define NRFX_NFCT_ENABLED 0 @@ -393,7 +393,7 @@ /** * @brief NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -402,7 +402,7 @@ /** * @brief NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID - Timer instance used for workarounds in the driver. * - * Integer value. Minimum: 0 Maximum: 5 + * Integer value. Minimum: 0. Maximum: 5. */ #ifndef NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID #define NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID 4 @@ -411,7 +411,7 @@ /** * @brief NRFX_NFCT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NFCT_CONFIG_LOG_ENABLED #define NRFX_NFCT_CONFIG_LOG_ENABLED 0 @@ -435,7 +435,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -444,7 +444,7 @@ /** * @brief NRFX_PDM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_ENABLED #define NRFX_PDM_ENABLED 0 @@ -453,7 +453,7 @@ /** * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -462,7 +462,7 @@ /** * @brief NRFX_PDM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_CONFIG_LOG_ENABLED #define NRFX_PDM_CONFIG_LOG_ENABLED 0 @@ -486,7 +486,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -495,7 +495,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -504,7 +504,7 @@ /** * @brief NRFX_PPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_ENABLED #define NRFX_PPI_ENABLED 0 @@ -513,7 +513,7 @@ /** * @brief NRFX_PPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_CONFIG_LOG_ENABLED #define NRFX_PPI_CONFIG_LOG_ENABLED 0 @@ -537,7 +537,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -546,7 +546,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -570,7 +570,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -579,7 +579,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -588,7 +588,7 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 @@ -597,7 +597,7 @@ /** * @brief NRFX_PRS_BOX_3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_3_ENABLED #define NRFX_PRS_BOX_3_ENABLED 0 @@ -606,7 +606,7 @@ /** * @brief NRFX_PRS_BOX_4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_4_ENABLED #define NRFX_PRS_BOX_4_ENABLED 0 @@ -615,7 +615,7 @@ /** * @brief NRFX_PWM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_ENABLED #define NRFX_PWM_ENABLED 0 @@ -624,7 +624,7 @@ /** * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -633,7 +633,7 @@ /** * @brief NRFX_PWM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_CONFIG_LOG_ENABLED #define NRFX_PWM_CONFIG_LOG_ENABLED 0 @@ -642,7 +642,7 @@ /** * @brief NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for PWM. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 @@ -651,7 +651,7 @@ /** * @brief NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE - EGU instance used by the nRF52 Anomaly 109 workaround for PWM. * - * Integer value. Minimum: 0 Maximum: 5 + * Integer value. Minimum: 0. Maximum: 5. */ #ifndef NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE #define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE 5 @@ -675,7 +675,7 @@ /** * @brief NRFX_PWM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM0_ENABLED #define NRFX_PWM0_ENABLED 0 @@ -684,7 +684,7 @@ /** * @brief NRFX_PWM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM1_ENABLED #define NRFX_PWM1_ENABLED 0 @@ -693,7 +693,7 @@ /** * @brief NRFX_PWM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM2_ENABLED #define NRFX_PWM2_ENABLED 0 @@ -702,7 +702,7 @@ /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -711,7 +711,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -720,7 +720,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -744,7 +744,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -753,7 +753,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -762,7 +762,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -786,7 +786,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -795,7 +795,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -804,7 +804,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -828,7 +828,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -837,7 +837,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -846,7 +846,7 @@ /** * @brief NRFX_RTC2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC2_ENABLED #define NRFX_RTC2_ENABLED 0 @@ -855,7 +855,7 @@ /** * @brief NRFX_SAADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_ENABLED #define NRFX_SAADC_ENABLED 0 @@ -864,7 +864,7 @@ /** * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -873,7 +873,7 @@ /** * @brief NRFX_SAADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 @@ -897,7 +897,7 @@ /** * @brief NRFX_SPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_ENABLED #define NRFX_SPI_ENABLED 0 @@ -906,7 +906,7 @@ /** * @brief NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -915,7 +915,7 @@ /** * @brief NRFX_SPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_CONFIG_LOG_ENABLED #define NRFX_SPI_CONFIG_LOG_ENABLED 0 @@ -939,7 +939,7 @@ /** * @brief NRFX_SPI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI0_ENABLED #define NRFX_SPI0_ENABLED 0 @@ -948,7 +948,7 @@ /** * @brief NRFX_SPI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI1_ENABLED #define NRFX_SPI1_ENABLED 0 @@ -957,7 +957,7 @@ /** * @brief NRFX_SPI2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI2_ENABLED #define NRFX_SPI2_ENABLED 0 @@ -966,7 +966,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -975,7 +975,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -984,7 +984,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -993,7 +993,7 @@ /** * @brief NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for SPIM. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 @@ -1017,7 +1017,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -1026,7 +1026,7 @@ /** * @brief NRFX_SPIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM1_ENABLED #define NRFX_SPIM1_ENABLED 0 @@ -1035,7 +1035,7 @@ /** * @brief NRFX_SPIM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM2_ENABLED #define NRFX_SPIM2_ENABLED 0 @@ -1044,7 +1044,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -1053,7 +1053,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1062,7 +1062,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -1071,7 +1071,7 @@ /** * @brief NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for SPIS. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 @@ -1095,7 +1095,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -1104,7 +1104,7 @@ /** * @brief NRFX_SPIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS1_ENABLED #define NRFX_SPIS1_ENABLED 0 @@ -1113,7 +1113,7 @@ /** * @brief NRFX_SPIS2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS2_ENABLED #define NRFX_SPIS2_ENABLED 0 @@ -1122,7 +1122,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -1131,7 +1131,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -1140,7 +1140,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1149,7 +1149,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -1173,7 +1173,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -1182,7 +1182,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1191,7 +1191,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -1215,7 +1215,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -1224,7 +1224,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -1233,7 +1233,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -1242,7 +1242,7 @@ /** * @brief NRFX_TIMER3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER3_ENABLED #define NRFX_TIMER3_ENABLED 0 @@ -1251,7 +1251,7 @@ /** * @brief NRFX_TIMER4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER4_ENABLED #define NRFX_TIMER4_ENABLED 0 @@ -1260,7 +1260,7 @@ /** * @brief NRFX_TWI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 0 @@ -1269,7 +1269,7 @@ /** * @brief NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1278,7 +1278,7 @@ /** * @brief NRFX_TWI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 @@ -1302,7 +1302,7 @@ /** * @brief NRFX_TWI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 @@ -1311,7 +1311,7 @@ /** * @brief NRFX_TWI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED 0 @@ -1320,7 +1320,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -1329,7 +1329,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1338,7 +1338,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -1347,7 +1347,7 @@ /** * @brief NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for TWIM. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 @@ -1371,7 +1371,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -1380,7 +1380,7 @@ /** * @brief NRFX_TWIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 @@ -1389,7 +1389,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -1398,7 +1398,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1407,7 +1407,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -1416,7 +1416,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -1425,7 +1425,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -1449,7 +1449,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -1458,7 +1458,7 @@ /** * @brief NRFX_TWIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS1_ENABLED #define NRFX_TWIS1_ENABLED 0 @@ -1467,7 +1467,7 @@ /** * @brief NRFX_UART_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 0 @@ -1476,7 +1476,7 @@ /** * @brief NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1485,7 +1485,7 @@ /** * @brief NRFX_UART_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 @@ -1509,7 +1509,7 @@ /** * @brief NRFX_UART0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 @@ -1518,16 +1518,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1536,7 +1563,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1560,7 +1587,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1569,7 +1596,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1578,7 +1605,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1587,7 +1614,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1596,7 +1623,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf52833.h b/templates/nrfx_config_nrf52833.h index 8d75ae37f..2e912d4f7 100644 --- a/templates/nrfx_config_nrf52833.h +++ b/templates/nrfx_config_nrf52833.h @@ -42,7 +42,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -51,7 +51,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -75,7 +75,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -84,7 +84,7 @@ /** * @brief NRFX_CLOCK_CONFIG_CT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_CT_ENABLED #define NRFX_CLOCK_CONFIG_CT_ENABLED 1 @@ -93,7 +93,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -102,7 +102,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -111,7 +111,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -135,7 +135,7 @@ /** * @brief NRFX_COMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_ENABLED #define NRFX_COMP_ENABLED 0 @@ -144,7 +144,7 @@ /** * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -153,7 +153,7 @@ /** * @brief NRFX_COMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_CONFIG_LOG_ENABLED #define NRFX_COMP_CONFIG_LOG_ENABLED 0 @@ -177,7 +177,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -186,7 +186,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -195,7 +195,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -204,7 +204,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -213,7 +213,7 @@ /** * @brief NRFX_EGU2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU2_ENABLED #define NRFX_EGU2_ENABLED 0 @@ -222,7 +222,7 @@ /** * @brief NRFX_EGU3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU3_ENABLED #define NRFX_EGU3_ENABLED 0 @@ -231,7 +231,7 @@ /** * @brief NRFX_EGU4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU4_ENABLED #define NRFX_EGU4_ENABLED 0 @@ -240,7 +240,7 @@ /** * @brief NRFX_EGU5_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU5_ENABLED #define NRFX_EGU5_ENABLED 0 @@ -249,7 +249,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -258,7 +258,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -267,7 +267,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -276,7 +276,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -300,7 +300,7 @@ /** * @brief NRFX_I2S_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_ENABLED #define NRFX_I2S_ENABLED 0 @@ -309,7 +309,7 @@ /** * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -318,7 +318,7 @@ /** * @brief NRFX_I2S_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_CONFIG_LOG_ENABLED #define NRFX_I2S_CONFIG_LOG_ENABLED 0 @@ -342,7 +342,7 @@ /** * @brief NRFX_LPCOMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_ENABLED #define NRFX_LPCOMP_ENABLED 0 @@ -351,7 +351,7 @@ /** * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -360,7 +360,7 @@ /** * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 @@ -384,7 +384,7 @@ /** * @brief NRFX_NFCT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NFCT_ENABLED #define NRFX_NFCT_ENABLED 0 @@ -393,7 +393,7 @@ /** * @brief NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -402,7 +402,7 @@ /** * @brief NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID - Timer instance used for workarounds in the driver. * - * Integer value. Minimum: 0 Maximum: 5 + * Integer value. Minimum: 0. Maximum: 5. */ #ifndef NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID #define NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID 4 @@ -411,7 +411,7 @@ /** * @brief NRFX_NFCT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NFCT_CONFIG_LOG_ENABLED #define NRFX_NFCT_CONFIG_LOG_ENABLED 0 @@ -435,7 +435,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -444,7 +444,7 @@ /** * @brief NRFX_PDM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_ENABLED #define NRFX_PDM_ENABLED 0 @@ -453,7 +453,7 @@ /** * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -462,7 +462,7 @@ /** * @brief NRFX_PDM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_CONFIG_LOG_ENABLED #define NRFX_PDM_CONFIG_LOG_ENABLED 0 @@ -486,7 +486,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -495,7 +495,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -504,7 +504,7 @@ /** * @brief NRFX_PPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_ENABLED #define NRFX_PPI_ENABLED 0 @@ -513,7 +513,7 @@ /** * @brief NRFX_PPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_CONFIG_LOG_ENABLED #define NRFX_PPI_CONFIG_LOG_ENABLED 0 @@ -537,7 +537,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -546,7 +546,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -570,7 +570,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -579,7 +579,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -588,7 +588,7 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 @@ -597,7 +597,7 @@ /** * @brief NRFX_PRS_BOX_3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_3_ENABLED #define NRFX_PRS_BOX_3_ENABLED 0 @@ -606,7 +606,7 @@ /** * @brief NRFX_PRS_BOX_4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_4_ENABLED #define NRFX_PRS_BOX_4_ENABLED 0 @@ -615,7 +615,7 @@ /** * @brief NRFX_PWM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_ENABLED #define NRFX_PWM_ENABLED 0 @@ -624,7 +624,7 @@ /** * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -633,7 +633,7 @@ /** * @brief NRFX_PWM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_CONFIG_LOG_ENABLED #define NRFX_PWM_CONFIG_LOG_ENABLED 0 @@ -657,7 +657,7 @@ /** * @brief NRFX_PWM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM0_ENABLED #define NRFX_PWM0_ENABLED 0 @@ -666,7 +666,7 @@ /** * @brief NRFX_PWM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM1_ENABLED #define NRFX_PWM1_ENABLED 0 @@ -675,7 +675,7 @@ /** * @brief NRFX_PWM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM2_ENABLED #define NRFX_PWM2_ENABLED 0 @@ -684,7 +684,7 @@ /** * @brief NRFX_PWM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM3_ENABLED #define NRFX_PWM3_ENABLED 0 @@ -693,7 +693,7 @@ /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -702,7 +702,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -711,7 +711,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -735,7 +735,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -744,7 +744,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -753,7 +753,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -777,7 +777,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -786,7 +786,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -795,7 +795,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -819,7 +819,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -828,7 +828,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -837,7 +837,7 @@ /** * @brief NRFX_RTC2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC2_ENABLED #define NRFX_RTC2_ENABLED 0 @@ -846,7 +846,7 @@ /** * @brief NRFX_SAADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_ENABLED #define NRFX_SAADC_ENABLED 0 @@ -855,7 +855,7 @@ /** * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -864,7 +864,7 @@ /** * @brief NRFX_SAADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 @@ -888,7 +888,7 @@ /** * @brief NRFX_SPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_ENABLED #define NRFX_SPI_ENABLED 0 @@ -897,7 +897,7 @@ /** * @brief NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -906,7 +906,7 @@ /** * @brief NRFX_SPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_CONFIG_LOG_ENABLED #define NRFX_SPI_CONFIG_LOG_ENABLED 0 @@ -930,7 +930,7 @@ /** * @brief NRFX_SPI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI0_ENABLED #define NRFX_SPI0_ENABLED 0 @@ -939,7 +939,7 @@ /** * @brief NRFX_SPI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI1_ENABLED #define NRFX_SPI1_ENABLED 0 @@ -948,7 +948,7 @@ /** * @brief NRFX_SPI2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI2_ENABLED #define NRFX_SPI2_ENABLED 0 @@ -957,7 +957,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -966,7 +966,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -975,7 +975,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -999,7 +999,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -1008,7 +1008,7 @@ /** * @brief NRFX_SPIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM1_ENABLED #define NRFX_SPIM1_ENABLED 0 @@ -1017,7 +1017,7 @@ /** * @brief NRFX_SPIM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM2_ENABLED #define NRFX_SPIM2_ENABLED 0 @@ -1026,7 +1026,7 @@ /** * @brief NRFX_SPIM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM3_ENABLED #define NRFX_SPIM3_ENABLED 0 @@ -1035,7 +1035,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -1044,7 +1044,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1053,7 +1053,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -1077,7 +1077,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -1086,7 +1086,7 @@ /** * @brief NRFX_SPIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS1_ENABLED #define NRFX_SPIS1_ENABLED 0 @@ -1095,7 +1095,7 @@ /** * @brief NRFX_SPIS2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS2_ENABLED #define NRFX_SPIS2_ENABLED 0 @@ -1104,7 +1104,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -1113,7 +1113,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -1122,7 +1122,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1131,7 +1131,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -1155,7 +1155,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -1164,7 +1164,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1173,7 +1173,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -1197,7 +1197,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -1206,7 +1206,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -1215,7 +1215,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -1224,7 +1224,7 @@ /** * @brief NRFX_TIMER3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER3_ENABLED #define NRFX_TIMER3_ENABLED 0 @@ -1233,7 +1233,7 @@ /** * @brief NRFX_TIMER4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER4_ENABLED #define NRFX_TIMER4_ENABLED 0 @@ -1242,7 +1242,7 @@ /** * @brief NRFX_TWI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 0 @@ -1251,7 +1251,7 @@ /** * @brief NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1260,7 +1260,7 @@ /** * @brief NRFX_TWI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 @@ -1284,7 +1284,7 @@ /** * @brief NRFX_TWI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 @@ -1293,7 +1293,7 @@ /** * @brief NRFX_TWI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED 0 @@ -1302,7 +1302,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -1311,7 +1311,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1320,7 +1320,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -1344,7 +1344,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -1353,7 +1353,7 @@ /** * @brief NRFX_TWIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 @@ -1362,7 +1362,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -1371,7 +1371,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1380,7 +1380,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -1389,7 +1389,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -1398,7 +1398,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -1422,7 +1422,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -1431,7 +1431,7 @@ /** * @brief NRFX_TWIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS1_ENABLED #define NRFX_TWIS1_ENABLED 0 @@ -1440,7 +1440,7 @@ /** * @brief NRFX_UART_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 0 @@ -1449,7 +1449,7 @@ /** * @brief NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1458,7 +1458,7 @@ /** * @brief NRFX_UART_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 @@ -1482,7 +1482,7 @@ /** * @brief NRFX_UART0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 @@ -1491,16 +1491,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1509,7 +1536,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1533,7 +1560,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1542,7 +1569,7 @@ /** * @brief NRFX_UARTE1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE1_ENABLED #define NRFX_UARTE1_ENABLED 0 @@ -1551,7 +1578,7 @@ /** * @brief NRFX_USBD_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_ENABLED #define NRFX_USBD_ENABLED 0 @@ -1560,7 +1587,7 @@ /** * @brief NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1569,7 +1596,7 @@ /** * @brief NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST #define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1 @@ -1578,7 +1605,7 @@ /** * @brief NRFX_USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_ISO_IN_ZLP #define NRFX_USBD_CONFIG_ISO_IN_ZLP 0 @@ -1587,7 +1614,7 @@ /** * @brief NRFX_USBD_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_LOG_ENABLED #define NRFX_USBD_CONFIG_LOG_ENABLED 0 @@ -1611,7 +1638,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1620,7 +1647,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1629,7 +1656,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1638,7 +1665,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf52840.h b/templates/nrfx_config_nrf52840.h index 08daa7797..bcd4e3986 100644 --- a/templates/nrfx_config_nrf52840.h +++ b/templates/nrfx_config_nrf52840.h @@ -42,7 +42,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -51,7 +51,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -75,7 +75,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -84,7 +84,7 @@ /** * @brief NRFX_CLOCK_CONFIG_CT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_CT_ENABLED #define NRFX_CLOCK_CONFIG_CT_ENABLED 1 @@ -93,7 +93,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -102,7 +102,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -111,7 +111,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -135,7 +135,7 @@ /** * @brief NRFX_COMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_ENABLED #define NRFX_COMP_ENABLED 0 @@ -144,7 +144,7 @@ /** * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -153,7 +153,7 @@ /** * @brief NRFX_COMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_CONFIG_LOG_ENABLED #define NRFX_COMP_CONFIG_LOG_ENABLED 0 @@ -177,7 +177,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -186,7 +186,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -195,7 +195,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -204,7 +204,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -213,7 +213,7 @@ /** * @brief NRFX_EGU2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU2_ENABLED #define NRFX_EGU2_ENABLED 0 @@ -222,7 +222,7 @@ /** * @brief NRFX_EGU3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU3_ENABLED #define NRFX_EGU3_ENABLED 0 @@ -231,7 +231,7 @@ /** * @brief NRFX_EGU4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU4_ENABLED #define NRFX_EGU4_ENABLED 0 @@ -240,7 +240,7 @@ /** * @brief NRFX_EGU5_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU5_ENABLED #define NRFX_EGU5_ENABLED 0 @@ -249,7 +249,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -258,7 +258,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -267,7 +267,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -276,7 +276,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -300,7 +300,7 @@ /** * @brief NRFX_I2S_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_ENABLED #define NRFX_I2S_ENABLED 0 @@ -309,7 +309,7 @@ /** * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -318,7 +318,7 @@ /** * @brief NRFX_I2S_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_CONFIG_LOG_ENABLED #define NRFX_I2S_CONFIG_LOG_ENABLED 0 @@ -342,7 +342,7 @@ /** * @brief NRFX_LPCOMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_ENABLED #define NRFX_LPCOMP_ENABLED 0 @@ -351,7 +351,7 @@ /** * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -360,7 +360,7 @@ /** * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 @@ -384,7 +384,7 @@ /** * @brief NRFX_NFCT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NFCT_ENABLED #define NRFX_NFCT_ENABLED 0 @@ -393,7 +393,7 @@ /** * @brief NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -402,7 +402,7 @@ /** * @brief NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID - Timer instance used for workarounds in the driver. * - * Integer value. Minimum: 0 Maximum: 5 + * Integer value. Minimum: 0. Maximum: 5. */ #ifndef NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID #define NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID 4 @@ -411,7 +411,7 @@ /** * @brief NRFX_NFCT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NFCT_CONFIG_LOG_ENABLED #define NRFX_NFCT_CONFIG_LOG_ENABLED 0 @@ -435,7 +435,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -444,7 +444,7 @@ /** * @brief NRFX_PDM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_ENABLED #define NRFX_PDM_ENABLED 0 @@ -453,7 +453,7 @@ /** * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -462,7 +462,7 @@ /** * @brief NRFX_PDM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_CONFIG_LOG_ENABLED #define NRFX_PDM_CONFIG_LOG_ENABLED 0 @@ -486,7 +486,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -495,7 +495,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -504,7 +504,7 @@ /** * @brief NRFX_PPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_ENABLED #define NRFX_PPI_ENABLED 0 @@ -513,7 +513,7 @@ /** * @brief NRFX_PPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PPI_CONFIG_LOG_ENABLED #define NRFX_PPI_CONFIG_LOG_ENABLED 0 @@ -537,7 +537,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -546,7 +546,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -570,7 +570,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -579,7 +579,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -588,7 +588,7 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 @@ -597,7 +597,7 @@ /** * @brief NRFX_PRS_BOX_3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_3_ENABLED #define NRFX_PRS_BOX_3_ENABLED 0 @@ -606,7 +606,7 @@ /** * @brief NRFX_PRS_BOX_4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_4_ENABLED #define NRFX_PRS_BOX_4_ENABLED 0 @@ -615,7 +615,7 @@ /** * @brief NRFX_PWM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_ENABLED #define NRFX_PWM_ENABLED 0 @@ -624,7 +624,7 @@ /** * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -633,7 +633,7 @@ /** * @brief NRFX_PWM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_CONFIG_LOG_ENABLED #define NRFX_PWM_CONFIG_LOG_ENABLED 0 @@ -657,7 +657,7 @@ /** * @brief NRFX_PWM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM0_ENABLED #define NRFX_PWM0_ENABLED 0 @@ -666,7 +666,7 @@ /** * @brief NRFX_PWM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM1_ENABLED #define NRFX_PWM1_ENABLED 0 @@ -675,7 +675,7 @@ /** * @brief NRFX_PWM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM2_ENABLED #define NRFX_PWM2_ENABLED 0 @@ -684,7 +684,7 @@ /** * @brief NRFX_PWM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM3_ENABLED #define NRFX_PWM3_ENABLED 0 @@ -693,7 +693,7 @@ /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -702,7 +702,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -711,7 +711,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -735,7 +735,7 @@ /** * @brief NRFX_QSPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QSPI_ENABLED #define NRFX_QSPI_ENABLED 0 @@ -744,7 +744,7 @@ /** * @brief NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -753,7 +753,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -762,7 +762,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -771,7 +771,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -795,7 +795,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -804,7 +804,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -813,7 +813,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -837,7 +837,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -846,7 +846,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -855,7 +855,7 @@ /** * @brief NRFX_RTC2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC2_ENABLED #define NRFX_RTC2_ENABLED 0 @@ -864,7 +864,7 @@ /** * @brief NRFX_SAADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_ENABLED #define NRFX_SAADC_ENABLED 0 @@ -873,7 +873,7 @@ /** * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -882,7 +882,7 @@ /** * @brief NRFX_SAADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 @@ -906,7 +906,7 @@ /** * @brief NRFX_SPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_ENABLED #define NRFX_SPI_ENABLED 0 @@ -915,7 +915,7 @@ /** * @brief NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -924,7 +924,7 @@ /** * @brief NRFX_SPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI_CONFIG_LOG_ENABLED #define NRFX_SPI_CONFIG_LOG_ENABLED 0 @@ -948,7 +948,7 @@ /** * @brief NRFX_SPI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI0_ENABLED #define NRFX_SPI0_ENABLED 0 @@ -957,7 +957,7 @@ /** * @brief NRFX_SPI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI1_ENABLED #define NRFX_SPI1_ENABLED 0 @@ -966,7 +966,7 @@ /** * @brief NRFX_SPI2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPI2_ENABLED #define NRFX_SPI2_ENABLED 0 @@ -975,7 +975,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -984,7 +984,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -993,7 +993,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -1017,7 +1017,7 @@ /** * @brief NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 0 @@ -1026,7 +1026,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -1035,7 +1035,7 @@ /** * @brief NRFX_SPIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM1_ENABLED #define NRFX_SPIM1_ENABLED 0 @@ -1044,7 +1044,7 @@ /** * @brief NRFX_SPIM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM2_ENABLED #define NRFX_SPIM2_ENABLED 0 @@ -1053,7 +1053,7 @@ /** * @brief NRFX_SPIM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM3_ENABLED #define NRFX_SPIM3_ENABLED 0 @@ -1062,7 +1062,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -1071,7 +1071,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1080,7 +1080,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -1104,7 +1104,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -1113,7 +1113,7 @@ /** * @brief NRFX_SPIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS1_ENABLED #define NRFX_SPIS1_ENABLED 0 @@ -1122,7 +1122,7 @@ /** * @brief NRFX_SPIS2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS2_ENABLED #define NRFX_SPIS2_ENABLED 0 @@ -1131,7 +1131,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -1140,7 +1140,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -1149,7 +1149,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1158,7 +1158,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -1182,7 +1182,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -1191,7 +1191,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1200,7 +1200,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -1224,7 +1224,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -1233,7 +1233,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -1242,7 +1242,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -1251,7 +1251,7 @@ /** * @brief NRFX_TIMER3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER3_ENABLED #define NRFX_TIMER3_ENABLED 0 @@ -1260,7 +1260,7 @@ /** * @brief NRFX_TIMER4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER4_ENABLED #define NRFX_TIMER4_ENABLED 0 @@ -1269,7 +1269,7 @@ /** * @brief NRFX_TWI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 0 @@ -1278,7 +1278,7 @@ /** * @brief NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1287,7 +1287,7 @@ /** * @brief NRFX_TWI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 @@ -1311,7 +1311,7 @@ /** * @brief NRFX_TWI0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 @@ -1320,7 +1320,7 @@ /** * @brief NRFX_TWI1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED 0 @@ -1329,7 +1329,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -1338,7 +1338,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1347,7 +1347,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -1371,7 +1371,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -1380,7 +1380,7 @@ /** * @brief NRFX_TWIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 @@ -1389,7 +1389,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -1398,7 +1398,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1407,7 +1407,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -1416,7 +1416,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -1425,7 +1425,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -1449,7 +1449,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -1458,7 +1458,7 @@ /** * @brief NRFX_TWIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS1_ENABLED #define NRFX_TWIS1_ENABLED 0 @@ -1467,7 +1467,7 @@ /** * @brief NRFX_UART_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 0 @@ -1476,7 +1476,7 @@ /** * @brief NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1485,7 +1485,7 @@ /** * @brief NRFX_UART_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 @@ -1509,7 +1509,7 @@ /** * @brief NRFX_UART0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 @@ -1518,16 +1518,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1536,7 +1563,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1560,7 +1587,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1569,7 +1596,7 @@ /** * @brief NRFX_UARTE1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE1_ENABLED #define NRFX_UARTE1_ENABLED 0 @@ -1578,7 +1605,7 @@ /** * @brief NRFX_USBD_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_ENABLED #define NRFX_USBD_ENABLED 0 @@ -1587,7 +1614,7 @@ /** * @brief NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1596,7 +1623,7 @@ /** * @brief NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST #define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1 @@ -1605,7 +1632,7 @@ /** * @brief NRFX_USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_ISO_IN_ZLP #define NRFX_USBD_CONFIG_ISO_IN_ZLP 0 @@ -1614,7 +1641,7 @@ /** * @brief NRFX_USBD_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_LOG_ENABLED #define NRFX_USBD_CONFIG_LOG_ENABLED 0 @@ -1638,7 +1665,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1647,7 +1674,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1656,7 +1683,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1665,7 +1692,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf5340_application.h b/templates/nrfx_config_nrf5340_application.h index 0aac573b3..fa178dee8 100644 --- a/templates/nrfx_config_nrf5340_application.h +++ b/templates/nrfx_config_nrf5340_application.h @@ -116,35 +116,26 @@ * only one type of access available. For these peripherals, you cannot choose * between secure and non-secure mapping. */ -#if defined(NRF_TRUSTZONE_NONSECURE) -#define NRF_GPIOTE1 NRF_GPIOTE1_NS -#else +#if !defined(NRF_TRUSTZONE_NONSECURE) #define NRF_CACHE NRF_CACHE_S #define NRF_CACHEINFO NRF_CACHEINFO_S #define NRF_CACHEDATA NRF_CACHEDATA_S #define NRF_CRYPTOCELL NRF_CRYPTOCELL_S #define NRF_CTI NRF_CTI_S #define NRF_FICR NRF_FICR_S -#define NRF_GPIOTE0 NRF_GPIOTE0_S #define NRF_SPU NRF_SPU_S #define NRF_TAD NRF_TAD_S #define NRF_UICR NRF_UICR_S #endif /* Fixups for the GPIOTE driver. */ -#if defined(NRF_TRUSTZONE_NONSECURE) -#define NRF_GPIOTE NRF_GPIOTE1 -#define GPIOTE_IRQHandler GPIOTE1_IRQHandler -#else -#define NRF_GPIOTE NRF_GPIOTE0 -#define GPIOTE_IRQHandler GPIOTE0_IRQHandler -#endif - +#define NRF_GPIOTE0 NRF_GPIOTE0_S +#define NRF_GPIOTE1 NRF_GPIOTE1_NS /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -153,7 +144,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -187,7 +178,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -196,7 +187,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -205,7 +196,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -214,7 +205,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -238,7 +229,7 @@ /** * @brief NRFX_COMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_ENABLED #define NRFX_COMP_ENABLED 0 @@ -247,7 +238,7 @@ /** * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -256,7 +247,7 @@ /** * @brief NRFX_COMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_COMP_CONFIG_LOG_ENABLED #define NRFX_COMP_CONFIG_LOG_ENABLED 0 @@ -280,7 +271,7 @@ /** * @brief NRFX_DPPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_DPPI_ENABLED #define NRFX_DPPI_ENABLED 0 @@ -289,7 +280,7 @@ /** * @brief NRFX_DPPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_DPPI_CONFIG_LOG_ENABLED #define NRFX_DPPI_CONFIG_LOG_ENABLED 0 @@ -313,7 +304,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -322,7 +313,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -331,7 +322,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -340,7 +331,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -349,7 +340,7 @@ /** * @brief NRFX_EGU2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU2_ENABLED #define NRFX_EGU2_ENABLED 0 @@ -358,7 +349,7 @@ /** * @brief NRFX_EGU3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU3_ENABLED #define NRFX_EGU3_ENABLED 0 @@ -367,7 +358,7 @@ /** * @brief NRFX_EGU4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU4_ENABLED #define NRFX_EGU4_ENABLED 0 @@ -376,7 +367,7 @@ /** * @brief NRFX_EGU5_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU5_ENABLED #define NRFX_EGU5_ENABLED 0 @@ -385,7 +376,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -394,7 +385,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -403,7 +394,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -412,7 +403,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -433,10 +424,28 @@ #define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 #endif +/** + * @brief NRFX_GPIOTE0_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE0_ENABLED +#define NRFX_GPIOTE0_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE1_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE1_ENABLED +#define NRFX_GPIOTE1_ENABLED 0 +#endif + /** * @brief NRFX_I2S_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_ENABLED #define NRFX_I2S_ENABLED 0 @@ -445,7 +454,7 @@ /** * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -454,7 +463,7 @@ /** * @brief NRFX_I2S_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_CONFIG_LOG_ENABLED #define NRFX_I2S_CONFIG_LOG_ENABLED 0 @@ -478,7 +487,7 @@ /** * @brief NRFX_I2S0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S0_ENABLED #define NRFX_I2S0_ENABLED 0 @@ -487,7 +496,7 @@ /** * @brief NRFX_IPC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_IPC_ENABLED #define NRFX_IPC_ENABLED 0 @@ -496,7 +505,7 @@ /** * @brief NRFX_LPCOMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_ENABLED #define NRFX_LPCOMP_ENABLED 0 @@ -505,7 +514,7 @@ /** * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -514,7 +523,7 @@ /** * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 @@ -538,7 +547,7 @@ /** * @brief NRFX_NFCT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NFCT_ENABLED #define NRFX_NFCT_ENABLED 0 @@ -547,7 +556,7 @@ /** * @brief NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -556,7 +565,7 @@ /** * @brief NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID - Timer instance used for workarounds in the driver. * - * Integer value. Minimum: 0 Maximum: 5 + * Integer value. Minimum: 0. Maximum: 5. */ #ifndef NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID #define NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID 2 @@ -565,7 +574,7 @@ /** * @brief NRFX_NFCT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NFCT_CONFIG_LOG_ENABLED #define NRFX_NFCT_CONFIG_LOG_ENABLED 0 @@ -589,7 +598,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -598,7 +607,7 @@ /** * @brief NRFX_PDM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_ENABLED #define NRFX_PDM_ENABLED 0 @@ -607,7 +616,7 @@ /** * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -616,7 +625,7 @@ /** * @brief NRFX_PDM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_CONFIG_LOG_ENABLED #define NRFX_PDM_CONFIG_LOG_ENABLED 0 @@ -640,7 +649,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -649,7 +658,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -658,7 +667,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -667,7 +676,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -691,7 +700,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -700,7 +709,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -709,7 +718,7 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 @@ -718,7 +727,7 @@ /** * @brief NRFX_PRS_BOX_3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_3_ENABLED #define NRFX_PRS_BOX_3_ENABLED 0 @@ -727,7 +736,7 @@ /** * @brief NRFX_PRS_BOX_4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_4_ENABLED #define NRFX_PRS_BOX_4_ENABLED 0 @@ -736,7 +745,7 @@ /** * @brief NRFX_PWM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_ENABLED #define NRFX_PWM_ENABLED 0 @@ -745,7 +754,7 @@ /** * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -754,7 +763,7 @@ /** * @brief NRFX_PWM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_CONFIG_LOG_ENABLED #define NRFX_PWM_CONFIG_LOG_ENABLED 0 @@ -778,7 +787,7 @@ /** * @brief NRFX_PWM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM0_ENABLED #define NRFX_PWM0_ENABLED 0 @@ -787,7 +796,7 @@ /** * @brief NRFX_PWM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM1_ENABLED #define NRFX_PWM1_ENABLED 0 @@ -796,7 +805,7 @@ /** * @brief NRFX_PWM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM2_ENABLED #define NRFX_PWM2_ENABLED 0 @@ -805,7 +814,7 @@ /** * @brief NRFX_PWM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM3_ENABLED #define NRFX_PWM3_ENABLED 0 @@ -814,7 +823,7 @@ /** * @brief NRFX_QDEC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_ENABLED #define NRFX_QDEC_ENABLED 0 @@ -823,7 +832,7 @@ /** * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -832,7 +841,7 @@ /** * @brief NRFX_QDEC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 @@ -856,7 +865,7 @@ /** * @brief NRFX_QDEC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC0_ENABLED #define NRFX_QDEC0_ENABLED 0 @@ -865,7 +874,7 @@ /** * @brief NRFX_QDEC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QDEC1_ENABLED #define NRFX_QDEC1_ENABLED 0 @@ -874,7 +883,7 @@ /** * @brief NRFX_QSPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_QSPI_ENABLED #define NRFX_QSPI_ENABLED 0 @@ -883,7 +892,7 @@ /** * @brief NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_QSPI_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -892,7 +901,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -901,7 +910,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -910,7 +919,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -934,7 +943,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -943,7 +952,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -952,7 +961,7 @@ /** * @brief NRFX_SAADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_ENABLED #define NRFX_SAADC_ENABLED 0 @@ -961,7 +970,7 @@ /** * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -970,7 +979,7 @@ /** * @brief NRFX_SAADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 @@ -994,7 +1003,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -1003,7 +1012,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1012,7 +1021,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -1036,7 +1045,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -1045,7 +1054,7 @@ /** * @brief NRFX_SPIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM1_ENABLED #define NRFX_SPIM1_ENABLED 0 @@ -1054,7 +1063,7 @@ /** * @brief NRFX_SPIM4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM4_ENABLED #define NRFX_SPIM4_ENABLED 0 @@ -1063,7 +1072,7 @@ /** * @brief NRFX_SPIM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM2_ENABLED #define NRFX_SPIM2_ENABLED 0 @@ -1072,7 +1081,7 @@ /** * @brief NRFX_SPIM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM3_ENABLED #define NRFX_SPIM3_ENABLED 0 @@ -1081,7 +1090,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -1090,7 +1099,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1099,7 +1108,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -1123,7 +1132,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -1132,7 +1141,7 @@ /** * @brief NRFX_SPIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS1_ENABLED #define NRFX_SPIS1_ENABLED 0 @@ -1141,7 +1150,7 @@ /** * @brief NRFX_SPIS2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS2_ENABLED #define NRFX_SPIS2_ENABLED 0 @@ -1150,7 +1159,7 @@ /** * @brief NRFX_SPIS3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS3_ENABLED #define NRFX_SPIS3_ENABLED 0 @@ -1159,7 +1168,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -1168,7 +1177,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -1177,7 +1186,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1186,7 +1195,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -1210,7 +1219,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -1219,7 +1228,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -1228,7 +1237,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -1237,7 +1246,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -1246,7 +1255,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1255,7 +1264,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -1279,7 +1288,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -1288,7 +1297,7 @@ /** * @brief NRFX_TWIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 @@ -1297,7 +1306,7 @@ /** * @brief NRFX_TWIM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM2_ENABLED #define NRFX_TWIM2_ENABLED 0 @@ -1306,7 +1315,7 @@ /** * @brief NRFX_TWIM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM3_ENABLED #define NRFX_TWIM3_ENABLED 0 @@ -1315,7 +1324,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -1324,7 +1333,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1333,7 +1342,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -1342,7 +1351,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -1351,7 +1360,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -1375,7 +1384,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -1384,7 +1393,7 @@ /** * @brief NRFX_TWIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS1_ENABLED #define NRFX_TWIS1_ENABLED 0 @@ -1393,7 +1402,7 @@ /** * @brief NRFX_TWIS2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS2_ENABLED #define NRFX_TWIS2_ENABLED 0 @@ -1402,7 +1411,7 @@ /** * @brief NRFX_TWIS3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS3_ENABLED #define NRFX_TWIS3_ENABLED 0 @@ -1411,16 +1420,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1429,7 +1465,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1453,7 +1489,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1462,7 +1498,7 @@ /** * @brief NRFX_UARTE1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE1_ENABLED #define NRFX_UARTE1_ENABLED 0 @@ -1471,7 +1507,7 @@ /** * @brief NRFX_UARTE2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE2_ENABLED #define NRFX_UARTE2_ENABLED 0 @@ -1480,7 +1516,7 @@ /** * @brief NRFX_UARTE3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE3_ENABLED #define NRFX_UARTE3_ENABLED 0 @@ -1489,7 +1525,7 @@ /** * @brief NRFX_USBD_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_ENABLED #define NRFX_USBD_ENABLED 0 @@ -1498,7 +1534,7 @@ /** * @brief NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_USBD_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1507,7 +1543,7 @@ /** * @brief NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST - Give priority to isochronous transfers * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST #define NRFX_USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1 @@ -1516,7 +1552,7 @@ /** * @brief NRFX_USBD_CONFIG_ISO_IN_ZLP - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_ISO_IN_ZLP #define NRFX_USBD_CONFIG_ISO_IN_ZLP 0 @@ -1525,7 +1561,7 @@ /** * @brief NRFX_USBD_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBD_CONFIG_LOG_ENABLED #define NRFX_USBD_CONFIG_LOG_ENABLED 0 @@ -1549,7 +1585,7 @@ /** * @brief NRFX_USBREG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_USBREG_ENABLED #define NRFX_USBREG_ENABLED 0 @@ -1558,7 +1594,7 @@ /** * @brief NRFX_USBREG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_USBREG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_USBREG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1567,7 +1603,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1576,7 +1612,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1585,7 +1621,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1594,7 +1630,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 @@ -1618,7 +1654,7 @@ /** * @brief NRFX_WDT0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT0_ENABLED #define NRFX_WDT0_ENABLED 0 @@ -1627,7 +1663,7 @@ /** * @brief NRFX_WDT1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT1_ENABLED #define NRFX_WDT1_ENABLED 0 diff --git a/templates/nrfx_config_nrf5340_network.h b/templates/nrfx_config_nrf5340_network.h index 4dab4e30d..92f1fd3cd 100644 --- a/templates/nrfx_config_nrf5340_network.h +++ b/templates/nrfx_config_nrf5340_network.h @@ -88,7 +88,7 @@ /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -97,7 +97,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -119,7 +119,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 @@ -128,7 +128,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -137,7 +137,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -146,7 +146,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -170,7 +170,7 @@ /** * @brief NRFX_DPPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_DPPI_ENABLED #define NRFX_DPPI_ENABLED 0 @@ -179,7 +179,7 @@ /** * @brief NRFX_DPPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_DPPI_CONFIG_LOG_ENABLED #define NRFX_DPPI_CONFIG_LOG_ENABLED 0 @@ -203,7 +203,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -212,7 +212,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -221,7 +221,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -230,7 +230,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -239,7 +239,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -248,7 +248,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -257,7 +257,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -281,7 +281,7 @@ /** * @brief NRFX_IPC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_IPC_ENABLED #define NRFX_IPC_ENABLED 0 @@ -290,7 +290,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -299,7 +299,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -308,7 +308,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -317,7 +317,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -326,7 +326,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -350,7 +350,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -359,7 +359,7 @@ /** * @brief NRFX_RNG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_ENABLED #define NRFX_RNG_ENABLED 0 @@ -368,7 +368,7 @@ /** * @brief NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RNG_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -377,7 +377,7 @@ /** * @brief NRFX_RNG_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RNG_CONFIG_LOG_ENABLED #define NRFX_RNG_CONFIG_LOG_ENABLED 0 @@ -401,7 +401,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -410,7 +410,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -419,7 +419,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -443,7 +443,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -452,7 +452,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -461,7 +461,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -470,7 +470,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -479,7 +479,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -503,7 +503,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -512,7 +512,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -521,7 +521,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -530,7 +530,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -554,7 +554,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -563,7 +563,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -572,7 +572,7 @@ /** * @brief NRFX_TEMP_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_ENABLED #define NRFX_TEMP_ENABLED 0 @@ -581,7 +581,7 @@ /** * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -590,7 +590,7 @@ /** * @brief NRFX_TEMP_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 @@ -614,7 +614,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -623,7 +623,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -632,7 +632,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -656,7 +656,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -665,7 +665,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -674,7 +674,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -683,7 +683,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -692,7 +692,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -701,7 +701,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -725,7 +725,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -734,7 +734,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -743,7 +743,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -752,7 +752,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -761,7 +761,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -770,7 +770,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -794,7 +794,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -803,16 +803,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -821,7 +848,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -845,7 +872,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -854,7 +881,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -863,7 +890,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -872,7 +899,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -881,7 +908,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_config_nrf91.h b/templates/nrfx_config_nrf91.h index e2a8a8cca..5afe57001 100644 --- a/templates/nrfx_config_nrf91.h +++ b/templates/nrfx_config_nrf91.h @@ -101,32 +101,24 @@ * only one type of access available. For these peripherals, you cannot choose * between secure and non-secure mapping. */ -#if defined(NRF_TRUSTZONE_NONSECURE) -#define NRF_GPIOTE1 NRF_GPIOTE1_NS -#else +#if !defined(NRF_TRUSTZONE_NONSECURE) #define NRF_CC_HOST_RGF NRF_CC_HOST_RGF_S #define NRF_CRYPTOCELL NRF_CRYPTOCELL_S #define NRF_CTRL_AP_PERI NRF_CTRL_AP_PERI_S #define NRF_FICR NRF_FICR_S -#define NRF_GPIOTE0 NRF_GPIOTE0_S #define NRF_SPU NRF_SPU_S #define NRF_TAD NRF_TAD_S #define NRF_UICR NRF_UICR_S #endif /* Fixups for the GPIOTE driver. */ -#if defined(NRF_TRUSTZONE_NONSECURE) -#define NRF_GPIOTE NRF_GPIOTE1 -#define GPIOTE_IRQHandler GPIOTE1_IRQHandler -#else -#define NRF_GPIOTE NRF_GPIOTE0 -#define GPIOTE_IRQHandler GPIOTE0_IRQHandler -#endif +#define NRF_GPIOTE0 NRF_GPIOTE0_S +#define NRF_GPIOTE1 NRF_GPIOTE1_NS /** * @brief NRFX_DEFAULT_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_DEFAULT_IRQ_PRIORITY #define NRFX_DEFAULT_IRQ_PRIORITY 7 @@ -135,7 +127,7 @@ /** * @brief NRFX_CLOCK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_ENABLED #define NRFX_CLOCK_ENABLED 0 @@ -156,7 +148,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 @@ -165,7 +157,7 @@ /** * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -174,7 +166,7 @@ /** * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED #define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 @@ -198,7 +190,7 @@ /** * @brief NRFX_DPPI_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_DPPI_ENABLED #define NRFX_DPPI_ENABLED 0 @@ -207,7 +199,7 @@ /** * @brief NRFX_DPPI_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_DPPI_CONFIG_LOG_ENABLED #define NRFX_DPPI_CONFIG_LOG_ENABLED 0 @@ -231,7 +223,7 @@ /** * @brief NRFX_EGU_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU_ENABLED #define NRFX_EGU_ENABLED 0 @@ -240,7 +232,7 @@ /** * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -249,7 +241,7 @@ /** * @brief NRFX_EGU0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU0_ENABLED #define NRFX_EGU0_ENABLED 0 @@ -258,7 +250,7 @@ /** * @brief NRFX_EGU1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU1_ENABLED #define NRFX_EGU1_ENABLED 0 @@ -267,7 +259,7 @@ /** * @brief NRFX_EGU2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU2_ENABLED #define NRFX_EGU2_ENABLED 0 @@ -276,7 +268,7 @@ /** * @brief NRFX_EGU3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU3_ENABLED #define NRFX_EGU3_ENABLED 0 @@ -285,7 +277,7 @@ /** * @brief NRFX_EGU4_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU4_ENABLED #define NRFX_EGU4_ENABLED 0 @@ -294,7 +286,7 @@ /** * @brief NRFX_EGU5_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_EGU5_ENABLED #define NRFX_EGU5_ENABLED 0 @@ -303,7 +295,7 @@ /** * @brief NRFX_GPIOTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_ENABLED #define NRFX_GPIOTE_ENABLED 0 @@ -312,7 +304,7 @@ /** * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -321,7 +313,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS * - * Integer value. Minimum: 0 Maximum: 15 + * Integer value. Minimum: 0. Maximum: 15. */ #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 @@ -330,7 +322,7 @@ /** * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 @@ -351,10 +343,28 @@ #define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 #endif +/** + * @brief NRFX_GPIOTE0_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE0_ENABLED +#define NRFX_GPIOTE0_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE1_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE1_ENABLED +#define NRFX_GPIOTE1_ENABLED 0 +#endif + /** * @brief NRFX_I2S_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_ENABLED #define NRFX_I2S_ENABLED 0 @@ -363,7 +373,7 @@ /** * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -372,7 +382,7 @@ /** * @brief NRFX_I2S_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_I2S_CONFIG_LOG_ENABLED #define NRFX_I2S_CONFIG_LOG_ENABLED 0 @@ -396,7 +406,7 @@ /** * @brief NRFX_IPC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_IPC_ENABLED #define NRFX_IPC_ENABLED 0 @@ -405,7 +415,7 @@ /** * @brief NRFX_NVMC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_NVMC_ENABLED #define NRFX_NVMC_ENABLED 0 @@ -414,7 +424,7 @@ /** * @brief NRFX_PDM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_ENABLED #define NRFX_PDM_ENABLED 0 @@ -423,7 +433,7 @@ /** * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -432,7 +442,7 @@ /** * @brief NRFX_PDM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PDM_CONFIG_LOG_ENABLED #define NRFX_PDM_CONFIG_LOG_ENABLED 0 @@ -456,7 +466,7 @@ /** * @brief NRFX_POWER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_POWER_ENABLED #define NRFX_POWER_ENABLED 0 @@ -465,7 +475,7 @@ /** * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -474,7 +484,7 @@ /** * @brief NRFX_PRS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_ENABLED #define NRFX_PRS_ENABLED 0 @@ -483,7 +493,7 @@ /** * @brief NRFX_PRS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_CONFIG_LOG_ENABLED #define NRFX_PRS_CONFIG_LOG_ENABLED 0 @@ -507,7 +517,7 @@ /** * @brief NRFX_PRS_BOX_0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_0_ENABLED #define NRFX_PRS_BOX_0_ENABLED 0 @@ -516,7 +526,7 @@ /** * @brief NRFX_PRS_BOX_1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_1_ENABLED #define NRFX_PRS_BOX_1_ENABLED 0 @@ -525,7 +535,7 @@ /** * @brief NRFX_PRS_BOX_2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_2_ENABLED #define NRFX_PRS_BOX_2_ENABLED 0 @@ -534,7 +544,7 @@ /** * @brief NRFX_PRS_BOX_3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PRS_BOX_3_ENABLED #define NRFX_PRS_BOX_3_ENABLED 0 @@ -543,7 +553,7 @@ /** * @brief NRFX_PWM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_ENABLED #define NRFX_PWM_ENABLED 0 @@ -552,7 +562,7 @@ /** * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -561,7 +571,7 @@ /** * @brief NRFX_PWM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM_CONFIG_LOG_ENABLED #define NRFX_PWM_CONFIG_LOG_ENABLED 0 @@ -585,7 +595,7 @@ /** * @brief NRFX_PWM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM0_ENABLED #define NRFX_PWM0_ENABLED 0 @@ -594,7 +604,7 @@ /** * @brief NRFX_PWM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM1_ENABLED #define NRFX_PWM1_ENABLED 0 @@ -603,7 +613,7 @@ /** * @brief NRFX_PWM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM2_ENABLED #define NRFX_PWM2_ENABLED 0 @@ -612,7 +622,7 @@ /** * @brief NRFX_PWM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_PWM3_ENABLED #define NRFX_PWM3_ENABLED 0 @@ -621,7 +631,7 @@ /** * @brief NRFX_RTC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_ENABLED #define NRFX_RTC_ENABLED 0 @@ -630,7 +640,7 @@ /** * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -639,7 +649,7 @@ /** * @brief NRFX_RTC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC_CONFIG_LOG_ENABLED #define NRFX_RTC_CONFIG_LOG_ENABLED 0 @@ -663,7 +673,7 @@ /** * @brief NRFX_RTC0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC0_ENABLED #define NRFX_RTC0_ENABLED 0 @@ -672,7 +682,7 @@ /** * @brief NRFX_RTC1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_RTC1_ENABLED #define NRFX_RTC1_ENABLED 0 @@ -681,7 +691,7 @@ /** * @brief NRFX_SAADC_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_ENABLED #define NRFX_SAADC_ENABLED 0 @@ -690,7 +700,7 @@ /** * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -699,7 +709,7 @@ /** * @brief NRFX_SAADC_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 @@ -723,7 +733,7 @@ /** * @brief NRFX_SPIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_ENABLED #define NRFX_SPIM_ENABLED 0 @@ -732,7 +742,7 @@ /** * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -741,7 +751,7 @@ /** * @brief NRFX_SPIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 @@ -765,7 +775,7 @@ /** * @brief NRFX_SPIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM0_ENABLED #define NRFX_SPIM0_ENABLED 0 @@ -774,7 +784,7 @@ /** * @brief NRFX_SPIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM1_ENABLED #define NRFX_SPIM1_ENABLED 0 @@ -783,7 +793,7 @@ /** * @brief NRFX_SPIM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM2_ENABLED #define NRFX_SPIM2_ENABLED 0 @@ -792,7 +802,7 @@ /** * @brief NRFX_SPIM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIM3_ENABLED #define NRFX_SPIM3_ENABLED 0 @@ -801,7 +811,7 @@ /** * @brief NRFX_SPIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_ENABLED #define NRFX_SPIS_ENABLED 0 @@ -810,7 +820,7 @@ /** * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -819,7 +829,7 @@ /** * @brief NRFX_SPIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 @@ -843,7 +853,7 @@ /** * @brief NRFX_SPIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS0_ENABLED #define NRFX_SPIS0_ENABLED 0 @@ -852,7 +862,7 @@ /** * @brief NRFX_SPIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS1_ENABLED #define NRFX_SPIS1_ENABLED 0 @@ -861,7 +871,7 @@ /** * @brief NRFX_SPIS2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS2_ENABLED #define NRFX_SPIS2_ENABLED 0 @@ -870,7 +880,7 @@ /** * @brief NRFX_SPIS3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SPIS3_ENABLED #define NRFX_SPIS3_ENABLED 0 @@ -879,7 +889,7 @@ /** * @brief NRFX_SYSTICK_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_SYSTICK_ENABLED #define NRFX_SYSTICK_ENABLED 0 @@ -888,7 +898,7 @@ /** * @brief NRFX_TIMER_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_ENABLED #define NRFX_TIMER_ENABLED 0 @@ -897,7 +907,7 @@ /** * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -906,7 +916,7 @@ /** * @brief NRFX_TIMER_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 @@ -930,7 +940,7 @@ /** * @brief NRFX_TIMER0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER0_ENABLED #define NRFX_TIMER0_ENABLED 0 @@ -939,7 +949,7 @@ /** * @brief NRFX_TIMER1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER1_ENABLED #define NRFX_TIMER1_ENABLED 0 @@ -948,7 +958,7 @@ /** * @brief NRFX_TIMER2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TIMER2_ENABLED #define NRFX_TIMER2_ENABLED 0 @@ -957,7 +967,7 @@ /** * @brief NRFX_TWIM_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 0 @@ -966,7 +976,7 @@ /** * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -975,7 +985,7 @@ /** * @brief NRFX_TWIM_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 @@ -999,7 +1009,7 @@ /** * @brief NRFX_TWIM0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 @@ -1008,7 +1018,7 @@ /** * @brief NRFX_TWIM1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 @@ -1017,7 +1027,7 @@ /** * @brief NRFX_TWIM2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM2_ENABLED #define NRFX_TWIM2_ENABLED 0 @@ -1026,7 +1036,7 @@ /** * @brief NRFX_TWIM3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIM3_ENABLED #define NRFX_TWIM3_ENABLED 0 @@ -1035,7 +1045,7 @@ /** * @brief NRFX_TWIS_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 @@ -1044,7 +1054,7 @@ /** * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1053,7 +1063,7 @@ /** * @brief NRFX_TWIS_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 @@ -1062,7 +1072,7 @@ /** * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 @@ -1071,7 +1081,7 @@ /** * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 @@ -1095,7 +1105,7 @@ /** * @brief NRFX_TWIS0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 @@ -1104,7 +1114,7 @@ /** * @brief NRFX_TWIS1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS1_ENABLED #define NRFX_TWIS1_ENABLED 0 @@ -1113,7 +1123,7 @@ /** * @brief NRFX_TWIS2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS2_ENABLED #define NRFX_TWIS2_ENABLED 0 @@ -1122,7 +1132,7 @@ /** * @brief NRFX_TWIS3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_TWIS3_ENABLED #define NRFX_TWIS3_ENABLED 0 @@ -1131,16 +1141,43 @@ /** * @brief NRFX_UARTE_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 0 #endif +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1149,7 +1186,7 @@ /** * @brief NRFX_UARTE_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 @@ -1173,7 +1210,7 @@ /** * @brief NRFX_UARTE0_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 @@ -1182,7 +1219,7 @@ /** * @brief NRFX_UARTE1_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE1_ENABLED #define NRFX_UARTE1_ENABLED 0 @@ -1191,7 +1228,7 @@ /** * @brief NRFX_UARTE2_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE2_ENABLED #define NRFX_UARTE2_ENABLED 0 @@ -1200,7 +1237,7 @@ /** * @brief NRFX_UARTE3_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_UARTE3_ENABLED #define NRFX_UARTE3_ENABLED 0 @@ -1209,7 +1246,7 @@ /** * @brief NRFX_WDT_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 @@ -1218,7 +1255,7 @@ /** * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY * - * Integer value. Minimum: 0 Maximum: 7 + * Integer value. Minimum: 0. Maximum: 7. */ #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY @@ -1227,7 +1264,7 @@ /** * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_NO_IRQ #define NRFX_WDT_CONFIG_NO_IRQ 0 @@ -1236,7 +1273,7 @@ /** * @brief NRFX_WDT_CONFIG_LOG_ENABLED * - * Boolean. Accepted values 0 and 1. + * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 diff --git a/templates/nrfx_glue.h b/templates/nrfx_glue.h index 973d2c068..cb5a93ee1 100644 --- a/templates/nrfx_glue.h +++ b/templates/nrfx_glue.h @@ -279,6 +279,8 @@ extern "C" { /** * @brief Macro for writing back cache lines associated with the specified buffer. * + * @note Macro should be empty if data cache is disabled or not present. + * * @param[in] p_buffer Pointer to the buffer. * @param[in] size Size of the buffer. */ @@ -287,6 +289,8 @@ extern "C" { /** * @brief Macro for invalidating cache lines associated with the specified buffer. * + * @note Macro should be empty if data cache is disabled or not present. + * * @param[in] p_buffer Pointer to the buffer. * @param[in] size Size of the buffer. */ @@ -296,6 +300,8 @@ extern "C" { * @brief Macro for writing back and invalidating cache lines associated with * the specified buffer. * + * @note Macro should be empty if data cache is disabled or not present. + * * @param[in] p_buffer Pointer to the buffer. * @param[in] size Size of the buffer. */