diff --git a/src/isa/riscv64/reg.c b/src/isa/riscv64/reg.c
index 1488b486b..f3a3ef47c 100644
--- a/src/isa/riscv64/reg.c
+++ b/src/isa/riscv64/reg.c
@@ -14,11 +14,13 @@
 * See the Mulan PSL v2 for more details.
 ***************************************************************************************/
 
+#include <stdlib.h>
 #include <isa.h>
 //#include <monitor/difftest.h>
 #include "local-include/reg.h"
 #include "local-include/csr.h"
 #include "local-include/trigger.h"
+#include "instr/rvv/vreg.h"
 //#include "local-include/intr.h"
 
 const char *regsl[] = {
@@ -146,9 +148,14 @@ rtlreg_t isa_reg_str2val(const char *s, bool *success) {
 
 #ifdef CONFIG_RVV
   //vector register
-  extern const char * vregsl[];
-  for (i = 0; i < 32; i ++) {
-    if (strcmp(vregsl[i], s) == 0) return cpu.vr[i]._64[0];
+  const char *underscore_pos = strchr(s, '_');
+  if (underscore_pos != NULL) {
+    size_t prefix_len = underscore_pos - s;
+    int offset = atoi(underscore_pos + 1);
+    extern const char * vregsl[];
+    for (i = 0; i < 32; i ++) {
+      if (strncmp(vregsl[i], s, prefix_len) == 0) return vreg_l(i, offset);
+    }
   }
 #endif // CONFIG_RVV
 
diff --git a/src/utils/expr.c b/src/utils/expr.c
index e4a79aaf6..8358bdb62 100644
--- a/src/utils/expr.c
+++ b/src/utils/expr.c
@@ -44,6 +44,7 @@ static struct rule {
   {"==", TK_EQ},        // equal
   {"0x[0-9a-fA-F]{1,16}", TK_NUM},  // hex
   {"[0-9]{1,10}", TK_NUM},         // dec
+  {"\\$v[0-9]{1,2}_[0-9]{1,10}", TK_REG},   // vector register, e.g. $v0_0 represents first 64 bits of v0 in RVV
   {"\\$[a-z0-9]{1,31}", TK_REG},   // register names
   {"\\+", '+'},
   {"-", '-'},