From df88db960a4f2398ba2521a61589e652bd78904e Mon Sep 17 00:00:00 2001 From: Organ1sm Date: Wed, 25 Sep 2024 22:58:53 +0800 Subject: [PATCH] zig update: Remove Cpu.Arch.dxil and ObjectFormat.dxcontainer. https://github.com/ziglang/zig/pull/21467 --- src/aro/target.zig | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/src/aro/target.zig b/src/aro/target.zig index c91899d8..cbdf351b 100644 --- a/src/aro/target.zig +++ b/src/aro/target.zig @@ -483,7 +483,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target { .spirv, .spirv32, .loongarch32, - .dxil, .xtensa, => {}, // Already 32 bit @@ -510,7 +509,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target { .arc, .avr, .csky, - .dxil, .hexagon, .kalimba, .lanai, @@ -579,7 +577,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .bpfel => "bpfel", .bpfeb => "bpfeb", .csky => "csky", - .dxil => "dxil", .hexagon => "hexagon", .loongarch32 => "loongarch32", .loongarch64 => "loongarch64", @@ -703,21 +700,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .cygnus => "cygnus", .simulator => "simulator", .macabi => "macabi", - .pixel => "pixel", - .vertex => "vertex", - .geometry => "geometry", - .hull => "hull", - .domain => "domain", - .compute => "compute", - .library => "library", - .raygeneration => "raygeneration", - .intersection => "intersection", - .anyhit => "anyhit", - .closesthit => "closesthit", - .miss => "miss", - .callable => "callable", - .mesh => "mesh", - .amplification => "amplification", .ohos => "openhos", }; writer.writeAll(llvm_abi) catch unreachable;