diff --git a/crates/circuit/src/dag_circuit.rs b/crates/circuit/src/dag_circuit.rs index 8ce137bb80d3..15fdf3ea815a 100644 --- a/crates/circuit/src/dag_circuit.rs +++ b/crates/circuit/src/dag_circuit.rs @@ -6422,11 +6422,6 @@ impl DAGCircuit { // Pre-process the instructions let qubit_set: Vec = if let Some(qubit_ordering) = &qubit_order { - if qubit_ordering.len() != num_qubits { - return Err(PyValueError::new_err( - "'qubit_order' does not contain exactly the same qubits as the circuit", - )); - }; let mut qubits = vec![]; for qubit in qubit_ordering { let bound = qubit.bind(py); @@ -6447,11 +6442,6 @@ impl DAGCircuit { (0..num_qubits as u32).map(Qubit).collect() }; let clbit_set: Vec = if let Some(clbit_ordering) = &clbit_order { - if clbit_ordering.len() != num_clbits { - return Err(PyValueError::new_err( - "'clbit_order' does not contain exactly the same clbits as the circuit", - )); - }; let mut clbits = vec![]; for clbit in clbit_ordering { let bound = clbit.bind(py); @@ -6509,7 +6499,7 @@ impl DAGCircuit { num_clbits, Some(num_ops), Some(num_vars), - Some(num_edges), + Some(num_edges + (num_ops / 2) * num_vars), )?; // Assign other necessary data diff --git a/qiskit/converters/circuit_to_dag.py b/qiskit/converters/circuit_to_dag.py index f9d1cb3d7fca..39f8a1088d4f 100644 --- a/qiskit/converters/circuit_to_dag.py +++ b/qiskit/converters/circuit_to_dag.py @@ -57,6 +57,20 @@ def circuit_to_dag(circuit, copy_operations=True, *, qubit_order=None, clbit_ord circ.rz(0.5, q[1]).c_if(c, 2) dag = circuit_to_dag(circ) """ + if qubit_order is None: + qubits = circuit.qubits + elif len(qubit_order) != circuit.num_qubits or set(qubit_order) != set(circuit.qubits): + raise ValueError("'qubit_order' does not contain exactly the same qubits as the circuit") + else: + qubits = qubit_order + + if clbit_order is None: + clbits = circuit.clbits + elif len(clbit_order) != circuit.num_clbits or set(clbit_order) != set(circuit.clbits): + raise ValueError("'clbit_order' does not contain exactly the same clbits as the circuit") + else: + clbits = clbit_order + dagcircuit = core_circuit_to_dag(circuit, qubit_order, clbit_order) dagcircuit.duration = circuit.duration