From 6aed4402953307fb66bdd093c16ce676e84975f5 Mon Sep 17 00:00:00 2001 From: Marian Buschsieweke Date: Sat, 20 Apr 2024 10:30:24 +0200 Subject: [PATCH] cpu/msp430: use SR alias instead of r2 The register r2 is the status register, which has the SR alias. Using SR is a lot more readable than r2. --- cpu/msp430/include/irq_arch.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/cpu/msp430/include/irq_arch.h b/cpu/msp430/include/irq_arch.h index 97735e7dbf30c..65199022d62b5 100644 --- a/cpu/msp430/include/irq_arch.h +++ b/cpu/msp430/include/irq_arch.h @@ -44,8 +44,8 @@ __attribute__((always_inline)) static inline unsigned int irq_disable(void) { unsigned int state; __asm__ volatile( - "mov.w r2, %[state]" "\n\t" - "bic %[gie], r2" "\n\t" + "mov.w SR, %[state]" "\n\t" + "bic %[gie], SR" "\n\t" "nop" "\n\t" "and %[gie], %[state]" "\n\t" : [state] "=r"(state) @@ -60,9 +60,9 @@ __attribute__((always_inline)) static inline unsigned int irq_enable(void) { unsigned int state; __asm__ volatile( - "mov.w r2, %[state]" "\n\t" + "mov.w SR, %[state]" "\n\t" "nop" "\n\t" - "bis %[gie], r2" "\n\t" + "bis %[gie], SR" "\n\t" "nop" "\n\t" "and %[gie], %[state]" "\n\t" : [state] "=r"(state) @@ -76,7 +76,7 @@ __attribute__((always_inline)) static inline unsigned int irq_enable(void) __attribute__((always_inline)) static inline void irq_restore(unsigned int state) { __asm__ volatile( - "bis %[state], r2" "\n\t" + "bis %[state], SR" "\n\t" "nop" "\n\t" : /* no outputs */ : [state] "r"(state) @@ -93,7 +93,7 @@ __attribute__((always_inline)) static inline bool irq_is_enabled(void) { unsigned int state; __asm__ volatile( - "mov.w r2,%[state]" "\n\t" + "mov.w SR,%[state]" "\n\t" : [state] "=r"(state) : /* no inputs */ : "memory"