diff --git a/boards/common/msb-430/include/board_common.h b/boards/common/msb-430/include/board_common.h index a6d3280e94bb..4a0e99352c26 100644 --- a/boards/common/msb-430/include/board_common.h +++ b/boards/common/msb-430/include/board_common.h @@ -28,11 +28,6 @@ extern "C" { #endif -/** - * @brief Address of the info memory - */ -#define INFOMEM (0x1000) - /** * @name Xtimer configuration * @{ diff --git a/boards/olimex-msp430-h1611/include/board-conf.h b/boards/olimex-msp430-h1611/include/board-conf.h deleted file mode 100644 index cfe2d6cad9cd..000000000000 --- a/boards/olimex-msp430-h1611/include/board-conf.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2014 INRIA - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef BOARD_CONF_H -#define BOARD_CONF_H - -#ifdef __cplusplus -extern "C" { -#endif - -#define INFOMEM (0x1000) - -#ifdef __cplusplus -} -#endif - -#endif /* BOARD_CONF_H */ diff --git a/boards/olimex-msp430-h2618/Kconfig b/boards/olimex-msp430-h2618/Kconfig new file mode 100644 index 000000000000..20b4e0b6d2f5 --- /dev/null +++ b/boards/olimex-msp430-h2618/Kconfig @@ -0,0 +1,18 @@ +# Copyright (c) 2020 HAW Hamburg +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. + +config BOARD + default "olimex-msp430-h2618" if BOARD_OLIMEX_MSP430_H2618 + +config BOARD_OLIMEX_MSP430_H2618 + bool + default y + select CPU_MODEL_MSP430F2618 + select HAS_PERIPH_GPIO + select HAS_PERIPH_GPIO_IRQ + select HAS_PERIPH_SPI + select HAS_PERIPH_TIMER + select HAS_PERIPH_UART diff --git a/boards/olimex-msp430-h2618/Makefile b/boards/olimex-msp430-h2618/Makefile new file mode 100644 index 000000000000..f8fcbb53a065 --- /dev/null +++ b/boards/olimex-msp430-h2618/Makefile @@ -0,0 +1,3 @@ +MODULE = board + +include $(RIOTBASE)/Makefile.base diff --git a/boards/olimex-msp430-h2618/Makefile.features b/boards/olimex-msp430-h2618/Makefile.features new file mode 100644 index 000000000000..8250f412f726 --- /dev/null +++ b/boards/olimex-msp430-h2618/Makefile.features @@ -0,0 +1,10 @@ +CPU = msp430fxyz +CPU_MODEL = msp430f2618 + +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_gpio periph_gpio_irq +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart + +# Various other features (if any) diff --git a/boards/olimex-msp430-h2618/Makefile.include b/boards/olimex-msp430-h2618/Makefile.include new file mode 100644 index 000000000000..d49e656df6f8 --- /dev/null +++ b/boards/olimex-msp430-h2618/Makefile.include @@ -0,0 +1,26 @@ +# set default port depending on operating system +PORT_LINUX ?= /dev/ttyUSB0 +PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbserial-MXV*))) + +# flash tool configuration +PROGRAMMER ?= mspdebug +MSPDEBUG_PROGRAMMER ?= olimex + +PROGRAMMERS_SUPPORTED += mspdebug + +# When freshly plugged in the Olimex MSP430-JTAG-Tiny debugger provides a +# ttyACM interface, which is only available until the first flashing. A +# `make term` or even a `make flash term` may pick the JTAG debugger instead +# of the correct USB TTL adapter when the JTAG programmer is plugged in after +# the TTL adapter and `MOST_RECENT_PORT=1` is used. +# +# To fix that, we filter first by the most common USB TTL adapter drivers and +# fall back to all TTY when no such TTL adapter is found. +TTY_BOARD_FILTER := --driver 'cp210x|ch341|ftdi_sio' +TTY_SELECT_CMD := $(RIOTTOOLS)/usb-serial/ttys.py \ + --most-recent \ + --format path serial \ + $(TTY_BOARD_FILTER) || \ + $(RIOTTOOLS)/usb-serial/ttys.py \ + --most-recent \ + --format path serial diff --git a/boards/olimex-msp430-h2618/doc.txt b/boards/olimex-msp430-h2618/doc.txt new file mode 100644 index 000000000000..51d68abdca01 --- /dev/null +++ b/boards/olimex-msp430-h2618/doc.txt @@ -0,0 +1,111 @@ +/** +@defgroup boards_olimex_msp430_h2618 Olimex MSP430-H2618 +@ingroup boards +@brief Support for the Olimex MSP430-H2618 board + +Photo of Olimex MSP430-H2618 Board + +## MCU + +| MCU | TI MSP430F2618 | +|:----------------- |:------------------------------------------------------------- | +| Family | MSP430 | +| Vendor | Texas Instruments | +| Package | 64 QFN | +| RAM | 8 KiB | +| Flash | 116 KiB | +| Frequency | 16 MHz | +| FPU | no | +| Timers | 2 (2x 16bit) | +| ADCs | 1x 8 channel 12-bit | +| UARTs | 2 | +| SPIs | 2 | +| I2Cs | 1 | +| Vcc | 1.8 V - 3.6 V | +| Datasheet MCU | [Datasheet MSP430F2618] | +| User Guide MCU | [User Guide MSP430F2xx] | +| Datasheet Board | [Datasheet Olimex MSP430-H2618] | +| Website | [Website Olimex MSP430-H2618] | + +[Datasheet MSP430F2618]: https://www.ti.com/lit/gpn/msp430f2618 +[User Guide MSP430F2xx]: https://www.ti.com/lit/pdf/slau144 +[Datasheet Olimex MSP430-H2618]: https://www.olimex.com/Products/MSP430/Header/MSP430-H2618/resources/MSP430-H2618.pdf +[Website Olimex MSP430-H2618]: https://www.olimex.com/Products/MSP430/Header/MSP430-H2618/ + +@warning While erasing or writing to the flash, the MCU must be powered by + at least 2.2 V + +## Schematics + +Schematics of the Olimex MSP430-H2618 Board + +## Pinout + +The 64 pins on the edges of the PCB are connected to the corresponding MCU pins. +Hence, the following pinout of the naked MSP430-F2618 MCU chip matches the +pinout of the header board: + +Pinout of the naked MSP430-F2618 MCU + +## Flashing RIOT + +Photo of Olimex MSP430-H2618 Board connected to a JTAG Debugger + +Connect the board to a JTAG debugger supported by +[mspdebug](https://dlbeer.co.nz/mspdebug/); by default the +Olimex MSP430-JTAG-Tiny (as shown in the picture above) is assumed, which is +among the less expensive options. + +@note If you are not using the Olimex MSP430-JTAG-Tiny (or a compatible + programmer), set `MSPDEBUG_PROGRAMMER` to the correct value via + an environment variable or as parameter to make. E.g. use + `make BOARD=olimex-msp430-h2618 MSPDEBUG_PROGRAMMER=bus-pirate` to + flash using the bus pirate. + +@warning You can power the board via the JTAG programmer by placing a + jumper at `P_IN`. However, the JTAG programmer will only be able + to provide a limited current. You may want to disconnect the + header board from devices consuming a lot of power prior to + flashing. + +@warning If the board is powered externally, make sure to place the jumper + in `P_OUT` position, not in `P_IN` position. + +@warning A jumper in `P_OUT` is mutually exclusive to a jumper in `P_IN`. + Never connect both at the same time. + +@note Pin 1 on the JTAG connector has a small white triangle next to it + and square pad, compared to the round pad used by all other JTAG + pins. + +@warning The Olimex MSP430-JTAG-Tiny will fail to flash or debug the board + until the latest firmware is installed. For that, install the + Windows-only programmer software and update the DLLs files to + contain the latest firmware as described in the website. The + software will update the programmer upon launch. + +Once the jumper is correctly placed in either `P_IN` or in `P_OUT` and the +JTAG cable is connected just run + +``` +make BOARD=olimex-msp430-h2618 flash +``` + +## Using the shell + +stdio is available via the UART interface with `TXD = P3.4` +(pin 35 on the header) and `RXD = P3.5` (pin 34 on the header) at 115,200 Baud. + +The easiest way is to connect an USB TTL adapter (such as the cheap `cp210x` +or `ch341` based adapters) as follows: + +``` +TTL adapter Olimex MSP430-H2618 +----------- ------------------- + + GND --- 63 (DV_SS) + TXD --- 33 (P3.5) + RXD --- 32 (P3.4) +``` + + */ diff --git a/boards/olimex-msp430-h2618/include/board.h b/boards/olimex-msp430-h2618/include/board.h new file mode 100644 index 000000000000..f7f660f1d270 --- /dev/null +++ b/boards/olimex-msp430-h2618/include/board.h @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2013, 2014 INRIA + * 2015 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_olimex_msp430_h2618 + * + * @{ + * + * @file + * @brief Basic definitions for the Olimex MSP430-H2618 board + * + * @author Marian Buschsieweke + */ + +#ifndef BOARD_H +#define BOARD_H + +#include "cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Define the CPU model for the + */ +#ifndef __MSP430F2618__ +#define __MSP430F2618__ +#endif + +/** + * @name Xtimer configuration + * @{ + */ +#define XTIMER_WIDTH (16) +#define XTIMER_BACKOFF (40) +/** @} */ + +#ifdef __cplusplus +} +#endif + +/** @} */ +#endif /* BOARD_H */ diff --git a/boards/olimex-msp430-h2618/include/periph_conf.h b/boards/olimex-msp430-h2618/include/periph_conf.h new file mode 100644 index 000000000000..92acdb9d1e11 --- /dev/null +++ b/boards/olimex-msp430-h2618/include/periph_conf.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2014 INRIA + * 2015 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser General + * Public License v2.1. See the file LICENSE in the top level directory for more + * details. + */ + +/** + * @ingroup boards_olimex_msp430_h2618 + * @{ + * + * @file + * @brief Olimex-MSP430-H2618 peripheral configuration + * + * @author Marian Buschsieweke + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include "periph_cpu.h" +#include "macros/units.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define CLOCK_CORECLOCK msp430_fxyz_dco_freq + +/** + * @brief Clock configuration + */ +static const msp430_fxyz_clock_params_t clock_params = { + .target_dco_frequency = MHZ(16), + .lfxt1_frequency = 32768, + .main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK, + .submain_clock_source = SUBMAIN_CLOCK_SOURCE_DCOCLK, + .main_clock_divier = MAIN_CLOCK_DIVIDE_BY_1, + .submain_clock_divier = SUBMAIN_CLOCK_DIVIDE_BY_1, + .auxiliary_clock_divier = AUXILIARY_CLOCK_DIVIDE_BY_1, +}; + +/** + * @name Timer configuration + * @{ + */ +#define TIMER_NUMOF (1U) +#define TIMER_BASE (TIMER_A) +#define TIMER_CHAN (3) +#define TIMER_ISR_CC0 (TIMERA0_VECTOR) +#define TIMER_ISR_CCX (TIMERA1_VECTOR) +/** @} */ + +/** + * @name UART configuration + * @{ + */ +#define UART_NUMOF (1U) + +#define UART_USE_USCI +#define UART_BASE (USCI_0) +#define UART_IE (SFR->IE2) +#define UART_IF (SFR->IFG2) +#define UART_IE_RX_BIT (1 << 0) +#define UART_IE_TX_BIT (1 << 1) +#define UART_RX_PORT ((msp_port_t *)PORT_3) +#define UART_RX_PIN (1 << 5) +#define UART_TX_PORT ((msp_port_t *)PORT_3) +#define UART_TX_PIN (1 << 4) +#define UART_RX_ISR (USCIAB0RX_VECTOR) +#define UART_TX_ISR (USCIAB0TX_VECTOR) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +#define SPI_NUMOF (1U) + +/* SPI configuration */ +#define SPI_USE_USCI +#define SPI_BASE (USCI_0_B_SPI) +#define SPI_IE (SFR->IE2) +#define SPI_IF (SFR->IFG2) +#define SPI_IE_RX_BIT (1 << 2) +#define SPI_IE_TX_BIT (1 << 3) +#define SPI_PIN_MISO GPIO_PIN(P3, 2) +#define SPI_PIN_MOSI GPIO_PIN(P3, 1) +#define SPI_PIN_CLK GPIO_PIN(P3, 3) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */ diff --git a/boards/telosb/include/board-conf.h b/boards/telosb/include/board-conf.h deleted file mode 100644 index cfe2d6cad9cd..000000000000 --- a/boards/telosb/include/board-conf.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2014 INRIA - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef BOARD_CONF_H -#define BOARD_CONF_H - -#ifdef __cplusplus -extern "C" { -#endif - -#define INFOMEM (0x1000) - -#ifdef __cplusplus -} -#endif - -#endif /* BOARD_CONF_H */ diff --git a/boards/z1/include/board-conf.h b/boards/z1/include/board-conf.h deleted file mode 100644 index 7af54e7bdfd3..000000000000 --- a/boards/z1/include/board-conf.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * board-conf.h. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -#ifndef BOARD_CONF_H -#define BOARD_CONF_H - -/** - * @ingroup boards_z1 - * - * @{ - */ - -/** - * @file - * @brief Zolertia Z1 board configuration macros - * - * @author Kévin Roussel - * - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#define INFOMEM (0x1000) - -#ifdef __cplusplus -} -#endif - -/** @} */ -#endif /* BOARD_CONF_H */ diff --git a/cpu/msp430_common/include/cpu_conf.h b/cpu/msp430_common/include/cpu_conf.h index dd1926df9c07..4128d180dc9d 100644 --- a/cpu/msp430_common/include/cpu_conf.h +++ b/cpu/msp430_common/include/cpu_conf.h @@ -42,6 +42,9 @@ extern "C" { #elif defined (CPU_MODEL_MSP430F2617) #define CPU_FLASH_BASE (0x3200) /* first sector is only 256 byte, skip it*/ #define FLASHPAGE_NUMOF (103U) /* we can currently only access 51.5K */ +#elif defined (CPU_MODEL_MSP430F2618) +#define CPU_FLASH_BASE (0x3200) /* first sector is only 256 byte, skip it*/ +#define FLASHPAGE_NUMOF (103U) /* we can currently only access 51.5K */ #elif defined (CPU_MODEL_CC430F6137) #define CPU_FLASH_BASE (0x8000) #define FLASHPAGE_NUMOF (64U) /* 32K */ diff --git a/cpu/msp430_common/ldscripts/riot-msp430f2618.ld b/cpu/msp430_common/ldscripts/riot-msp430f2618.ld new file mode 100644 index 000000000000..a6bf50c33d74 --- /dev/null +++ b/cpu/msp430_common/ldscripts/riot-msp430f2618.ld @@ -0,0 +1,3 @@ +INCLUDE msp430f2618.ld +INCLUDE msp430_common.ld +INCLUDE xfa.ld diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/Revisions_Header.txt b/cpu/msp430_common/vendor/msp430-gcc-support-files/Revisions_Header.txt index d33cdfd0b129..8cba57a0c6fb 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/Revisions_Header.txt +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/Revisions_Header.txt @@ -1,6 +1,42 @@ +Build 1.212 (GCC) +================= +07/19/2021 + +New device support: +------------------ +- None + +New features / changes: +----------------------- +- None + +Bug fixes: +---------- +- Fix missing lowtext section for GCC linker files + +Build 1.211 (GCC) +================= +11/16/2020 + +New device support: +------------------ +- None + +New features / changes: +----------------------- +- Aligned GCC linker command file template for MSP430FR and other MSP430 devices + to allow for easier diffs + +Bug fixes: +---------- +- Fixed faulty PORT register definition and references for several FR2xx, FR5xx + and FR6xx devices +- Fixed typo in MSP430G2 family device header files + + Build 1.210 (GCC) ================= -05/14/2020 +05/05/2020 New device support: ------------------ diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/devices.csv b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/devices.csv index 3401bbef5788..d9e27a6c396b 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/devices.csv +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/devices.csv @@ -1,693 +1,693 @@ -# /* ============================================================================ */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* Copyright (c) 2016, Texas Instruments Incorporated */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* All rights reserved. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* Redistribution and use in source and binary forms, with or without */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* modification, are permitted provided that the following conditions */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* are met: */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* * Redistributions of source code must retain the above copyright */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* notice, this list of conditions and the following disclaimer. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* * Redistributions in binary form must reproduce the above copyright */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* notice, this list of conditions and the following disclaimer in the */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* documentation and/or other materials provided with the distribution. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* * Neither the name of Texas Instruments Incorporated nor the names of */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* its contributors may be used to endorse or promote products derived */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* from this software without specific prior written permission. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" */",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# /* ============================================================================ */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -Version:,1.21,,,,Date:,5/14/2020,14:14:02,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 0 STD MSP430 CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 1 MSP430X CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 2 MSP430XV2 CPU",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# HWMPY,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 0 No Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 1 16 Bit Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 2 16 Bit Hardware Multiplier with sign Extension (2xx Devices)",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 4 32 Bit Hardware Multiplier",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 8 32 Bit Hardware Multiplier (5xx)",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# SPI2Wire,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 0 JTAG only - no scan",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 1 SBW (default) - scan allowed",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 2 JTAG (Default) - scan allowed",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -"# 3 SBW only - no scan",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, -# Device Name,CPU_TYPE,CPU_Bugs,MPY_TYPE,SBW,EEM,BREAKPOINTS,CLOCKCONTROL,CYCLECOUNTER,STACKSIZE,RAMStart,RAMEnd,RAMStart2,RAMEnd2,TINYRAMStart,TINYRAMEnd,USBRAMStart,USBRAMEnd,LEARAMStart,LEARAMEnd,MirrowedRAMSource,MirrowedRAMStart,MirrowedRAMEnd,BSLStart,BSLSize,BSLEnd,INFOStart,INFOSize,INFOEnd,INFOA,INFOB,INFOC,INFOD,FStart,FEnd,FStart2,FEnd2,Signature_Start,Signature_Size,INTStart,INTEnd -msp430c111,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF -msp430c1111,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF -msp430c112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430c1121,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430c1331,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430c1351,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430c311s,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF -msp430c312,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430c313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430c314,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,D000,FFDF,0,0,,,FFE0,FFFF -msp430c315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430c323,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430c325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430c336,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,A000,FFDF,0,0,,,FFE0,FFFF -msp430c337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430c412,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430c413,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430cg4616,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,18FFF,,,FFC0,FFFF -msp430cg4617,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,19FFF,,,FFC0,FFFF -msp430cg4618,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,1FFFF,,,FFC0,FFFF -msp430cg4619,1,CPU16; CPU19,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,1FFFF,,,FFC0,FFFF -msp430e112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430e313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430e315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430e325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430e337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f110,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF -msp430f1101,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF -msp430f1101a,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF -msp430f1111,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F800,FFDF,0,0,,,FFE0,FFFF -msp430f1111a,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F800,FFDF,0,0,,,FFE0,FFFF -msp430f112,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430f1121,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430f1121a,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430f1122,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430f1132,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430f122,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430f1222,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430f123,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430f1232,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430f133,0,0,0,0,EMEX_MEDIUM,3,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430f135,0,0,0,0,EMEX_MEDIUM,3,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430f147,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f148,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430f149,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF -msp430f1471,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f1481,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430f1491,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF -msp430f155,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430f156,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF -msp430f157,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f167,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f168,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430f169,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF -msp430f1610,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,24FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f1611,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,38FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430f1612,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,24FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2500,FFDF,0,0,,,FFE0,FFFF -msp430f2001,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430f2011,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430f2002,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430f2012,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430f2003,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430f2013,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430f2101,0,CPU19,0,0,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2111,0,CPU19,0,0,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2121,0,CPU19,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2131,0,CPU19,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2112,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2122,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2132,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2232,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2252,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2272,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2234,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2254,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2274,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2330,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2350,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f2370,0,CPU19,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f233,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f235,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430f247,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF -msp430f248,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF -msp430f249,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF -msp430f2410,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBF,0,0,FFDE,2,FFC0,FFFF -msp430f2471,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF -msp430f2481,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF -msp430f2491,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF -msp430f2416,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF -msp430f2417,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF -msp430f2418,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f2419,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f2616,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF -msp430f2617,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF -msp430f2618,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f2619,1,CPU16; CPU19,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f412,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFBD,0,0,,,FFE0,FFFF -msp430f413,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430f415,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430f417,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f4132,0,CPU19,0,1,EMEX_LOW,2,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF -msp430f4152,0,CPU19,0,1,EMEX_LOW,2,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDF,0,0,,,FFE0,FFFF -msp430f423,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430f425,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430f427,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f423a,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430f425a,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430f427a,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f435,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430f436,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF -msp430f437,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f4351,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430f4361,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF -msp430f4371,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f4481,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430f4491,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF -msp430f447,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f448,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430f449,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF -msp430fe423,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430fe425,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430fe427,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430fe423a,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430fe425a,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430fe427a,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430fe4232,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430fe4242,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,D000,FFDF,0,0,,,FFE0,FFFF -msp430fe4252,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430fe4272,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430f4783,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF -msp430f4793,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF -msp430f4784,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF -msp430f4794,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF -msp430f47126,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF -msp430f47127,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF -msp430f47163,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF -msp430f47173,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF -msp430f47183,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f47193,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f47166,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF -msp430f47176,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF -msp430f47186,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f47196,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f47167,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF -msp430f47177,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF -msp430f47187,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f47197,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f4250,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430f4260,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF -msp430f4270,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430fg4250,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430fg4260,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF -msp430fg4270,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430fw423,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430fw425,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430fw427,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430fw428,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430fw429,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF -msp430fg437,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF -msp430fg438,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430fg439,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF -msp430f438,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF -msp430f439,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF -msp430f477,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDF,0,0,,,FFE0,FFFF -msp430f478,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF -msp430f479,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF -msp430fg477,0,CPU19,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDF,0,0,,,FFE0,FFFF -msp430fg478,0,CPU19,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF -msp430fg479,0,CPU19,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF -msp430f46161,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF -msp430f46171,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF -msp430f46181,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f46191,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f4616,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF -msp430f4617,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF -msp430f4618,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f4619,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430fg4616,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF -msp430fg4617,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF -msp430fg4618,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430fg4619,1,CPU16; CPU19,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF -msp430f5418,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF -msp430f5419,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF -msp430f5435,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFB,,,FF80,FFFF -msp430f5436,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFB,,,FF80,FFFF -msp430f5437,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFB,,,FF80,FFFF -msp430f5438,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFB,,,FF80,FFFF -msp430f5418a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFF,,,FF80,FFFF -msp430f5419a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFF,,,FF80,FFFF -msp430f5435a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFF,,,FF80,FFFF -msp430f5436a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFF,,,FF80,FFFF -msp430f5437a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF -msp430f5438a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF -msp430f5212,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5213,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5214,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5217,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5218,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5219,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5222,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5223,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5224,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5227,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5228,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5229,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5232,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5234,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5237,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5239,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5242,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5244,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5247,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5249,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5304,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -msp430f5308,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f5309,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF -msp430f5310,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5340,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5341,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5342,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5324,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5325,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5326,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5327,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5328,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5329,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5500,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -msp430f5501,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f5502,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF -msp430f5503,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5504,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -msp430f5505,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f5506,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF -msp430f5507,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5508,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f5509,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF -msp430f5510,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5513,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5514,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5515,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5517,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5519,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5521,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5522,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5524,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5525,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430f5526,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5527,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF -msp430f5528,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430f5529,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430p112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF -msp430p313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF -msp430p315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430p315s,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430p325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF -msp430p337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF -cc430f5133,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -cc430f5135,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -cc430f5137,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -cc430f6125,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -cc430f6126,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -cc430f6127,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -cc430f6135,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -cc430f6137,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -cc430f5123,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -cc430f5125,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -cc430f5143,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -cc430f5145,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -cc430f5147,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -cc430f6143,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -cc430f6145,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -cc430f6147,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5333,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f5335,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f5336,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f5338,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f5630,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f5631,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF -msp430f5632,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f5633,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f5634,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF -msp430f5635,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f5636,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f5637,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF -msp430f5638,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f6433,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f6435,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f6436,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f6438,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f6630,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f6631,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF -msp430f6632,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f6633,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f6634,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF -msp430f6635,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f6636,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF -msp430f6637,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF -msp430f6638,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF -msp430f5358,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F8000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF -msp430f5359,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F0000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF -msp430f5658,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F8000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF -msp430f5659,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F0000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF -msp430f6458,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F8000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF -msp430f6459,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F0000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF -msp430f6658,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F8000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF -msp430f6659,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F0000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF -msp430fg6425,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430fg6426,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430fg6625,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF -msp430fg6626,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF -msp430l092,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,1C80,237F,0,0,,,1C60,1C7F -msp430c091,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,FC80,FFDF,0,0,,,FFE0,FFFF -msp430c092,0,CPU18; CPU21; CPU22; CPU23; CPU27; CPU29; CPU30,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,F880,FFDF,0,0,,,FFE0,FFFF -msp430xgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF -msp430f5xx_6xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF -msp430fr5xx_6xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF -msp430fr2xx_4xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF -msp430fr57xxgeneric,2,0,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF -msp430i2xxgeneric,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FF80,FFFF -msp430f5131,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -msp430f5151,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f5171,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f5132,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF -msp430f5152,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f5172,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f6720,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f6721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f6723,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF -msp430f6724,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF -msp430f6725,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f6726,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f6730,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f6731,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f6733,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF -msp430f6734,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF -msp430f6735,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f6736,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f67621,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF -msp430f67641,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f6720a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f6721a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f6723a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF -msp430f6724a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF -msp430f6725a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f6726a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f6730a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430f6731a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -msp430f6733a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF -msp430f6734a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF -msp430f6735a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f6736a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f67621a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF -msp430f67641a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF -msp430f67451,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f67651,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f67751,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f67461,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67661,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67761,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67471,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67671,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67771,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67481,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67681,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67781,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67491,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67691,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67791,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6745,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f6765,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f6775,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f6746,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6766,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6776,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6747,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6767,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6777,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6748,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6768,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6778,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6749,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6769,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6779,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67451a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f67651a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f67751a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f67461a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67661a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67761a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67471a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67671a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67771a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f67481a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67681a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67781a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67491a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67691a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f67791a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6745a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f6765a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f6775a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF -msp430f6746a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6766a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6776a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6747a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6767a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6777a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF -msp430f6748a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6768a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6778a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6749a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6769a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430f6779a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF -msp430fr5720,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5722,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5723,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5724,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5725,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5726,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5727,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5728,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5729,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5730,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5731,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5732,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5733,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5734,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5735,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5736,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5737,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5738,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5739,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF -msp430g2211,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2201,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2111,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430g2101,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430g2001,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FE00,FFDF,0,0,,,FFE0,FFFF -msp430g2231,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2221,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2131,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430g2121,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430afe221,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF -msp430afe231,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF -msp430afe251,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDF,0,0,,,FFE0,FFFF -msp430afe222,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF -msp430afe232,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF -msp430afe252,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDF,0,0,,,FFE0,FFFF -msp430afe223,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF -msp430afe233,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF -msp430afe253,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDF,0,0,,,FFE0,FFFF -msp430g2102,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430g2202,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2302,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF -msp430g2402,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF -msp430g2132,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430g2232,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2332,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF -msp430g2432,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF -msp430g2112,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430g2212,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2312,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF -msp430g2412,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF -msp430g2152,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF -msp430g2252,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2352,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF -msp430g2452,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF -msp430g2113,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2213,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2313,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2413,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2513,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2153,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2253,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2353,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2453,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2553,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2203,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2303,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2403,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2233,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2333,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2433,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2533,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430tch5e,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2444,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2544,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2744,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2755,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2855,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2955,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFDD,0,0,FFDE,2,FFE0,FFFF -msp430g2230,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430g2210,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF -msp430bt5190,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF -msp430fr5857,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5858,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5859,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5847,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr58471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5848,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5849,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5867,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr58671,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5868,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5869,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5957,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5958,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5959,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5947,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr59471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5948,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5949,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5967,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5968,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5969,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr59691,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430i2020,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF -msp430i2021,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF -msp430i2030,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF -msp430i2031,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF -msp430i2040,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF -msp430i2041,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF -rf430frl152h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF -rf430frl153h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF -rf430frl154h,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF -rf430frl152h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF -rf430frl153h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF -rf430frl154h_rom,0,CPU21; CPU22,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF -rf430f5175,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF -rf430f5155,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -rf430f5144,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF -msp430fr69271,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr68791,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr69791,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr6927,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6928,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF -msp430fr6877,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6977,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6879,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr6979,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr58891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr68891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr59891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr69891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr5887,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5888,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF -msp430fr5889,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr6887,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6888,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF -msp430fr6889,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr5986,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5987,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5988,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF -msp430fr5989,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr6987,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6988,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF -msp430fr6989,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr5922,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5870,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5970,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr5872,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr5972,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6820,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr6920,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr6822,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6922,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6870,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr6970,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr6872,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr6972,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr59221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr58721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr59721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr68221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr69221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr68721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430fr69721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF -msp430sl5438a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF -msp430fr4131,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,F000,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr4132,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr4133,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2032,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2033,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2110,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2111,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2310,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2311,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2433,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2532,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2533,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2632,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2633,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF -msp430f5252,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF -msp430f5253,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF -msp430f5254,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF -msp430f5255,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF -msp430f5256,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF -msp430f5257,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF -msp430f5258,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF -msp430f5259,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF -msp430fr5962,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr5964,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF -msp430fr5992,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr5994,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF -msp430fr59941,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF -msp430fr2100,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FC00,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2000,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FE00,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2355,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF -msp430fr2155,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF -msp430fr2353,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF -msp430fr2153,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF -msp430fr2522,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2512,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2422,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF -msp430fr2676,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF -msp430fr2476,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF -msp430fr2675,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,37FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF -msp430fr2673,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF -msp430fr2475,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF -msp430fr2672,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,E000,FF7F,0,0,FF80,22,FFA2,FFFF -msp430fr6043,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF -msp430fr5043,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF -msp430fr6041,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr60431,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF -msp430fr5041,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF -msp430fr50431,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF -msp430fr6005,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr6047,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF -msp430fr6037,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF -msp430fr6045,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr60471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF -msp430fr6035,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF -msp430fr6007,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF -msp430fr60371,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF +# /* ============================================================================ */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* Copyright (c) 2016, Texas Instruments Incorporated */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* All rights reserved. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* Redistribution and use in source and binary forms, with or without */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* modification, are permitted provided that the following conditions */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* are met: */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* * Redistributions of source code must retain the above copyright */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* notice, this list of conditions and the following disclaimer. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* * Redistributions in binary form must reproduce the above copyright */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* notice, this list of conditions and the following disclaimer in the */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* documentation and/or other materials provided with the distribution. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* * Neither the name of Texas Instruments Incorporated nor the names of */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* its contributors may be used to endorse or promote products derived */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* from this software without specific prior written permission. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +"# /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" */",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# /* ============================================================================ */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +Version:,1.212,,,,Date:,07/19/21,10:14:55,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 0 STD MSP430 CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 1 MSP430X CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 2 MSP430XV2 CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# HWMPY,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 0 No Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 1 16 Bit Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 2 16 Bit Hardware Multiplier with sign Extension (2xx Devices),,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 4 32 Bit Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 8 32 Bit Hardware Multiplier (5xx),,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# SPI2Wire,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 0 JTAG only - no scan,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 1 SBW (default) - scan allowed,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 2 JTAG (Default) - scan allowed,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# 3 SBW only - no scan,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, +# Device Name,CPU_TYPE,CPU_Bugs,MPY_TYPE,SBW,EEM,BREAKPOINTS,CLOCKCONTROL,CYCLECOUNTER,STACKSIZE,RAMStart,RAMEnd,RAMStart2,RAMEnd2,TINYRAMStart,TINYRAMEnd,USBRAMStart,USBRAMEnd,LEARAMStart,LEARAMEnd,MirrowedRAMSource,MirrowedRAMStart,MirrowedRAMEnd,BSLStart,BSLSize,BSLEnd,INFOStart,INFOSize,INFOEnd,INFOA,INFOB,INFOC,INFOD,FStart,FEnd,FStart2,FEnd2,Signature_Start,Signature_Size,INTStart,INTEnd +msp430c111,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF +msp430c1111,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF +msp430c112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430c1121,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430c1331,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430c1351,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430c311s,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF +msp430c312,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430c313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430c314,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,D000,FFDF,0,0,,,FFE0,FFFF +msp430c315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430c323,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430c325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430c336,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,A000,FFDF,0,0,,,FFE0,FFFF +msp430c337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF +msp430c412,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430c413,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430cg4616,1,CPU16,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,18FFF,,,FFC0,FFFF +msp430cg4617,1,CPU16,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,19FFF,,,FFC0,FFFF +msp430cg4618,1,CPU16,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,1FFFF,,,FFC0,FFFF +msp430cg4619,1,CPU16,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,1FFFF,,,FFC0,FFFF +msp430e112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430e313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430e315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430e325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430e337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF +msp430f110,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF +msp430f1101,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF +msp430f1101a,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF +msp430f1111,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F800,FFDF,0,0,,,FFE0,FFFF +msp430f1111a,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F800,FFDF,0,0,,,FFE0,FFFF +msp430f112,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430f1121,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430f1121a,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430f1122,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430f1132,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430f122,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430f1222,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430f123,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430f1232,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430f133,0,0,0,0,EMEX_MEDIUM,3,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430f135,0,0,0,0,EMEX_MEDIUM,3,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430f147,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF +msp430f148,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF +msp430f149,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF +msp430f1471,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF +msp430f1481,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF +msp430f1491,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF +msp430f155,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF 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+msp430f46181,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF +msp430f46191,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF +msp430f4616,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF +msp430f4617,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF +msp430f4618,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF +msp430f4619,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF +msp430fg4616,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF +msp430fg4617,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF +msp430fg4618,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF +msp430fg4619,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF +msp430f5418,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF +msp430f5419,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF +msp430f5435,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFB,,,FF80,FFFF +msp430f5436,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFB,,,FF80,FFFF +msp430f5437,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFB,,,FF80,FFFF +msp430f5438,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFB,,,FF80,FFFF +msp430f5418a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFF,,,FF80,FFFF +msp430f5419a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFF,,,FF80,FFFF +msp430f5435a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFF,,,FF80,FFFF +msp430f5436a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFF,,,FF80,FFFF +msp430f5437a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF +msp430f5438a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF +msp430f5212,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5213,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5214,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5217,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5218,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5219,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5222,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5223,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5224,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5227,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5228,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5229,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5232,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5234,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5237,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5239,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5242,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5244,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5247,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5249,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5304,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +msp430f5308,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f5309,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF +msp430f5310,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5340,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5341,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5342,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5324,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5325,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5326,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5327,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5328,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5329,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5500,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +msp430f5501,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f5502,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF +msp430f5503,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5504,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +msp430f5505,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f5506,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF +msp430f5507,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5508,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f5509,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF +msp430f5510,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5513,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5514,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5515,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5517,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5519,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5521,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5522,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5524,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5525,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430f5526,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5527,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF +msp430f5528,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430f5529,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430p112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF +msp430p313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF +msp430p315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430p315s,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430p325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF +msp430p337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF +cc430f5133,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +cc430f5135,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +cc430f5137,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +cc430f6125,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +cc430f6126,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +cc430f6127,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +cc430f6135,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +cc430f6137,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +cc430f5123,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +cc430f5125,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +cc430f5143,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +cc430f5145,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +cc430f5147,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +cc430f6143,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +cc430f6145,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +cc430f6147,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5333,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f5335,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f5336,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f5338,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f5630,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f5631,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF +msp430f5632,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f5633,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f5634,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF +msp430f5635,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f5636,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f5637,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF +msp430f5638,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f6433,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f6435,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f6436,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f6438,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f6630,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f6631,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF +msp430f6632,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f6633,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f6634,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF +msp430f6635,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f6636,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF +msp430f6637,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF +msp430f6638,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF +msp430f5358,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F8000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF +msp430f5359,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F0000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF +msp430f5658,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F8000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF +msp430f5659,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F0000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF +msp430f6458,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F8000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF +msp430f6459,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F0000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF +msp430f6658,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F8000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF +msp430f6659,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F0000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF +msp430fg6425,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430fg6426,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430fg6625,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF +msp430fg6626,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF +msp430l092,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,1C80,237F,0,0,,,1C60,1C7F +msp430c091,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,FC80,FFDF,0,0,,,FFE0,FFFF +msp430c092,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,F880,FFDF,0,0,,,FFE0,FFFF +msp430xgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF +msp430f5xx_6xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF +msp430fr5xx_6xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF +msp430fr2xx_4xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF +msp430fr57xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF +msp430i2xxgeneric,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FF80,FFFF +msp430f5131,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +msp430f5151,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f5171,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f5132,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF +msp430f5152,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f5172,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f6720,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f6721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f6723,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF +msp430f6724,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF +msp430f6725,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f6726,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f6730,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f6731,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f6733,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF +msp430f6734,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF +msp430f6735,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f6736,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f67621,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF +msp430f67641,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f6720a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f6721a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f6723a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF +msp430f6724a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF +msp430f6725a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f6726a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f6730a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430f6731a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +msp430f6733a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF +msp430f6734a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF +msp430f6735a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f6736a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f67621a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF +msp430f67641a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF +msp430f67451,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f67651,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f67751,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f67461,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67661,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67761,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67471,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67671,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67771,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67481,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67681,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67781,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67491,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67691,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67791,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6745,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f6765,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f6775,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f6746,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6766,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6776,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6747,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6767,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6777,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6748,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6768,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6778,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6749,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6769,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6779,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67451a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f67651a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f67751a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f67461a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67661a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67761a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67471a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67671a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67771a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f67481a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67681a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67781a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67491a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67691a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f67791a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6745a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f6765a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f6775a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF +msp430f6746a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6766a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6776a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6747a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6767a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6777a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF +msp430f6748a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6768a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6778a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6749a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6769a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430f6779a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF +msp430fr5720,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5722,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5723,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5724,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5725,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5726,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5727,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5728,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5729,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5730,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5731,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5732,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5733,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5734,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5735,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5736,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5737,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5738,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5739,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF +msp430g2211,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF +msp430g2201,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF +msp430g2111,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF +msp430g2101,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF 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+msp430g2513,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2153,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2253,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2353,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2453,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2553,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2203,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2303,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2403,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2233,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2333,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2433,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2533,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430tch5e,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2444,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2544,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2744,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2755,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2855,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2955,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFDD,0,0,FFDE,2,FFE0,FFFF +msp430g2230,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF +msp430g2210,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF +msp430bt5190,2,CPU21; CPU22; CPU23; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF +msp430fr5857,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5858,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5859,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5847,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr58471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5848,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5849,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5867,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr58671,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5868,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5869,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5957,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5958,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5959,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5947,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr59471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5948,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5949,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5967,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5968,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5969,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr59691,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430i2020,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF +msp430i2021,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF +msp430i2030,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF +msp430i2031,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF +msp430i2040,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF +msp430i2041,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF +rf430frl152h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF +rf430frl153h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF +rf430frl154h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF +rf430frl152h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF +rf430frl153h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF +rf430frl154h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF +rf430f5175,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF +rf430f5155,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +rf430f5144,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF +msp430fr69271,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr68791,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr69791,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr6927,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6928,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF +msp430fr6877,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6977,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6879,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr6979,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr58891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr68891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr59891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr69891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr5887,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5888,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF +msp430fr5889,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr6887,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6888,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF +msp430fr6889,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr5986,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5987,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5988,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF +msp430fr5989,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr6987,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6988,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF +msp430fr6989,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr5922,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5870,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5970,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr5872,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr5972,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6820,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr6920,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr6822,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6922,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6870,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr6970,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr6872,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr6972,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr59221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr58721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr59721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr68221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr69221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr68721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430fr69721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF +msp430sl5438a,2,CPU21; CPU22; CPU23; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF +msp430fr4131,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,F000,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr4132,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr4133,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2032,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2033,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2110,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2111,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2310,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2311,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2433,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2532,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2533,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2632,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2633,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF +msp430f5252,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF +msp430f5253,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF +msp430f5254,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF +msp430f5255,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF +msp430f5256,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF +msp430f5257,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF +msp430f5258,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF +msp430f5259,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF +msp430fr5962,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr5964,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF +msp430fr5992,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr5994,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF +msp430fr59941,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF +msp430fr2100,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FC00,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2000,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FE00,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2355,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF +msp430fr2155,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF +msp430fr2353,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF +msp430fr2153,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF +msp430fr2522,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2512,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2422,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF +msp430fr2676,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF +msp430fr2476,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF +msp430fr2675,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,37FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF +msp430fr2673,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF +msp430fr2475,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF +msp430fr2672,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,E000,FF7F,0,0,FF80,22,FFA2,FFFF +msp430fr6043,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF +msp430fr5043,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF +msp430fr6041,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr60431,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF +msp430fr5041,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF +msp430fr50431,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF +msp430fr6005,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr6047,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF +msp430fr6037,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF +msp430fr6045,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr60471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF +msp430fr6035,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF +msp430fr6007,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF +msp430fr60371,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/in430.h b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/in430.h index bbbb5c1c5dbe..b7788239c461 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/in430.h +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/in430.h @@ -33,7 +33,7 @@ * ******************************************************************************/ -/* 1.210 */ +/* 1.212 */ #ifndef __IN430_H__ #define __IN430_H__ diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/iomacros.h b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/iomacros.h index 5e4fae1f3f08..bb9f3dbae51c 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/iomacros.h +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/iomacros.h @@ -33,7 +33,7 @@ * ******************************************************************************/ -/* 1.210 */ +/* 1.212 */ #if !defined(_IOMACROS_H_) #define _IOMACROS_H_ diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.h b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.h index d4f5e12651b0..e40c4303bad4 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.h +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.h @@ -57,7 +57,7 @@ #ifndef __msp430x16x #define __msp430x16x -#define __MSP430_HEADER_VERSION__ 1210 +#define __MSP430_HEADER_VERSION__ 1212 #ifdef __cplusplus extern "C" { diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.ld b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.ld index d89732969cc1..202b8f4bb448 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.ld +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.ld @@ -1,5 +1,5 @@ /* ============================================================================ */ -/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* Copyright (c) 2021, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ @@ -31,7 +31,7 @@ /* ============================================================================ */ /* This file supports MSP430F1611 devices. */ -/* Version: 1.210 */ +/* Version: 1.212 */ /* Default linker script, for normal executables */ OUTPUT_ARCH(msp430) @@ -128,10 +128,10 @@ SECTIONS directory crtbegin.o is in. */ KEEP (*crtbegin*.o(.ctors)) - /* We don't want to include the .ctor section from from the - crtend.o file until after the sorted ctors. The .ctor section - from the crtend file contains the end of ctors marker and it - must be last */ + /* We don't want to include the .ctor section from the crtend.o + file until after the sorted ctors. The .ctor section from + the crtend file contains the end of ctors marker and it must + be last */ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) @@ -250,6 +250,8 @@ SECTIONS .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ .infoB : {} > INFOB + /* The rest are all not normally part of the runtime image. */ + .MSP430.attributes 0 : { KEEP (*(.MSP430.attributes)) @@ -257,8 +259,6 @@ SECTIONS KEEP (*(__TI_build_attributes)) } - /* The rest are all not normally part of the runtime image. */ - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -270,16 +270,16 @@ SECTIONS /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ - /* DWARF 1 */ + /* DWARF 1. */ .debug 0 : { *(.debug) } .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ + /* GNU DWARF 1 extensions. */ .debug_srcinfo 0 : { *(.debug_srcinfo) } .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ + /* DWARF 1.1 and DWARF 2. */ .debug_aranges 0 : { *(.debug_aranges) } .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ + /* DWARF 2. */ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } .debug_abbrev 0 : { *(.debug_abbrev) } .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } @@ -287,11 +287,17 @@ SECTIONS .debug_str 0 : { *(.debug_str) } .debug_loc 0 : { *(.debug_loc) } .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ + /* SGI/MIPS DWARF 2 extensions. */ .debug_weaknames 0 : { *(.debug_weaknames) } .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + /* DWARF Extension. */ + .debug_macro 0 : { *(.debug_macro) } + /DISCARD/ : { *(.note.GNU-stack) } } diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611_symbols.ld b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611_symbols.ld index 74e9c353fd82..7d1b54725b10 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611_symbols.ld +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611_symbols.ld @@ -1,5 +1,5 @@ /* ============================================================================ */ -/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* Copyright (c) 2021, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ @@ -31,7 +31,7 @@ /* ============================================================================ */ /* This file supports MSP430F1611 devices. */ -/* Version: 1.210 */ +/* Version: 1.212 */ /************************************************************ * STANDARD BITS diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612.h b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612.h index d4f5e12651b0..e40c4303bad4 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612.h +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612.h @@ -57,7 +57,7 @@ #ifndef __msp430x16x #define __msp430x16x -#define __MSP430_HEADER_VERSION__ 1210 +#define __MSP430_HEADER_VERSION__ 1212 #ifdef __cplusplus extern "C" { diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612.ld b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612.ld index d63f89758f20..f31318e21943 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612.ld +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612.ld @@ -1,5 +1,5 @@ /* ============================================================================ */ -/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* Copyright (c) 2021, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ @@ -31,7 +31,7 @@ /* ============================================================================ */ /* This file supports MSP430F1612 devices. */ -/* Version: 1.210 */ +/* Version: 1.212 */ /* Default linker script, for normal executables */ OUTPUT_ARCH(msp430) @@ -128,10 +128,10 @@ SECTIONS directory crtbegin.o is in. */ KEEP (*crtbegin*.o(.ctors)) - /* We don't want to include the .ctor section from from the - crtend.o file until after the sorted ctors. The .ctor section - from the crtend file contains the end of ctors marker and it - must be last */ + /* We don't want to include the .ctor section from the crtend.o + file until after the sorted ctors. The .ctor section from + the crtend file contains the end of ctors marker and it must + be last */ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) @@ -250,6 +250,8 @@ SECTIONS .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ .infoB : {} > INFOB + /* The rest are all not normally part of the runtime image. */ + .MSP430.attributes 0 : { KEEP (*(.MSP430.attributes)) @@ -257,8 +259,6 @@ SECTIONS KEEP (*(__TI_build_attributes)) } - /* The rest are all not normally part of the runtime image. */ - /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } @@ -270,16 +270,16 @@ SECTIONS /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ - /* DWARF 1 */ + /* DWARF 1. */ .debug 0 : { *(.debug) } .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ + /* GNU DWARF 1 extensions. */ .debug_srcinfo 0 : { *(.debug_srcinfo) } .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ + /* DWARF 1.1 and DWARF 2. */ .debug_aranges 0 : { *(.debug_aranges) } .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ + /* DWARF 2. */ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } .debug_abbrev 0 : { *(.debug_abbrev) } .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } @@ -287,11 +287,17 @@ SECTIONS .debug_str 0 : { *(.debug_str) } .debug_loc 0 : { *(.debug_loc) } .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ + /* SGI/MIPS DWARF 2 extensions. */ .debug_weaknames 0 : { *(.debug_weaknames) } .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + /* DWARF Extension. */ + .debug_macro 0 : { *(.debug_macro) } + /DISCARD/ : { *(.note.GNU-stack) } } diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612_symbols.ld b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612_symbols.ld index 8ee13549b2c1..9f9c67fb009a 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612_symbols.ld +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1612_symbols.ld @@ -1,5 +1,5 @@ /* ============================================================================ */ -/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* Copyright (c) 2021, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ @@ -31,7 +31,7 @@ /* ============================================================================ */ /* This file supports MSP430F1612 devices. */ -/* Version: 1.210 */ +/* Version: 1.212 */ /************************************************************ * STANDARD BITS diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617.h b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617.h index fa4940ff1056..4dc601263586 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617.h +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617.h @@ -54,7 +54,7 @@ #define __MSP430_HAS_MSP430X_CPU__ /* Definition to show that it has MSP430X CPU */ -#define __MSP430_HEADER_VERSION__ 1210 +#define __MSP430_HEADER_VERSION__ 1212 #ifdef __cplusplus extern "C" { diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617.ld b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617.ld index 7a3ecc008fdc..20aff2bf53af 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617.ld +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617.ld @@ -1,5 +1,5 @@ /* ============================================================================ */ -/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* Copyright (c) 2021, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ @@ -31,7 +31,7 @@ /* ============================================================================ */ /* This file supports MSP430F2617 devices. */ -/* Version: 1.210 */ +/* Version: 1.212 */ /* Default linker script, for normal executables */ OUTPUT_ARCH(msp430) @@ -172,10 +172,10 @@ SECTIONS directory crtbegin.o is in. */ KEEP (*crtbegin*.o(.ctors)) - /* We don't want to include the .ctor section from from the - crtend.o file until after the sorted ctors. The .ctor section - from the crtend file contains the end of ctors marker and it - must be last */ + /* We don't want to include the .ctor section from the crtend.o + file until after the sorted ctors. The .ctor section from + the crtend file contains the end of ctors marker and it must + be last */ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617_symbols.ld b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617_symbols.ld index c5032536fad1..fccd1695f844 100644 --- a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617_symbols.ld +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617_symbols.ld @@ -1,5 +1,5 @@ /* ============================================================================ */ -/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* Copyright (c) 2021, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ @@ -31,7 +31,7 @@ /* ============================================================================ */ /* This file supports MSP430F2617 devices. */ -/* Version: 1.210 */ +/* Version: 1.212 */ /************************************************************ * STANDARD BITS diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.h b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.h new file mode 100644 index 000000000000..4dc601263586 --- /dev/null +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.h @@ -0,0 +1,1520 @@ +/* ============================================================================ */ +/* Copyright (c) 2020, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************** +* +* Standard register and bit definitions for the Texas Instruments +* MSP430 microcontroller. +* +* This file supports assembler and C development for +* MSP430x26x devices. +* +* Texas Instruments, Version 1.5 +* +* Rev. 1.0, Initial Version +* Rev. 1.1, changed PAREN from sfrb to sfrw +* Rev. 1.2 added TLV in INFO Memory +* Rev. 1.3, added definitions for Interrupt Vectors xxIV +* Rev. 1.4, changed 'void __data20 * volatile' definition +* Rev. 1.5, fixed define: TAG_ADC12_1 to 0x08 +* +********************************************************************/ + +#ifndef __msp430x26x +#define __msp430x26x + +#define __MSP430_HAS_MSP430X_CPU__ /* Definition to show that it has MSP430X CPU */ + +#define __MSP430_HEADER_VERSION__ 1212 + +#ifdef __cplusplus +extern "C" { +#endif + + +/*----------------------------------------------------------------------------*/ +/* PERIPHERAL FILE MAP */ +/*----------------------------------------------------------------------------*/ + +#define __MSP430_TI_HEADERS__ + +#include + + +/************************************************************ +* STANDARD BITS +************************************************************/ + +#define BIT0 (0x0001) +#define BIT1 (0x0002) +#define BIT2 (0x0004) +#define BIT3 (0x0008) +#define BIT4 (0x0010) +#define BIT5 (0x0020) +#define BIT6 (0x0040) +#define BIT7 (0x0080) +#define BIT8 (0x0100) +#define BIT9 (0x0200) +#define BITA (0x0400) +#define BITB (0x0800) +#define BITC (0x1000) +#define BITD (0x2000) +#define BITE (0x4000) +#define BITF (0x8000) + +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ + +#define C (0x0001) +#define Z (0x0002) +#define N (0x0004) +#define V (0x0100) +#define GIE (0x0008) +#define CPUOFF (0x0010) +#define OSCOFF (0x0020) +#define SCG0 (0x0040) +#define SCG1 (0x0080) + +/* Low Power Modes coded with Bits 4-7 in SR */ + +#ifndef __STDC__ /* Begin #defines for assembler */ +#define LPM0 (CPUOFF) +#define LPM1 (SCG0+CPUOFF) +#define LPM2 (SCG1+CPUOFF) +#define LPM3 (SCG1+SCG0+CPUOFF) +#define LPM4 (SCG1+SCG0+OSCOFF+CPUOFF) +/* End #defines for assembler */ + +#else /* Begin #defines for C */ +#define LPM0_bits (CPUOFF) +#define LPM1_bits (SCG0+CPUOFF) +#define LPM2_bits (SCG1+CPUOFF) +#define LPM3_bits (SCG1+SCG0+CPUOFF) +#define LPM4_bits (SCG1+SCG0+OSCOFF+CPUOFF) + +#include "in430.h" + +#define LPM0 __bis_SR_register(LPM0_bits) /* Enter Low Power Mode 0 */ +#define LPM0_EXIT __bic_SR_register_on_exit(LPM0_bits) /* Exit Low Power Mode 0 */ +#define LPM1 __bis_SR_register(LPM1_bits) /* Enter Low Power Mode 1 */ +#define LPM1_EXIT __bic_SR_register_on_exit(LPM1_bits) /* Exit Low Power Mode 1 */ +#define LPM2 __bis_SR_register(LPM2_bits) /* Enter Low Power Mode 2 */ +#define LPM2_EXIT __bic_SR_register_on_exit(LPM2_bits) /* Exit Low Power Mode 2 */ +#define LPM3 __bis_SR_register(LPM3_bits) /* Enter Low Power Mode 3 */ +#define LPM3_EXIT __bic_SR_register_on_exit(LPM3_bits) /* Exit Low Power Mode 3 */ +#define LPM4 __bis_SR_register(LPM4_bits) /* Enter Low Power Mode 4 */ +#define LPM4_EXIT __bic_SR_register_on_exit(LPM4_bits) /* Exit Low Power Mode 4 */ +#endif /* End #defines for C */ + +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ + +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ + +sfr_b(IE1); /* Interrupt Enable 1 */ +#define WDTIE (0x01) /* Watchdog Interrupt Enable */ +#define OFIE (0x02) /* Osc. Fault Interrupt Enable */ +#define NMIIE (0x10) /* NMI Interrupt Enable */ +#define ACCVIE (0x20) /* Flash Access Violation Interrupt Enable */ + +sfr_b(IFG1); /* Interrupt Flag 1 */ +#define WDTIFG (0x01) /* Watchdog Interrupt Flag */ +#define OFIFG (0x02) /* Osc. Fault Interrupt Flag */ +#define PORIFG (0x04) /* Power On Interrupt Flag */ +#define RSTIFG (0x08) /* Reset Interrupt Flag */ +#define NMIIFG (0x10) /* NMI Interrupt Flag */ + +sfr_b(IE2); /* Interrupt Enable 2 */ +#define UC0IE IE2 +#define UCA0RXIE (0x01) +#define UCA0TXIE (0x02) +#define UCB0RXIE (0x04) +#define UCB0TXIE (0x08) + +sfr_b(IFG2); /* Interrupt Flag 2 */ +#define UC0IFG IFG2 +#define UCA0RXIFG (0x01) +#define UCA0TXIFG (0x02) +#define UCB0RXIFG (0x04) +#define UCB0TXIFG (0x08) + +sfr_b(UC1IE); /* USCI 1 Interrupt Enable */ +#define UCA1RXIE (0x01) +#define UCA1TXIE (0x02) +#define UCB1RXIE (0x04) +#define UCB1TXIE (0x08) + +sfr_b(UC1IFG); /* ISCI 1 Interrupt Flags */ +#define UCA1RXIFG (0x01) +#define UCA1TXIFG (0x02) +#define UCB1RXIFG (0x04) +#define UCB1TXIFG (0x08) + +/************************************************************ +* ADC12 +************************************************************/ +#define __MSP430_HAS_ADC12__ /* Definition to show that Module is available */ + +sfr_w(ADC12CTL0); /* ADC12 Control 0 */ +sfr_w(ADC12CTL1); /* ADC12 Control 1 */ +sfr_w(ADC12IFG); /* ADC12 Interrupt Flag */ +sfr_w(ADC12IE); /* ADC12 Interrupt Enable */ +sfr_w(ADC12IV); /* ADC12 Interrupt Vector Word */ + +#define ADC12MEM_ (0x0140) /* ADC12 Conversion Memory */ +#ifndef __STDC__ +#define ADC12MEM (ADC12MEM_) /* ADC12 Conversion Memory (for assembler) */ +#else +#define ADC12MEM ((volatile int*) ADC12MEM_) /* ADC12 Conversion Memory (for C) */ +#endif +sfr_w(ADC12MEM0); /* ADC12 Conversion Memory 0 */ +sfr_w(ADC12MEM1); /* ADC12 Conversion Memory 1 */ +sfr_w(ADC12MEM2); /* ADC12 Conversion Memory 2 */ +sfr_w(ADC12MEM3); /* ADC12 Conversion Memory 3 */ +sfr_w(ADC12MEM4); /* ADC12 Conversion Memory 4 */ +sfr_w(ADC12MEM5); /* ADC12 Conversion Memory 5 */ +sfr_w(ADC12MEM6); /* ADC12 Conversion Memory 6 */ +sfr_w(ADC12MEM7); /* ADC12 Conversion Memory 7 */ +sfr_w(ADC12MEM8); /* ADC12 Conversion Memory 8 */ +sfr_w(ADC12MEM9); /* ADC12 Conversion Memory 9 */ +sfr_w(ADC12MEM10); /* ADC12 Conversion Memory 10 */ +sfr_w(ADC12MEM11); /* ADC12 Conversion Memory 11 */ +sfr_w(ADC12MEM12); /* ADC12 Conversion Memory 12 */ +sfr_w(ADC12MEM13); /* ADC12 Conversion Memory 13 */ +sfr_w(ADC12MEM14); /* ADC12 Conversion Memory 14 */ +sfr_w(ADC12MEM15); /* ADC12 Conversion Memory 15 */ + +#define ADC12MCTL_ (0x0080) /* ADC12 Memory Control */ +#ifndef __STDC__ +#define ADC12MCTL (ADC12MCTL_) /* ADC12 Memory Control (for assembler) */ +#else +#define ADC12MCTL ((volatile char*) ADC12MCTL_) /* ADC12 Memory Control (for C) */ +#endif +sfr_b(ADC12MCTL0); /* ADC12 Memory Control 0 */ +sfr_b(ADC12MCTL1); /* ADC12 Memory Control 1 */ +sfr_b(ADC12MCTL2); /* ADC12 Memory Control 2 */ +sfr_b(ADC12MCTL3); /* ADC12 Memory Control 3 */ +sfr_b(ADC12MCTL4); /* ADC12 Memory Control 4 */ +sfr_b(ADC12MCTL5); /* ADC12 Memory Control 5 */ +sfr_b(ADC12MCTL6); /* ADC12 Memory Control 6 */ +sfr_b(ADC12MCTL7); /* ADC12 Memory Control 7 */ +sfr_b(ADC12MCTL8); /* ADC12 Memory Control 8 */ +sfr_b(ADC12MCTL9); /* ADC12 Memory Control 9 */ +sfr_b(ADC12MCTL10); /* ADC12 Memory Control 10 */ +sfr_b(ADC12MCTL11); /* ADC12 Memory Control 11 */ +sfr_b(ADC12MCTL12); /* ADC12 Memory Control 12 */ +sfr_b(ADC12MCTL13); /* ADC12 Memory Control 13 */ +sfr_b(ADC12MCTL14); /* ADC12 Memory Control 14 */ +sfr_b(ADC12MCTL15); /* ADC12 Memory Control 15 */ + +/* ADC12CTL0 */ +#define ADC12SC (0x001) /* ADC12 Start Conversion */ +#define ENC (0x002) /* ADC12 Enable Conversion */ +#define ADC12TOVIE (0x004) /* ADC12 Timer Overflow interrupt enable */ +#define ADC12OVIE (0x008) /* ADC12 Overflow interrupt enable */ +#define ADC12ON (0x010) /* ADC12 On/enable */ +#define REFON (0x020) /* ADC12 Reference on */ +#define REF2_5V (0x040) /* ADC12 Ref 0:1.5V / 1:2.5V */ +#define MSC (0x080) /* ADC12 Multiple SampleConversion */ +#define SHT00 (0x0100) /* ADC12 Sample Hold 0 Select 0 */ +#define SHT01 (0x0200) /* ADC12 Sample Hold 0 Select 1 */ +#define SHT02 (0x0400) /* ADC12 Sample Hold 0 Select 2 */ +#define SHT03 (0x0800) /* ADC12 Sample Hold 0 Select 3 */ +#define SHT10 (0x1000) /* ADC12 Sample Hold 0 Select 0 */ +#define SHT11 (0x2000) /* ADC12 Sample Hold 1 Select 1 */ +#define SHT12 (0x4000) /* ADC12 Sample Hold 2 Select 2 */ +#define SHT13 (0x8000) /* ADC12 Sample Hold 3 Select 3 */ +#define MSH (0x080) + +#define SHT0_0 (0x0000) /* ADC12 Sample Hold 0 Select Bit: 0 */ +#define SHT0_1 (0x0100) /* ADC12 Sample Hold 0 Select Bit: 1 */ +#define SHT0_2 (0x0200) /* ADC12 Sample Hold 0 Select Bit: 2 */ +#define SHT0_3 (0x0300) /* ADC12 Sample Hold 0 Select Bit: 3 */ +#define SHT0_4 (0x0400) /* ADC12 Sample Hold 0 Select Bit: 4 */ +#define SHT0_5 (0x0500) /* ADC12 Sample Hold 0 Select Bit: 5 */ +#define SHT0_6 (0x0600) /* ADC12 Sample Hold 0 Select Bit: 6 */ +#define SHT0_7 (0x0700) /* ADC12 Sample Hold 0 Select Bit: 7 */ +#define SHT0_8 (0x0800) /* ADC12 Sample Hold 0 Select Bit: 8 */ +#define SHT0_9 (0x0900) /* ADC12 Sample Hold 0 Select Bit: 9 */ +#define SHT0_10 (0x0A00) /* ADC12 Sample Hold 0 Select Bit: 10 */ +#define SHT0_11 (0x0B00) /* ADC12 Sample Hold 0 Select Bit: 11 */ +#define SHT0_12 (0x0C00) /* ADC12 Sample Hold 0 Select Bit: 12 */ +#define SHT0_13 (0x0D00) /* ADC12 Sample Hold 0 Select Bit: 13 */ +#define SHT0_14 (0x0E00) /* ADC12 Sample Hold 0 Select Bit: 14 */ +#define SHT0_15 (0x0F00) /* ADC12 Sample Hold 0 Select Bit: 15 */ + +#define SHT1_0 (0x0000) /* ADC12 Sample Hold 1 Select Bit: 0 */ +#define SHT1_1 (0x1000) /* ADC12 Sample Hold 1 Select Bit: 1 */ +#define SHT1_2 (0x2000) /* ADC12 Sample Hold 1 Select Bit: 2 */ +#define SHT1_3 (0x3000) /* ADC12 Sample Hold 1 Select Bit: 3 */ +#define SHT1_4 (0x4000) /* ADC12 Sample Hold 1 Select Bit: 4 */ +#define SHT1_5 (0x5000) /* ADC12 Sample Hold 1 Select Bit: 5 */ +#define SHT1_6 (0x6000) /* ADC12 Sample Hold 1 Select Bit: 6 */ +#define SHT1_7 (0x7000) /* ADC12 Sample Hold 1 Select Bit: 7 */ +#define SHT1_8 (0x8000) /* ADC12 Sample Hold 1 Select Bit: 8 */ +#define SHT1_9 (0x9000) /* ADC12 Sample Hold 1 Select Bit: 9 */ +#define SHT1_10 (0xA000) /* ADC12 Sample Hold 1 Select Bit: 10 */ +#define SHT1_11 (0xB000) /* ADC12 Sample Hold 1 Select Bit: 11 */ +#define SHT1_12 (0xC000) /* ADC12 Sample Hold 1 Select Bit: 12 */ +#define SHT1_13 (0xD000) /* ADC12 Sample Hold 1 Select Bit: 13 */ +#define SHT1_14 (0xE000) /* ADC12 Sample Hold 1 Select Bit: 14 */ +#define SHT1_15 (0xF000) /* ADC12 Sample Hold 1 Select Bit: 15 */ + +/* ADC12CTL1 */ +#define ADC12BUSY (0x0001) /* ADC12 Busy */ +#define CONSEQ0 (0x0002) /* ADC12 Conversion Sequence Select 0 */ +#define CONSEQ1 (0x0004) /* ADC12 Conversion Sequence Select 1 */ +#define ADC12SSEL0 (0x0008) /* ADC12 Clock Source Select 0 */ +#define ADC12SSEL1 (0x0010) /* ADC12 Clock Source Select 1 */ +#define ADC12DIV0 (0x0020) /* ADC12 Clock Divider Select 0 */ +#define ADC12DIV1 (0x0040) /* ADC12 Clock Divider Select 1 */ +#define ADC12DIV2 (0x0080) /* ADC12 Clock Divider Select 2 */ +#define ISSH (0x0100) /* ADC12 Invert Sample Hold Signal */ +#define SHP (0x0200) /* ADC12 Sample/Hold Pulse Mode */ +#define SHS0 (0x0400) /* ADC12 Sample/Hold Source 0 */ +#define SHS1 (0x0800) /* ADC12 Sample/Hold Source 1 */ +#define CSTARTADD0 (0x1000) /* ADC12 Conversion Start Address 0 */ +#define CSTARTADD1 (0x2000) /* ADC12 Conversion Start Address 1 */ +#define CSTARTADD2 (0x4000) /* ADC12 Conversion Start Address 2 */ +#define CSTARTADD3 (0x8000) /* ADC12 Conversion Start Address 3 */ + +#define CONSEQ_0 (0x0000) /* ADC12 Conversion Sequence Select: 0 */ +#define CONSEQ_1 (0x0002) /* ADC12 Conversion Sequence Select: 1 */ +#define CONSEQ_2 (0x0004) /* ADC12 Conversion Sequence Select: 2 */ +#define CONSEQ_3 (0x0006) /* ADC12 Conversion Sequence Select: 3 */ +#define ADC12SSEL_0 (0x0000) /* ADC12 Clock Source Select: 0 */ +#define ADC12SSEL_1 (0x0008) /* ADC12 Clock Source Select: 1 */ +#define ADC12SSEL_2 (0x0010) /* ADC12 Clock Source Select: 2 */ +#define ADC12SSEL_3 (0x0018) /* ADC12 Clock Source Select: 3 */ +#define ADC12DIV_0 (0x0000) /* ADC12 Clock Divider Select: 0 */ +#define ADC12DIV_1 (0x0020) /* ADC12 Clock Divider Select: 1 */ +#define ADC12DIV_2 (0x0040) /* ADC12 Clock Divider Select: 2 */ +#define ADC12DIV_3 (0x0060) /* ADC12 Clock Divider Select: 3 */ +#define ADC12DIV_4 (0x0080) /* ADC12 Clock Divider Select: 4 */ +#define ADC12DIV_5 (0x00A0) /* ADC12 Clock Divider Select: 5 */ +#define ADC12DIV_6 (0x00C0) /* ADC12 Clock Divider Select: 6 */ +#define ADC12DIV_7 (0x00E0) /* ADC12 Clock Divider Select: 7 */ +#define SHS_0 (0x0000) /* ADC12 Sample/Hold Source: 0 */ +#define SHS_1 (0x0400) /* ADC12 Sample/Hold Source: 1 */ +#define SHS_2 (0x0800) /* ADC12 Sample/Hold Source: 2 */ +#define SHS_3 (0x0C00) /* ADC12 Sample/Hold Source: 3 */ +#define CSTARTADD_0 (0x0000) /* ADC12 Conversion Start Address: 0 */ +#define CSTARTADD_1 (0x1000) /* ADC12 Conversion Start Address: 1 */ +#define CSTARTADD_2 (0x2000) /* ADC12 Conversion Start Address: 2 */ +#define CSTARTADD_3 (0x3000) /* ADC12 Conversion Start Address: 3 */ +#define CSTARTADD_4 (0x4000) /* ADC12 Conversion Start Address: 4 */ +#define CSTARTADD_5 (0x5000) /* ADC12 Conversion Start Address: 5 */ +#define CSTARTADD_6 (0x6000) /* ADC12 Conversion Start Address: 6 */ +#define CSTARTADD_7 (0x7000) /* ADC12 Conversion Start Address: 7 */ +#define CSTARTADD_8 (0x8000) /* ADC12 Conversion Start Address: 8 */ +#define CSTARTADD_9 (0x9000) /* ADC12 Conversion Start Address: 9 */ +#define CSTARTADD_10 (0xA000) /* ADC12 Conversion Start Address: 10 */ +#define CSTARTADD_11 (0xB000) /* ADC12 Conversion Start Address: 11 */ +#define CSTARTADD_12 (0xC000) /* ADC12 Conversion Start Address: 12 */ +#define CSTARTADD_13 (0xD000) /* ADC12 Conversion Start Address: 13 */ +#define CSTARTADD_14 (0xE000) /* ADC12 Conversion Start Address: 14 */ +#define CSTARTADD_15 (0xF000) /* ADC12 Conversion Start Address: 15 */ + +/* ADC12MCTLx */ +#define INCH0 (0x0001) /* ADC12 Input Channel Select Bit 0 */ +#define INCH1 (0x0002) /* ADC12 Input Channel Select Bit 1 */ +#define INCH2 (0x0004) /* ADC12 Input Channel Select Bit 2 */ +#define INCH3 (0x0008) /* ADC12 Input Channel Select Bit 3 */ +#define SREF0 (0x0010) /* ADC12 Select Reference Bit 0 */ +#define SREF1 (0x0020) /* ADC12 Select Reference Bit 1 */ +#define SREF2 (0x0040) /* ADC12 Select Reference Bit 2 */ +#define EOS (0x0080) /* ADC12 End of Sequence */ + +#define INCH_0 (0) /* ADC12 Input Channel 0 */ +#define INCH_1 (1) /* ADC12 Input Channel 1 */ +#define INCH_2 (2) /* ADC12 Input Channel 2 */ +#define INCH_3 (3) /* ADC12 Input Channel 3 */ +#define INCH_4 (4) /* ADC12 Input Channel 4 */ +#define INCH_5 (5) /* ADC12 Input Channel 5 */ +#define INCH_6 (6) /* ADC12 Input Channel 6 */ +#define INCH_7 (7) /* ADC12 Input Channel 7 */ +#define INCH_8 (8) /* ADC12 Input Channel 8 */ +#define INCH_9 (9) /* ADC12 Input Channel 9 */ +#define INCH_10 (10) /* ADC12 Input Channel 10 */ +#define INCH_11 (11) /* ADC12 Input Channel 11 */ +#define INCH_12 (12) /* ADC12 Input Channel 12 */ +#define INCH_13 (13) /* ADC12 Input Channel 13 */ +#define INCH_14 (14) /* ADC12 Input Channel 14 */ +#define INCH_15 (15) /* ADC12 Input Channel 15 */ + +#define SREF_0 (0x0000) /* ADC12 Select Reference 0 */ +#define SREF_1 (0x0010) /* ADC12 Select Reference 1 */ +#define SREF_2 (0x0020) /* ADC12 Select Reference 2 */ +#define SREF_3 (0x0030) /* ADC12 Select Reference 3 */ +#define SREF_4 (0x0040) /* ADC12 Select Reference 4 */ +#define SREF_5 (0x0050) /* ADC12 Select Reference 5 */ +#define SREF_6 (0x0060) /* ADC12 Select Reference 6 */ +#define SREF_7 (0x0070) /* ADC12 Select Reference 7 */ + +/* ADC12IV Definitions */ +#define ADC12IV_NONE (0x0000) /* No Interrupt pending */ +#define ADC12IV_ADC12OVIFG (0x0002) /* ADC12OVIFG */ +#define ADC12IV_ADC12TOVIFG (0x0004) /* ADC12TOVIFG */ +#define ADC12IV_ADC12IFG0 (0x0006) /* ADC12IFG0 */ +#define ADC12IV_ADC12IFG1 (0x0008) /* ADC12IFG1 */ +#define ADC12IV_ADC12IFG2 (0x000A) /* ADC12IFG2 */ +#define ADC12IV_ADC12IFG3 (0x000C) /* ADC12IFG3 */ +#define ADC12IV_ADC12IFG4 (0x000E) /* ADC12IFG4 */ +#define ADC12IV_ADC12IFG5 (0x0010) /* ADC12IFG5 */ +#define ADC12IV_ADC12IFG6 (0x0012) /* ADC12IFG6 */ +#define ADC12IV_ADC12IFG7 (0x0014) /* ADC12IFG7 */ +#define ADC12IV_ADC12IFG8 (0x0016) /* ADC12IFG8 */ +#define ADC12IV_ADC12IFG9 (0x0018) /* ADC12IFG9 */ +#define ADC12IV_ADC12IFG10 (0x001A) /* ADC12IFG10 */ +#define ADC12IV_ADC12IFG11 (0x001C) /* ADC12IFG11 */ +#define ADC12IV_ADC12IFG12 (0x001E) /* ADC12IFG12 */ +#define ADC12IV_ADC12IFG13 (0x0020) /* ADC12IFG13 */ +#define ADC12IV_ADC12IFG14 (0x0022) /* ADC12IFG14 */ +#define ADC12IV_ADC12IFG15 (0x0024) /* ADC12IFG15 */ + +/************************************************************ +* Basic Clock Module +************************************************************/ +#define __MSP430_HAS_BC2__ /* Definition to show that Module is available */ + +sfr_b(DCOCTL); /* DCO Clock Frequency Control */ +sfr_b(BCSCTL1); /* Basic Clock System Control 1 */ +sfr_b(BCSCTL2); /* Basic Clock System Control 2 */ +sfr_b(BCSCTL3); /* Basic Clock System Control 3 */ + +#define MOD0 (0x01) /* Modulation Bit 0 */ +#define MOD1 (0x02) /* Modulation Bit 1 */ +#define MOD2 (0x04) /* Modulation Bit 2 */ +#define MOD3 (0x08) /* Modulation Bit 3 */ +#define MOD4 (0x10) /* Modulation Bit 4 */ +#define DCO0 (0x20) /* DCO Select Bit 0 */ +#define DCO1 (0x40) /* DCO Select Bit 1 */ +#define DCO2 (0x80) /* DCO Select Bit 2 */ + +#define RSEL0 (0x01) /* Range Select Bit 0 */ +#define RSEL1 (0x02) /* Range Select Bit 1 */ +#define RSEL2 (0x04) /* Range Select Bit 2 */ +#define RSEL3 (0x08) /* Range Select Bit 3 */ +#define DIVA0 (0x10) /* ACLK Divider 0 */ +#define DIVA1 (0x20) /* ACLK Divider 1 */ +#define XTS (0x40) /* LFXTCLK 0:Low Freq. / 1: High Freq. */ +#define XT2OFF (0x80) /* Enable XT2CLK */ + +#define DIVA_0 (0x00) /* ACLK Divider 0: /1 */ +#define DIVA_1 (0x10) /* ACLK Divider 1: /2 */ +#define DIVA_2 (0x20) /* ACLK Divider 2: /4 */ +#define DIVA_3 (0x30) /* ACLK Divider 3: /8 */ + +#define DCOR (0x01) /* Enable External Resistor : 1 */ +#define DIVS0 (0x02) /* SMCLK Divider 0 */ +#define DIVS1 (0x04) /* SMCLK Divider 1 */ +#define SELS (0x08) /* SMCLK Source Select 0:DCOCLK / 1:XT2CLK/LFXTCLK */ +#define DIVM0 (0x10) /* MCLK Divider 0 */ +#define DIVM1 (0x20) /* MCLK Divider 1 */ +#define SELM0 (0x40) /* MCLK Source Select 0 */ +#define SELM1 (0x80) /* MCLK Source Select 1 */ + +#define DIVS_0 (0x00) /* SMCLK Divider 0: /1 */ +#define DIVS_1 (0x02) /* SMCLK Divider 1: /2 */ +#define DIVS_2 (0x04) /* SMCLK Divider 2: /4 */ +#define DIVS_3 (0x06) /* SMCLK Divider 3: /8 */ + +#define DIVM_0 (0x00) /* MCLK Divider 0: /1 */ +#define DIVM_1 (0x10) /* MCLK Divider 1: /2 */ +#define DIVM_2 (0x20) /* MCLK Divider 2: /4 */ +#define DIVM_3 (0x30) /* MCLK Divider 3: /8 */ + +#define SELM_0 (0x00) /* MCLK Source Select 0: DCOCLK */ +#define SELM_1 (0x40) /* MCLK Source Select 1: DCOCLK */ +#define SELM_2 (0x80) /* MCLK Source Select 2: XT2CLK/LFXTCLK */ +#define SELM_3 (0xC0) /* MCLK Source Select 3: LFXTCLK */ + +#define LFXT1OF (0x01) /* Low/high Frequency Oscillator Fault Flag */ +#define XT2OF (0x02) /* High frequency oscillator 2 fault flag */ +#define XCAP0 (0x04) /* XIN/XOUT Cap 0 */ +#define XCAP1 (0x08) /* XIN/XOUT Cap 1 */ +#define LFXT1S0 (0x10) /* Mode 0 for LFXT1 (XTS = 0) */ +#define LFXT1S1 (0x20) /* Mode 1 for LFXT1 (XTS = 0) */ +#define XT2S0 (0x40) /* Mode 0 for XT2 */ +#define XT2S1 (0x80) /* Mode 1 for XT2 */ + +#define XCAP_0 (0x00) /* XIN/XOUT Cap : 0 pF */ +#define XCAP_1 (0x04) /* XIN/XOUT Cap : 6 pF */ +#define XCAP_2 (0x08) /* XIN/XOUT Cap : 10 pF */ +#define XCAP_3 (0x0C) /* XIN/XOUT Cap : 12.5 pF */ + +#define LFXT1S_0 (0x00) /* Mode 0 for LFXT1 : Normal operation */ +#define LFXT1S_1 (0x10) /* Mode 1 for LFXT1 : Reserved */ +#define LFXT1S_2 (0x20) /* Mode 2 for LFXT1 : VLO */ +#define LFXT1S_3 (0x30) /* Mode 3 for LFXT1 : Digital input signal */ + +#define XT2S_0 (0x00) /* Mode 0 for XT2 : 0.4 - 1 MHz */ +#define XT2S_1 (0x40) /* Mode 1 for XT2 : 1 - 4 MHz */ +#define XT2S_2 (0x80) /* Mode 2 for XT2 : 2 - 16 MHz */ +#define XT2S_3 (0xC0) /* Mode 3 for XT2 : Digital input signal */ + +/************************************************************ +* Comparator A +************************************************************/ +#define __MSP430_HAS_CAPLUS__ /* Definition to show that Module is available */ + +sfr_b(CACTL1); /* Comparator A Control 1 */ +sfr_b(CACTL2); /* Comparator A Control 2 */ +sfr_b(CAPD); /* Comparator A Port Disable */ + +#define CAIFG (0x01) /* Comp. A Interrupt Flag */ +#define CAIE (0x02) /* Comp. A Interrupt Enable */ +#define CAIES (0x04) /* Comp. A Int. Edge Select: 0:rising / 1:falling */ +#define CAON (0x08) /* Comp. A enable */ +#define CAREF0 (0x10) /* Comp. A Internal Reference Select 0 */ +#define CAREF1 (0x20) /* Comp. A Internal Reference Select 1 */ +#define CARSEL (0x40) /* Comp. A Internal Reference Enable */ +#define CAEX (0x80) /* Comp. A Exchange Inputs */ + +#define CAREF_0 (0x00) /* Comp. A Int. Ref. Select 0 : Off */ +#define CAREF_1 (0x10) /* Comp. A Int. Ref. Select 1 : 0.25*Vcc */ +#define CAREF_2 (0x20) /* Comp. A Int. Ref. Select 2 : 0.5*Vcc */ +#define CAREF_3 (0x30) /* Comp. A Int. Ref. Select 3 : Vt*/ + +#define CAOUT (0x01) /* Comp. A Output */ +#define CAF (0x02) /* Comp. A Enable Output Filter */ +#define P2CA0 (0x04) /* Comp. A +Terminal Multiplexer */ +#define P2CA1 (0x08) /* Comp. A -Terminal Multiplexer */ +#define P2CA2 (0x10) /* Comp. A -Terminal Multiplexer */ +#define P2CA3 (0x20) /* Comp. A -Terminal Multiplexer */ +#define P2CA4 (0x40) /* Comp. A +Terminal Multiplexer */ +#define CASHORT (0x80) /* Comp. A Short + and - Terminals */ + +#define CAPD0 (0x01) /* Comp. A Disable Input Buffer of Port Register .0 */ +#define CAPD1 (0x02) /* Comp. A Disable Input Buffer of Port Register .1 */ +#define CAPD2 (0x04) /* Comp. A Disable Input Buffer of Port Register .2 */ +#define CAPD3 (0x08) /* Comp. A Disable Input Buffer of Port Register .3 */ +#define CAPD4 (0x10) /* Comp. A Disable Input Buffer of Port Register .4 */ +#define CAPD5 (0x20) /* Comp. A Disable Input Buffer of Port Register .5 */ +#define CAPD6 (0x40) /* Comp. A Disable Input Buffer of Port Register .6 */ +#define CAPD7 (0x80) /* Comp. A Disable Input Buffer of Port Register .7 */ + +/************************************************************ +* DAC12 +************************************************************/ +#define __MSP430_HAS_DAC12_2__ /* Definition to show that Module is available */ + +sfr_w(DAC12_0CTL); /* DAC12_0 Control */ +sfr_w(DAC12_1CTL); /* DAC12_1 Control */ + +#define DAC12GRP (0x0001) /* DAC12 group */ +#define DAC12ENC (0x0002) /* DAC12 enable conversion */ +#define DAC12IFG (0x0004) /* DAC12 interrupt flag */ +#define DAC12IE (0x0008) /* DAC12 interrupt enable */ +#define DAC12DF (0x0010) /* DAC12 data format */ +#define DAC12AMP0 (0x0020) /* DAC12 amplifier bit 0 */ +#define DAC12AMP1 (0x0040) /* DAC12 amplifier bit 1 */ +#define DAC12AMP2 (0x0080) /* DAC12 amplifier bit 2 */ +#define DAC12IR (0x0100) /* DAC12 input reference and output range */ +#define DAC12CALON (0x0200) /* DAC12 calibration */ +#define DAC12LSEL0 (0x0400) /* DAC12 load select bit 0 */ +#define DAC12LSEL1 (0x0800) /* DAC12 load select bit 1 */ +#define DAC12RES (0x1000) /* DAC12 resolution */ +#define DAC12SREF0 (0x2000) /* DAC12 reference bit 0 */ +#define DAC12SREF1 (0x4000) /* DAC12 reference bit 1 */ +#define DAC12OPS (0x8000) /* DAC12 Operation Amp. */ + +#define DAC12AMP_0 (0x0000) /* DAC12 amplifier 0: off, 3-state */ +#define DAC12AMP_1 (0x0020) /* DAC12 amplifier 1: off, off */ +#define DAC12AMP_2 (0x0040) /* DAC12 amplifier 2: low, low */ +#define DAC12AMP_3 (0x0060) /* DAC12 amplifier 3: low, medium */ +#define DAC12AMP_4 (0x0080) /* DAC12 amplifier 4: low, high */ +#define DAC12AMP_5 (0x00A0) /* DAC12 amplifier 5: medium, medium */ +#define DAC12AMP_6 (0x00C0) /* DAC12 amplifier 6: medium, high */ +#define DAC12AMP_7 (0x00E0) /* DAC12 amplifier 7: high, high */ + +#define DAC12LSEL_0 (0x0000) /* DAC12 load select 0: direct */ +#define DAC12LSEL_1 (0x0400) /* DAC12 load select 1: latched with DAT */ +#define DAC12LSEL_2 (0x0800) /* DAC12 load select 2: latched with pos. Timer_A3.OUT1 */ +#define DAC12LSEL_3 (0x0C00) /* DAC12 load select 3: latched with pos. Timer_B7.OUT1 */ + +#define DAC12SREF_0 (0x0000) /* DAC12 reference 0: Vref+ */ +#define DAC12SREF_1 (0x2000) /* DAC12 reference 1: Vref+ */ +#define DAC12SREF_2 (0x4000) /* DAC12 reference 2: Veref+ */ +#define DAC12SREF_3 (0x6000) /* DAC12 reference 3: Veref+ */ + +sfr_w(DAC12_0DAT); /* DAC12_0 Data */ +sfr_w(DAC12_1DAT); /* DAC12_1 Data */ +/************************************************************ +* DMA_X +************************************************************/ +#define __MSP430_HAS_DMAX_3__ /* Definition to show that Module is available */ + +sfr_w(DMACTL0); /* DMA Module Control 0 */ +#define DMA0TSEL0 (0x0001) /* DMA channel 0 transfer select bit 0 */ +#define DMA0TSEL1 (0x0002) /* DMA channel 0 transfer select bit 1 */ +#define DMA0TSEL2 (0x0004) /* DMA channel 0 transfer select bit 2 */ +#define DMA0TSEL3 (0x0008) /* DMA channel 0 transfer select bit 3 */ +#define DMA1TSEL0 (0x0010) /* DMA channel 1 transfer select bit 0 */ +#define DMA1TSEL1 (0x0020) /* DMA channel 1 transfer select bit 1 */ +#define DMA1TSEL2 (0x0040) /* DMA channel 1 transfer select bit 2 */ +#define DMA1TSEL3 (0x0080) /* DMA channel 1 transfer select bit 3 */ +#define DMA2TSEL0 (0x0100) /* DMA channel 2 transfer select bit 0 */ +#define DMA2TSEL1 (0x0200) /* DMA channel 2 transfer select bit 1 */ +#define DMA2TSEL2 (0x0400) /* DMA channel 2 transfer select bit 2 */ +#define DMA2TSEL3 (0x0800) /* DMA channel 2 transfer select bit 3 */ + +#define DMA0TSEL_0 (0x0000) /* DMA channel 0 transfer select 0: DMA_REQ (sw)*/ +#define DMA0TSEL_1 (0x0001) /* DMA channel 0 transfer select 1: Timer_A (TACCR2.IFG) */ +#define DMA0TSEL_2 (0x0002) /* DMA channel 0 transfer select 2: Timer_B (TBCCR2.IFG) */ +#define DMA0TSEL_3 (0x0003) /* DMA channel 0 transfer select 3: USCIA0 receive */ +#define DMA0TSEL_4 (0x0004) /* DMA channel 0 transfer select 4: USCIA0 transmit */ +#define DMA0TSEL_5 (0x0005) /* DMA channel 0 transfer select 5: DAC12_0CTL.DAC12IFG */ +#define DMA0TSEL_6 (0x0006) /* DMA channel 0 transfer select 6: ADC12 (ADC12IFG) */ +#define DMA0TSEL_7 (0x0007) /* DMA channel 0 transfer select 7: Timer_A (TACCR0.IFG) */ +#define DMA0TSEL_8 (0x0008) /* DMA channel 0 transfer select 8: Timer_B (TBCCR0.IFG) */ +#define DMA0TSEL_9 (0x0009) /* DMA channel 0 transfer select 9: USCIA1 receive */ +#define DMA0TSEL_10 (0x000A) /* DMA channel 0 transfer select 10: USCIA1 transmit */ +#define DMA0TSEL_11 (0x000B) /* DMA channel 0 transfer select 11: Multiplier ready */ +#define DMA0TSEL_12 (0x000C) /* DMA channel 0 transfer select 12: USCIB0 receive */ +#define DMA0TSEL_13 (0x000D) /* DMA channel 0 transfer select 13: USCIB0 transmit */ +#define DMA0TSEL_14 (0x000E) /* DMA channel 0 transfer select 14: previous DMA channel DMA2IFG */ +#define DMA0TSEL_15 (0x000F) /* DMA channel 0 transfer select 15: ext. Trigger (DMAE0) */ + +#define DMA1TSEL_0 (0x0000) /* DMA channel 1 transfer select 0: DMA_REQ */ +#define DMA1TSEL_1 (0x0010) /* DMA channel 1 transfer select 1: Timer_A CCRIFG.2 */ +#define DMA1TSEL_2 (0x0020) /* DMA channel 1 transfer select 2: Timer_B CCRIFG.2 */ +#define DMA1TSEL_3 (0x0030) /* DMA channel 1 transfer select 3: USCIA0 receive */ +#define DMA1TSEL_4 (0x0040) /* DMA channel 1 transfer select 4: USCIA0 transmit */ +#define DMA1TSEL_5 (0x0050) /* DMA channel 1 transfer select 5: DAC12.0IFG */ +#define DMA1TSEL_6 (0x0060) /* DMA channel 1 transfer select 6: ADC12 (ADC12IFG) */ +#define DMA1TSEL_7 (0x0070) /* DMA channel 1 transfer select 7: Timer_A (TACCR0.IFG) */ +#define DMA1TSEL_8 (0x0080) /* DMA channel 1 transfer select 8: Timer_B (TBCCR0.IFG) */ +#define DMA1TSEL_9 (0x0090) /* DMA channel 1 transfer select 9: USCIA1 receive */ +#define DMA1TSEL_10 (0x00A0) /* DMA channel 1 transfer select 10: USCIA1 transmit */ +#define DMA1TSEL_11 (0x00B0) /* DMA channel 1 transfer select 11: Multiplier ready */ +#define DMA1TSEL_12 (0x00C0) /* DMA channel 1 transfer select 12: USCIB0 receive */ +#define DMA1TSEL_13 (0x00D0) /* DMA channel 1 transfer select 13: USCIB0 transmit */ +#define DMA1TSEL_14 (0x00E0) /* DMA channel 1 transfer select 14: previous DMA channel DMA0IFG */ +#define DMA1TSEL_15 (0x00F0) /* DMA channel 1 transfer select 15: ext. Trigger (DMAE0) */ + +#define DMA2TSEL_0 (0x0000) /* DMA channel 2 transfer select 0: DMA_REQ */ +#define DMA2TSEL_1 (0x0100) /* DMA channel 2 transfer select 1: Timer_A CCRIFG.2 */ +#define DMA2TSEL_2 (0x0200) /* DMA channel 2 transfer select 2: Timer_B CCRIFG.2 */ +#define DMA2TSEL_3 (0x0300) /* DMA channel 2 transfer select 3: USCIA0 receive */ +#define DMA2TSEL_4 (0x0400) /* DMA channel 2 transfer select 4: USCIA0 transmit */ +#define DMA2TSEL_5 (0x0500) /* DMA channel 2 transfer select 5: DAC12.0IFG */ +#define DMA2TSEL_6 (0x0600) /* DMA channel 2 transfer select 6: ADC12 (ADC12IFG) */ +#define DMA2TSEL_7 (0x0700) /* DMA channel 2 transfer select 7: Timer_A (TACCR0.IFG) */ +#define DMA2TSEL_8 (0x0800) /* DMA channel 2 transfer select 8: Timer_B (TBCCR0.IFG) */ +#define DMA2TSEL_9 (0x0900) /* DMA channel 2 transfer select 9: USCIA1 receive */ +#define DMA2TSEL_10 (0x0A00) /* DMA channel 2 transfer select 10: USCIA1 transmit */ +#define DMA2TSEL_11 (0x0B00) /* DMA channel 2 transfer select 11: Multiplier ready */ +#define DMA2TSEL_12 (0x0C00) /* DMA channel 2 transfer select 12: USCIB0 receive */ +#define DMA2TSEL_13 (0x0D00) /* DMA channel 2 transfer select 13: USCIB0 transmit */ +#define DMA2TSEL_14 (0x0E00) /* DMA channel 2 transfer select 14: previous DMA channel DMA1IFG */ +#define DMA2TSEL_15 (0x0F00) /* DMA channel 2 transfer select 15: ext. Trigger (DMAE0) */ + +sfr_w(DMACTL1); /* DMA Module Control 1 */ +#define ENNMI (0x0001) /* Enable NMI interruption of DMA */ +#define ROUNDROBIN (0x0002) /* Round-Robin DMA channel priorities */ +#define DMAONFETCH (0x0004) /* DMA transfer on instruction fetch */ + +sfr_w(DMAIV); /* DMA Interrupt Vector Word */ +sfr_w(DMA0CTL); /* DMA Channel 0 Control */ +sfr_w(DMA1CTL); /* DMA Channel 1 Control */ +sfr_w(DMA2CTL); /* DMA Channel 2 Control */ + +#define DMAREQ (0x0001) /* Initiate DMA transfer with DMATSEL */ +#define DMAABORT (0x0002) /* DMA transfer aborted by NMI */ +#define DMAIE (0x0004) /* DMA interrupt enable */ +#define DMAIFG (0x0008) /* DMA interrupt flag */ +#define DMAEN (0x0010) /* DMA enable */ +#define DMALEVEL (0x0020) /* DMA level sensitive trigger select */ +#define DMASRCBYTE (0x0040) /* DMA source byte */ +#define DMADSTBYTE (0x0080) /* DMA destination byte */ +#define DMASRCINCR0 (0x0100) /* DMA source increment bit 0 */ +#define DMASRCINCR1 (0x0200) /* DMA source increment bit 1 */ +#define DMADSTINCR0 (0x0400) /* DMA destination increment bit 0 */ +#define DMADSTINCR1 (0x0800) /* DMA destination increment bit 1 */ +#define DMADT0 (0x1000) /* DMA transfer mode bit 0 */ +#define DMADT1 (0x2000) /* DMA transfer mode bit 1 */ +#define DMADT2 (0x4000) /* DMA transfer mode bit 2 */ + +#define DMASWDW (0x0000) /* DMA transfer: source word to destination word */ +#define DMASBDW (0x0040) /* DMA transfer: source byte to destination word */ +#define DMASWDB (0x0080) /* DMA transfer: source word to destination byte */ +#define DMASBDB (0x00C0) /* DMA transfer: source byte to destination byte */ + +#define DMASRCINCR_0 (0x0000) /* DMA source increment 0: source address unchanged */ +#define DMASRCINCR_1 (0x0100) /* DMA source increment 1: source address unchanged */ +#define DMASRCINCR_2 (0x0200) /* DMA source increment 2: source address decremented */ +#define DMASRCINCR_3 (0x0300) /* DMA source increment 3: source address incremented */ + +#define DMADSTINCR_0 (0x0000) /* DMA destination increment 0: destination address unchanged */ +#define DMADSTINCR_1 (0x0400) /* DMA destination increment 1: destination address unchanged */ +#define DMADSTINCR_2 (0x0800) /* DMA destination increment 2: destination address decremented */ +#define DMADSTINCR_3 (0x0C00) /* DMA destination increment 3: destination address incremented */ + +#define DMADT_0 (0x0000) /* DMA transfer mode 0: single */ +#define DMADT_1 (0x1000) /* DMA transfer mode 1: block */ +#define DMADT_2 (0x2000) /* DMA transfer mode 2: interleaved */ +#define DMADT_3 (0x3000) /* DMA transfer mode 3: interleaved */ +#define DMADT_4 (0x4000) /* DMA transfer mode 4: single, repeat */ +#define DMADT_5 (0x5000) /* DMA transfer mode 5: block, repeat */ +#define DMADT_6 (0x6000) /* DMA transfer mode 6: interleaved, repeat */ +#define DMADT_7 (0x7000) /* DMA transfer mode 7: interleaved, repeat */ + +sfr_l(DMA0SA); /* DMA Channel 0 Source Address */ +sfr_w(DMA0SAL); /* DMA Channel 0 Source Address */ +sfr_l(DMA0DA); /* DMA Channel 0 Destination Address */ +sfr_w(DMA0DAL); /* DMA Channel 0 Destination Address */ +sfr_w(DMA0SZ); /* DMA Channel 0 Transfer Size */ +sfr_l(DMA1SA); /* DMA Channel 1 Source Address */ +sfr_w(DMA1SAL); /* DMA Channel 1 Source Address */ +sfr_l(DMA1DA); /* DMA Channel 1 Destination Address */ +sfr_w(DMA1DAL); /* DMA Channel 1 Destination Address */ +sfr_w(DMA1SZ); /* DMA Channel 1 Transfer Size */ +sfr_l(DMA2SA); /* DMA Channel 2 Source Address */ +sfr_w(DMA2SAL); /* DMA Channel 2 Source Address */ +sfr_l(DMA2DA); /* DMA Channel 2 Destination Address */ +sfr_w(DMA2DAL); /* DMA Channel 2 Destination Address */ +sfr_w(DMA2SZ); /* DMA Channel 2 Transfer Size */ + +/* DMAIV Definitions */ +#define DMAIV_NONE (0x0000) /* No Interrupt pending */ +#define DMAIV_DMA0IFG (0x0002) /* DMA0IFG */ +#define DMAIV_DMA1IFG (0x0004) /* DMA1IFG */ +#define DMAIV_DMA2IFG (0x0006) /* DMA2IFG */ + +/************************************************************* +* Flash Memory +*************************************************************/ +#define __MSP430_HAS_FLASH2__ /* Definition to show that Module is available */ + +sfr_w(FCTL1); /* FLASH Control 1 */ +sfr_w(FCTL2); /* FLASH Control 2 */ +sfr_w(FCTL3); /* FLASH Control 3 */ +sfr_w(FCTL4); /* FLASH Control 4 */ + +#define FRKEY (0x9600) /* Flash key returned by read */ +#define FWKEY (0xA500) /* Flash key for write */ +#define FXKEY (0x3300) /* for use with XOR instruction */ + +#define ERASE (0x0002) /* Enable bit for Flash segment erase */ +#define MERAS (0x0004) /* Enable bit for Flash mass erase */ +#define EEI (0x0008) /* Enable Erase Interrupts */ +#define EEIEX (0x0010) /* Enable Emergency Interrupt Exit */ +#define WRT (0x0040) /* Enable bit for Flash write */ +#define BLKWRT (0x0080) /* Enable bit for Flash segment write */ +#define SEGWRT (0x0080) /* old definition */ /* Enable bit for Flash segment write */ + +#define FN0 (0x0001) /* Divide Flash clock by 1 to 64 using FN0 to FN5 according to: */ +#define FN1 (0x0002) /* 32*FN5 + 16*FN4 + 8*FN3 + 4*FN2 + 2*FN1 + FN0 + 1 */ +#ifndef FN2 +#define FN2 (0x0004) +#endif +#ifndef FN3 +#define FN3 (0x0008) +#endif +#ifndef FN4 +#define FN4 (0x0010) +#endif +#define FN5 (0x0020) +#define FSSEL0 (0x0040) /* Flash clock select 0 */ /* to distinguish from USART SSELx */ +#define FSSEL1 (0x0080) /* Flash clock select 1 */ + +#define FSSEL_0 (0x0000) /* Flash clock select: 0 - ACLK */ +#define FSSEL_1 (0x0040) /* Flash clock select: 1 - MCLK */ +#define FSSEL_2 (0x0080) /* Flash clock select: 2 - SMCLK */ +#define FSSEL_3 (0x00C0) /* Flash clock select: 3 - SMCLK */ + +#define BUSY (0x0001) /* Flash busy: 1 */ +#define KEYV (0x0002) /* Flash Key violation flag */ +#define ACCVIFG (0x0004) /* Flash Access violation flag */ +#define WAIT (0x0008) /* Wait flag for segment write */ +#define LOCK (0x0010) /* Lock bit: 1 - Flash is locked (read only) */ +#define EMEX (0x0020) /* Flash Emergency Exit */ +#define LOCKA (0x0040) /* Segment A Lock bit: read = 1 - Segment is locked (read only) */ +#define FAIL (0x0080) /* Last Program or Erase failed */ + +#define MGR0 (0x0010) /* Marginal read 0 mode. */ +#define MGR1 (0x0020) /* Marginal read 1 mode. */ + +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +#define __MSP430_HAS_MPY__ /* Definition to show that Module is available */ + +sfr_w(MPY); /* Multiply Unsigned/Operand 1 */ +sfr_w(MPYS); /* Multiply Signed/Operand 1 */ +sfr_w(MAC); /* Multiply Unsigned and Accumulate/Operand 1 */ +sfr_w(MACS); /* Multiply Signed and Accumulate/Operand 1 */ +sfr_w(OP2); /* Operand 2 */ +sfr_w(RESLO); /* Result Low Word */ +sfr_w(RESHI); /* Result High Word */ +sfr_w(SUMEXT); /* Sum Extend */ + +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +#define __MSP430_HAS_PORT1_R__ /* Definition to show that Module is available */ +#define __MSP430_HAS_PORT2_R__ /* Definition to show that Module is available */ + +#define __MSP430_HAS_P1SEL__ /* Define for DriverLib */ +#define __MSP430_HAS_P2SEL__ /* Define for DriverLib */ + +sfr_b(P1IN); /* Port 1 Input */ +sfr_b(P1OUT); /* Port 1 Output */ +sfr_b(P1DIR); /* Port 1 Direction */ +sfr_b(P1IFG); /* Port 1 Interrupt Flag */ +sfr_b(P1IES); /* Port 1 Interrupt Edge Select */ +sfr_b(P1IE); /* Port 1 Interrupt Enable */ +sfr_b(P1SEL); /* Port 1 Selection */ +sfr_b(P1REN); /* Port 1 Resistor Enable */ + +sfr_b(P2IN); /* Port 2 Input */ +sfr_b(P2OUT); /* Port 2 Output */ +sfr_b(P2DIR); /* Port 2 Direction */ +sfr_b(P2IFG); /* Port 2 Interrupt Flag */ +sfr_b(P2IES); /* Port 2 Interrupt Edge Select */ +sfr_b(P2IE); /* Port 2 Interrupt Enable */ +sfr_b(P2SEL); /* Port 2 Selection */ +sfr_b(P2REN); /* Port 2 Resistor Enable */ + +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +#define __MSP430_HAS_PORT3_R__ /* Definition to show that Module is available */ +#define __MSP430_HAS_PORT4_R__ /* Definition to show that Module is available */ + +#define __MSP430_HAS_P3SEL__ /* Define for DriverLib */ +#define __MSP430_HAS_P4SEL__ /* Define for DriverLib */ + +sfr_b(P3IN); /* Port 3 Input */ +sfr_b(P3OUT); /* Port 3 Output */ +sfr_b(P3DIR); /* Port 3 Direction */ +sfr_b(P3SEL); /* Port 3 Selection */ +sfr_b(P3REN); /* Port 3 Resistor Enable */ + +sfr_b(P4IN); /* Port 4 Input */ +sfr_b(P4OUT); /* Port 4 Output */ +sfr_b(P4DIR); /* Port 4 Direction */ +sfr_b(P4SEL); /* Port 4 Selection */ +sfr_b(P4REN); /* Port 4 Resistor Enable */ + +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +#define __MSP430_HAS_PORT5_R__ /* Definition to show that Module is available */ +#define __MSP430_HAS_PORT6_R__ /* Definition to show that Module is available */ + +#define __MSP430_HAS_P5SEL__ /* Define for DriverLib */ +#define __MSP430_HAS_P6SEL__ /* Define for DriverLib */ + +sfr_b(P5IN); /* Port 5 Input */ +sfr_b(P5OUT); /* Port 5 Output */ +sfr_b(P5DIR); /* Port 5 Direction */ +sfr_b(P5SEL); /* Port 5 Selection */ +sfr_b(P5REN); /* Port 5 Resistor Enable */ + +sfr_b(P6IN); /* Port 6 Input */ +sfr_b(P6OUT); /* Port 6 Output */ +sfr_b(P6DIR); /* Port 6 Direction */ +sfr_b(P6SEL); /* Port 6 Selection */ +sfr_b(P6REN); /* Port 6 Resistor Enable */ + +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +#define __MSP430_HAS_PORT7_R__ /* Definition to show that Module is available */ +#define __MSP430_HAS_PORT8_R__ /* Definition to show that Module is available */ +#define __MSP430_HAS_PORTA_R__ /* Definition to show that Module is available */ + +#define __MSP430_HAS_P7SEL__ /* Define for DriverLib */ +#define __MSP430_HAS_P8SEL__ /* Define for DriverLib */ +#define __MSP430_HAS_PASEL__ /* Define for DriverLib */ + +sfr_b(P7IN); /* Port 7 Input */ +sfr_b(P7OUT); /* Port 7 Output */ +sfr_b(P7DIR); /* Port 7 Direction */ +sfr_b(P7SEL); /* Port 7 Selection */ +sfr_b(P7REN); /* Port 7 Resistor Enable */ + +sfr_b(P8IN); /* Port 8 Input */ +sfr_b(P8OUT); /* Port 8 Output */ +sfr_b(P8DIR); /* Port 8 Direction */ +sfr_b(P8SEL); /* Port 8 Selection */ +sfr_b(P8REN); /* Port 8 Resistor Enable */ + +sfr_w(PAIN); /* Port A Input */ +sfr_w(PAOUT); /* Port A Output */ +sfr_w(PADIR); /* Port A Direction */ +sfr_w(PASEL); /* Port A Selection */ +sfr_w(PAREN); /* Port A Resistor Enable */ + +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +#define __MSP430_HAS_SVS__ /* Definition to show that Module is available */ + +sfr_b(SVSCTL); /* SVS Control */ +#define SVSFG (0x01) /* SVS Flag */ +#define SVSOP (0x02) /* SVS output (read only) */ +#define SVSON (0x04) /* Switches the SVS on/off */ +#define PORON (0x08) /* Enable POR Generation if Low Voltage */ +#define VLD0 (0x10) +#define VLD1 (0x20) +#define VLD2 (0x40) +#define VLD3 (0x80) + +#define VLDON (0x10) +#define VLDOFF (0x00) +#define VLD_1_8V (0x10) + +/************************************************************ +* Timer A3 +************************************************************/ +#define __MSP430_HAS_TA3__ /* Definition to show that Module is available */ + +sfr_w(TAIV); /* Timer A Interrupt Vector Word */ +sfr_w(TACTL); /* Timer A Control */ +sfr_w(TACCTL0); /* Timer A Capture/Compare Control 0 */ +sfr_w(TACCTL1); /* Timer A Capture/Compare Control 1 */ +sfr_w(TACCTL2); /* Timer A Capture/Compare Control 2 */ +sfr_w(TAR); /* Timer A Counter Register */ +sfr_w(TACCR0); /* Timer A Capture/Compare 0 */ +sfr_w(TACCR1); /* Timer A Capture/Compare 1 */ +sfr_w(TACCR2); /* Timer A Capture/Compare 2 */ + +/* Alternate register names */ +#define CCTL0 TACCTL0 /* Timer A Capture/Compare Control 0 */ +#define CCTL1 TACCTL1 /* Timer A Capture/Compare Control 1 */ +#define CCTL2 TACCTL2 /* Timer A Capture/Compare Control 2 */ +#define CCR0 TACCR0 /* Timer A Capture/Compare 0 */ +#define CCR1 TACCR1 /* Timer A Capture/Compare 1 */ +#define CCR2 TACCR2 /* Timer A Capture/Compare 2 */ +#define CCTL0_ TACCTL0_ /* Timer A Capture/Compare Control 0 */ +#define CCTL1_ TACCTL1_ /* Timer A Capture/Compare Control 1 */ +#define CCTL2_ TACCTL2_ /* Timer A Capture/Compare Control 2 */ +#define CCR0_ TACCR0_ /* Timer A Capture/Compare 0 */ +#define CCR1_ TACCR1_ /* Timer A Capture/Compare 1 */ +#define CCR2_ TACCR2_ /* Timer A Capture/Compare 2 */ +/* Alternate register names - 5xx style */ +#define TA0IV TAIV /* Timer A Interrupt Vector Word */ +#define TA0CTL TACTL /* Timer A Control */ +#define TA0CCTL0 TACCTL0 /* Timer A Capture/Compare Control 0 */ +#define TA0CCTL1 TACCTL1 /* Timer A Capture/Compare Control 1 */ +#define TA0CCTL2 TACCTL2 /* Timer A Capture/Compare Control 2 */ +#define TA0R TAR /* Timer A Counter Register */ +#define TA0CCR0 TACCR0 /* Timer A Capture/Compare 0 */ +#define TA0CCR1 TACCR1 /* Timer A Capture/Compare 1 */ +#define TA0CCR2 TACCR2 /* Timer A Capture/Compare 2 */ +#define TA0IV_ TAIV_ /* Timer A Interrupt Vector Word */ +#define TA0CTL_ TACTL_ /* Timer A Control */ +#define TA0CCTL0_ TACCTL0_ /* Timer A Capture/Compare Control 0 */ +#define TA0CCTL1_ TACCTL1_ /* Timer A Capture/Compare Control 1 */ +#define TA0CCTL2_ TACCTL2_ /* Timer A Capture/Compare Control 2 */ +#define TA0R_ TAR_ /* Timer A Counter Register */ +#define TA0CCR0_ TACCR0_ /* Timer A Capture/Compare 0 */ +#define TA0CCR1_ TACCR1_ /* Timer A Capture/Compare 1 */ +#define TA0CCR2_ TACCR2_ /* Timer A Capture/Compare 2 */ +#define TIMER0_A1_VECTOR TIMERA1_VECTOR /* Int. Vector: Timer A CC1-2, TA */ +#define TIMER0_A0_VECTOR TIMERA0_VECTOR /* Int. Vector: Timer A CC0 */ + +#define TASSEL1 (0x0200) /* Timer A clock source select 1 */ +#define TASSEL0 (0x0100) /* Timer A clock source select 0 */ +#define ID1 (0x0080) /* Timer A clock input divider 1 */ +#define ID0 (0x0040) /* Timer A clock input divider 0 */ +#define MC1 (0x0020) /* Timer A mode control 1 */ +#define MC0 (0x0010) /* Timer A mode control 0 */ +#define TACLR (0x0004) /* Timer A counter clear */ +#define TAIE (0x0002) /* Timer A counter interrupt enable */ +#define TAIFG (0x0001) /* Timer A counter interrupt flag */ + +#define MC_0 (0x0000) /* Timer A mode control: 0 - Stop */ +#define MC_1 (0x0010) /* Timer A mode control: 1 - Up to CCR0 */ +#define MC_2 (0x0020) /* Timer A mode control: 2 - Continous up */ +#define MC_3 (0x0030) /* Timer A mode control: 3 - Up/Down */ +#define ID_0 (0x0000) /* Timer A input divider: 0 - /1 */ +#define ID_1 (0x0040) /* Timer A input divider: 1 - /2 */ +#define ID_2 (0x0080) /* Timer A input divider: 2 - /4 */ +#define ID_3 (0x00C0) /* Timer A input divider: 3 - /8 */ +#define TASSEL_0 (0x0000) /* Timer A clock source select: 0 - TACLK */ +#define TASSEL_1 (0x0100) /* Timer A clock source select: 1 - ACLK */ +#define TASSEL_2 (0x0200) /* Timer A clock source select: 2 - SMCLK */ +#define TASSEL_3 (0x0300) /* Timer A clock source select: 3 - INCLK */ + +#define CM1 (0x8000) /* Capture mode 1 */ +#define CM0 (0x4000) /* Capture mode 0 */ +#define CCIS1 (0x2000) /* Capture input select 1 */ +#define CCIS0 (0x1000) /* Capture input select 0 */ +#define SCS (0x0800) /* Capture sychronize */ +#define SCCI (0x0400) /* Latched capture signal (read) */ +#define CAP (0x0100) /* Capture mode: 1 /Compare mode : 0 */ +#define OUTMOD2 (0x0080) /* Output mode 2 */ +#define OUTMOD1 (0x0040) /* Output mode 1 */ +#define OUTMOD0 (0x0020) /* Output mode 0 */ +#define CCIE (0x0010) /* Capture/compare interrupt enable */ +#define CCI (0x0008) /* Capture input signal (read) */ +#define OUT (0x0004) /* PWM Output signal if output mode 0 */ +#define COV (0x0002) /* Capture/compare overflow flag */ +#define CCIFG (0x0001) /* Capture/compare interrupt flag */ + +#define OUTMOD_0 (0x0000) /* PWM output mode: 0 - output only */ +#define OUTMOD_1 (0x0020) /* PWM output mode: 1 - set */ +#define OUTMOD_2 (0x0040) /* PWM output mode: 2 - PWM toggle/reset */ +#define OUTMOD_3 (0x0060) /* PWM output mode: 3 - PWM set/reset */ +#define OUTMOD_4 (0x0080) /* PWM output mode: 4 - toggle */ +#define OUTMOD_5 (0x00A0) /* PWM output mode: 5 - Reset */ +#define OUTMOD_6 (0x00C0) /* PWM output mode: 6 - PWM toggle/set */ +#define OUTMOD_7 (0x00E0) /* PWM output mode: 7 - PWM reset/set */ +#define CCIS_0 (0x0000) /* Capture input select: 0 - CCIxA */ +#define CCIS_1 (0x1000) /* Capture input select: 1 - CCIxB */ +#define CCIS_2 (0x2000) /* Capture input select: 2 - GND */ +#define CCIS_3 (0x3000) /* Capture input select: 3 - Vcc */ +#define CM_0 (0x0000) /* Capture mode: 0 - disabled */ +#define CM_1 (0x4000) /* Capture mode: 1 - pos. edge */ +#define CM_2 (0x8000) /* Capture mode: 1 - neg. edge */ +#define CM_3 (0xC000) /* Capture mode: 1 - both edges */ + +/* TA3IV Definitions */ +#define TAIV_NONE (0x0000) /* No Interrupt pending */ +#define TAIV_TACCR1 (0x0002) /* TACCR1_CCIFG */ +#define TAIV_TACCR2 (0x0004) /* TACCR2_CCIFG */ +#define TAIV_6 (0x0006) /* Reserved */ +#define TAIV_8 (0x0008) /* Reserved */ +#define TAIV_TAIFG (0x000A) /* TAIFG */ + +/* Alternate register names - 5xx style */ +#define TA0IV_NONE (0x0000) /* No Interrupt pending */ +#define TA0IV_TACCR1 (0x0002) /* TA0CCR1_CCIFG */ +#define TA0IV_TACCR2 (0x0004) /* TA0CCR2_CCIFG */ +#define TA0IV_6 (0x0006) /* Reserved */ +#define TA0IV_8 (0x0008) /* Reserved */ +#define TA0IV_TAIFG (0x000A) /* TA0IFG */ + +/************************************************************ +* Timer B7 +************************************************************/ +#define __MSP430_HAS_TB7__ /* Definition to show that Module is available */ + +sfr_w(TBIV); /* Timer B Interrupt Vector Word */ +sfr_w(TBCTL); /* Timer B Control */ +sfr_w(TBCCTL0); /* Timer B Capture/Compare Control 0 */ +sfr_w(TBCCTL1); /* Timer B Capture/Compare Control 1 */ +sfr_w(TBCCTL2); /* Timer B Capture/Compare Control 2 */ +sfr_w(TBCCTL3); /* Timer B Capture/Compare Control 3 */ +sfr_w(TBCCTL4); /* Timer B Capture/Compare Control 4 */ +sfr_w(TBCCTL5); /* Timer B Capture/Compare Control 5 */ +sfr_w(TBCCTL6); /* Timer B Capture/Compare Control 6 */ +sfr_w(TBR); /* Timer B Counter Register */ +sfr_w(TBCCR0); /* Timer B Capture/Compare 0 */ +sfr_w(TBCCR1); /* Timer B Capture/Compare 1 */ +sfr_w(TBCCR2); /* Timer B Capture/Compare 2 */ +sfr_w(TBCCR3); /* Timer B Capture/Compare 3 */ +sfr_w(TBCCR4); /* Timer B Capture/Compare 4 */ +sfr_w(TBCCR5); /* Timer B Capture/Compare 5 */ +sfr_w(TBCCR6); /* Timer B Capture/Compare 6 */ + +/* Alternate register names - 5xx style */ +#define TB0IV TBIV /* Timer B Interrupt Vector Word */ +#define TB0CTL TBCTL /* Timer B Control */ +#define TB0CCTL0 TBCCTL0 /* Timer B Capture/Compare Control 0 */ +#define TB0CCTL1 TBCCTL1 /* Timer B Capture/Compare Control 1 */ +#define TB0CCTL2 TBCCTL2 /* Timer B Capture/Compare Control 2 */ +#define TB0CCTL3 TBCCTL3 /* Timer B Capture/Compare Control 3 */ +#define TB0CCTL4 TBCCTL4 /* Timer B Capture/Compare Control 4 */ +#define TB0CCTL5 TBCCTL5 /* Timer B Capture/Compare Control 5 */ +#define TB0CCTL6 TBCCTL6 /* Timer B Capture/Compare Control 6 */ +#define TB0R TBR /* Timer B Counter Register */ +#define TB0CCR0 TBCCR0 /* Timer B Capture/Compare 0 */ +#define TB0CCR1 TBCCR1 /* Timer B Capture/Compare 1 */ +#define TB0CCR2 TBCCR2 /* Timer B Capture/Compare 2 */ +#define TB0CCR3 TBCCR3 /* Timer B Capture/Compare 3 */ +#define TB0CCR4 TBCCR4 /* Timer B Capture/Compare 4 */ +#define TB0CCR5 TBCCR5 /* Timer B Capture/Compare 5 */ +#define TB0CCR6 TBCCR6 /* Timer B Capture/Compare 6 */ +#define TB0IV_ TBIV_ /* Timer B Interrupt Vector Word */ +#define TB0CTL_ TBCTL_ /* Timer B Control */ +#define TB0CCTL0_ TBCCTL0_ /* Timer B Capture/Compare Control 0 */ +#define TB0CCTL1_ TBCCTL1_ /* Timer B Capture/Compare Control 1 */ +#define TB0CCTL2_ TBCCTL2_ /* Timer B Capture/Compare Control 2 */ +#define TB0CCTL3_ TBCCTL3_ /* Timer B Capture/Compare Control 3 */ +#define TB0CCTL4_ TBCCTL4_ /* Timer B Capture/Compare Control 4 */ +#define TB0CCTL5_ TBCCTL5_ /* Timer B Capture/Compare Control 5 */ +#define TB0CCTL6_ TBCCTL6_ /* Timer B Capture/Compare Control 6 */ +#define TB0R_ TBR_ /* Timer B Counter Register */ +#define TB0CCR0_ TBCCR0_ /* Timer B Capture/Compare 0 */ +#define TB0CCR1_ TBCCR1_ /* Timer B Capture/Compare 1 */ +#define TB0CCR2_ TBCCR2_ /* Timer B Capture/Compare 2 */ +#define TB0CCR3_ TBCCR3_ /* Timer B Capture/Compare 3 */ +#define TB0CCR4_ TBCCR4_ /* Timer B Capture/Compare 4 */ +#define TB0CCR5_ TBCCR5_ /* Timer B Capture/Compare 5 */ +#define TB0CCR6_ TBCCR6_ /* Timer B Capture/Compare 6 */ +#define TIMER0_B1_VECTOR TIMERB1_VECTOR /* Int. Vector: Timer B CC1-6, TB */ +#define TIMER0_B0_VECTOR TIMERB0_VECTOR /* Int. Vector: Timer B CC0 */ + +#define TBCLGRP1 (0x4000) /* Timer B Compare latch load group 1 */ +#define TBCLGRP0 (0x2000) /* Timer B Compare latch load group 0 */ +#define CNTL1 (0x1000) /* Counter lenght 1 */ +#define CNTL0 (0x0800) /* Counter lenght 0 */ +#define TBSSEL1 (0x0200) /* Clock source 1 */ +#define TBSSEL0 (0x0100) /* Clock source 0 */ +#define TBCLR (0x0004) /* Timer B counter clear */ +#define TBIE (0x0002) /* Timer B interrupt enable */ +#define TBIFG (0x0001) /* Timer B interrupt flag */ + +#define SHR1 (0x4000) /* Timer B Compare latch load group 1 */ +#define SHR0 (0x2000) /* Timer B Compare latch load group 0 */ + +#define TBSSEL_0 (0x0000) /* Clock Source: TBCLK */ +#define TBSSEL_1 (0x0100) /* Clock Source: ACLK */ +#define TBSSEL_2 (0x0200) /* Clock Source: SMCLK */ +#define TBSSEL_3 (0x0300) /* Clock Source: INCLK */ +#define CNTL_0 (0x0000) /* Counter lenght: 16 bit */ +#define CNTL_1 (0x0800) /* Counter lenght: 12 bit */ +#define CNTL_2 (0x1000) /* Counter lenght: 10 bit */ +#define CNTL_3 (0x1800) /* Counter lenght: 8 bit */ +#define SHR_0 (0x0000) /* Timer B Group: 0 - individually */ +#define SHR_1 (0x2000) /* Timer B Group: 1 - 3 groups (1-2, 3-4, 5-6) */ +#define SHR_2 (0x4000) /* Timer B Group: 2 - 2 groups (1-3, 4-6)*/ +#define SHR_3 (0x6000) /* Timer B Group: 3 - 1 group (all) */ +#define TBCLGRP_0 (0x0000) /* Timer B Group: 0 - individually */ +#define TBCLGRP_1 (0x2000) /* Timer B Group: 1 - 3 groups (1-2, 3-4, 5-6) */ +#define TBCLGRP_2 (0x4000) /* Timer B Group: 2 - 2 groups (1-3, 4-6)*/ +#define TBCLGRP_3 (0x6000) /* Timer B Group: 3 - 1 group (all) */ + +/* Additional Timer B Control Register bits are defined in Timer A */ +#define CLLD1 (0x0400) /* Compare latch load source 1 */ +#define CLLD0 (0x0200) /* Compare latch load source 0 */ + +#define SLSHR1 (0x0400) /* Compare latch load source 1 */ +#define SLSHR0 (0x0200) /* Compare latch load source 0 */ + +#define SLSHR_0 (0x0000) /* Compare latch load sourec : 0 - immediate */ +#define SLSHR_1 (0x0200) /* Compare latch load sourec : 1 - TBR counts to 0 */ +#define SLSHR_2 (0x0400) /* Compare latch load sourec : 2 - up/down */ +#define SLSHR_3 (0x0600) /* Compare latch load sourec : 3 - TBR counts to TBCTL0 */ + +#define CLLD_0 (0x0000) /* Compare latch load sourec : 0 - immediate */ +#define CLLD_1 (0x0200) /* Compare latch load sourec : 1 - TBR counts to 0 */ +#define CLLD_2 (0x0400) /* Compare latch load sourec : 2 - up/down */ +#define CLLD_3 (0x0600) /* Compare latch load sourec : 3 - TBR counts to TBCTL0 */ + +/* TB7IV Definitions */ +#define TBIV_NONE (0x0000) /* No Interrupt pending */ +#define TBIV_TBCCR1 (0x0002) /* TBCCR1_CCIFG */ +#define TBIV_TBCCR2 (0x0004) /* TBCCR2_CCIFG */ +#define TBIV_TBCCR3 (0x0006) /* TBCCR3_CCIFG */ +#define TBIV_TBCCR4 (0x0008) /* TBCCR4_CCIFG */ +#define TBIV_TBCCR5 (0x000A) /* TBCCR3_CCIFG */ +#define TBIV_TBCCR6 (0x000C) /* TBCCR4_CCIFG */ +#define TBIV_TBIFG (0x000E) /* TBIFG */ + +/* Alternate register names - 5xx style */ +#define TB0IV_NONE (0x0000) /* No Interrupt pending */ +#define TB0IV_TBCCR1 (0x0002) /* TB0CCR1_CCIFG */ +#define TB0IV_TBCCR2 (0x0004) /* TB0CCR2_CCIFG */ +#define TB0IV_TBCCR3 (0x0006) /* TB0CCR3_CCIFG */ +#define TB0IV_TBCCR4 (0x0008) /* TB0CCR4_CCIFG */ +#define TB0IV_TBCCR5 (0x000A) /* TB0CCR3_CCIFG */ +#define TB0IV_TBCCR6 (0x000C) /* TB0CCR4_CCIFG */ +#define TB0IV_TBIFG (0x000E) /* TB0IFG */ + +/************************************************************ +* USCI +************************************************************/ +#define __MSP430_HAS_USCI__ /* Definition to show that Module is available */ +#define __MSP430_HAS_USCI_AB0__ /* Definition to show that Module is available */ +#define __MSP430_HAS_USCI_AB1__ /* Definition to show that Module is available */ + +sfr_b(UCA0CTL0); /* USCI A0 Control Register 0 */ +sfr_b(UCA0CTL1); /* USCI A0 Control Register 1 */ +sfr_b(UCA0BR0); /* USCI A0 Baud Rate 0 */ +sfr_b(UCA0BR1); /* USCI A0 Baud Rate 1 */ +sfr_b(UCA0MCTL); /* USCI A0 Modulation Control */ +sfr_b(UCA0STAT); /* USCI A0 Status Register */ +sfr_b(UCA0RXBUF); /* USCI A0 Receive Buffer */ +sfr_b(UCA0TXBUF); /* USCI A0 Transmit Buffer */ +sfr_b(UCA0ABCTL); /* USCI A0 LIN Control */ +sfr_b(UCA0IRTCTL); /* USCI A0 IrDA Transmit Control */ +sfr_b(UCA0IRRCTL); /* USCI A0 IrDA Receive Control */ + + + +sfr_b(UCB0CTL0); /* USCI B0 Control Register 0 */ +sfr_b(UCB0CTL1); /* USCI B0 Control Register 1 */ +sfr_b(UCB0BR0); /* USCI B0 Baud Rate 0 */ +sfr_b(UCB0BR1); /* USCI B0 Baud Rate 1 */ +sfr_b(UCB0I2CIE); /* USCI B0 I2C Interrupt Enable Register */ +sfr_b(UCB0STAT); /* USCI B0 Status Register */ +sfr_b(UCB0RXBUF); /* USCI B0 Receive Buffer */ +sfr_b(UCB0TXBUF); /* USCI B0 Transmit Buffer */ +sfr_w(UCB0I2COA); /* USCI B0 I2C Own Address */ +sfr_w(UCB0I2CSA); /* USCI B0 I2C Slave Address */ + +sfr_b(UCA1CTL0); /* USCI A1 Control Register 0 */ +sfr_b(UCA1CTL1); /* USCI A1 Control Register 1 */ +sfr_b(UCA1BR0); /* USCI A1 Baud Rate 0 */ +sfr_b(UCA1BR1); /* USCI A1 Baud Rate 1 */ +sfr_b(UCA1MCTL); /* USCI A1 Modulation Control */ +sfr_b(UCA1STAT); /* USCI A1 Status Register */ +sfr_b(UCA1RXBUF); /* USCI A1 Receive Buffer */ +sfr_b(UCA1TXBUF); /* USCI A1 Transmit Buffer */ +sfr_b(UCA1ABCTL); /* USCI A1 LIN Control */ +sfr_b(UCA1IRTCTL); /* USCI A1 IrDA Transmit Control */ +sfr_b(UCA1IRRCTL); /* USCI A1 IrDA Receive Control */ + + + +sfr_b(UCB1CTL0); /* USCI B1 Control Register 0 */ +sfr_b(UCB1CTL1); /* USCI B1 Control Register 1 */ +sfr_b(UCB1BR0); /* USCI B1 Baud Rate 0 */ +sfr_b(UCB1BR1); /* USCI B1 Baud Rate 1 */ +sfr_b(UCB1I2CIE); /* USCI B1 I2C Interrupt Enable Register */ +sfr_b(UCB1STAT); /* USCI B1 Status Register */ +sfr_b(UCB1RXBUF); /* USCI B1 Receive Buffer */ +sfr_b(UCB1TXBUF); /* USCI B1 Transmit Buffer */ +sfr_w(UCB1I2COA); /* USCI B1 I2C Own Address */ +sfr_w(UCB1I2CSA); /* USCI B1 I2C Slave Address */ + +// UART-Mode Bits +#define UCPEN (0x80) /* Async. Mode: Parity enable */ +#define UCPAR (0x40) /* Async. Mode: Parity 0:odd / 1:even */ +#define UCMSB (0x20) /* Async. Mode: MSB first 0:LSB / 1:MSB */ +#define UC7BIT (0x10) /* Async. Mode: Data Bits 0:8-bits / 1:7-bits */ +#define UCSPB (0x08) /* Async. Mode: Stop Bits 0:one / 1: two */ +#define UCMODE1 (0x04) /* Async. Mode: USCI Mode 1 */ +#define UCMODE0 (0x02) /* Async. Mode: USCI Mode 0 */ +#define UCSYNC (0x01) /* Sync-Mode 0:UART-Mode / 1:SPI-Mode */ + +// SPI-Mode Bits +#define UCCKPH (0x80) /* Sync. Mode: Clock Phase */ +#define UCCKPL (0x40) /* Sync. Mode: Clock Polarity */ +#define UCMST (0x08) /* Sync. Mode: Master Select */ + +// I2C-Mode Bits +#define UCA10 (0x80) /* 10-bit Address Mode */ +#define UCSLA10 (0x40) /* 10-bit Slave Address Mode */ +#define UCMM (0x20) /* Multi-Master Environment */ +//#define res (0x10) /* reserved */ +#define UCMODE_0 (0x00) /* Sync. Mode: USCI Mode: 0 */ +#define UCMODE_1 (0x02) /* Sync. Mode: USCI Mode: 1 */ +#define UCMODE_2 (0x04) /* Sync. Mode: USCI Mode: 2 */ +#define UCMODE_3 (0x06) /* Sync. Mode: USCI Mode: 3 */ + +// UART-Mode Bits +#define UCSSEL1 (0x80) /* USCI 0 Clock Source Select 1 */ +#define UCSSEL0 (0x40) /* USCI 0 Clock Source Select 0 */ +#define UCRXEIE (0x20) /* RX Error interrupt enable */ +#define UCBRKIE (0x10) /* Break interrupt enable */ +#define UCDORM (0x08) /* Dormant (Sleep) Mode */ +#define UCTXADDR (0x04) /* Send next Data as Address */ +#define UCTXBRK (0x02) /* Send next Data as Break */ +#define UCSWRST (0x01) /* USCI Software Reset */ + +// SPI-Mode Bits +//#define res (0x20) /* reserved */ +//#define res (0x10) /* reserved */ +//#define res (0x08) /* reserved */ +//#define res (0x04) /* reserved */ +//#define res (0x02) /* reserved */ + +// I2C-Mode Bits +//#define res (0x20) /* reserved */ +#define UCTR (0x10) /* Transmit/Receive Select/Flag */ +#define UCTXNACK (0x08) /* Transmit NACK */ +#define UCTXSTP (0x04) /* Transmit STOP */ +#define UCTXSTT (0x02) /* Transmit START */ +#define UCSSEL_0 (0x00) /* USCI 0 Clock Source: 0 */ +#define UCSSEL_1 (0x40) /* USCI 0 Clock Source: 1 */ +#define UCSSEL_2 (0x80) /* USCI 0 Clock Source: 2 */ +#define UCSSEL_3 (0xC0) /* USCI 0 Clock Source: 3 */ + +#define UCBRF3 (0x80) /* USCI First Stage Modulation Select 3 */ +#define UCBRF2 (0x40) /* USCI First Stage Modulation Select 2 */ +#define UCBRF1 (0x20) /* USCI First Stage Modulation Select 1 */ +#define UCBRF0 (0x10) /* USCI First Stage Modulation Select 0 */ +#define UCBRS2 (0x08) /* USCI Second Stage Modulation Select 2 */ +#define UCBRS1 (0x04) /* USCI Second Stage Modulation Select 1 */ +#define UCBRS0 (0x02) /* USCI Second Stage Modulation Select 0 */ +#define UCOS16 (0x01) /* USCI 16-times Oversampling enable */ + +#define UCBRF_0 (0x00) /* USCI First Stage Modulation: 0 */ +#define UCBRF_1 (0x10) /* USCI First Stage Modulation: 1 */ +#define UCBRF_2 (0x20) /* USCI First Stage Modulation: 2 */ +#define UCBRF_3 (0x30) /* USCI First Stage Modulation: 3 */ +#define UCBRF_4 (0x40) /* USCI First Stage Modulation: 4 */ +#define UCBRF_5 (0x50) /* USCI First Stage Modulation: 5 */ +#define UCBRF_6 (0x60) /* USCI First Stage Modulation: 6 */ +#define UCBRF_7 (0x70) /* USCI First Stage Modulation: 7 */ +#define UCBRF_8 (0x80) /* USCI First Stage Modulation: 8 */ +#define UCBRF_9 (0x90) /* USCI First Stage Modulation: 9 */ +#define UCBRF_10 (0xA0) /* USCI First Stage Modulation: A */ +#define UCBRF_11 (0xB0) /* USCI First Stage Modulation: B */ +#define UCBRF_12 (0xC0) /* USCI First Stage Modulation: C */ +#define UCBRF_13 (0xD0) /* USCI First Stage Modulation: D */ +#define UCBRF_14 (0xE0) /* USCI First Stage Modulation: E */ +#define UCBRF_15 (0xF0) /* USCI First Stage Modulation: F */ + +#define UCBRS_0 (0x00) /* USCI Second Stage Modulation: 0 */ +#define UCBRS_1 (0x02) /* USCI Second Stage Modulation: 1 */ +#define UCBRS_2 (0x04) /* USCI Second Stage Modulation: 2 */ +#define UCBRS_3 (0x06) /* USCI Second Stage Modulation: 3 */ +#define UCBRS_4 (0x08) /* USCI Second Stage Modulation: 4 */ +#define UCBRS_5 (0x0A) /* USCI Second Stage Modulation: 5 */ +#define UCBRS_6 (0x0C) /* USCI Second Stage Modulation: 6 */ +#define UCBRS_7 (0x0E) /* USCI Second Stage Modulation: 7 */ + +#define UCLISTEN (0x80) /* USCI Listen mode */ +#define UCFE (0x40) /* USCI Frame Error Flag */ +#define UCOE (0x20) /* USCI Overrun Error Flag */ +#define UCPE (0x10) /* USCI Parity Error Flag */ +#define UCBRK (0x08) /* USCI Break received */ +#define UCRXERR (0x04) /* USCI RX Error Flag */ +#define UCADDR (0x02) /* USCI Address received Flag */ +#define UCBUSY (0x01) /* USCI Busy Flag */ +#define UCIDLE (0x02) /* USCI Idle line detected Flag */ + +//#define res (0x80) /* reserved */ +//#define res (0x40) /* reserved */ +//#define res (0x20) /* reserved */ +//#define res (0x10) /* reserved */ +#define UCNACKIE (0x08) /* NACK Condition interrupt enable */ +#define UCSTPIE (0x04) /* STOP Condition interrupt enable */ +#define UCSTTIE (0x02) /* START Condition interrupt enable */ +#define UCALIE (0x01) /* Arbitration Lost interrupt enable */ + +#define UCSCLLOW (0x40) /* SCL low */ +#define UCGC (0x20) /* General Call address received Flag */ +#define UCBBUSY (0x10) /* Bus Busy Flag */ +#define UCNACKIFG (0x08) /* NAK Condition interrupt Flag */ +#define UCSTPIFG (0x04) /* STOP Condition interrupt Flag */ +#define UCSTTIFG (0x02) /* START Condition interrupt Flag */ +#define UCALIFG (0x01) /* Arbitration Lost interrupt Flag */ + +#define UCIRTXPL5 (0x80) /* IRDA Transmit Pulse Length 5 */ +#define UCIRTXPL4 (0x40) /* IRDA Transmit Pulse Length 4 */ +#define UCIRTXPL3 (0x20) /* IRDA Transmit Pulse Length 3 */ +#define UCIRTXPL2 (0x10) /* IRDA Transmit Pulse Length 2 */ +#define UCIRTXPL1 (0x08) /* IRDA Transmit Pulse Length 1 */ +#define UCIRTXPL0 (0x04) /* IRDA Transmit Pulse Length 0 */ +#define UCIRTXCLK (0x02) /* IRDA Transmit Pulse Clock Select */ +#define UCIREN (0x01) /* IRDA Encoder/Decoder enable */ + +#define UCIRRXFL5 (0x80) /* IRDA Receive Filter Length 5 */ +#define UCIRRXFL4 (0x40) /* IRDA Receive Filter Length 4 */ +#define UCIRRXFL3 (0x20) /* IRDA Receive Filter Length 3 */ +#define UCIRRXFL2 (0x10) /* IRDA Receive Filter Length 2 */ +#define UCIRRXFL1 (0x08) /* IRDA Receive Filter Length 1 */ +#define UCIRRXFL0 (0x04) /* IRDA Receive Filter Length 0 */ +#define UCIRRXPL (0x02) /* IRDA Receive Input Polarity */ +#define UCIRRXFE (0x01) /* IRDA Receive Filter enable */ + +//#define res (0x80) /* reserved */ +//#define res (0x40) /* reserved */ +#define UCDELIM1 (0x20) /* Break Sync Delimiter 1 */ +#define UCDELIM0 (0x10) /* Break Sync Delimiter 0 */ +#define UCSTOE (0x08) /* Sync-Field Timeout error */ +#define UCBTOE (0x04) /* Break Timeout error */ +//#define res (0x02) /* reserved */ +#define UCABDEN (0x01) /* Auto Baud Rate detect enable */ + +#define UCGCEN (0x8000) /* I2C General Call enable */ +#define UCOA9 (0x0200) /* I2C Own Address 9 */ +#define UCOA8 (0x0100) /* I2C Own Address 8 */ +#define UCOA7 (0x0080) /* I2C Own Address 7 */ +#define UCOA6 (0x0040) /* I2C Own Address 6 */ +#define UCOA5 (0x0020) /* I2C Own Address 5 */ +#define UCOA4 (0x0010) /* I2C Own Address 4 */ +#define UCOA3 (0x0008) /* I2C Own Address 3 */ +#define UCOA2 (0x0004) /* I2C Own Address 2 */ +#define UCOA1 (0x0002) /* I2C Own Address 1 */ +#define UCOA0 (0x0001) /* I2C Own Address 0 */ + +#define UCSA9 (0x0200) /* I2C Slave Address 9 */ +#define UCSA8 (0x0100) /* I2C Slave Address 8 */ +#define UCSA7 (0x0080) /* I2C Slave Address 7 */ +#define UCSA6 (0x0040) /* I2C Slave Address 6 */ +#define UCSA5 (0x0020) /* I2C Slave Address 5 */ +#define UCSA4 (0x0010) /* I2C Slave Address 4 */ +#define UCSA3 (0x0008) /* I2C Slave Address 3 */ +#define UCSA2 (0x0004) /* I2C Slave Address 2 */ +#define UCSA1 (0x0002) /* I2C Slave Address 1 */ +#define UCSA0 (0x0001) /* I2C Slave Address 0 */ + +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +#define __MSP430_HAS_WDT__ /* Definition to show that Module is available */ + +sfr_w(WDTCTL); /* Watchdog Timer Control */ +/* The bit names have been prefixed with "WDT" */ +#define WDTIS0 (0x0001) +#define WDTIS1 (0x0002) +#define WDTSSEL (0x0004) +#define WDTCNTCL (0x0008) +#define WDTTMSEL (0x0010) +#define WDTNMI (0x0020) +#define WDTNMIES (0x0040) +#define WDTHOLD (0x0080) + +#define WDTPW (0x5A00) + +/* WDT-interval times [1ms] coded with Bits 0-2 */ +/* WDT is clocked by fSMCLK (assumed 1MHz) */ +#define WDT_MDLY_32 (WDTPW+WDTTMSEL+WDTCNTCL) /* 32ms interval (default) */ +#define WDT_MDLY_8 (WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0) /* 8ms " */ +#define WDT_MDLY_0_5 (WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1) /* 0.5ms " */ +#define WDT_MDLY_0_064 (WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0) /* 0.064ms " */ +/* WDT is clocked by fACLK (assumed 32KHz) */ +#define WDT_ADLY_1000 (WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL) /* 1000ms " */ +#define WDT_ADLY_250 (WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0) /* 250ms " */ +#define WDT_ADLY_16 (WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1) /* 16ms " */ +#define WDT_ADLY_1_9 (WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0) /* 1.9ms " */ +/* Watchdog mode -> reset after expired time */ +/* WDT is clocked by fSMCLK (assumed 1MHz) */ +#define WDT_MRST_32 (WDTPW+WDTCNTCL) /* 32ms interval (default) */ +#define WDT_MRST_8 (WDTPW+WDTCNTCL+WDTIS0) /* 8ms " */ +#define WDT_MRST_0_5 (WDTPW+WDTCNTCL+WDTIS1) /* 0.5ms " */ +#define WDT_MRST_0_064 (WDTPW+WDTCNTCL+WDTIS1+WDTIS0) /* 0.064ms " */ +/* WDT is clocked by fACLK (assumed 32KHz) */ +#define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL) /* 1000ms " */ +#define WDT_ARST_250 (WDTPW+WDTCNTCL+WDTSSEL+WDTIS0) /* 250ms " */ +#define WDT_ARST_16 (WDTPW+WDTCNTCL+WDTSSEL+WDTIS1) /* 16ms " */ +#define WDT_ARST_1_9 (WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0) /* 1.9ms " */ + +/* INTERRUPT CONTROL */ +/* These two bits are defined in the Special Function Registers */ +/* #define WDTIE 0x01 */ +/* #define WDTIFG 0x01 */ + +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ + +/* TLV Calibration Data Structure */ +#define TAG_DCO_30 (0x01) /* Tag for DCO30 Calibration Data */ +#define TAG_ADC12_1 (0x08) /* Tag for ADC12_1 Calibration Data */ +#define TAG_EMPTY (0xFE) /* Tag for Empty Data Field in Calibration Data */ + +#ifndef __DisableCalData +sfr_w(TLV_CHECKSUM); /* TLV CHECK SUM */ +sfr_b(TLV_DCO_30_TAG); /* TLV TAG_DCO30 TAG */ +sfr_b(TLV_DCO_30_LEN); /* TLV TAG_DCO30 LEN */ +sfr_b(TLV_ADC12_1_TAG); /* TLV ADC12_1 TAG */ +sfr_b(TLV_ADC12_1_LEN); /* TLV ADC12_1 LEN */ +#endif + +#define CAL_ADC_25T85 (0x0010) /* Index for 2.5V/85Deg Cal. Value */ +#define CAL_ADC_25T30 (0x000E) /* Index for 2.5V/30Deg Cal. Value */ +#define CAL_ADC_25VREF_FACTOR (0x000C) /* Index for 2.5V Ref. Factor */ +#define CAL_ADC_15T85 (0x000A) /* Index for 1.5V/85Deg Cal. Value */ +#define CAL_ADC_15T30 (0x0008) /* Index for 1.5V/30Deg Cal. Value */ +#define CAL_ADC_15VREF_FACTOR (0x0006) /* Index for ADC 1.5V Ref. Factor */ +#define CAL_ADC_OFFSET (0x0004) /* Index for ADC Offset */ +#define CAL_ADC_GAIN_FACTOR (0x0002) /* Index for ADC Gain Factor */ + +#define CAL_DCO_16MHZ (0x0002) /* Index for DCOCTL Calibration Data for 16MHz */ +#define CAL_BC1_16MHZ (0x0003) /* Index for BCSCTL1 Calibration Data for 16MHz */ +#define CAL_DCO_12MHZ (0x0004) /* Index for DCOCTL Calibration Data for 12MHz */ +#define CAL_BC1_12MHZ (0x0005) /* Index for BCSCTL1 Calibration Data for 12MHz */ +#define CAL_DCO_8MHZ (0x0006) /* Index for DCOCTL Calibration Data for 8MHz */ +#define CAL_BC1_8MHZ (0x0007) /* Index for BCSCTL1 Calibration Data for 8MHz */ +#define CAL_DCO_1MHZ (0x0008) /* Index for DCOCTL Calibration Data for 1MHz */ +#define CAL_BC1_1MHZ (0x0009) /* Index for BCSCTL1 Calibration Data for 1MHz */ + + +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ + +#ifndef __DisableCalData + +sfr_b(CALDCO_16MHZ); /* DCOCTL Calibration Data for 16MHz */ +sfr_b(CALBC1_16MHZ); /* BCSCTL1 Calibration Data for 16MHz */ +sfr_b(CALDCO_12MHZ); /* DCOCTL Calibration Data for 12MHz */ +sfr_b(CALBC1_12MHZ); /* BCSCTL1 Calibration Data for 12MHz */ +sfr_b(CALDCO_8MHZ); /* DCOCTL Calibration Data for 8MHz */ +sfr_b(CALBC1_8MHZ); /* BCSCTL1 Calibration Data for 8MHz */ +sfr_b(CALDCO_1MHZ); /* DCOCTL Calibration Data for 1MHz */ +sfr_b(CALBC1_1MHZ); /* BCSCTL1 Calibration Data for 1MHz */ + +#endif /* #ifndef __DisableCalData */ + +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ + +#define RESERVED0_VECTOR ( 1) /* 0xFFC0 Reserved Int. Vector 0 */ +#define RESERVED1_VECTOR ( 2) /* 0xFFC2 Reserved Int. Vector 1 */ +#define RESERVED2_VECTOR ( 3) /* 0xFFC4 Reserved Int. Vector 2 */ +#define RESERVED3_VECTOR ( 4) /* 0xFFC6 Reserved Int. Vector 3 */ +#define RESERVED4_VECTOR ( 5) /* 0xFFC8 Reserved Int. Vector 4 */ +#define RESERVED5_VECTOR ( 6) /* 0xFFCA Reserved Int. Vector 5 */ +#define RESERVED6_VECTOR ( 7) /* 0xFFCC Reserved Int. Vector 6 */ +#define RESERVED7_VECTOR ( 8) /* 0xFFCE Reserved Int. Vector 7 */ +#define RESERVED8_VECTOR ( 9) /* 0xFFD0 Reserved Int. Vector 8 */ +#define RESERVED9_VECTOR (10) /* 0xFFD2 Reserved Int. Vector 9 */ +#define RESERVED10_VECTOR (11) /* 0xFFD4 Reserved Int. Vector 10 */ +#define RESERVED11_VECTOR (12) /* 0xFFD6 Reserved Int. Vector 11 */ +#define RESERVED12_VECTOR (13) /* 0xFFD8 Reserved Int. Vector 12 */ +#define RESERVED13_VECTOR (14) /* 0xFFDA Reserved Int. Vector 13 */ +#define DAC12_VECTOR (15) /* 0xFFDC DAC12 */ +#define DMA_VECTOR (16) /* 0xFFDE DMA */ +#define USCIAB1TX_VECTOR (17) /* 0xFFE0 USCI A1/B1 Transmit */ +#define USCIAB1RX_VECTOR (18) /* 0xFFE2 USCI A1/B1 Receive */ +#define PORT1_VECTOR (19) /* 0xFFE4 Port 1 */ +#define PORT2_VECTOR (20) /* 0xFFE6 Port 2 */ +#define RESERVED20_VECTOR (21) /* 0xFFE8 Reserved Int. Vector 20 */ +#define ADC12_VECTOR (22) /* 0xFFEA ADC */ +#define USCIAB0TX_VECTOR (23) /* 0xFFEC USCI A0/B0 Transmit */ +#define USCIAB0RX_VECTOR (24) /* 0xFFEE USCI A0/B0 Receive */ +#define TIMERA1_VECTOR (25) /* 0xFFF0 Timer A CC1-2, TA */ +#define TIMERA0_VECTOR (26) /* 0xFFF2 Timer A CC0 */ +#define WDT_VECTOR (27) /* 0xFFF4 Watchdog Timer */ +#define COMPARATORA_VECTOR (28) /* 0xFFF6 Comparator A */ +#define TIMERB1_VECTOR (29) /* 0xFFF8 Timer B CC1-6, TB */ +#define TIMERB0_VECTOR (30) /* 0xFFFA Timer B CC0 */ +#define NMI_VECTOR (31) /* 0xFFFC Non-maskable */ +#define RESET_VECTOR ("reset") /* 0xFFFE Reset [Highest Priority] */ + +/************************************************************ +* End of Modules +************************************************************/ + +#ifdef __cplusplus +} +#endif /* extern "C" */ + +#endif /* #ifndef __msp430x26x */ + diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.ld b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.ld new file mode 100644 index 000000000000..693656850e01 --- /dev/null +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618.ld @@ -0,0 +1,397 @@ +/* ============================================================================ */ +/* Copyright (c) 2021, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/* This file supports MSP430F2618 devices. */ +/* Version: 1.212 */ +/* Default linker script, for normal executables */ + +OUTPUT_ARCH(msp430) +ENTRY(_start) + +MEMORY { + SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */ + RAM : ORIGIN = 0x1100, LENGTH = 0x2000 /* END=0x30FF, size 8192 */ + RAM_MIRROR : ORIGIN = 0x0200, LENGTH = 0x0800 + INFOMEM : ORIGIN = 0x1000, LENGTH = 0x0100 /* END=0x10FF, size 256 as 4 64-byte segments */ + INFOA : ORIGIN = 0x10C0, LENGTH = 0x0040 /* END=0x10FF, size 64 */ + INFOB : ORIGIN = 0x1080, LENGTH = 0x0040 /* END=0x10BF, size 64 */ + INFOC : ORIGIN = 0x1040, LENGTH = 0x0040 /* END=0x107F, size 64 */ + INFOD : ORIGIN = 0x1000, LENGTH = 0x0040 /* END=0x103F, size 64 */ + ROM (rx) : ORIGIN = 0x3100, LENGTH = 0xCEBE /* END=0xFFBD, size 52926 */ + HIROM (rx) : ORIGIN = 0x00010000, LENGTH = 0x0000FFFF + BSLSIGNATURE : ORIGIN = 0xFFBE, LENGTH = 0x0002 + VECT1 : ORIGIN = 0xFFC0, LENGTH = 0x0002 + VECT2 : ORIGIN = 0xFFC2, LENGTH = 0x0002 + VECT3 : ORIGIN = 0xFFC4, LENGTH = 0x0002 + VECT4 : ORIGIN = 0xFFC6, LENGTH = 0x0002 + VECT5 : ORIGIN = 0xFFC8, LENGTH = 0x0002 + VECT6 : ORIGIN = 0xFFCA, LENGTH = 0x0002 + VECT7 : ORIGIN = 0xFFCC, LENGTH = 0x0002 + VECT8 : ORIGIN = 0xFFCE, LENGTH = 0x0002 + VECT9 : ORIGIN = 0xFFD0, LENGTH = 0x0002 + VECT10 : ORIGIN = 0xFFD2, LENGTH = 0x0002 + VECT11 : ORIGIN = 0xFFD4, LENGTH = 0x0002 + VECT12 : ORIGIN = 0xFFD6, LENGTH = 0x0002 + VECT13 : ORIGIN = 0xFFD8, LENGTH = 0x0002 + VECT14 : ORIGIN = 0xFFDA, LENGTH = 0x0002 + VECT15 : ORIGIN = 0xFFDC, LENGTH = 0x0002 + VECT16 : ORIGIN = 0xFFDE, LENGTH = 0x0002 + VECT17 : ORIGIN = 0xFFE0, LENGTH = 0x0002 + VECT18 : ORIGIN = 0xFFE2, LENGTH = 0x0002 + VECT19 : ORIGIN = 0xFFE4, LENGTH = 0x0002 + VECT20 : ORIGIN = 0xFFE6, LENGTH = 0x0002 + VECT21 : ORIGIN = 0xFFE8, LENGTH = 0x0002 + VECT22 : ORIGIN = 0xFFEA, LENGTH = 0x0002 + VECT23 : ORIGIN = 0xFFEC, LENGTH = 0x0002 + VECT24 : ORIGIN = 0xFFEE, LENGTH = 0x0002 + VECT25 : ORIGIN = 0xFFF0, LENGTH = 0x0002 + VECT26 : ORIGIN = 0xFFF2, LENGTH = 0x0002 + VECT27 : ORIGIN = 0xFFF4, LENGTH = 0x0002 + VECT28 : ORIGIN = 0xFFF6, LENGTH = 0x0002 + VECT29 : ORIGIN = 0xFFF8, LENGTH = 0x0002 + VECT30 : ORIGIN = 0xFFFA, LENGTH = 0x0002 + VECT31 : ORIGIN = 0xFFFC, LENGTH = 0x0002 + RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002 +} + +SECTIONS +{ + .bslsignature : {} > BSLSIGNATURE + __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) KEEP (*(__interrupt_vector_reserved0)) } > VECT1 + __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) KEEP (*(__interrupt_vector_reserved1)) } > VECT2 + __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_reserved2)) } > VECT3 + __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_reserved3)) } > VECT4 + __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) KEEP (*(__interrupt_vector_reserved4)) } > VECT5 + __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) KEEP (*(__interrupt_vector_reserved5)) } > VECT6 + __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) KEEP (*(__interrupt_vector_reserved6)) } > VECT7 + __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) KEEP (*(__interrupt_vector_reserved7)) } > VECT8 + __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_reserved8)) } > VECT9 + __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_reserved9)) } > VECT10 + __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_reserved10)) } > VECT11 + __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) KEEP (*(__interrupt_vector_reserved11)) } > VECT12 + __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) KEEP (*(__interrupt_vector_reserved12)) } > VECT13 + __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) KEEP (*(__interrupt_vector_reserved13)) } > VECT14 + __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_dac12)) } > VECT15 + __interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) KEEP (*(__interrupt_vector_dma)) } > VECT16 + __interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) KEEP (*(__interrupt_vector_usciab1tx)) } > VECT17 + __interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) KEEP (*(__interrupt_vector_usciab1rx)) } > VECT18 + __interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) KEEP (*(__interrupt_vector_port1)) } > VECT19 + __interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_port2)) } > VECT20 + __interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_reserved20)) } > VECT21 + __interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_adc12)) } > VECT22 + __interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_usciab0tx)) } > VECT23 + __interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_usciab0rx)) } > VECT24 + __interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_timera1)) } > VECT25 + __interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_timera0)) } > VECT26 + __interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_wdt)) } > VECT27 + __interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_comparatora)) } > VECT28 + __interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_timerb1)) } > VECT29 + __interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_timerb0)) } > VECT30 + __interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_nmi)) } > VECT31 + __reset_vector : + { + KEEP (*(__interrupt_vector_32)) + KEEP (*(__interrupt_vector_reset)) + KEEP (*(.resetvec)) + } > RESETVEC + + .lower.rodata : + { + . = ALIGN(2); + *(.lower.rodata.* .lower.rodata) + } > ROM + + .rodata : + { + . = ALIGN(2); + *(.plt) + . = ALIGN(2); + *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*) + *(.rodata1) + KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) + } > ROM + + /* Note: This is a separate .rodata section for sections which are + read only but which older linkers treat as read-write. + This prevents older linkers from marking the entire .rodata + section as read-write. */ + .rodata2 : + { + . = ALIGN(2); + PROVIDE (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE (__preinit_array_end = .); + . = ALIGN(2); + PROVIDE (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE (__init_array_end = .); + . = ALIGN(2); + PROVIDE (__fini_array_start = .); + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE (__fini_array_end = .); + . = ALIGN(2); + *(.eh_frame_hdr) + KEEP (*(.eh_frame)) + + /* gcc uses crtbegin.o to find the start of the constructors, so + we make sure it is first. Because this is a wildcard, it + doesn't matter if the user does not actually link against + crtbegin.o; the linker won't look for a file to match a + wildcard. The wildcard also means that it doesn't matter which + directory crtbegin.o is in. */ + KEEP (*crtbegin*.o(.ctors)) + + /* We don't want to include the .ctor section from the crtend.o + file until after the sorted ctors. The .ctor section from + the crtend file contains the end of ctors marker and it must + be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } > ROM + + .upper.rodata : + { + *(.upper.rodata.* .upper.rodata) + } > HIROM + + .data : + { + . = ALIGN(2); + PROVIDE (__datastart = .); + *(.lower.data.* .lower.data) + + . = ALIGN(2); + *(.either.data.* .either.data) + + . = ALIGN(2); + KEEP (*(.jcr)) + *(.data.rel.ro.local) *(.data.rel.ro*) + *(.dynamic) + + . = ALIGN(2); + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + *(.data1) + *(.got.plt) *(.got) + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + . = ALIGN(2); + *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1) + + . = ALIGN(2); + _edata = .; + PROVIDE (edata = .); + PROVIDE (__dataend = .); + } > RAM AT> ROM + + /* Note that crt0 assumes this is a multiple of two; all the + start/stop symbols are also assumed word-aligned. */ + PROVIDE(__romdatastart = LOADADDR(.data)); + PROVIDE (__romdatacopysize = SIZEOF(.data)); + + .bss : + { + . = ALIGN(2); + PROVIDE (__bssstart = .); + *(.lower.bss.* .lower.bss) + . = ALIGN(2); + *(.either.bss.* .either.bss) + *(.dynbss) + *(.sbss .sbss.*) + *(.bss .bss.* .gnu.linkonce.b.*) + . = ALIGN(2); + *(COMMON) + PROVIDE (__bssend = .); + } > RAM + PROVIDE (__bsssize = SIZEOF(.bss)); + + /* This section contains data that is not initialised during load + or application reset. */ + .noinit (NOLOAD) : + { + . = ALIGN(2); + PROVIDE (__noinit_start = .); + *(.noinit) + . = ALIGN(2); + PROVIDE (__noinit_end = .); + } > RAM + + /* We create this section so that "end" will always be in the + RAM region (matching .stack below), even if the .bss + section is empty. */ + .heap (NOLOAD) : + { + . = ALIGN(2); + __heap_start__ = .; + _end = __heap_start__; + PROVIDE (end = .); + KEEP (*(.heap)) + _end = .; + PROVIDE (end = .); + /* This word is here so that the section is not empty, and thus + not discarded by the linker. The actual value does not matter + and is ignored. */ + LONG(0); + __heap_end__ = .; + __HeapLimit = __heap_end__; + } > RAM + /* WARNING: Do not place anything in RAM here. + The heap section must be the last section in RAM and the stack + section must be placed at the very end of the RAM region. */ + + .stack (ORIGIN (RAM) + LENGTH(RAM)) : + { + PROVIDE (__stack = .); + *(.stack) + } + + /* This is just for crt0.S and interrupt handlers. */ + .lowtext : + { + PROVIDE (_start = .); + . = ALIGN(2); + KEEP (*(SORT(.crt_*))) + KEEP (*(.lowtext)) + } > ROM + + .lower.text : + { + . = ALIGN(2); + *(.lower.text.* .lower.text) + } > ROM + + .text : + { + . = ALIGN(2); + *(.text .stub .text.* .gnu.linkonce.t.* .text:*) + + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.interp .hash .dynsym .dynstr .gnu.version*) + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + . = ALIGN(2); + KEEP (*(.init)) + KEEP (*(.fini)) + KEEP (*(.tm_clone_table)) + } > ROM + + .upper.text : + { + . = ALIGN(2); + *(.upper.text.* .upper.text) + } > HIROM + + .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ + .infoB : {} > INFOB + .infoC : {} > INFOC + .infoD : {} > INFOD + + /* Make sure that upper data sections are not used. */ + .upper : + { + *(.upper.bss.* .upper.bss) + *(.upper.data.* .upper.data) + ASSERT (SIZEOF(.upper) == 0, "This MCU does not support placing read/write data into high memory"); + } > HIROM + + /* The rest are all not normally part of the runtime image. */ + + .MSP430.attributes 0 : + { + KEEP (*(.MSP430.attributes)) + KEEP (*(.gnu.attributes)) + KEEP (*(__TI_build_attributes)) + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1. */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions. */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2. */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2. */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions. */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + /* DWARF Extension. */ + .debug_macro 0 : { *(.debug_macro) } + + /DISCARD/ : { *(.note.GNU-stack) } +} + + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +INCLUDE msp430f2618_symbols.ld + diff --git a/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618_symbols.ld b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618_symbols.ld new file mode 100644 index 000000000000..6ee866080460 --- /dev/null +++ b/cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2618_symbols.ld @@ -0,0 +1,328 @@ +/* ============================================================================ */ +/* Copyright (c) 2021, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/* This file supports MSP430F2618 devices. */ +/* Version: 1.212 */ + +/************************************************************ +* STANDARD BITS +************************************************************/ +/************************************************************ +* STATUS REGISTER BITS +************************************************************/ +/************************************************************ +* PERIPHERAL FILE MAP +************************************************************/ +/************************************************************ +* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS +************************************************************/ +PROVIDE(IE1 = 0x0000); +PROVIDE(IFG1 = 0x0002); +PROVIDE(IE2 = 0x0001); +PROVIDE(IFG2 = 0x0003); +PROVIDE(UC1IE = 0x0006); +PROVIDE(UC1IFG = 0x0007); +/************************************************************ +* ADC12 +************************************************************/ +PROVIDE(ADC12CTL0 = 0x01A0); +PROVIDE(ADC12CTL1 = 0x01A2); +PROVIDE(ADC12IFG = 0x01A4); +PROVIDE(ADC12IE = 0x01A6); +PROVIDE(ADC12IV = 0x01A8); +PROVIDE(ADC12MEM0 = 0x0140); +PROVIDE(ADC12MEM1 = 0x0142); +PROVIDE(ADC12MEM2 = 0x0144); +PROVIDE(ADC12MEM3 = 0x0146); +PROVIDE(ADC12MEM4 = 0x0148); +PROVIDE(ADC12MEM5 = 0x014A); +PROVIDE(ADC12MEM6 = 0x014C); +PROVIDE(ADC12MEM7 = 0x014E); +PROVIDE(ADC12MEM8 = 0x0150); +PROVIDE(ADC12MEM9 = 0x0152); +PROVIDE(ADC12MEM10 = 0x0154); +PROVIDE(ADC12MEM11 = 0x0156); +PROVIDE(ADC12MEM12 = 0x0158); +PROVIDE(ADC12MEM13 = 0x015A); +PROVIDE(ADC12MEM14 = 0x015C); +PROVIDE(ADC12MEM15 = 0x015E); +PROVIDE(ADC12MCTL0 = 0x0080); +PROVIDE(ADC12MCTL1 = 0x0081); +PROVIDE(ADC12MCTL2 = 0x0082); +PROVIDE(ADC12MCTL3 = 0x0083); +PROVIDE(ADC12MCTL4 = 0x0084); +PROVIDE(ADC12MCTL5 = 0x0085); +PROVIDE(ADC12MCTL6 = 0x0086); +PROVIDE(ADC12MCTL7 = 0x0087); +PROVIDE(ADC12MCTL8 = 0x0088); +PROVIDE(ADC12MCTL9 = 0x0089); +PROVIDE(ADC12MCTL10 = 0x008A); +PROVIDE(ADC12MCTL11 = 0x008B); +PROVIDE(ADC12MCTL12 = 0x008C); +PROVIDE(ADC12MCTL13 = 0x008D); +PROVIDE(ADC12MCTL14 = 0x008E); +PROVIDE(ADC12MCTL15 = 0x008F); +/************************************************************ +* Basic Clock Module +************************************************************/ +PROVIDE(DCOCTL = 0x0056); +PROVIDE(BCSCTL1 = 0x0057); +PROVIDE(BCSCTL2 = 0x0058); +PROVIDE(BCSCTL3 = 0x0053); +/************************************************************ +* Comparator A +************************************************************/ +PROVIDE(CACTL1 = 0x0059); +PROVIDE(CACTL2 = 0x005A); +PROVIDE(CAPD = 0x005B); +/************************************************************ +* DAC12 +************************************************************/ +PROVIDE(DAC12_0CTL = 0x01C0); +PROVIDE(DAC12_1CTL = 0x01C2); +PROVIDE(DAC12_0DAT = 0x01C8); +PROVIDE(DAC12_1DAT = 0x01CA); +/************************************************************ +* DMA_X +************************************************************/ +PROVIDE(DMACTL0 = 0x0122); +PROVIDE(DMACTL1 = 0x0124); +PROVIDE(DMAIV = 0x0126); +PROVIDE(DMA0CTL = 0x01D0); +PROVIDE(DMA1CTL = 0x01DC); +PROVIDE(DMA2CTL = 0x01E8); +PROVIDE(DMA0SA = 0x01D2); +PROVIDE(DMA0SAL = 0x01D2); +PROVIDE(DMA0DA = 0x01D6); +PROVIDE(DMA0DAL = 0x01D6); +PROVIDE(DMA0SZ = 0x01DA); +PROVIDE(DMA1SA = 0x01DE); +PROVIDE(DMA1SAL = 0x01DE); +PROVIDE(DMA1DA = 0x01E2); +PROVIDE(DMA1DAL = 0x01E2); +PROVIDE(DMA1SZ = 0x01E6); +PROVIDE(DMA2SA = 0x01EA); +PROVIDE(DMA2SAL = 0x01EA); +PROVIDE(DMA2DA = 0x01EE); +PROVIDE(DMA2DAL = 0x01EE); +PROVIDE(DMA2SZ = 0x01F2); +/************************************************************* +* Flash Memory +*************************************************************/ +PROVIDE(FCTL1 = 0x0128); +PROVIDE(FCTL2 = 0x012A); +PROVIDE(FCTL3 = 0x012C); +PROVIDE(FCTL4 = 0x01BE); +/************************************************************ +* HARDWARE MULTIPLIER +************************************************************/ +PROVIDE(MPY = 0x0130); +PROVIDE(MPYS = 0x0132); +PROVIDE(MAC = 0x0134); +PROVIDE(MACS = 0x0136); +PROVIDE(OP2 = 0x0138); +PROVIDE(RESLO = 0x013A); +PROVIDE(RESHI = 0x013C); +PROVIDE(SUMEXT = 0x013E); +/************************************************************ +* DIGITAL I/O Port1/2 Pull up / Pull down Resistors +************************************************************/ +PROVIDE(P1IN = 0x0020); +PROVIDE(P1OUT = 0x0021); +PROVIDE(P1DIR = 0x0022); +PROVIDE(P1IFG = 0x0023); +PROVIDE(P1IES = 0x0024); +PROVIDE(P1IE = 0x0025); +PROVIDE(P1SEL = 0x0026); +PROVIDE(P1REN = 0x0027); +PROVIDE(P2IN = 0x0028); +PROVIDE(P2OUT = 0x0029); +PROVIDE(P2DIR = 0x002A); +PROVIDE(P2IFG = 0x002B); +PROVIDE(P2IES = 0x002C); +PROVIDE(P2IE = 0x002D); +PROVIDE(P2SEL = 0x002E); +PROVIDE(P2REN = 0x002F); +/************************************************************ +* DIGITAL I/O Port3/4 Pull up / Pull down Resistors +************************************************************/ +PROVIDE(P3IN = 0x0018); +PROVIDE(P3OUT = 0x0019); +PROVIDE(P3DIR = 0x001A); +PROVIDE(P3SEL = 0x001B); +PROVIDE(P3REN = 0x0010); +PROVIDE(P4IN = 0x001C); +PROVIDE(P4OUT = 0x001D); +PROVIDE(P4DIR = 0x001E); +PROVIDE(P4SEL = 0x001F); +PROVIDE(P4REN = 0x0011); +/************************************************************ +* DIGITAL I/O Port5/6 Pull up / Pull down Resistors +************************************************************/ +PROVIDE(P5IN = 0x0030); +PROVIDE(P5OUT = 0x0031); +PROVIDE(P5DIR = 0x0032); +PROVIDE(P5SEL = 0x0033); +PROVIDE(P5REN = 0x0012); +PROVIDE(P6IN = 0x0034); +PROVIDE(P6OUT = 0x0035); +PROVIDE(P6DIR = 0x0036); +PROVIDE(P6SEL = 0x0037); +PROVIDE(P6REN = 0x0013); +/************************************************************ +* DIGITAL I/O Port7/8 Pull up / Pull down Resistors +************************************************************/ +PROVIDE(P7IN = 0x0038); +PROVIDE(P7OUT = 0x003A); +PROVIDE(P7DIR = 0x003C); +PROVIDE(P7SEL = 0x003E); +PROVIDE(P7REN = 0x0014); +PROVIDE(P8IN = 0x0039); +PROVIDE(P8OUT = 0x003B); +PROVIDE(P8DIR = 0x003D); +PROVIDE(P8SEL = 0x003F); +PROVIDE(P8REN = 0x0015); +PROVIDE(PAIN = 0x0038); +PROVIDE(PAOUT = 0x003A); +PROVIDE(PADIR = 0x003C); +PROVIDE(PASEL = 0x003E); +PROVIDE(PAREN = 0x0014); +/************************************************************ +* Brown-Out, Supply Voltage Supervision (SVS) +************************************************************/ +PROVIDE(SVSCTL = 0x0055); +/************************************************************ +* Timer A3 +************************************************************/ +PROVIDE(TAIV = 0x012E); +PROVIDE(TACTL = 0x0160); +PROVIDE(TACCTL0 = 0x0162); +PROVIDE(TACCTL1 = 0x0164); +PROVIDE(TACCTL2 = 0x0166); +PROVIDE(TAR = 0x0170); +PROVIDE(TACCR0 = 0x0172); +PROVIDE(TACCR1 = 0x0174); +PROVIDE(TACCR2 = 0x0176); +/************************************************************ +* Timer B7 +************************************************************/ +PROVIDE(TBIV = 0x011E); +PROVIDE(TBCTL = 0x0180); +PROVIDE(TBCCTL0 = 0x0182); +PROVIDE(TBCCTL1 = 0x0184); +PROVIDE(TBCCTL2 = 0x0186); +PROVIDE(TBCCTL3 = 0x0188); +PROVIDE(TBCCTL4 = 0x018A); +PROVIDE(TBCCTL5 = 0x018C); +PROVIDE(TBCCTL6 = 0x018E); +PROVIDE(TBR = 0x0190); +PROVIDE(TBCCR0 = 0x0192); +PROVIDE(TBCCR1 = 0x0194); +PROVIDE(TBCCR2 = 0x0196); +PROVIDE(TBCCR3 = 0x0198); +PROVIDE(TBCCR4 = 0x019A); +PROVIDE(TBCCR5 = 0x019C); +PROVIDE(TBCCR6 = 0x019E); +/************************************************************ +* USCI +************************************************************/ +PROVIDE(UCA0CTL0 = 0x0060); +PROVIDE(UCA0CTL1 = 0x0061); +PROVIDE(UCA0BR0 = 0x0062); +PROVIDE(UCA0BR1 = 0x0063); +PROVIDE(UCA0MCTL = 0x0064); +PROVIDE(UCA0STAT = 0x0065); +PROVIDE(UCA0RXBUF = 0x0066); +PROVIDE(UCA0TXBUF = 0x0067); +PROVIDE(UCA0ABCTL = 0x005D); +PROVIDE(UCA0IRTCTL = 0x005E); +PROVIDE(UCA0IRRCTL = 0x005F); +PROVIDE(UCB0CTL0 = 0x0068); +PROVIDE(UCB0CTL1 = 0x0069); +PROVIDE(UCB0BR0 = 0x006A); +PROVIDE(UCB0BR1 = 0x006B); +PROVIDE(UCB0I2CIE = 0x006C); +PROVIDE(UCB0STAT = 0x006D); +PROVIDE(UCB0RXBUF = 0x006E); +PROVIDE(UCB0TXBUF = 0x006F); +PROVIDE(UCB0I2COA = 0x0118); +PROVIDE(UCB0I2CSA = 0x011A); +PROVIDE(UCA1CTL0 = 0x00D0); +PROVIDE(UCA1CTL1 = 0x00D1); +PROVIDE(UCA1BR0 = 0x00D2); +PROVIDE(UCA1BR1 = 0x00D3); +PROVIDE(UCA1MCTL = 0x00D4); +PROVIDE(UCA1STAT = 0x00D5); +PROVIDE(UCA1RXBUF = 0x00D6); +PROVIDE(UCA1TXBUF = 0x00D7); +PROVIDE(UCA1ABCTL = 0x00CD); +PROVIDE(UCA1IRTCTL = 0x00CE); +PROVIDE(UCA1IRRCTL = 0x00CF); +PROVIDE(UCB1CTL0 = 0x00D8); +PROVIDE(UCB1CTL1 = 0x00D9); +PROVIDE(UCB1BR0 = 0x00DA); +PROVIDE(UCB1BR1 = 0x00DB); +PROVIDE(UCB1I2CIE = 0x00DC); +PROVIDE(UCB1STAT = 0x00DD); +PROVIDE(UCB1RXBUF = 0x00DE); +PROVIDE(UCB1TXBUF = 0x00DF); +PROVIDE(UCB1I2COA = 0x017C); +PROVIDE(UCB1I2CSA = 0x017E); +/************************************************************ +* WATCHDOG TIMER +************************************************************/ +PROVIDE(WDTCTL = 0x0120); +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +PROVIDE(TLV_CHECKSUM = 0x10C0); +PROVIDE(TLV_DCO_30_TAG = 0x10F6); +PROVIDE(TLV_DCO_30_LEN = 0x10F7); +PROVIDE(TLV_ADC12_1_TAG = 0x10DA); +PROVIDE(TLV_ADC12_1_LEN = 0x10DB); +/************************************************************ +* Calibration Data in Info Mem +************************************************************/ +PROVIDE(CALDCO_16MHZ = 0x10F8); +PROVIDE(CALBC1_16MHZ = 0x10F9); +PROVIDE(CALDCO_12MHZ = 0x10FA); +PROVIDE(CALBC1_12MHZ = 0x10FB); +PROVIDE(CALDCO_8MHZ = 0x10FC); +PROVIDE(CALBC1_8MHZ = 0x10FD); +PROVIDE(CALDCO_1MHZ = 0x10FE); +PROVIDE(CALBC1_1MHZ = 0x10FF); +/************************************************************ +* Interrupt Vectors (offset from 0xFFC0) +************************************************************/ +/************************************************************ +* End of Modules +************************************************************/ diff --git a/cpu/msp430_common/vendor/update.sh b/cpu/msp430_common/vendor/update.sh index 03718dc10169..04e2548afd29 100644 --- a/cpu/msp430_common/vendor/update.sh +++ b/cpu/msp430_common/vendor/update.sh @@ -5,7 +5,7 @@ set -e -URL="https://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-support-files-1.210.zip" +URL="https://dr-download.ti.com/software-development/ide-configuration-compiler-or-debugger/MD-LlCjWuAbzH/9.3.1.2/msp430-gcc-support-files-1.212.zip" rm -Rf msp430-gcc-support-files _CPUS="$(git -C ../../.. grep -o '^CPU_MODEL.=.*430.*$' | cut -d' ' -f 3 | sort -u)" @@ -17,3 +17,5 @@ unzip $(basename $URL) rm $(ls | grep -v -E '(msp430\.h|in430\.h|legacy\.h|iomacros\.h|devices.csv)' | \ grep -v -F "${_CPUS}" ) ) + +find msp430-gcc-support-files -type f -exec dos2unix "{}" \; diff --git a/cpu/msp430fxyz/Kconfig b/cpu/msp430fxyz/Kconfig index 21d67ce32439..2f30bd6a38c1 100644 --- a/cpu/msp430fxyz/Kconfig +++ b/cpu/msp430fxyz/Kconfig @@ -24,6 +24,10 @@ config CPU_MODEL_MSP430F2617 bool select CPU_FAM_MSP430F +config CPU_MODEL_MSP430F2618 + bool + select CPU_FAM_MSP430F + ## Definition of specific features config HAS_CPU_MSP430FXYZ bool @@ -38,6 +42,7 @@ config CPU_MODEL default "msp430f1611" if CPU_MODEL_MSP430F1611 default "msp430f1612" if CPU_MODEL_MSP430F1612 default "msp430f2617" if CPU_MODEL_MSP430F2617 + default "msp430f2618" if CPU_MODEL_MSP430F2618 config CPU default "msp430fxyz" if CPU_FAM_MSP430F diff --git a/examples/asymcute_mqttsn/Makefile.ci b/examples/asymcute_mqttsn/Makefile.ci index aba6e4016630..8dc98115a909 100644 --- a/examples/asymcute_mqttsn/Makefile.ci +++ b/examples/asymcute_mqttsn/Makefile.ci @@ -35,6 +35,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/examples/benchmark_udp/Makefile.ci b/examples/benchmark_udp/Makefile.ci index bd398dea3ae5..eba11c98a8b8 100644 --- a/examples/benchmark_udp/Makefile.ci +++ b/examples/benchmark_udp/Makefile.ci @@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/examples/cord_ep/Makefile.ci b/examples/cord_ep/Makefile.ci index 53712c77cd52..64d1cc9b4f9c 100644 --- a/examples/cord_ep/Makefile.ci +++ b/examples/cord_ep/Makefile.ci @@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/examples/cord_lc/Makefile.ci b/examples/cord_lc/Makefile.ci index 1ed53f31a03a..4fc7181f294c 100644 --- a/examples/cord_lc/Makefile.ci +++ b/examples/cord_lc/Makefile.ci @@ -26,6 +26,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/examples/dtls-echo/Makefile.ci b/examples/dtls-echo/Makefile.ci index cba0cb9af7ea..3dbb75dc199b 100644 --- a/examples/dtls-echo/Makefile.ci +++ b/examples/dtls-echo/Makefile.ci @@ -39,6 +39,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/examples/emcute_mqttsn/Makefile.ci b/examples/emcute_mqttsn/Makefile.ci index c0fb6c41ec97..8f2f73087147 100644 --- a/examples/emcute_mqttsn/Makefile.ci +++ b/examples/emcute_mqttsn/Makefile.ci @@ -28,6 +28,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/examples/gcoap/Makefile.ci b/examples/gcoap/Makefile.ci index f2810be9e220..1c0c26dffd6c 100644 --- a/examples/gcoap/Makefile.ci +++ b/examples/gcoap/Makefile.ci @@ -22,6 +22,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/examples/gcoap_block_server/Makefile.ci b/examples/gcoap_block_server/Makefile.ci index 41a19752cfa7..62501fd2c553 100644 --- a/examples/gcoap_block_server/Makefile.ci +++ b/examples/gcoap_block_server/Makefile.ci @@ -23,6 +23,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/examples/gcoap_dtls/Makefile.ci b/examples/gcoap_dtls/Makefile.ci index 23509f16d1f2..88e4c2533a8d 100644 --- a/examples/gcoap_dtls/Makefile.ci +++ b/examples/gcoap_dtls/Makefile.ci @@ -43,6 +43,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/examples/gcoap_fileserver/Makefile.ci b/examples/gcoap_fileserver/Makefile.ci index c6af57aaa575..5e71e7ef1876 100644 --- a/examples/gcoap_fileserver/Makefile.ci +++ b/examples/gcoap_fileserver/Makefile.ci @@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/examples/gnrc_border_router/Makefile.ci b/examples/gnrc_border_router/Makefile.ci index 811374487669..44119736a17a 100644 --- a/examples/gnrc_border_router/Makefile.ci +++ b/examples/gnrc_border_router/Makefile.ci @@ -48,6 +48,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l053r8 \ nucleo-l073rz \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ olimexino-stm32 \ opencm904 \ samd10-xmini \ diff --git a/examples/gnrc_networking/Makefile.ci b/examples/gnrc_networking/Makefile.ci index 460ae4620c2a..d2f18431cec7 100644 --- a/examples/gnrc_networking/Makefile.ci +++ b/examples/gnrc_networking/Makefile.ci @@ -24,6 +24,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/examples/gnrc_networking_subnets/Makefile.ci b/examples/gnrc_networking_subnets/Makefile.ci index 3a01e7f5cc33..a95e99a05d9d 100644 --- a/examples/gnrc_networking_subnets/Makefile.ci +++ b/examples/gnrc_networking_subnets/Makefile.ci @@ -24,6 +24,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/examples/paho-mqtt/Makefile.ci b/examples/paho-mqtt/Makefile.ci index cba0cb9af7ea..3dbb75dc199b 100644 --- a/examples/paho-mqtt/Makefile.ci +++ b/examples/paho-mqtt/Makefile.ci @@ -39,6 +39,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/examples/posix_sockets/Makefile.ci b/examples/posix_sockets/Makefile.ci index 490076c1dbd7..2be5c5c00ab9 100644 --- a/examples/posix_sockets/Makefile.ci +++ b/examples/posix_sockets/Makefile.ci @@ -29,6 +29,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/examples/telnet_server/Makefile.ci b/examples/telnet_server/Makefile.ci index f2810be9e220..1c0c26dffd6c 100644 --- a/examples/telnet_server/Makefile.ci +++ b/examples/telnet_server/Makefile.ci @@ -22,6 +22,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/bench/xtimer/Makefile.ci b/tests/bench/xtimer/Makefile.ci index 6fe520963735..f7326e89d43a 100644 --- a/tests/bench/xtimer/Makefile.ci +++ b/tests/bench/xtimer/Makefile.ci @@ -3,6 +3,7 @@ BOARD_INSUFFICIENT_MEMORY := \ im880b \ nucleo-l011k4 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ olimexino-stm32 \ samd10-xmini \ slstk3400a \ diff --git a/tests/bench/ztimer/Makefile.ci b/tests/bench/ztimer/Makefile.ci index 6fe520963735..f7326e89d43a 100644 --- a/tests/bench/ztimer/Makefile.ci +++ b/tests/bench/ztimer/Makefile.ci @@ -3,6 +3,7 @@ BOARD_INSUFFICIENT_MEMORY := \ im880b \ nucleo-l011k4 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ olimexino-stm32 \ samd10-xmini \ slstk3400a \ diff --git a/tests/drivers/cc110x/Makefile.ci b/tests/drivers/cc110x/Makefile.ci index f61b73d66142..d1467249800d 100644 --- a/tests/drivers/cc110x/Makefile.ci +++ b/tests/drivers/cc110x/Makefile.ci @@ -30,6 +30,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/emcute/Makefile.ci b/tests/net/emcute/Makefile.ci index 587d95f9f0eb..fadc77033ce7 100644 --- a/tests/net/emcute/Makefile.ci +++ b/tests/net/emcute/Makefile.ci @@ -45,6 +45,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l053r8 \ nucleo-l073rz \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ opencm904 \ samd10-xmini \ saml10-xpro \ diff --git a/tests/net/gcoap_dns/Makefile.ci b/tests/net/gcoap_dns/Makefile.ci index d2263c4e10b4..dc9eee89f788 100644 --- a/tests/net/gcoap_dns/Makefile.ci +++ b/tests/net/gcoap_dns/Makefile.ci @@ -35,6 +35,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gcoap_fileserver/Makefile.ci b/tests/net/gcoap_fileserver/Makefile.ci index cb1f47ca1b2e..1dbe0553370e 100644 --- a/tests/net/gcoap_fileserver/Makefile.ci +++ b/tests/net/gcoap_fileserver/Makefile.ci @@ -31,6 +31,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_dhcpv6_client/Makefile.ci b/tests/net/gnrc_dhcpv6_client/Makefile.ci index 7ffd511d9f45..e3a56765f16a 100644 --- a/tests/net/gnrc_dhcpv6_client/Makefile.ci +++ b/tests/net/gnrc_dhcpv6_client/Makefile.ci @@ -27,6 +27,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_dhcpv6_client_6lbr/Makefile.ci b/tests/net/gnrc_dhcpv6_client_6lbr/Makefile.ci index c98a5d6fe6e7..b8be057028d3 100644 --- a/tests/net/gnrc_dhcpv6_client_6lbr/Makefile.ci +++ b/tests/net/gnrc_dhcpv6_client_6lbr/Makefile.ci @@ -49,6 +49,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l053r8 \ nucleo-l073rz \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ olimexino-stm32 \ opencm904 \ samd10-xmini \ diff --git a/tests/net/gnrc_dhcpv6_client_stateless/Makefile.ci b/tests/net/gnrc_dhcpv6_client_stateless/Makefile.ci index 64b0903af3ba..cf0b491c6d8d 100644 --- a/tests/net/gnrc_dhcpv6_client_stateless/Makefile.ci +++ b/tests/net/gnrc_dhcpv6_client_stateless/Makefile.ci @@ -36,6 +36,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_dhcpv6_relay/Makefile.ci b/tests/net/gnrc_dhcpv6_relay/Makefile.ci index ca44d76c0af1..74158cef79f9 100644 --- a/tests/net/gnrc_dhcpv6_relay/Makefile.ci +++ b/tests/net/gnrc_dhcpv6_relay/Makefile.ci @@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_ipv6_ext/Makefile.ci b/tests/net/gnrc_ipv6_ext/Makefile.ci index a81278b34fc2..bd83e713b5a7 100644 --- a/tests/net/gnrc_ipv6_ext/Makefile.ci +++ b/tests/net/gnrc_ipv6_ext/Makefile.ci @@ -25,6 +25,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_ipv6_ext_frag/Makefile.ci b/tests/net/gnrc_ipv6_ext_frag/Makefile.ci index cf1e8866e768..ada7593b43e5 100644 --- a/tests/net/gnrc_ipv6_ext_frag/Makefile.ci +++ b/tests/net/gnrc_ipv6_ext_frag/Makefile.ci @@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_ipv6_ext_opt/Makefile.ci b/tests/net/gnrc_ipv6_ext_opt/Makefile.ci index 4e4ea484962c..cf8668865e1c 100644 --- a/tests/net/gnrc_ipv6_ext_opt/Makefile.ci +++ b/tests/net/gnrc_ipv6_ext_opt/Makefile.ci @@ -20,6 +20,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/net/gnrc_ipv6_fwd_w_sub/Makefile.ci b/tests/net/gnrc_ipv6_fwd_w_sub/Makefile.ci index d6992f8eb00e..85ed3d4e3ba9 100644 --- a/tests/net/gnrc_ipv6_fwd_w_sub/Makefile.ci +++ b/tests/net/gnrc_ipv6_fwd_w_sub/Makefile.ci @@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/net/gnrc_ipv6_nib/Makefile.ci b/tests/net/gnrc_ipv6_nib/Makefile.ci index f9b2ea241afa..52f631b8da8d 100644 --- a/tests/net/gnrc_ipv6_nib/Makefile.ci +++ b/tests/net/gnrc_ipv6_nib/Makefile.ci @@ -13,6 +13,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l011k4 \ nucleo-l031k6 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ stk3200 \ stm32f030f4-demo \ diff --git a/tests/net/gnrc_ipv6_nib_6ln/Makefile.ci b/tests/net/gnrc_ipv6_nib_6ln/Makefile.ci index d6992f8eb00e..85ed3d4e3ba9 100644 --- a/tests/net/gnrc_ipv6_nib_6ln/Makefile.ci +++ b/tests/net/gnrc_ipv6_nib_6ln/Makefile.ci @@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/net/gnrc_ipv6_nib_dns/Makefile.ci b/tests/net/gnrc_ipv6_nib_dns/Makefile.ci index 4a40bb7a1e81..22888f587c0b 100644 --- a/tests/net/gnrc_ipv6_nib_dns/Makefile.ci +++ b/tests/net/gnrc_ipv6_nib_dns/Makefile.ci @@ -19,6 +19,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/net/gnrc_netif/Makefile.ci b/tests/net/gnrc_netif/Makefile.ci index ed51ee198c0a..067eb55d8973 100644 --- a/tests/net/gnrc_netif/Makefile.ci +++ b/tests/net/gnrc_netif/Makefile.ci @@ -50,6 +50,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l053r8 \ nucleo-l073rz \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ olimexino-stm32 \ opencm904 \ samd10-xmini \ diff --git a/tests/net/gnrc_rpl/Makefile.ci b/tests/net/gnrc_rpl/Makefile.ci index 381b8933dce3..b365d2ebab98 100644 --- a/tests/net/gnrc_rpl/Makefile.ci +++ b/tests/net/gnrc_rpl/Makefile.ci @@ -26,6 +26,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/net/gnrc_rpl_srh/Makefile.ci b/tests/net/gnrc_rpl_srh/Makefile.ci index a3d5e41f7d3d..10ef03f547ad 100644 --- a/tests/net/gnrc_rpl_srh/Makefile.ci +++ b/tests/net/gnrc_rpl_srh/Makefile.ci @@ -29,6 +29,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_sixlowpan/Makefile.ci b/tests/net/gnrc_sixlowpan/Makefile.ci index 7172ca67c750..ba40f223b77a 100644 --- a/tests/net/gnrc_sixlowpan/Makefile.ci +++ b/tests/net/gnrc_sixlowpan/Makefile.ci @@ -24,6 +24,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_sixlowpan_frag_minfwd/Makefile.ci b/tests/net/gnrc_sixlowpan_frag_minfwd/Makefile.ci index cf1e8866e768..ada7593b43e5 100644 --- a/tests/net/gnrc_sixlowpan_frag_minfwd/Makefile.ci +++ b/tests/net/gnrc_sixlowpan_frag_minfwd/Makefile.ci @@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_sixlowpan_frag_sfr/Makefile.ci b/tests/net/gnrc_sixlowpan_frag_sfr/Makefile.ci index 7e580c3e7173..5be0cfe5e871 100644 --- a/tests/net/gnrc_sixlowpan_frag_sfr/Makefile.ci +++ b/tests/net/gnrc_sixlowpan_frag_sfr/Makefile.ci @@ -34,6 +34,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_sixlowpan_frag_sfr_congure/Makefile.ci b/tests/net/gnrc_sixlowpan_frag_sfr_congure/Makefile.ci index 70e624db44cf..02c05b487618 100644 --- a/tests/net/gnrc_sixlowpan_frag_sfr_congure/Makefile.ci +++ b/tests/net/gnrc_sixlowpan_frag_sfr_congure/Makefile.ci @@ -34,6 +34,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_sixlowpan_frag_sfr_congure_impl/Makefile.ci b/tests/net/gnrc_sixlowpan_frag_sfr_congure_impl/Makefile.ci index 5e9935301f4a..052c856477fe 100644 --- a/tests/net/gnrc_sixlowpan_frag_sfr_congure_impl/Makefile.ci +++ b/tests/net/gnrc_sixlowpan_frag_sfr_congure_impl/Makefile.ci @@ -39,6 +39,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_sixlowpan_iphc_w_vrb/Makefile.ci b/tests/net/gnrc_sixlowpan_iphc_w_vrb/Makefile.ci index d6992f8eb00e..85ed3d4e3ba9 100644 --- a/tests/net/gnrc_sixlowpan_iphc_w_vrb/Makefile.ci +++ b/tests/net/gnrc_sixlowpan_iphc_w_vrb/Makefile.ci @@ -17,6 +17,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/net/gnrc_sock_dns/Makefile.ci b/tests/net/gnrc_sock_dns/Makefile.ci index 7d8085b2abf0..5210a715dec0 100644 --- a/tests/net/gnrc_sock_dns/Makefile.ci +++ b/tests/net/gnrc_sock_dns/Makefile.ci @@ -21,6 +21,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/net/gnrc_sock_dodtls/Makefile.ci b/tests/net/gnrc_sock_dodtls/Makefile.ci index cf1e8866e768..ada7593b43e5 100644 --- a/tests/net/gnrc_sock_dodtls/Makefile.ci +++ b/tests/net/gnrc_sock_dodtls/Makefile.ci @@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_sock_tcp/Makefile.ci b/tests/net/gnrc_sock_tcp/Makefile.ci index a684eda10bfc..3a5a04a98116 100644 --- a/tests/net/gnrc_sock_tcp/Makefile.ci +++ b/tests/net/gnrc_sock_tcp/Makefile.ci @@ -30,6 +30,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_tcp/Makefile.ci b/tests/net/gnrc_tcp/Makefile.ci index f1ecd754da94..d0600eb481f2 100644 --- a/tests/net/gnrc_tcp/Makefile.ci +++ b/tests/net/gnrc_tcp/Makefile.ci @@ -29,6 +29,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_tx_sync/Makefile.ci b/tests/net/gnrc_tx_sync/Makefile.ci index bba1816d88c0..4b06bd400b08 100644 --- a/tests/net/gnrc_tx_sync/Makefile.ci +++ b/tests/net/gnrc_tx_sync/Makefile.ci @@ -32,6 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/gnrc_udp/Makefile.ci b/tests/net/gnrc_udp/Makefile.ci index 2ccd7330f408..1bd8cadb9ccd 100644 --- a/tests/net/gnrc_udp/Makefile.ci +++ b/tests/net/gnrc_udp/Makefile.ci @@ -38,6 +38,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ saml10-xpro \ saml11-xpro \ diff --git a/tests/net/nanocoap_cli/Makefile.ci b/tests/net/nanocoap_cli/Makefile.ci index 1cef52ce3646..8797bed93933 100644 --- a/tests/net/nanocoap_cli/Makefile.ci +++ b/tests/net/nanocoap_cli/Makefile.ci @@ -23,6 +23,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ seeedstudio-gd32 \ slstk3400a \ diff --git a/tests/net/sntp/Makefile.ci b/tests/net/sntp/Makefile.ci index 3a607b97b9aa..45b5a238f8d2 100644 --- a/tests/net/sntp/Makefile.ci +++ b/tests/net/sntp/Makefile.ci @@ -19,6 +19,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/net/sock_udp_aux/Makefile.ci b/tests/net/sock_udp_aux/Makefile.ci index 0370076302ff..b327a263e74c 100644 --- a/tests/net/sock_udp_aux/Makefile.ci +++ b/tests/net/sock_udp_aux/Makefile.ci @@ -22,6 +22,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/pkg/elk/Makefile.ci b/tests/pkg/elk/Makefile.ci index 1c357ecf04b2..39c500231386 100644 --- a/tests/pkg/elk/Makefile.ci +++ b/tests/pkg/elk/Makefile.ci @@ -6,6 +6,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l011k4 \ nucleo-l031k6 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ stk3200 \ stm32f030f4-demo \ diff --git a/tests/pkg/libb2/Makefile.ci b/tests/pkg/libb2/Makefile.ci index 9d5f26c0ec3a..b6952ca4e77a 100644 --- a/tests/pkg/libb2/Makefile.ci +++ b/tests/pkg/libb2/Makefile.ci @@ -7,6 +7,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l011k4 \ nucleo-l031k6 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ stk3200 \ stm32f030f4-demo \ diff --git a/tests/pkg/relic/Makefile.ci b/tests/pkg/relic/Makefile.ci index 3a38f8e12138..65d8a74e9833 100644 --- a/tests/pkg/relic/Makefile.ci +++ b/tests/pkg/relic/Makefile.ci @@ -10,6 +10,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/pkg/spiffs/Makefile.ci b/tests/pkg/spiffs/Makefile.ci index 3e85f6099792..fbfb6472e871 100644 --- a/tests/pkg/spiffs/Makefile.ci +++ b/tests/pkg/spiffs/Makefile.ci @@ -16,6 +16,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l031k6 \ nucleo-l053r8 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ slstk3400a \ stk3200 \ diff --git a/tests/pkg/tinydtls_sock_async/Makefile.ci b/tests/pkg/tinydtls_sock_async/Makefile.ci index c98a5d6fe6e7..b8be057028d3 100644 --- a/tests/pkg/tinydtls_sock_async/Makefile.ci +++ b/tests/pkg/tinydtls_sock_async/Makefile.ci @@ -49,6 +49,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l053r8 \ nucleo-l073rz \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ olimexino-stm32 \ opencm904 \ samd10-xmini \ diff --git a/tests/sys/crypto/Makefile.ci b/tests/sys/crypto/Makefile.ci index 66c3aaadf30e..f47ee57ec909 100644 --- a/tests/sys/crypto/Makefile.ci +++ b/tests/sys/crypto/Makefile.ci @@ -18,6 +18,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l011k4 \ nucleo-l031k6 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ stk3200 \ stm32f030f4-demo \ diff --git a/tests/sys/crypto_aes_ccm/Makefile.ci b/tests/sys/crypto_aes_ccm/Makefile.ci index 66c3aaadf30e..f47ee57ec909 100644 --- a/tests/sys/crypto_aes_ccm/Makefile.ci +++ b/tests/sys/crypto_aes_ccm/Makefile.ci @@ -18,6 +18,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-l011k4 \ nucleo-l031k6 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ samd10-xmini \ stk3200 \ stm32f030f4-demo \ diff --git a/tests/unittests/Makefile.ci b/tests/unittests/Makefile.ci index f88f7a373302..acefc781a38e 100644 --- a/tests/unittests/Makefile.ci +++ b/tests/unittests/Makefile.ci @@ -72,6 +72,7 @@ BOARD_INSUFFICIENT_MEMORY := \ nucleo-wl55jc \ nz32-sc151 \ olimex-msp430-h1611 \ + olimex-msp430-h2618 \ olimexino-stm32 \ opencm904 \ openlabs-kw41z-mini-256kib \