diff --git a/sample/vcopy.cpp b/sample/vcopy.cpp index 0eed48711..7f4620eac 100644 --- a/sample/vcopy.cpp +++ b/sample/vcopy.cpp @@ -5,157 +5,187 @@ #include using namespace std; - #define HIP_ASSERT(x) (assert((x)==hipSuccess)) // HIP kernel. Each thread takes care of one element of c -__global__ void vecCopy(double *a, double *b, double *c, int n,int stride) -{ +__global__ void vecCopy(double *a, double *b, double *c, int n, int stride) { // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; - - if (id < n) { - c[id] = a[id]; - } + if (id < n) + c[id] = a[id]; } -void usage() -{ - printf("\nUsage: vcopy [n] [blocksize] {dev}\n\n"); +// Duplicate of vecCopy kernel. Included for testing purposes +__global__ void vecCopy_2(double *a, double *b, double *c, int n, int stride) { + // Get our global thread ID + int id = blockIdx.x*blockDim.x+threadIdx.x; + if (id < n) + c[id] = a[id]; +} + +void usage() { + std::cout << "Usage: vcopy [OPTIONS]\n"; + std::cout << "Required:\n"; + std::cout << " -n/--numThreads Set the num of threads\n"; + std::cout << " -b/--blockSize Set the block size\n"; + std::cout << "Optional:\n"; + std::cout << " -d/--dev Set the device ID [Default: 0]\n"; + std::cout << " -i/--iter Set the num of iterations [Default: 1]\n"; + std::cout << " -h/--help Display this help message\n"; exit(1); return; } -int main( int argc, char* argv[] ) -{ - // Size of vectors - int n; //64 MB - int blockSize, gridSize; - - // Host input vectors - double *h_a; - double *h_b; - //Host output vector - double *h_c; - //Host output vector for verification - double *h_verify_c; - - // Device input vectors - double *d_a; - double *d_b; - //Device output vector - double *d_c; - - int stride = 1; - int devId = 0; - - if(argc < 3) - usage(); - if(argc > 3) - devId = atoi(argv[3]); - - n = atoi(argv[1]); - blockSize = atoi(argv[2]); - - int numGpuDevices; - HIP_ASSERT(hipGetDeviceCount(&numGpuDevices)); - if(devId >= numGpuDevices) - devId = 0; - HIP_ASSERT(hipSetDevice(devId)); - - printf("vcopy testing on GCD %d\n", devId); - - assert(n > 0); - assert(blockSize > 0); - - // Size, in bytes, of each vector - size_t bytes = n*sizeof(double)*stride; - - // Allocate memory for each vector on host - h_a = (double*)malloc(bytes); - h_b = (double*)malloc(bytes); - h_c = (double*)malloc(bytes); - h_verify_c = (double*)malloc(bytes); - - printf("Finished allocating vectors on the CPU\n"); - // Allocate memory for each vector on GPU - HIP_ASSERT(hipMalloc(&d_a, bytes)); - HIP_ASSERT(hipMalloc(&d_b, bytes)); - HIP_ASSERT(hipMalloc(&d_c, bytes)); - - printf("Finished allocating vectors on the GPU\n"); - - int i; - // Initialize vectors on host - for( i = 0; i < n; i++ ) { - h_a[i] = i; - h_b[i] = i; - } - - - // Copy host vectors to device - HIP_ASSERT(hipMemcpy( d_a, h_a, bytes, hipMemcpyHostToDevice)); - HIP_ASSERT(hipMemcpy(d_b, h_b, bytes, hipMemcpyHostToDevice)); - - printf("Finished copying vectors to the GPU\n"); - - - // Number of thread blocks in grid - gridSize = (int)ceil((float)n/blockSize); - //gridSize = 1; +int main(int argc, char* argv[]) { + // Size of vectors + int n; //64 MB + int blockSize, gridSize; + + // Launch multiple kernels + bool multiKernel = false; + + // Host input vectors + double *h_a; + double *h_b; + //Host output vector + double *h_c; + //Host output vector for verification + double *h_verify_c; + + // Device input vectors + double *d_a; + double *d_b; + // Device output vector + double *d_c; + + int stride = 1; + int devId = 0; + int numIter = 1; + + for (int i = 0; i < argc; i++){ + std::string arg = argv[i]; + if ((arg == "--blockSize" || arg == "-b") && i+1 < argc) + blockSize = std::atoi(argv[i+1]); - int tot_waves = (blockSize*gridSize)/64; - float num_bytes_kb = ((sizeof(double))*n)/(1024); - float num_bytes_wave = (1.0*num_bytes_kb)/(1.0*tot_waves); - - printf("sw thinks it moved %f KB per wave \n", (2.0*num_bytes_wave)); - - printf("Total threads: %d, Grid Size: %d block Size:%d, Wavefronts:%d:\n", n, gridSize, blockSize, tot_waves); - printf("Launching the kernel on the GPU\n"); - // Execute the kernel - hipLaunchKernelGGL(vecCopy, dim3(gridSize), dim3(blockSize), 0, 0, d_a, d_b, d_c, n,stride); - hipDeviceSynchronize( ); + else if ((arg == "--vec" || arg == "-n") && i+1 < argc) + n = std::atoi(argv[i+1]); + + else if ((arg == "--device" || arg == "-d") && i+1 < argc) + devId = std::atoi(argv[i+1]); + + else if ((arg == "--iter" || arg == "-i") && i+1 < argc) + numIter = std::atoi(argv[i+1]); + + else if (arg == "--multikernel") + multiKernel = true; + + else if (arg == "--help" || arg == "-h") + usage(); + } + + if (blockSize == 0) + usage(); + + if (n == 0) + usage(); + + + int numGpuDevices; + HIP_ASSERT(hipGetDeviceCount(&numGpuDevices)); + if(devId >= numGpuDevices) + devId = 0; + HIP_ASSERT(hipSetDevice(devId)); + + printf("vcopy testing on GCD %d\n", devId); + + assert(n > 0); + assert(blockSize > 0); + + // Size, in bytes, of each vector + size_t bytes = n*sizeof(double)*stride; + + // Allocate memory for each vector on host + h_a = (double*)malloc(bytes); + h_b = (double*)malloc(bytes); + h_c = (double*)malloc(bytes); + h_verify_c = (double*)malloc(bytes); + + printf("Finished allocating vectors on the CPU\n"); + + // Allocate memory for each vector on GPU + HIP_ASSERT(hipMalloc(&d_a, bytes)); + HIP_ASSERT(hipMalloc(&d_b, bytes)); + HIP_ASSERT(hipMalloc(&d_c, bytes)); + + printf("Finished allocating vectors on the GPU\n"); + + // Initialize vectors on host + for(int i = 0; i < n; i++) { + h_a[i] = i; + h_b[i] = i; + } + + // Copy host vectors to device + HIP_ASSERT(hipMemcpy(d_a, h_a, bytes, hipMemcpyHostToDevice)); + HIP_ASSERT(hipMemcpy(d_b, h_b, bytes, hipMemcpyHostToDevice)); + + printf("Finished copying vectors to the GPU\n"); + + // Number of thread blocks in grid + gridSize = (int)ceil((float)n/blockSize); + int tot_waves = (blockSize*gridSize)/64; + float num_bytes_kb = ((sizeof(double))*n)/(1024); + float num_bytes_wave = (1.0*num_bytes_kb)/(1.0*tot_waves); + + printf("sw thinks it moved %f KB per wave \n", (2.0*num_bytes_wave)); + printf("Total threads: %d, Grid Size: %d block Size:%d, Wavefronts:%d:\n", n, gridSize, blockSize, tot_waves); + printf("Launching the kernel on the GPU\n"); + + // Execute the kernel + for(int i = 0; i < numIter; i++){ + hipLaunchKernelGGL(vecCopy, dim3(gridSize), dim3(blockSize), 0, 0, d_a, d_b, d_c, n, stride); + hipDeviceSynchronize(); printf("Finished executing kernel\n"); - // Copy array back to host - HIP_ASSERT(hipMemcpy( h_c, d_c, bytes, hipMemcpyDeviceToHost)); - printf("Finished copying the output vector from the GPU to the CPU\n"); - - //Compute for CPU - for(i=0; i 1e-5) - { - printf("Error at position i %d, Expected: %f, Found: %f \n", i, h_c[i], d_c[i]); - } - } - - // printf("Printing few elements from the output vector\n"); - - for(i=0; i < 20; i++) - { - // printf("Output[%d]:%f\n",i, h_c[i]); + // Optionally, launch a second kernel. Only here for testing purposes + if (multiKernel){ + hipLaunchKernelGGL(vecCopy_2, dim3(gridSize), dim3(blockSize), 0, 0, d_a, d_b, d_c, n, stride); + hipDeviceSynchronize(); + printf("Finished executing kernel\n"); } - - printf("Releasing GPU memory\n"); - - // Release device memory - HIP_ASSERT(hipFree(d_a)); - HIP_ASSERT(hipFree(d_b)); - HIP_ASSERT(hipFree(d_c)); - - // Release host memory - printf("Releasing CPU memory\n"); - free(h_a); - free(h_b); - free(h_c); - - return 0; + } + + // Copy array back to host + HIP_ASSERT(hipMemcpy( h_c, d_c, bytes, hipMemcpyDeviceToHost)); + printf("Finished copying the output vector from the GPU to the CPU\n"); + + // Compute for CPU + for(int i=0; i 1e-5) + printf("Error at position i %d, Expected: %f, Found: %f \n", i, h_c[i], d_c[i]); + } + //printf("Printing few elements from the output vector\n"); + for(int i = 0; i < 20; i++) { + //printf("Output[%d]:%f\n",i, h_c[i]); + } + + printf("Releasing GPU memory\n"); + + // Release device memory + HIP_ASSERT(hipFree(d_a)); + HIP_ASSERT(hipFree(d_b)); + HIP_ASSERT(hipFree(d_c)); + + // Release host memory + printf("Releasing CPU memory\n"); + free(h_a); + free(h_b); + free(h_c); + + return 0; } diff --git a/src/parser.py b/src/argparser.py similarity index 78% rename from src/parser.py rename to src/argparser.py index 38f020af8..438b49273 100644 --- a/src/parser.py +++ b/src/argparser.py @@ -22,36 +22,23 @@ # SOFTWARE. ##############################################################################el -import os import argparse import shutil +import os - -from common import ( - OMNIPERF_HOME, - PROG, - SOC_LIST, -) # Import global variables -from common import getVersion, getVersionDisplay - - -def parse(my_parser): - # versioning info - vData = getVersion() - versionString = getVersionDisplay(vData["version"], vData["sha"], vData["mode"]) - +def omniarg_parser(parser, omniperf_home, omniperf_version): # ----------------------------------------- # Parse arguments (dependent on mode) # ----------------------------------------- ## General Command Line Options ## ---------------------------- - general_group = my_parser.add_argument_group("General Options") - my_parser._positionals.title = "Modes" - my_parser._optionals.title = "Help" - general_group.add_argument("-v", "--version", action="version", version=versionString) + general_group = parser.add_argument_group("General Options") + parser._positionals.title = "Modes" + parser._optionals.title = "Help" + general_group.add_argument("-v", "--version", action="version", version=omniperf_version["ver_pretty"]) - subparsers = my_parser.add_subparsers( + subparsers = parser.add_subparsers( dest="mode", help="Select mode of interaction with the target application:" ) @@ -61,17 +48,17 @@ def parse(my_parser): "profile", help="Profile the target application", usage=""" - \nomniperf profile --name [profile options] [roofline options] -- + \nomniperf profile --name [profile options] [roofline options] -- - \n\n------------------------------------------------------------------------------- - \nExamples: - \n\tomniperf profile -n vcopy_all -- ./vcopy 1048576 256 - \n\tomniperf profile -n vcopy_SPI_TCC -b SQ TCC -- ./vcopy 1048576 256 - \n\tomniperf profile -n vcopy_kernel -k vecCopy -- ./vcopy 1048576 256 - \n\tomniperf profile -n vcopy_disp -d 0 -- ./vcopy 1048576 256 - \n\tomniperf profile -n vcopy_roof --roof-only -- ./vcopy 1048576 256 - \n-------------------------------------------------------------------------------\n - """, + \n\n------------------------------------------------------------------------------- + \nExamples: + \n\tomniperf profile -n vcopy_all -- ./vcopy -n 1048576 -b 256 + \n\tomniperf profile -n vcopy_SPI_TCC -b SQ TCC -- ./vcopy -n 1048576 -b 256 + \n\tomniperf profile -n vcopy_kernel -k vecCopy -- ./vcopy -n 1048576 -b 256 + \n\tomniperf profile -n vcopy_disp -d 0 -- ./vcopy -n 1048576 -b 256 + \n\tomniperf profile -n vcopy_roof --roof-only -- ./vcopy -n 1048576 -b 256 + \n-------------------------------------------------------------------------------\n + """, prog="tool", allow_abbrev=False, formatter_class=lambda prog: argparse.RawTextHelpFormatter( @@ -79,14 +66,16 @@ def parse(my_parser): ), ) profile_parser._optionals.title = "Help" + general_group = profile_parser.add_argument_group("General Options") profile_group = profile_parser.add_argument_group("Profile Options") roofline_group = profile_parser.add_argument_group("Standalone Roofline Options") - general_group.add_argument("-v", "--version", action="version", version=versionString) + general_group.add_argument("-v", "--version", action="version", version=omniperf_version["ver_pretty"]) general_group.add_argument( "-V", "--verbose", help="Increase output verbosity", action="count", default=0 ) + profile_group.add_argument( "-n", "--name", @@ -103,7 +92,7 @@ def parse(my_parser): metavar="", type=str, dest="path", - default=os.getcwd() + "/workloads", + default=os.path.join(os.getcwd(), "workloads"), required=False, help="\t\t\tSpecify path to save workload.\n\t\t\t(DEFAULT: {}/workloads/)".format( os.getcwd() @@ -120,6 +109,27 @@ def parse(my_parser): default=None, help="\t\t\tKernel filtering.", ) + profile_group.add_argument( + "-d", + "--dispatch", + type=str, + metavar="", + nargs="+", + dest="dispatch", + required=False, + help="\t\t\tDispatch ID filtering.", + ) + profile_group.add_argument( + "-b", + "--ipblocks", + type=str, + dest="ipblocks", + metavar="", + nargs="+", + required=False, + choices=["SQ", "SQC", "TA", "TD", "TCP", "TCC", "SPI", "CPC", "CPF"], + help="\t\t\tIP block filtering:\n\t\t\t SQ\n\t\t\t SQC\n\t\t\t TA\n\t\t\t TD\n\t\t\t TCP\n\t\t\t TCC\n\t\t\t SPI\n\t\t\t CPC\n\t\t\t CPF", + ) result = shutil.which("rocscope") if result: @@ -160,28 +170,6 @@ def parse(my_parser): profile_group.add_argument( "--kernel-summaries", default=False, dest="summaries", help=argparse.SUPPRESS ) - - profile_group.add_argument( - "-b", - "--ipblocks", - type=str, - dest="ipblocks", - metavar="", - nargs="+", - required=False, - choices=["SQ", "SQC", "TA", "TD", "TCP", "TCC", "SPI", "CPC", "CPF"], - help="\t\t\tIP block filtering:\n\t\t\t SQ\n\t\t\t SQC\n\t\t\t TA\n\t\t\t TD\n\t\t\t TCP\n\t\t\t TCC\n\t\t\t SPI\n\t\t\t CPC\n\t\t\t CPF", - ) - profile_group.add_argument( - "-d", - "--dispatch", - type=str, - metavar="", - nargs="+", - dest="dispatch", - required=False, - help="\t\t\tDispatch ID filtering.", - ) profile_group.add_argument( "--join-type", metavar="", @@ -205,7 +193,7 @@ def parse(my_parser): help="\t\t\tProvide command for profiling after double dash.", ) profile_group.add_argument( - "--kernelVerbose", + "--kernel-verbose", required=False, metavar="", help="\t\t\tSpecify Kernel Name verbose level 1-5. Lower the level, shorter the kernel name. (DEFAULT: 2) (DISABLE: 5)", @@ -268,14 +256,14 @@ def parse(my_parser): "database", help="Interact with Omniperf database", usage=""" - \nomniperf database [connection options] + \nomniperf database [connection options] - \n\n------------------------------------------------------------------------------- - \nExamples: - \n\tomniperf database --import -H pavii1 -u temp -t asw -w workloads/vcopy/mi200/ - \n\tomniperf database --remove -H pavii1 -u temp -w omniperf_asw_sample_mi200 - \n-------------------------------------------------------------------------------\n - """, + \n\n------------------------------------------------------------------------------- + \nExamples: + \n\tomniperf database --import -H pavii1 -u temp -t asw -w workloads/vcopy/mi200/ + \n\tomniperf database --remove -H pavii1 -u temp -w omniperf_asw_sample_mi200 + \n-------------------------------------------------------------------------------\n + """, prog="tool", allow_abbrev=False, formatter_class=lambda prog: argparse.RawTextHelpFormatter( @@ -288,7 +276,7 @@ def parse(my_parser): interaction_group = db_parser.add_argument_group("Interaction Type") connection_group = db_parser.add_argument_group("Connection Options") - general_group.add_argument("-v", "--version", action="version", version=versionString) + general_group.add_argument("-v", "--version", action="version", version=omniperf_version["ver_pretty"]) general_group.add_argument( "-V", "--verbose", help="Increase output verbosity", action="count", default=0 ) @@ -357,15 +345,15 @@ def parse(my_parser): "analyze", help="Analyze existing profiling results at command line", usage=""" - \nomniperf analyze --path [analyze options] + \nomniperf analyze --path [analyze options] - \n\n------------------------------------------------------------------------------- - \nExamples: - \n\tomniperf analyze -p workloads/vcopy/mi200/ --list-metrics gfx90a - \n\tomniperf analyze -p workloads/mixbench/mi200/ --filter-dispatch-ids 12 34 --decimal 3 - \n\tomniperf analyze -p workloads/mixbench/mi200/ --gui - \n-------------------------------------------------------------------------------\n - """, + \n\n------------------------------------------------------------------------------- + \nExamples: + \n\tomniperf analyze -p workloads/vcopy/mi200/ --list-metrics gfx90a + \n\tomniperf analyze -p workloads/mixbench/mi200/ --dispatch 12 34 --decimal 3 + \n\tomniperf analyze -p workloads/mixbench/mi200/ --gui + \n-------------------------------------------------------------------------------\n + """, prog="tool", allow_abbrev=False, formatter_class=lambda prog: argparse.RawTextHelpFormatter( @@ -376,8 +364,9 @@ def parse(my_parser): general_group = analyze_parser.add_argument_group("General Options") analyze_group = analyze_parser.add_argument_group("Analyze Options") + analyze_advanced_group = analyze_parser.add_argument_group("Advanced Options") - general_group.add_argument("-v", "--version", action="version", version=versionString) + general_group.add_argument("-v", "--version", action="version", version=omniperf_version["ver_pretty"]) general_group.add_argument( "-V", "--verbose", help="Increase output verbosity", action="count", default=0 ) @@ -392,31 +381,16 @@ def parse(my_parser): action="append", help="\t\tSpecify the raw data root dirs or desired results directory.", ) - analyze_group.add_argument( - "-o", - "--output", - metavar="", - dest="output_file", - help="\t\tSpecify the output file.", - ) analyze_group.add_argument( "--list-kernels", action="store_true", - help="\t\tList kernels. Top 10 kernels sorted by duration (descending order).", + help="\t\tList all detected kernels. Sorted by duration (descending order).", ) analyze_group.add_argument( "--list-metrics", metavar="", choices=["gfx906", "gfx908", "gfx90a"], - help="\t\tList metrics can be customized to analyze on specific arch:\n\t\t gfx906\n\t\t gfx908\n\t\t gfx90a", - ) - analyze_group.add_argument( - "-b", - "--metric", - dest="filter_metrics", - metavar="", - nargs="+", - help="\t\tSpecify IP block/metric id(s) from --list-metrics for filtering.", + help="\t\tList all available metrics for analysis on specified arch:\n\t\t gfx906\n\t\t gfx908\n\t\t gfx90a", ) analyze_group.add_argument( "-k", @@ -437,6 +411,14 @@ def parse(my_parser): action="append", help="\t\tSpecify dispatch id(s) for filtering.", ) + analyze_group.add_argument( + "-b", + "--metric", + dest="filter_metrics", + metavar="", + nargs="+", + help="\t\tSpecify IP block/metric id(s) from --list-metrics for filtering.", + ) analyze_group.add_argument( "--gpu-id", dest="gpu_id", @@ -445,30 +427,42 @@ def parse(my_parser): help="\t\tSpecify GPU id(s) for filtering.", ) analyze_group.add_argument( - "-n", - "--normal-unit", - dest="normal_unit", + "-o", + "--output", metavar="", - default="per_wave", - choices=["per_wave", "per_cycle", "per_second", "per_kernel"], - help="\t\tSpecify the normalization unit: (DEFAULT: per_wave)\n\t\t per_wave\n\t\t per_cycle\n\t\t per_second\n\t\t per_kernel", + dest="output_file", + help="\t\tSpecify an output file to save analysis results.", ) analyze_group.add_argument( + "--gui", + type=int, + nargs="?", + const=8050, + help="\t\tActivate a GUI to interate with Omniperf metrics.\n\t\tOptionally, specify port to launch application (DEFAULT: 8050)", + ) + analyze_advanced_group.add_argument( + "--random-port", + action="store_true", + help="\t\tRandomly generate a port to launch GUI application.\n\t\tRegistered Ports range inclusive (1024-49151).", + ) + analyze_advanced_group.add_argument( "--max-kernel-num", dest="max_kernel_num", metavar="", type=int, default=10, - help="\t\tSpecify the maximum number of kernels shown (DEFAULT: 10)", + help="\t\tSpecify the maximum number of kernels shown in \"Top Stats\" table (DEFAULT: 10)", ) - analyze_group.add_argument( - "--config-dir", - dest="config_dir", + analyze_advanced_group.add_argument( + "-n", + "--normal-unit", + dest="normal_unit", metavar="", - help="\t\tSpecify the directory of customized configs.", - default=OMNIPERF_HOME.joinpath("omniperf_analyze/configs"), + default="per_wave", + choices=["per_wave", "per_cycle", "per_second", "per_kernel"], + help="\t\tSpecify the normalization unit: (DEFAULT: per_wave)\n\t\t per_wave\n\t\t per_cycle\n\t\t per_second\n\t\t per_kernel", ) - analyze_group.add_argument( + analyze_advanced_group.add_argument( "-t", "--time-unit", dest="time_unit", @@ -477,20 +471,27 @@ def parse(my_parser): choices=["s", "ms", "us", "ns"], help="\t\tSpecify display time unit in kernel top stats: (DEFAULT: ns)\n\t\t s\n\t\t ms\n\t\t us\n\t\t ns", ) - analyze_group.add_argument( + analyze_advanced_group.add_argument( "--decimal", type=int, metavar="", default=2, - help="\t\tSpecify the decimal to display. (DEFAULT: 2)", + help="\t\tSpecify desired decimal precision of analysis results. (DEFAULT: 2)", ) - analyze_group.add_argument( + analyze_advanced_group.add_argument( + "--config-dir", + dest="config_dir", + metavar="", + help="\t\tSpecify the directory of customized configs.", + default=omniperf_home.joinpath("omniperf_analyze/configs"), + ) + analyze_advanced_group.add_argument( "--save-dfs", dest="df_file_dir", metavar="", help="\t\tSpecify the dirctory to save analysis dataframe csv files.", ) - analyze_group.add_argument( + analyze_advanced_group.add_argument( "--cols", type=int, dest="cols", @@ -498,30 +499,18 @@ def parse(my_parser): nargs="+", help="\t\tSpecify column indices to display.", ) - analyze_group.add_argument("-g", action="store_true", help="\t\tDebug single metric.") - analyze_group.add_argument( + analyze_advanced_group.add_argument("-g", action="store_true", help="\t\tDebug single metric.") + analyze_advanced_group.add_argument( "--dependency", action="store_true", help="\t\tList the installation dependency." ) - analyze_group.add_argument( - "--gui", - type=int, - nargs="?", - const=8050, - help="\t\tActivate a GUI to interate with Omniperf metrics.\n\t\tOptionally, specify port to launch application (DEFAULT: 8050)", - ) - analyze_group.add_argument( - "--random-port", - action="store_true", - help="\t\tRandomly generate a port to launch GUI application.\n\t\tRegistered Ports range inclusive (1024-49151).", - ) - analyze_group.add_argument( - "--kernelVerbose", + analyze_advanced_group.add_argument( + "--kernel-verbose", required=False, metavar="", help="\t\tSpecify Kernel Name verbose level 1-5. Lower the level, shorter the kernel name. (DEFAULT: 5) (DISABLE: 5)", default=5, type=int, ) - analyze_group.add_argument( + analyze_advanced_group.add_argument( "--report-diff", default=0, nargs="?", type=int, help=argparse.SUPPRESS - ) + ) \ No newline at end of file diff --git a/src/common.py b/src/common.py deleted file mode 100644 index fa2909573..000000000 --- a/src/common.py +++ /dev/null @@ -1,110 +0,0 @@ -##############################################################################bl -# MIT License -# -# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in all -# copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -# SOFTWARE. -##############################################################################el - -import os -import sys -import io -from pathlib import Path -import subprocess -import shutil - -OMNIPERF_HOME = Path(__file__).resolve().parent - -# OMNIPERF INFO -PROG = "omniperf" -SOC_LIST = ["mi50", "mi100", "mi200", "vega10"] -DISTRO_MAP = {"platform:el8": "rhel8", "15.3": "sle15sp3", "20.04": "ubuntu20_04"} - - -def resolve_rocprof(returnPath=False): - # ROCPROF INFO - if not "ROCPROF" in os.environ.keys(): - rocprof_cmd = "rocprof" - else: - rocprof_cmd = os.environ["ROCPROF"] - - rocprof_path = shutil.which(rocprof_cmd) - - if not rocprof_path: - print("\nError: Unable to resolve path to %s binary" % rocprof_cmd) - print( - "Please verify installation or set ROCPROF environment variable with full path." - ) - sys.exit(1) - else: - # Resolve any sym links in file path - rocprof_path = os.path.realpath(rocprof_path.rstrip("\n")) - print("ROC Profiler: ", rocprof_path) - if returnPath: - return rocprof_path - else: - return rocprof_cmd - - -def getVersion(): - # symantic version info - version = os.path.join(OMNIPERF_HOME.parent, "VERSION") - try: - with open(version, "r") as file: - VER = file.read().replace("\n", "") - except EnvironmentError: - print("ERROR: Cannot find VERSION file at {}".format(version)) - sys.exit(1) - - # git version info - gitDir = os.path.join(OMNIPERF_HOME.parent, ".git") - if (shutil.which("git") is not None) and os.path.exists(gitDir): - gitQuery = subprocess.run( - ["git", "log", "--pretty=format:%h", "-n", "1"], - stdout=subprocess.PIPE, - stderr=subprocess.DEVNULL, - ) - if gitQuery.returncode != 0: - SHA = "unknown" - MODE = "unknown" - else: - SHA = gitQuery.stdout.decode("utf-8") - MODE = "dev" - else: - shaFile = os.path.join(OMNIPERF_HOME.parent, "VERSION.sha") - try: - with open(shaFile, "r") as file: - SHA = file.read().replace("\n", "") - except EnvironmentError: - print("ERROR: Cannot find VERSION.sha file at {}".format(shaFile)) - sys.exit(1) - - MODE = "release" - - versionData = {"version": VER, "sha": SHA, "mode": MODE} - return versionData - - -def getVersionDisplay(version, sha, mode): - buf = io.StringIO() - print("-" * 40, file=buf) - print("Omniperf version: %s (%s)" % (version, mode), file=buf) - print("Git revision: %s" % sha, file=buf) - print("-" * 40, file=buf) - return buf.getvalue() diff --git a/src/soc_base.py b/src/config.py similarity index 74% rename from src/soc_base.py rename to src/config.py index 778068074..ce2cd8596 100644 --- a/src/soc_base.py +++ b/src/config.py @@ -22,22 +22,8 @@ # SOFTWARE. ##############################################################################el -from abc import ABC, abstractmethod - -class OmniSoC_Base(): - def __init__(self,args): - self.__args = args - - # Required methods to be implemented by child classes - @abstractmethod - def profiling_setup(self): - """Perform any SoC-specific setup prior to profiling. - """ - pass - - @abstractmethod - def analysis_setup(self): - """Perform any SoC-specific setup prior to analysis. - """ - pass +from pathlib import Path +# NB: Creating a new module to share global vars across modules +omniperf_home = Path(__file__).resolve().parent +prog = "omniperf" \ No newline at end of file diff --git a/src/docs/analysis.md b/src/docs/analysis.md index 9b68249c4..8d2a88cc5 100644 --- a/src/docs/analysis.md +++ b/src/docs/analysis.md @@ -107,7 +107,7 @@ Analyze 2. System Speed-of-Light .... ``` - 2. Use `--list-metrics` to generate a list of availible metrics for inspection + 2. Use `--list-metrics` to generate a list of available metrics for inspection ```shell-session $ omniperf analyze -p workloads/vcopy/mi200/ --list-metrics gfx90a ╒═════════╤═════════════════════════════╕ @@ -539,7 +539,7 @@ Connection Options: -p , --password The user's password. (will be requested later if it's not set) -t , --team Specify Team prefix. -w , --workload Specify name of workload (to remove) or path to workload (to import) - -k , --kernelVerbose Specify Kernel Name verbose level 1-5. + -k , --kernel-verbose Specify Kernel Name verbose level 1-5. Lower the level, shorter the kernel name. (DEFAULT: 2) (DISABLE: 5) ``` diff --git a/src/docs/getting_started.md b/src/docs/getting_started.md index 80ae888f0..5b9f8c0f9 100644 --- a/src/docs/getting_started.md +++ b/src/docs/getting_started.md @@ -14,7 +14,7 @@ To collect the default set of data for all kernels in the target application, launch, e.g.: ```shell - $ omniperf profile -n vcopy_data -- ./vcopy 1048576 256 + $ omniperf profile -n vcopy_data -- ./vcopy -n 1048576 -b 256 ``` The app runs, each kernel is launched, and profiling results are generated. By default, results are written to (e.g.,) ./workloads/vcopy_data (configurable via the `-n` argument). To collect all requested profile information, it may be required to replay kernels multiple times. diff --git a/src/docs/installation.md b/src/docs/installation.md index af8c21bac..db18ab040 100644 --- a/src/docs/installation.md +++ b/src/docs/installation.md @@ -229,7 +229,7 @@ Edit both the Dashboard Name and the Unique Identifier (UID) to uniquely identif Using your dashboard -Once you've imported a dashboard you're ready to begin! Start by browsing availible dashboards and selecting the dashboard you've just imported. +Once you've imported a dashboard you're ready to begin! Start by browsing available dashboards and selecting the dashboard you've just imported. ![Opening your dashboard](images/opening_dashboard.png) diff --git a/src/docs/profiling.md b/src/docs/profiling.md index 56c234604..ab677147f 100644 --- a/src/docs/profiling.md +++ b/src/docs/profiling.md @@ -23,7 +23,7 @@ the MI200 platform. $ hipcc vcopy.cpp -o vcopy $ ls vcopy vcopy.cpp -$ ./vcopy 1048576 256 +$ ./vcopy -n 1048576 -b 256 Finished allocating vectors on the CPU Finished allocating vectors on the GPU Finished copying vectors to the GPU @@ -37,49 +37,48 @@ Releasing CPU memory ``` ## Omniperf Profiling -The *omniperf* script, availible through the [Omniperf](https://github.com/AMDResearch/omniperf) repository, is used to aquire all necessary perfmon data through analysis of compute workloads. +The *omniperf* script, available through the [Omniperf](https://github.com/AMDResearch/omniperf) repository, is used to aquire all necessary perfmon data through analysis of compute workloads. **omniperf help:** ```shell-session $ omniperf profile --help -ROC Profiler: /usr/bin/rocprof - -usage: - +usage: + omniperf profile --name [profile options] [roofline options] -- - + ------------------------------------------------------------------------------- - + Examples: - - omniperf profile -n vcopy_all -- ./vcopy 1048576 256 - - omniperf profile -n vcopy_SPI_TCC -b SQ TCC -- ./vcopy 1048576 256 - - omniperf profile -n vcopy_kernel -k vecCopy -- ./vcopy 1048576 256 - - omniperf profile -n vcopy_disp -d 0 -- ./vcopy 1048576 256 - - omniperf profile -n vcopy_roof --roof-only -- ./vcopy 1048576 256 - + + omniperf profile -n vcopy_all -- ./vcopy -n 1048576 -b 256 + + omniperf profile -n vcopy_SPI_TCC -b SQ TCC -- ./vcopy -n 1048576 -b 256 + + omniperf profile -n vcopy_kernel -k vecCopy -- ./vcopy -n 1048576 -b 256 + + omniperf profile -n vcopy_disp -d 0 -- ./vcopy -n 1048576 -b 256 + + omniperf profile -n vcopy_roof --roof-only -- ./vcopy -n 1048576 -b 256 + ------------------------------------------------------------------------------- - + Help: - -h, --help show this help message and exit + -h, --help show this help message and exit General Options: - -v, --version show program's version number and exit - -V, --verbose Increase output verbosity + -v, --version show program's version number and exit + -V, --verbose Increase output verbosity Profile Options: -n , --name Assign a name to workload. -p , --path Specify path to save workload. - (DEFAULT: /home/colramos/GitHub/omniperf/workloads/) + (DEFAULT: {os.getcwd()}/workloads/) -k [ ...], --kernel [ ...] Kernel filtering. + -d [ ...], --dispatch [ ...] Dispatch ID filtering. -b [ ...], --ipblocks [ ...] IP block filtering: SQ SQC @@ -90,16 +89,19 @@ Profile Options: SPI CPC CPF - -d [ ...], --dispatch [ ...] Dispatch ID filtering. + --join-type Choose how to join rocprof runs: (DEFAULT: grid) + kernel (i.e. By unique kernel name dispatches) + grid (i.e. By unique kernel name + grid size dispatches) --no-roof Profile without collecting roofline data. -- [ ...] Provide command for profiling after double dash. + --kernel-verbose Specify Kernel Name verbose level 1-5. Lower the level, shorter the kernel name. (DEFAULT: 2) (DISABLE: 5) Standalone Roofline Options: --roof-only Profile roofline data only. --sort Overlay top kernels or top dispatches: (DEFAULT: kernels) kernels dispatches - -m , --mem-level Filter by memory level: (DEFAULT: ALL) + -m [ ...], --mem-level [ ...] Filter by memory level: (DEFAULT: ALL) HBM L2 vL1D @@ -113,36 +115,40 @@ The following sample command profiles the *vcopy* workload. **vcopy profiling:** ```shell-session $ omniperf profile --name vcopy -- ./vcopy 1048576 256 -Resolving rocprof -ROC Profiler: /usr/bin/rocprof - - -------------- -Profile only -------------- - -omniperf ver: 1.0.8-PR1 -Path: /home/colramos/GitHub/omniperf-pub/workloads -Target: mi200 -Command: /home/colramos/vcopy 1048576 256 -Kernel Selection: None -Dispatch Selection: None +ROC Profiler: /opt/rocm-5.2.1/bin/rocprof +Execution mode = profile + ___ _ __ + / _ \ _ __ ___ _ __ (_)_ __ ___ _ __ / _| +| | | | '_ ` _ \| '_ \| | '_ \ / _ \ '__| |_ +| |_| | | | | | | | | | | |_) | __/ | | _| + \___/|_| |_| |_|_| |_|_| .__/ \___|_| |_| + |_| + +SoC = mi200 +Profiler choice = rocprofv1 +omniperf ver: 1.0.10 +Path: {os.getcwd()}/workloads/vcopy/mi200 +Target: mi200 +Command: ./vcopy -n 1048576 -b 256 +Kernel Selection: None +Dispatch Selection: None IP Blocks: All -Log: /home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/log.txt - -/home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/perfmon/SQ_INST_LEVEL_SMEM.txt -RPL: on '230411_165021' from '/opt/rocm-5.2.1' in '/home/colramos/GitHub/omniperf-pub' -RPL: profiling '""/home/colramos/vcopy 1048576 256""' -RPL: input file '/home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/perfmon/SQ_INST_LEVEL_SMEM.txt' -RPL: output dir '/tmp/rpl_data_230411_165021_26406' -RPL: result dir '/tmp/rpl_data_230411_165021_26406/input0_results_230411_165021' -Finished allocating vectors on the CPU -ROCProfiler: input from "/tmp/rpl_data_230411_165021_26406/input0.xml" +KernelName verbose: 2 + +Current input file: {os.getcwd()}/workloads/vcopy/mi200/perfmon/pmc_perf_2.txt +RPL: on '231120_142934' from '/opt/rocm-5.2.1' in '{os.getcwd()}' +RPL: profiling '""./vcopy -n 1048576 -b 256""' +RPL: input file '{os.getcwd()}/workloads/vcopy/mi200/perfmon/pmc_perf_2.txt' +RPL: output dir '/tmp/rpl_data_231120_142934_262088' +RPL: result dir '/tmp/rpl_data_231120_142934_262088/input0_results_231120_142934' +ROCProfiler: input from "/tmp/rpl_data_231120_142934_262088/input0.xml" gpu_index = kernel = range = - 3 metrics - SQ_INSTS_SMEM, SQ_INST_LEVEL_SMEM, SQ_ACCUM_PREV_HIRES + 26 metrics + SQ_INSTS_VALU_TRANS_F16, SQ_INSTS_VALU_ADD_F32, SQ_INSTS_VALU_MUL_F32, SQ_INSTS_VALU_FMA_F32, SQ_INSTS_VALU_TRANS_F32, SQ_INSTS_VALU_ADD_F64, SQ_INSTS_VALU_MUL_F64, SQ_INSTS_VALU_FMA_F64, TCP_VOLATILE_sum, TCP_TOTAL_ACCESSES_sum, TCP_TOTAL_READ_sum, TCP_TOTAL_WRITE_sum, TA_BUFFER_ATOMIC_WAVEFRONTS_sum, TA_BUFFER_TOTAL_CYCLES_sum, TD_ATOMIC_WAVEFRONT_sum, TD_STORE_WAVEFRONT_sum, SPI_RA_REQ_NO_ALLOC, SPI_RA_REQ_NO_ALLOC_CSN, CPC_CPC_STAT_STALL, CPC_UTCL1_STALL_ON_TRANSLATION, CPF_CPF_STAT_IDLE, CPF_CPF_TCIU_IDLE, TCC_REQ_sum, TCC_STREAMING_REQ_sum, TCC_HIT_sum, TCC_MISS_sum +vcopy testing on GCD 0 +Finished allocating vectors on the CPU Finished allocating vectors on the GPU Finished copying vectors to the GPU sw thinks it moved 1.000000 KB per wave @@ -153,9 +159,10 @@ Finished copying the output vector from the GPU to the CPU Releasing GPU memory Releasing CPU memory -... ... -ROCPRofiler: 1 contexts collected, output directory /tmp/rpl_data_220527_130317_1787038/input_results_220527_130317 -File 'workloads/vcopy/mi200/timestamps.csv' is generating +... + +Empirical Roofline Calculation +Copyright © 2022 Advanced Micro Devices, Inc. All rights reserved. Total detected GPU devices: 2 GPU Device 0: Profiling... 99% [||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ] @@ -213,7 +220,7 @@ etc. The SOC names are generated as a part of Omniperf, and do not necessarily > Note: Additionally, you'll notice a few extra files. An SoC parameters file, *sysinfo.csv*, is created to reflect the target device settings. All profiling output is stored in *log.txt*. Roofline specific benchmark results are stored in *roofline.csv*. -```shell +```shell-session $ ls workloads/vcopy/mi200/ total 112 drwxrwxr-x 3 colramos colramos 4096 Apr 11 16:42 . @@ -254,39 +261,42 @@ i.e. filtering dispatch X, but dispatch X does not match your kernel name filter One can profile a selected IP Block to speed up the profiling process. All profiling results are accumulated in the same target directory, without overwriting those for other IP blocks, hence enabling the incremental profiling and analysis. The following example only gathers hardware counters for SQ and TCC, skipping all other IP Blocks: -```shell -$ omniperf profile --name vcopy -b SQ TCC -- ./sample/vcopy 1048576 256 -Resolving rocprof -ROC Profiler: /usr/bin/rocprof - - -------------- -Profile only -------------- - -omniperf ver: 1.0.8-PR1 -Path: /home/colramos/GitHub/omniperf-pub/workloads -Target: mi200 -Command: /home/colramos/vcopy 1048576 256 -Kernel Selection: None -Dispatch Selection: None -IP Blocks: ['SQ', 'TCC'] -fname: pmc_sq_perf2: Added -fname: pmc_td_perf: Skipped -fname: pmc_tcc2_perf: Skipped -fname: pmc_tcp_perf: Skipped +```shell-session +$ omniperf profile --name vcopy -b SQ TCC -- ./sample/vcopy -n 1048576 -b 256 +ROC Profiler: /opt/rocm-5.2.1/bin/rocprof +Execution mode = profile + ___ _ __ + / _ \ _ __ ___ _ __ (_)_ __ ___ _ __ / _| +| | | | '_ ` _ \| '_ \| | '_ \ / _ \ '__| |_ +| |_| | | | | | | | | | | |_) | __/ | | _| + \___/|_| |_| |_|_| |_|_| .__/ \___|_| |_| + |_| + +SoC = mi200 +Profiler choice = rocprofv1 +fname: pmc_cpc_perf: Skipped fname: pmc_spi_perf: Skipped +fname: pmc_cpf_perf: Skipped +fname: pmc_tcp_perf: Skipped fname: pmc_sq_perf4: Added -fname: pmc_sqc_perf1: Skipped fname: pmc_tcc_perf: Added -fname: pmc_cpf_perf: Skipped fname: pmc_sq_perf8: Added -fname: pmc_cpc_perf: Skipped -fname: pmc_sq_perf1: Added fname: pmc_ta_perf: Skipped +fname: pmc_sq_perf1: Added fname: pmc_sq_perf3: Added +fname: pmc_td_perf: Skipped +fname: pmc_tcc2_perf: Skipped +fname: pmc_sqc_perf1: Skipped fname: pmc_sq_perf6: Added -Log: /home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/log.txt +fname: pmc_sq_perf2: Added +omniperf ver: 1.0.10 +Path: {os.getcwd()}/vcopy_/mi200 +Target: mi200 +Command: ./vcopy -n 1048576 -b 256 +Kernel Selection: None +Dispatch Selection: None +IP Blocks: ['sq', 'tcc'] +KernelName verbose: 2 ... ``` @@ -294,37 +304,28 @@ Log: /home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/log.txt Kernel filtering is based on the name of the kernel(s) you'd like to isolate. Use a kernel name substring list to isolate desired kernels. The following example demonstrates profiling isolating the kernel matching substring "vecCopy": -```shell -$ omniperf profile --name vcopy -k vecCopy -- ./vcopy 1048576 256 -Resolving rocprof -ROC Profiler: /usr/bin/rocprof - - -------------- -Profile only -------------- - -omniperf ver: 1.0.8-PR1 -Path: /home/colramos/GitHub/omniperf-pub/workloads -Target: mi200 -Command: /home/colramos/vcopy 1048576 256 -Kernel Selection: ['vecCopy'] -Dispatch Selection: None +```shell-session +$ omniperf profile --name vcopy -k vecCopy -- ./vcopy -n 1048576 -b 256 +ROC Profiler: /opt/rocm-5.2.1/bin/rocprof +Execution mode = profile + ___ _ __ + / _ \ _ __ ___ _ __ (_)_ __ ___ _ __ / _| +| | | | '_ ` _ \| '_ \| | '_ \ / _ \ '__| |_ +| |_| | | | | | | | | | | |_) | __/ | | _| + \___/|_| |_| |_|_| |_|_| .__/ \___|_| |_| + |_| + +SoC = mi200 +Profiler choice = rocprofv1 +omniperf ver: 1.0.10 +Path: {os.getcwd()}/workloads/vcopy/mi200 +Target: mi200 +Command: ./vcopy -n 1048576 -b 256 +Kernel Selection: ['vecCopy'] +Dispatch Selection: None IP Blocks: All -Log: /home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/log.txt - -/home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/perfmon/SQ_INST_LEVEL_SMEM.txt -RPL: on '230411_170300' from '/opt/rocm-5.2.1' in '/home/colramos/GitHub/omniperf-pub' -RPL: profiling '""/home/colramos/vcopy 1048576 256""' -RPL: input file '/home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/perfmon/SQ_INST_LEVEL_SMEM.txt' -RPL: output dir '/tmp/rpl_data_230411_170300_29696' -RPL: result dir '/tmp/rpl_data_230411_170300_29696/input0_results_230411_170300' -Finished allocating vectors on the CPU -ROCProfiler: input from "/tmp/rpl_data_230411_170300_29696/input0.xml" - gpu_index = - kernel = vecCopy - -... ... +KernelName verbose: 2 +... ``` #### Dispatch Filtering @@ -332,35 +333,26 @@ Dispatch filtering is based on the *global* dispatch index of kernels in a run. The following example profiles only the 0th dispatched kernel in execution of the application: ```shell-session -$ omniperf profile --name vcopy -d 0 -- ./vcopy 1048576 256 -Resolving rocprof -ROC Profiler: /usr/bin/rocprof - - -------------- -Profile only -------------- - -omniperf ver: 1.0.8-PR1 -Path: /home/colramos/GitHub/omniperf-pub/workloads -Target: mi200 -Command: /home/colramos/vcopy 1048576 256 -Kernel Selection: None -Dispatch Selection: ['0'] +$ omniperf profile --name vcopy -d 0 -- ./vcopy -n 1048576 -b 256 +ROC Profiler: /opt/rocm-5.2.1/bin/rocprof +Execution mode = profile + ___ _ __ + / _ \ _ __ ___ _ __ (_)_ __ ___ _ __ / _| +| | | | '_ ` _ \| '_ \| | '_ \ / _ \ '__| |_ +| |_| | | | | | | | | | | |_) | __/ | | _| + \___/|_| |_| |_|_| |_|_| .__/ \___|_| |_| + |_| + +SoC = mi200 +Profiler choice = rocprofv1 +omniperf ver: 1.0.10 +Path: {os.getcwd()}/workloads/vcopy/mi200 +Target: mi200 +Command: ./vcopy -n 1048576 -b 256 +Kernel Selection: None +Dispatch Selection: ['0'] IP Blocks: All -Log: /home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/log.txt - -/home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/perfmon/SQ_INST_LEVEL_SMEM.txt -RPL: on '230411_170356' from '/opt/rocm-5.2.1' in '/home/colramos/GitHub/omniperf-pub' -RPL: profiling '""/home/colramos/vcopy 1048576 256""' -RPL: input file '/home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200/perfmon/SQ_INST_LEVEL_SMEM.txt' -RPL: output dir '/tmp/rpl_data_230411_170356_30314' -RPL: result dir '/tmp/rpl_data_230411_170356_30314/input0_results_230411_170356' -Finished allocating vectors on the CPU -ROCProfiler: input from "/tmp/rpl_data_230411_170356_30314/input0.xml" - gpu_index = - kernel = - range = 0 +KernelName verbose: 2 ... ``` @@ -383,27 +375,28 @@ Standalone Roofline Options: #### Roofline Only The following example demonstrates profiling roofline data only: ```shell-session -$ omniperf profile --name vcopy --roof-only -- ./vcopy 1048576 256 -Resolving rocprof -ROC Profiler: /usr/bin/rocprof - - --------- -Roofline only --------- - -Checking for roofline.csv in /home/colramos/GitHub/omniperf-pub/workloads/vcopy/mi200 -No roofline data found. Generating... -Empirical Roofline Calculation -Copyright © 2022 Advanced Micro Devices, Inc. All rights reserved. -Total detected GPU devices: 4 -GPU Device 0: Profiling... - 99% [||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ] - ... ... -Checking for roofline.csv in /home/colramos/GitHub/omniperf-pub/workloads/mix/mi200 -Checking for sysinfo.csv in /home/colramos/GitHub/omniperf-pub/workloads/mix/mi200 -Checking for pmc_perf.csv in /home/colramos/GitHub/omniperf-pub/workloads/mix/mi200 -Empirical Roofline PDFs saved! +$ omniperf profile --name vcopy --roof-only -- ./vcopy -n 1048576 -b 256 +ROC Profiler: /opt/rocm-5.2.1/bin/rocprof +Execution mode = profile + ___ _ __ + / _ \ _ __ ___ _ __ (_)_ __ ___ _ __ / _| +| | | | '_ ` _ \| '_ \| | '_ \ / _ \ '__| |_ +| |_| | | | | | | | | | | |_) | __/ | | _| + \___/|_| |_| |_|_| |_|_| .__/ \___|_| |_| + |_| + +SoC = mi200 +Profiler choice = rocprofv1 +[roofline] Generating pmc_perf.csv +omniperf ver: 1.0.10 +Path: {os.getcwd()}/workloads/vcopy/mi200 +Target: mi200 +Command: ./vcopy -n 1048576 -b 256 +Kernel Selection: None +Dispatch Selection: None +IP Blocks: All +KernelName verbose: 2 +... ``` An inspection of our workload output folder shows .pdf plots were generated successfully ```shell-session diff --git a/src/omniperf_analyze/configs/gfx906/0000_top_stat.yaml b/src/metric_configs/gfx906/0000_top_stat.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/0000_top_stat.yaml rename to src/metric_configs/gfx906/0000_top_stat.yaml diff --git a/src/omniperf_analyze/configs/gfx906/0100_system_info.yaml b/src/metric_configs/gfx906/0100_system_info.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/0100_system_info.yaml rename to src/metric_configs/gfx906/0100_system_info.yaml diff --git a/src/omniperf_analyze/configs/gfx906/0200_system-speed-of-light.yaml b/src/metric_configs/gfx906/0200_system-speed-of-light.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/0200_system-speed-of-light.yaml rename to src/metric_configs/gfx906/0200_system-speed-of-light.yaml diff --git a/src/omniperf_analyze/configs/gfx906/0500_command-processor.yaml b/src/metric_configs/gfx906/0500_command-processor.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/0500_command-processor.yaml rename to src/metric_configs/gfx906/0500_command-processor.yaml diff --git a/src/omniperf_analyze/configs/gfx906/0600_shader-processor-input.yaml b/src/metric_configs/gfx906/0600_shader-processor-input.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/0600_shader-processor-input.yaml rename to src/metric_configs/gfx906/0600_shader-processor-input.yaml diff --git a/src/omniperf_analyze/configs/gfx906/0700_wavefront-launch.yaml b/src/metric_configs/gfx906/0700_wavefront-launch.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/0700_wavefront-launch.yaml rename to src/metric_configs/gfx906/0700_wavefront-launch.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1000_compute-unit-instruction-mix.yaml b/src/metric_configs/gfx906/1000_compute-unit-instruction-mix.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1000_compute-unit-instruction-mix.yaml rename to src/metric_configs/gfx906/1000_compute-unit-instruction-mix.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1100_compute-unit-compute-pipeline.yaml b/src/metric_configs/gfx906/1100_compute-unit-compute-pipeline.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1100_compute-unit-compute-pipeline.yaml rename to src/metric_configs/gfx906/1100_compute-unit-compute-pipeline.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1200_lds.yaml b/src/metric_configs/gfx906/1200_lds.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1200_lds.yaml rename to src/metric_configs/gfx906/1200_lds.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1300_instruction-cache.yaml b/src/metric_configs/gfx906/1300_instruction-cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1300_instruction-cache.yaml rename to src/metric_configs/gfx906/1300_instruction-cache.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1400_constant-cache.yaml b/src/metric_configs/gfx906/1400_constant-cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1400_constant-cache.yaml rename to src/metric_configs/gfx906/1400_constant-cache.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1500_TA_and_TD.yaml b/src/metric_configs/gfx906/1500_TA_and_TD.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1500_TA_and_TD.yaml rename to src/metric_configs/gfx906/1500_TA_and_TD.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1600_L1_cache.yaml b/src/metric_configs/gfx906/1600_L1_cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1600_L1_cache.yaml rename to src/metric_configs/gfx906/1600_L1_cache.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1700_L2_cache.yaml b/src/metric_configs/gfx906/1700_L2_cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1700_L2_cache.yaml rename to src/metric_configs/gfx906/1700_L2_cache.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1800_L2_cache_per_channel.yaml b/src/metric_configs/gfx906/1800_L2_cache_per_channel.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1800_L2_cache_per_channel.yaml rename to src/metric_configs/gfx906/1800_L2_cache_per_channel.yaml diff --git a/src/omniperf_analyze/configs/gfx906/1900_memory_chart.yaml b/src/metric_configs/gfx906/1900_memory_chart.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/1900_memory_chart.yaml rename to src/metric_configs/gfx906/1900_memory_chart.yaml diff --git a/src/omniperf_analyze/configs/gfx906/2000_kernels.yaml b/src/metric_configs/gfx906/2000_kernels.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx906/2000_kernels.yaml rename to src/metric_configs/gfx906/2000_kernels.yaml diff --git a/src/omniperf_analyze/configs/gfx908/0000_top_stat.yaml b/src/metric_configs/gfx908/0000_top_stat.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/0000_top_stat.yaml rename to src/metric_configs/gfx908/0000_top_stat.yaml diff --git a/src/omniperf_analyze/configs/gfx908/0100_system_info.yaml b/src/metric_configs/gfx908/0100_system_info.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/0100_system_info.yaml rename to src/metric_configs/gfx908/0100_system_info.yaml diff --git a/src/omniperf_analyze/configs/gfx908/0200_system-speed-of-light.yaml b/src/metric_configs/gfx908/0200_system-speed-of-light.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/0200_system-speed-of-light.yaml rename to src/metric_configs/gfx908/0200_system-speed-of-light.yaml diff --git a/src/omniperf_analyze/configs/gfx908/0500_command-processor.yaml b/src/metric_configs/gfx908/0500_command-processor.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/0500_command-processor.yaml rename to src/metric_configs/gfx908/0500_command-processor.yaml diff --git a/src/omniperf_analyze/configs/gfx908/0600_shader-processor-input.yaml b/src/metric_configs/gfx908/0600_shader-processor-input.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/0600_shader-processor-input.yaml rename to src/metric_configs/gfx908/0600_shader-processor-input.yaml diff --git a/src/omniperf_analyze/configs/gfx908/0700_wavefront-launch.yaml b/src/metric_configs/gfx908/0700_wavefront-launch.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/0700_wavefront-launch.yaml rename to src/metric_configs/gfx908/0700_wavefront-launch.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1000_compute-unit-instruction-mix.yaml b/src/metric_configs/gfx908/1000_compute-unit-instruction-mix.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1000_compute-unit-instruction-mix.yaml rename to src/metric_configs/gfx908/1000_compute-unit-instruction-mix.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1100_compute-unit-compute-pipeline.yaml b/src/metric_configs/gfx908/1100_compute-unit-compute-pipeline.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1100_compute-unit-compute-pipeline.yaml rename to src/metric_configs/gfx908/1100_compute-unit-compute-pipeline.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1200_lds.yaml b/src/metric_configs/gfx908/1200_lds.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1200_lds.yaml rename to src/metric_configs/gfx908/1200_lds.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1300_instruction-cache.yaml b/src/metric_configs/gfx908/1300_instruction-cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1300_instruction-cache.yaml rename to src/metric_configs/gfx908/1300_instruction-cache.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1400_constant-cache.yaml b/src/metric_configs/gfx908/1400_constant-cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1400_constant-cache.yaml rename to src/metric_configs/gfx908/1400_constant-cache.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1500_TA_and_TD.yaml b/src/metric_configs/gfx908/1500_TA_and_TD.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1500_TA_and_TD.yaml rename to src/metric_configs/gfx908/1500_TA_and_TD.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1600_L1_cache.yaml b/src/metric_configs/gfx908/1600_L1_cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1600_L1_cache.yaml rename to src/metric_configs/gfx908/1600_L1_cache.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1700_L2_cache.yaml b/src/metric_configs/gfx908/1700_L2_cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1700_L2_cache.yaml rename to src/metric_configs/gfx908/1700_L2_cache.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1800_L2_cache_per_channel.yaml b/src/metric_configs/gfx908/1800_L2_cache_per_channel.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1800_L2_cache_per_channel.yaml rename to src/metric_configs/gfx908/1800_L2_cache_per_channel.yaml diff --git a/src/omniperf_analyze/configs/gfx908/1900_memory_chart.yaml b/src/metric_configs/gfx908/1900_memory_chart.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/1900_memory_chart.yaml rename to src/metric_configs/gfx908/1900_memory_chart.yaml diff --git a/src/omniperf_analyze/configs/gfx908/2000_kernels.yaml b/src/metric_configs/gfx908/2000_kernels.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx908/2000_kernels.yaml rename to src/metric_configs/gfx908/2000_kernels.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/0000_top_stat.yaml b/src/metric_configs/gfx90a/0000_top_stat.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/0000_top_stat.yaml rename to src/metric_configs/gfx90a/0000_top_stat.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/0100_system_info.yaml b/src/metric_configs/gfx90a/0100_system_info.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/0100_system_info.yaml rename to src/metric_configs/gfx90a/0100_system_info.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/0200_system-speed-of-light.yaml b/src/metric_configs/gfx90a/0200_system-speed-of-light.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/0200_system-speed-of-light.yaml rename to src/metric_configs/gfx90a/0200_system-speed-of-light.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/0500_command-processor.yaml b/src/metric_configs/gfx90a/0500_command-processor.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/0500_command-processor.yaml rename to src/metric_configs/gfx90a/0500_command-processor.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/0600_shader-processor-input.yaml b/src/metric_configs/gfx90a/0600_shader-processor-input.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/0600_shader-processor-input.yaml rename to src/metric_configs/gfx90a/0600_shader-processor-input.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/0700_wavefront-launch.yaml b/src/metric_configs/gfx90a/0700_wavefront-launch.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/0700_wavefront-launch.yaml rename to src/metric_configs/gfx90a/0700_wavefront-launch.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1000_compute-unit-instruction-mix.yaml b/src/metric_configs/gfx90a/1000_compute-unit-instruction-mix.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1000_compute-unit-instruction-mix.yaml rename to src/metric_configs/gfx90a/1000_compute-unit-instruction-mix.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1100_compute-unit-compute-pipeline.yaml b/src/metric_configs/gfx90a/1100_compute-unit-compute-pipeline.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1100_compute-unit-compute-pipeline.yaml rename to src/metric_configs/gfx90a/1100_compute-unit-compute-pipeline.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1200_lds.yaml b/src/metric_configs/gfx90a/1200_lds.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1200_lds.yaml rename to src/metric_configs/gfx90a/1200_lds.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1300_instruction-cache.yaml b/src/metric_configs/gfx90a/1300_instruction-cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1300_instruction-cache.yaml rename to src/metric_configs/gfx90a/1300_instruction-cache.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1400_constant-cache.yaml b/src/metric_configs/gfx90a/1400_constant-cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1400_constant-cache.yaml rename to src/metric_configs/gfx90a/1400_constant-cache.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1500_TA_and_TD.yaml b/src/metric_configs/gfx90a/1500_TA_and_TD.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1500_TA_and_TD.yaml rename to src/metric_configs/gfx90a/1500_TA_and_TD.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1600_L1_cache.yaml b/src/metric_configs/gfx90a/1600_L1_cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1600_L1_cache.yaml rename to src/metric_configs/gfx90a/1600_L1_cache.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1700_L2_cache.yaml b/src/metric_configs/gfx90a/1700_L2_cache.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1700_L2_cache.yaml rename to src/metric_configs/gfx90a/1700_L2_cache.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1800_L2_cache_per_channel.yaml b/src/metric_configs/gfx90a/1800_L2_cache_per_channel.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1800_L2_cache_per_channel.yaml rename to src/metric_configs/gfx90a/1800_L2_cache_per_channel.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/1900_memory_chart.yaml b/src/metric_configs/gfx90a/1900_memory_chart.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/1900_memory_chart.yaml rename to src/metric_configs/gfx90a/1900_memory_chart.yaml diff --git a/src/omniperf_analyze/configs/gfx90a/2000_kernels.yaml b/src/metric_configs/gfx90a/2000_kernels.yaml similarity index 100% rename from src/omniperf_analyze/configs/gfx90a/2000_kernels.yaml rename to src/metric_configs/gfx90a/2000_kernels.yaml diff --git a/src/omniperf_analyze/configs/panel_config_template.yaml b/src/metric_configs/panel_config_template.yaml similarity index 100% rename from src/omniperf_analyze/configs/panel_config_template.yaml rename to src/metric_configs/panel_config_template.yaml diff --git a/src/omniperf b/src/omniperf index 5b80000d2..4188166d1 100755 --- a/src/omniperf +++ b/src/omniperf @@ -24,866 +24,24 @@ # SOFTWARE. ##############################################################################el -import sys -import os -import io -import selectors -import argparse -import subprocess -import glob -import pandas as pd -from datetime import datetime -from pathlib import Path as path -import warnings -import shutil - -from parser import parse -from utils import specs -from utils.perfagg import perfmon_filter, pmc_filter, pmc_perf_split, join_prof -from utils import remove_workload -from utils import csv_processor # Import workload -from omniperf_analyze.omniperf_analyze import roofline_only # Standalone roofline -from omniperf_analyze.omniperf_analyze import analyze # CLI analysis -from common import resolve_rocprof - -from common import ( - OMNIPERF_HOME, - PROG, - SOC_LIST, - DISTRO_MAP, -) # Import global variables - -from common import getVersion - -################################################ -# Helper Functions -################################################ -def run_subprocess(cmd): - subprocess.run(cmd, check=True) - -def capture_subprocess_output(subprocess_args): - # Start subprocess - # bufsize = 1 means output is line buffered - # universal_newlines = True is required for line buffering - process = subprocess.Popen(subprocess_args, - bufsize=1, - stdout=subprocess.PIPE, - stderr=subprocess.STDOUT, - universal_newlines=True) - - # Create callback function for process output - buf = io.StringIO() - def handle_output(stream, mask): - # Because the process' output is line buffered, there's only ever one - # line to read when this function is called - line = stream.readline() - buf.write(line) - sys.stdout.write(line) - - # Register callback for an "available for read" event from subprocess' stdout stream - selector = selectors.DefaultSelector() - selector.register(process.stdout, selectors.EVENT_READ, handle_output) - - # Loop until subprocess is terminated - while process.poll() is None: - # Wait for events and handle them with their registered callbacks - events = selector.select() - for key, mask in events: - callback = key.data - callback(key.fileobj, mask) - - # Get process return code - return_code = process.wait() - selector.close() - - success = (return_code == 0) - - # Store buffered output - output = buf.getvalue() - buf.close() - - return (success, output) - - -def get_soc(): - mspec = specs.get_machine_specs(0) - - target = "" - if mspec.GPU == "gfx906": - target = "mi50" - elif mspec.GPU == "gfx908": - target = "mi100" - elif mspec.GPU == "gfx90a": - target = "mi200" - elif mspec.GPU == "gfx900": - target = "vega10" - else: - print("\nInvalid SoC") - sys.exit(0) - return target - - -def throw_parse_error(my_parser, message): - my_parser.print_help(sys.stderr) - print("\n\n") - my_parser.error(message) - - -def isWorkloadEmpty(my_parser, path): - if os.path.isfile(path + "/pmc_perf.csv"): - temp_df = pd.read_csv(path + "/pmc_perf.csv") - if temp_df.dropna().empty: - print("Profiling Error: Found empty cells. Profiling data could be corrupt.") - sys.exit(0) - - else: - throw_parse_error( - my_parser, "Profling Error: Cannot find pmc_perf.csv in {}".format(path) - ) - - -def replace_timestamps(workload_dir, log_file): - df_stamps = pd.read_csv(workload_dir + "/timestamps.csv") - if "BeginNs" in df_stamps.columns and "EndNs" in df_stamps.columns: - # Update timestamps for all *.csv output files - for fname in glob.glob(workload_dir + "/" + "*.csv"): - df_pmc_perf = pd.read_csv(fname) - - df_pmc_perf["BeginNs"] = df_stamps["BeginNs"] - df_pmc_perf["EndNs"] = df_stamps["EndNs"] - df_pmc_perf.to_csv(fname, index=False) - else: - warning = "WARNING: Incomplete profiling data detected. Unable to update timestamps." - warnings.warn( - warning - ) - log_file.write(warning + "\n") - - -def gen_sysinfo(workload_name, workload_dir, ip_blocks, app_cmd, skip_roof): - # Record system information - mspec = specs.get_machine_specs(0) - sysinfo = open(workload_dir + "/" + "sysinfo.csv", "w") - - # write header - header = "workload_name," - header += "command," - header += "host_name,host_cpu,host_distro,host_kernel,host_rocmver,date," - header += "gpu_soc,numSE,numCU,numSIMD,waveSize,maxWavesPerCU,maxWorkgroupSize," - header += "L1,L2,sclk,mclk,cur_sclk,cur_mclk,L2Banks,LDSBanks,name,numSQC,hbmBW," - header += "ip_blocks\n" - sysinfo.write(header) - - # timestamp - now = datetime.now() - local_now = now.astimezone() - local_tz = local_now.tzinfo - local_tzname = local_tz.tzname(local_now) - timestamp = now.strftime("%c") + " (" + local_tzname + ")" - # host info - param = [workload_name] - param += ['"' + app_cmd + '"'] - param += [ - mspec.hostname, - mspec.cpu, - mspec.distro, - mspec.kernel, - mspec.rocmversion, - timestamp, - ] - - # GPU info - param += [ - mspec.GPU, - mspec.SE, - mspec.CU, - mspec.SIMD, - mspec.wave_size, - mspec.wave_occu, - mspec.workgroup_size, - ] - param += [ - mspec.L1, - mspec.L2, - mspec.SCLK, - mspec.cur_MCLK, - mspec.cur_SCLK, - mspec.cur_MCLK, - ] - - blocks = [] - hbmBW = int(mspec.cur_MCLK) / 1000 * 4096 / 8 * 2 - if mspec.GPU == "gfx906": - param += ["16", "32", "mi50", str(int(mspec.CU) // 4), str(hbmBW)] - elif mspec.GPU == "gfx908": - param += ["32", "32", "mi100", "48", str(hbmBW)] - elif mspec.GPU == "gfx90a": - param += ["32", "32", "mi200", "56", str(hbmBW)] - if not skip_roof: - blocks.append("roofline") - - # ip block info - if ip_blocks == None: - t = ["SQ", "LDS", "SQC", "TA", "TD", "TCP", "TCC", "SPI", "CPC", "CPF"] - blocks += t - else: - blocks += ip_blocks - param.append("|".join(blocks)) - - sysinfo.write(",".join(param)) - sysinfo.close() - - -def mongo_import(args, profileAndImport): - # Validate target directory - connectionInfo = csv_processor.parse(args, profileAndImport) - # Convert and upload data - print("-- Conversion & Upload in Progress --") - csv_processor.convert_folder(connectionInfo) - print("-- Complete! --") - -################################################ -# Roofline Helpers -################################################ -def roof_setup(args, my_parser, VER): - if args.path == os.getcwd() + "/workloads": - args.path += "/" + args.name + "/" + args.target - - # Do we need a new directory for roofline? - if not os.path.isdir(args.path): - os.makedirs(args.path) - - # Does roof data exist? - print("Checking for roofline.csv in ", args.path) - roof_path = args.path + "/roofline.csv" - roofline_exists = os.path.isfile(roof_path) - if not roofline_exists: - if get_soc() != "mi200": - throw_parse_error( - my_parser, "Invalid SoC.\nRoofline only availible on MI200." - ) - mibench(args) - - # Does sysinfo exist? - print("Checking for sysinfo.csv in ", args.path) - sysinfo_path = args.path + "/sysinfo.csv" - sysinfo_exists = os.path.isfile(sysinfo_path) - if not sysinfo_exists: - print("sysinfo not found") - gen_sysinfo(args.name, args.path, [], args.remaining, False) - - # Does app data exist? - print("Checking for pmc_perf.csv in ", args.path) - app_path = args.path + "/pmc_perf.csv" - app_exists = os.path.isfile(app_path) - if not app_exists: - if get_soc() != "mi200": - throw_parse_error( - my_parser, "Invalid SoC.\nRoofline only availible on MI200." - ) - if not args.remaining: - throw_parse_error( - my_parser, - "Cannot find existing application data.\nAttempting to generate application data from -- .\n-- option is required to generate application data.", - ) - else: - characterize_app(args, VER) - - -def detect_roofline(): - mspec = specs.get_machine_specs(0) - rocm_ver = mspec.rocmversion[:1] - - os_release = path("/etc/os-release").read_text() - ubuntu_distro = specs.search(r'VERSION_ID="(.*?)"', os_release) - rhel_distro = specs.search(r'PLATFORM_ID="(.*?)"', os_release) - sles_distro = specs.search(r'VERSION_ID="(.*?)"', os_release) - - if "ROOFLINE_BIN" in os.environ.keys(): - rooflineBinary = os.environ["ROOFLINE_BIN"] - if os.path.exists(rooflineBinary): - print("Detected user-supplied binary") - return {"rocm_ver": "override", "distro": "override", "path": rooflineBinary} - else: - print("ROOFLINE ERROR: user-supplied path to binary not accessible") - print("--> ROOFLINE_BIN = %s\n" % target_binary) - sys.exit(1) - elif rhel_distro == "platform:el8" or rhel_distro == "platform:el9": - # Must be a valid RHEL machine - distro = "platform:el8" - elif ( - (type(sles_distro) == str and len(sles_distro) >= 3) and # confirm string and len - sles_distro[:2] == "15" and int(sles_distro[3]) >= 3 # SLES15 and SP >= 3 - ): - # Must be a valid SLES machine - # Use SP3 binary for all forward compatible service pack versions - distro = "15.3" - elif ubuntu_distro == "20.04": - # Must be a valid Ubuntu machine - distro = ubuntu_distro - else: - print("ROOFLINE ERROR: Cannot find a valid binary for your operating system") - sys.exit(1) - - target_binary = {"rocm_ver": rocm_ver, "distro": distro} - return target_binary - - -def mibench(args): - print("No roofline data found. Generating...") - - target_binary = detect_roofline() - if target_binary["rocm_ver"] == "override": - path_to_binary = target_binary["path"] - else: - path_to_binary = ( - str(OMNIPERF_HOME) - + "/utils/rooflines/roofline" - + "-" - + DISTRO_MAP[target_binary["distro"]] - + "-" - + args.target.lower() - + "-rocm" - + target_binary["rocm_ver"] - ) - - # Distro is valid but cant find rocm ver - if not os.path.exists(path_to_binary): - print("ROOFLINE ERROR: Unable to locate expected binary (%s)." % path_to_binary) - sys.exit(1) - - run_subprocess( - [ - path_to_binary, - "-o", - args.path + "/" + "roofline.csv", - "-d", - str(args.device), - ] - ) - - -def characterize_app(args, VER): - # Basic Info - print("\n", PROG, "ver: ", VER) - print("Path: ", args.path) - print("Target: ", args.target) - print("Command: ", args.remaining) - print("Kernel Selection: ", args.kernel) - print("Dispatch Selection: ", args.dispatch) - - perfmon_dir = str(OMNIPERF_HOME) + "/perfmon_pub" - print("permon dir is ", os.path.abspath(perfmon_dir)) - app_cmd = args.remaining - workload_dir = args.path - - # Perfmon filtering - pmc_filter(workload_dir, perfmon_dir, args.target) - - # Separate pmc_perf runs - pmc_perf_split(workload_dir) - - # Set up a log file - log = open(workload_dir + "/log.txt", "w") - print("Log: ", workload_dir + "/log.txt\n") - - # Workload profiling - for fname in glob.glob(workload_dir + "/perfmon/*.txt"): - # Kernel filtering (in-place replacement) - if not args.kernel == None: - success, output = capture_subprocess_output( - [ - "sed", - "-i", - "-r", - "s%^(kernel:).*%" + "kernel: " + ",".join(args.kernel) + "%g", - fname, - ] - ) - log.write(output) - - # Dispatch filtering (inplace replacement) - if not args.dispatch == None: - success, output = capture_subprocess_output( - [ - "sed", - "-i", - "-r", - "s%^(range:).*%" + "range: " + " ".join(args.dispatch) + "%g", - fname, - ] - ) - log.write(output) - print(fname) - if args.use_rocscope == True: - run_rocscope(args, fname) - else: - run_prof(fname, workload_dir, perfmon_dir, app_cmd, args.target, log, args.verbose) - - # Update timestamps - replace_timestamps(workload_dir, log) - - if args.use_rocscope == False: - # Manually join each pmc_perf*.csv output - join_prof(workload_dir, args.join_type, log, args.verbose) - # Demangle and overwrite original KernelNames - csv_processor.kernel_name_shortener(workload_dir, args.kernelVerbose) - - log.close() - - -################################################ -# Profiling Helpers -################################################ - -def run_rocscope(args, fname): - # profile the app - if args.use_rocscope == True: - result = shutil.which("rocscope") - if result: - rs_cmd = [ - result.stdout.decode("ascii").strip(), - "metrics", - "-p", - args.path, - "-n", - args.name, - "-t", - fname, - "--", - ] - for i in args.remaining.split(): - rs_cmd.append(i) - print(rs_cmd) - result = run_subprocess( - rs_cmd - ) # , stdout=subprocess.PIPE, stderr=subprocess.PIPE) - if result.returncode != 0: - print(result.stderr.decode("ascii")) - sys.exit(1) - - -def run_prof(fname, workload_dir, perfmon_dir, cmd, target, log_file, verbose): - global rocprof_cmd - - fbase = os.path.splitext(os.path.basename(fname))[0] - - if verbose: - print("pmc file:", os.path.basename(fname)) - - # profile the app (run w/ custom config files for mi100) - if target == "mi100": - print("RUNNING WITH CUSTOM METRICS") - success, output = capture_subprocess_output( - [ - rocprof_cmd, - "-i", - fname, - "-m", - perfmon_dir + "/" + "metrics.xml", - "--timestamp", - "on", - "-o", - workload_dir + "/" + fbase + ".csv", - '"' + cmd + '"', - ] - ) - else: - success, output = capture_subprocess_output( - [ - rocprof_cmd, - "-i", - fname, - "--timestamp", - "on", - "-o", - workload_dir + "/" + fbase + ".csv", - '"' + cmd + '"', - ] - ) - # Write output to log - log_file.write(output) - - - -def omniperf_profile(args, VER): - # Verify valid name - if args.name.find(".") != -1 or args.name.find("-") != -1: - raise ValueError("'-' and '.' are not permited in workload name", args.name) - - # Basic Info - print(PROG, "ver: ", VER) - print("Path: ", args.path) - print("Target: ", args.target) - print("Command: ", args.remaining) - print("Kernel Selection: ", args.kernel) - print("Dispatch Selection: ", args.dispatch) - - if args.ipblocks == None: - print("IP Blocks: All") - else: - print("IP Blocks: ", args.ipblocks) - if args.kernelVerbose > 5: - print("KernelName verbose level: DISABLED") - else: - print("KernelName verbose level: ", str(args.kernelVerbose)) - - # Set up directories - if args.path == os.getcwd() + "/workloads": - workload_dir = args.path + "/" + args.name + "/" + args.target - else: - workload_dir = args.path - perfmon_dir = str(OMNIPERF_HOME) + "/perfmon_pub" - - # Perfmon filtering - perfmon_filter(workload_dir, perfmon_dir, args) - - # Separate pmc_perf runs - pmc_perf_split(workload_dir) - - # Set up a log file - log = open(workload_dir + "/log.txt", "w") - print("Log: ", workload_dir + "/log.txt\n") - - if not args.lucky == None and args.lucky == True: - print("You're feeling lucky - only profiling top N kernels") - # look for whether workload_dir exists - create if not - try: - os.makedirs(workload_dir, exist_ok=True) - except Exception as e: - print("Unable to create workload directory: ", workload_dir) - print(e) - sys.exit(1) - - result = shutil.which("rocscope") - if result: - rs_cmd = [ - result.stdout.decode("ascii").strip(), - "top10", - "-p", - args.path, - "-n", - args.name, - "--", - ] - for i in args.remaining.split(): - rs_cmd.append(i) - print(rs_cmd) - result = run_subprocess( - rs_cmd - ) # , stdout=subprocess.PIPE, stderr=subprocess.PIPE) - if result.returncode != 0: - print(result.stderr.decode("ascii")) - else: - print("rocscope must be in the PATH") - sys.exit(1) - elif not args.summaries == None and args.summaries == True: - print("creating kernel summaries") - # look for whether workload_dir exists - create if not - try: - os.makedirs(workload_dir, exist_ok=True) - except Exception as e: - print("Unable to create workload directory: ", workload_dir) - print(e) - sys.exit(1) - - result = shutil.which("rocscope") - if result: - rs_cmd = [ - result.stdout.decode("ascii").strip(), - "summary", - "-p", - args.path, - "-n", - args.name, - "--", - ] - for i in args.remaining.split(): - rs_cmd.append(i) - print(rs_cmd) - result = run_subprocess( - rs_cmd - ) # , stdout=subprocess.PIPE, stderr=subprocess.PIPE) - if result.returncode != 0: - print(result.stderr.decode("ascii")) - else: - print("rocscope must be in the PATH") - sys.exit(1) - - else: - for fname in glob.glob(workload_dir + "/perfmon/*.txt"): - # Kernel filtering (in-place replacement) - if not args.kernel == None: - success, output = capture_subprocess_output( - [ - "sed", - "-i", - "-r", - "s%^(kernel:).*%" + "kernel: " + ",".join(args.kernel) + "%g", - fname, - ] - ) - log.write(output) - - # Dispatch filtering (inplace replacement) - if not args.dispatch == None: - success, output = capture_subprocess_output( - [ - "sed", - "-i", - "-r", - "s%^(range:).*%" + "range: " + " ".join(args.dispatch) + "%g", - fname, - ] - ) - log.write(output) - print(fname) - if args.use_rocscope == True: - run_rocscope(args, fname) - else: - run_prof(fname, workload_dir, perfmon_dir, args.remaining, args.target, log, args.verbose) - - - # Update timestamps - replace_timestamps(workload_dir, log) - - if args.use_rocscope == False: - # Manually join each pmc_perf*.csv output - join_prof(workload_dir, args.join_type, log, args.verbose) - # Demangle and overwrite original KernelNames - csv_processor.kernel_name_shortener(workload_dir, args.kernelVerbose) - - # Generate sysinfo - gen_sysinfo(args.name, workload_dir, args.ipblocks, args.remaining, args.no_roof) - - # Add tracing & roofline metrics (mi200 only) - if args.target.lower() == "mi200": - # Skip roofline if --no-roof is set. - if not args.no_roof: - target_binary = detect_roofline() - if target_binary["rocm_ver"] == "override": - path_to_binary = target_binary["path"] - else: - path_to_binary = ( - str(OMNIPERF_HOME) - + "/utils/rooflines/roofline" - + "-" - + DISTRO_MAP[target_binary["distro"]] - + "-" - + args.target.lower() - + "-rocm" - + target_binary["rocm_ver"] - ) - # Distro is valid but cant find valid binary - if not os.path.exists(path_to_binary): - print( - "ROOFLINE ERROR: Unable to locate expected binary (%s))." - % path_to_binary - ) - sys.exit(1) - - run_subprocess( - [ - path_to_binary, - "-o", - workload_dir + "/" + "roofline.csv", - "-d", - str(args.device), - ] - ) - # Close log - log.close() - - -################################################ -# MAIN -################################################ - +from omniperf_base import Omniperf def main(): - my_parser = argparse.ArgumentParser( - description="Command line interface for AMD's GPU profiler, Omniperf", - prog="tool", - formatter_class=lambda prog: argparse.RawTextHelpFormatter( - prog, max_help_position=30 - ), - usage="omniperf [mode] [options]", - ) - parse(my_parser) - args = my_parser.parse_args() - - vData = getVersion() - VER = vData["version"] - - if args.mode == None: - throw_parse_error( - my_parser, - "Omniperf requires you pass a valid mode. Please see documentation.", - ) - ############## - # PROFILE MODE - ############## - if args.mode == "profile": - Extractionlvl = args.kernelVerbose - print("Resolving rocprof") - global rocprof_cmd - rocprof_cmd = resolve_rocprof() - # Cannot access parent directories - if ".." in str(args.path): - throw_parse_error( - my_parser, "Access denied. Cannot access parent directories in path ../" - ) - - # Must have a valid soc in profile mode - args.target = get_soc() - - # Verify correct command formatting - args.remaining = args.remaining[1:] - if args.remaining: - if not os.path.isfile(args.remaining[0]): - throw_parse_error( - my_parser, - 'Your command "{}" doesn\'t point to a file. Try again.'.format( - args.remaining[0] - ), - ) - args.remaining = " ".join(args.remaining) - else: - throw_parse_error( - my_parser, - "Profiling command required. Pass application executable after -- at the end of options.\n\ti.e. omniperf profile -n vcopy -- ./vcopy 1048576 256", - ) - # Name cannot exceed MongoDB max len - if len(args.name) > 35: - throw_parse_error(my_parser, "--name exceeds 35 character limit. Try again.") - - elif args.roof_only: - print("\n--------\nRoofline only\n--------\n") - # Setup prerequisits for roofline - roof_setup(args, my_parser, VER) - # Generate roofline - roofline_only(args.path, args.device, args.sort, args.mem_level, args.kernel_names, args.verbose) - - # Profile only - else: - print("\n-------------\nProfile only\n-------------\n") - omniperf_profile(args, VER) - ############## - # DATABASE MODE - ############## - if args.mode == "database": - # Remove a workload - if args.remove and not args.upload: - print("\n--------\nRemove workload\n--------\n") - fullWorkloadName = args.workload.count("_") >= 3 - if not fullWorkloadName: - throw_parse_error( - my_parser, - "--workload is not valid. Please use full workload name as seen in GUI when removing (i.e. omniperf_asw_vcopy_mi200)", - ) - if args.host == None or args.username == None: - throw_parse_error( - my_parser, "--host and --username are required when --remove is set." - ) - remove_workload.remove_workload(args) - # Import a workload - elif args.upload and not args.remove: - print("\n--------\nImport Profiling Results\n--------\n") - if ( - args.host == None - or args.team == None - or args.username == None - or args.workload == None - ): - throw_parse_error( - my_parser, - "--host, --workload, --username, and --team are all required when --import is set.", - ) + omniperf = Omniperf() + omniperf.parse_args() #TODO: We already do this in the __init__ for Omniperf(). Change that? - if os.path.isdir(os.path.abspath(args.workload)): - isWorkloadEmpty( - my_parser, args.workload - ) # Throw warning if workload is empty - else: - throw_parse_error( - my_parser, - "--workload is invalid. Please pass path to a valid directory.", - ) - - if len(args.team) > 13: - throw_parse_error( - my_parser, "--team exceeds 13 character limit. Try again." - ) - - args.workload = os.path.abspath(args.workload) # Format path properly - - mongo_import(args, False) - else: - throw_parse_error( - my_parser, "Pass either -i/--import or -r/--remove when import mode" - ) - ############## - # ANALYZE MODE - ############## - if args.mode == "analyze": - if args.list_metrics: - analyze(args) - else: - if args.path: - if ".." in str(args.path): - throw_parse_error( - my_parser, - "Access denied. Cannot access parent directories in path ../", - ) - if args.filter_metrics and args.gui: - throw_parse_error( - my_parser, - """ - omniperf analyze --path [analyze options] - \n\n------------------------------------------------------------------------------- - \nExamples: - \n\tomniperf analyze -p workloads/vcopy/mi200/ --list-metrics gfx90a - \n\tomniperf analyze -p workloads/mixbench/mi200/ --filter-dispatch-ids 12 34 --decimal 3 - \n\tomniperf analyze -p workloads/mixbench/mi200/ --gui - \n-------------------------------------------------------------------------------\n - \ntool: error: --gui cannot be used in combination with: -b/--metric - """ - ) - print("\n--------\nAnalyze\n--------\n") - # Ensure absolute path - for dir in args.path: - full_path = os.path.abspath(dir[0]) - dir[0] = full_path - if not os.path.isdir(dir[0]): - throw_parse_error( - my_parser, - "Error: invalid directory {}\nPlease try again.".format( - dir[0] - ), - ) - isWorkloadEmpty( - my_parser, dir[0] - ) # Verify workload is valid before analyzing - - analyze(args) - else: - throw_parse_error( - my_parser, - """ - omniperf analyze --path [analyze options] - \n\n------------------------------------------------------------------------------- - \nExamples: - \n\tomniperf analyze -p workloads/vcopy/mi200/ --list-metrics gfx90a - \n\tomniperf analyze -p workloads/mixbench/mi200/ --filter-dispatch-ids 12 34 --decimal 3 - \n\tomniperf analyze -p workloads/mixbench/mi200/ --gui - \n-------------------------------------------------------------------------------\n - \ntool: error: the following arguments are required: -p/--path - """, - ) - - sys.exit(0) # Indicate successful on exit + mode = omniperf.get_mode() + # major omniperf execution modes + if mode == "profile": + omniperf.run_profiler() + elif mode == "database": + omniperf.update_DB() + elif mode == "analyze": + omniperf.run_analysis() + else: + omniperf.error("Unsupported execution mode") if __name__ == "__main__": main() diff --git a/src/omniperf2 b/src/omniperf2 deleted file mode 100755 index df694c488..000000000 --- a/src/omniperf2 +++ /dev/null @@ -1,47 +0,0 @@ -#!/usr/bin/env python3 - -##############################################################################bl -# MIT License -# -# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in all -# copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -# SOFTWARE. -##############################################################################el - -from omniperf_base import Omniperf - -def main(): - - omniperf2 = Omniperf() - omniperf2.parseArgs() - - mode = omniperf2.get_mode() - - # major omniperf execution modes - if mode == "profile": - omniperf2.run_profiler() - elif mode == "database": - omniperf2.update_DB() - elif mode == "analyze": - omniperf2.run_analysis() - else: - omniperf2.error("Unsupported execution mode") - -if __name__ == "__main__": - main() diff --git a/src/omniperf_analyze/README.md b/src/omniperf_analyze-old/README.md similarity index 100% rename from src/omniperf_analyze/README.md rename to src/omniperf_analyze-old/README.md diff --git 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b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBold-webfont.svg similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-ExtraBold-webfont.svg rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBold-webfont.svg diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-ExtraBold-webfont.ttf b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBold-webfont.ttf similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-ExtraBold-webfont.ttf rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBold-webfont.ttf diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-ExtraBold-webfont.woff b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBold-webfont.woff similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-ExtraBold-webfont.woff rename to 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b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBoldItalic-webfont.ttf similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-ExtraBoldItalic-webfont.ttf rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBoldItalic-webfont.ttf diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-ExtraBoldItalic-webfont.woff b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBoldItalic-webfont.woff similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-ExtraBoldItalic-webfont.woff rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-ExtraBoldItalic-webfont.woff diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Italic-webfont.eot b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Italic-webfont.eot similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Italic-webfont.eot rename to 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src/omniperf_analyze/assets/fonts/opensans/OpenSans-Italic-webfont.woff rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Italic-webfont.woff diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Light-webfont.eot b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Light-webfont.eot similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Light-webfont.eot rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Light-webfont.eot diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Light-webfont.svg b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Light-webfont.svg similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Light-webfont.svg rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Light-webfont.svg diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Light-webfont.ttf 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a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-LightItalic-webfont.svg b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-LightItalic-webfont.svg similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-LightItalic-webfont.svg rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-LightItalic-webfont.svg diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-LightItalic-webfont.ttf b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-LightItalic-webfont.ttf similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-LightItalic-webfont.ttf rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-LightItalic-webfont.ttf diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-LightItalic-webfont.woff b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-LightItalic-webfont.woff similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-LightItalic-webfont.woff rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-LightItalic-webfont.woff diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Regular-webfont.eot b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Regular-webfont.eot similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Regular-webfont.eot rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Regular-webfont.eot diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Regular-webfont.svg b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Regular-webfont.svg similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Regular-webfont.svg rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Regular-webfont.svg diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Regular-webfont.ttf b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Regular-webfont.ttf similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Regular-webfont.ttf rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Regular-webfont.ttf diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Regular-webfont.woff b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Regular-webfont.woff similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Regular-webfont.woff rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Regular-webfont.woff diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Semibold-webfont.eot b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Semibold-webfont.eot similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Semibold-webfont.eot rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Semibold-webfont.eot diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Semibold-webfont.svg b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Semibold-webfont.svg similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Semibold-webfont.svg rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Semibold-webfont.svg diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Semibold-webfont.ttf b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Semibold-webfont.ttf similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Semibold-webfont.ttf rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Semibold-webfont.ttf diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-Semibold-webfont.woff b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Semibold-webfont.woff similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-Semibold-webfont.woff rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-Semibold-webfont.woff diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.eot b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.eot similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.eot rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.eot diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.svg b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.svg similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.svg rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.svg diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.ttf b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.ttf similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.ttf rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.ttf diff --git a/src/omniperf_analyze/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.woff b/src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.woff similarity index 100% rename from src/omniperf_analyze/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.woff rename to src/omniperf_analyze-old/assets/fonts/opensans/OpenSans-SemiboldItalic-webfont.woff diff --git a/src/omniperf_analyze/assets/layout.css b/src/omniperf_analyze-old/assets/layout.css similarity index 100% rename from src/omniperf_analyze/assets/layout.css rename to src/omniperf_analyze-old/assets/layout.css diff --git a/src/omniperf_analyze/assets/magnific-popup.css b/src/omniperf_analyze-old/assets/magnific-popup.css similarity index 100% rename from src/omniperf_analyze/assets/magnific-popup.css rename to src/omniperf_analyze-old/assets/magnific-popup.css diff --git a/src/omniperf_analyze/assets/media-queries.css b/src/omniperf_analyze-old/assets/media-queries.css similarity index 100% rename from src/omniperf_analyze/assets/media-queries.css rename to src/omniperf_analyze-old/assets/media-queries.css diff --git a/src/omniperf_analyze/customized/fft/panel_000_top_stat.yaml b/src/omniperf_analyze-old/configs/gfx906/0000_top_stat.yaml similarity index 100% rename from src/omniperf_analyze/customized/fft/panel_000_top_stat.yaml rename to src/omniperf_analyze-old/configs/gfx906/0000_top_stat.yaml diff --git a/src/omniperf_analyze-old/configs/gfx906/0100_system_info.yaml b/src/omniperf_analyze-old/configs/gfx906/0100_system_info.yaml new file mode 100644 index 000000000..b7ec29eaf --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/0100_system_info.yaml @@ -0,0 +1,9 @@ +--- +Panel Config: + id: 100 + title: System Info + data source: + - raw_csv_table: + id: 101 + source: sysinfo.csv + columnwise: True diff --git a/src/omniperf_analyze-old/configs/gfx906/0200_system-speed-of-light.yaml b/src/omniperf_analyze-old/configs/gfx906/0200_system-speed-of-light.yaml new file mode 100644 index 000000000..986b2f0ae --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/0200_system-speed-of-light.yaml @@ -0,0 +1,230 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + SALU: &SALU_anchor Scalar Arithmetic Logic Unit + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 200 + title: System Speed-of-Light + data source: + - metric_table: + id: 201 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + peak: Peak + pop: PoP + tips: Tips + metric: + VALU FLOPs: + value: None # No perf counter + unit: GFLOPs + peak: (((($sclk * $numCU) * 64) * 2) / 1000) + pop: None # No perf counter + tips: + VALU IOPs: + value: None # No perf counter + unit: GOPs + peak: (((($sclk * $numCU) * 64) * 2) / 1000) + pop: None # No perf counter + tips: + MFMA FLOPs (BF16): + value: None # No perf counter + unit: GFLOPs + peak: ((($sclk * $numCU) * 512) / 1000) + pop: None # No perf counter + tips: + MFMA FLOPs (F16): + value: None # No perf counter + unit: GFLOPs + peak: ((($sclk * $numCU) * 1024) / 1000) + pop: None # No perf counter + tips: + MFMA FLOPs (F32): + value: None # No perf counter + unit: GFLOPs + peak: ((($sclk * $numCU) * 256) / 1000) + pop: None # No perf counter + tips: + MFMA FLOPs (F64): + value: None # No perf counter + unit: GFLOPs + peak: ((($sclk * $numCU) * 256) / 1000) + pop: None # No perf counter + tips: + MFMA IOPs (Int8): + value: None # No perf counter + unit: GOPs + peak: ((($sclk * $numCU) * 1024) / 1000) + pop: None # No perf counter + tips: + Active CUs: + value: $numActiveCUs + unit: CUs + peak: $numCU + pop: ((100 * $numActiveCUs) / $numCU) + tips: + SALU Util: + value: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + peak: 100 + pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) + tips: + VALU Util: + value: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + peak: 100 + pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) + tips: + MFMA Util: + value: None # No HW module + unit: pct + peak: 100 + pop: None # No HW module + tips: + VALU Active Threads/Wave: + value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + unit: Threads + peak: 64 + pop: (AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) * 1.5625) + tips: + IPC - Issue: + value: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + unit: Instr/cycle + peak: 5 + pop: ((100 * AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY))) / 5) + tips: + LDS BW: + value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs))) + unit: GB/sec + peak: (($sclk * $numCU) * 0.128) + pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) + tips: + LDS Bank Conflict: + value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Conflicts/access + peak: 32 + pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32) + tips: + Instr Cache Hit Rate: + value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) + unit: pct + peak: 100 + pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) + tips: + Instr Cache BW: + value: AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64)) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numSQC) + pop: ((100 * AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk + / 1000) * 64) * $numSQC)) + tips: + Scalar L1D Cache Hit Rate: + value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) + unit: pct + peak: 100 + pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) + tips: + Scalar L1D Cache BW: + value: AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64)) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numSQC) + pop: ((100 * AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk + / 1000) * 64) * $numSQC)) + tips: + Vector L1D Cache Hit Rate: + value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: pct + peak: 100 + pop: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + tips: + Vector L1D Cache BW: + value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numCU) + pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) + / ((($sclk / 1000) * 64) * $numCU)) + tips: + L2 Cache Hit Rate: + value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + unit: pct + peak: 100 + pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + tips: + L2-Fabric Read BW: + value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs))) + unit: GB/s + peak: $hbmBW + pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs)))) / $hbmBW) + tips: + L2-Fabric Write BW: + value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs))) + unit: GB/s + peak: $hbmBW + pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs)))) / $hbmBW) + tips: + L2-Fabric Read Latency: + value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum + != 0) else None)) + unit: Cycles + peak: '' + pop: '' + tips: + L2-Fabric Write Latency: + value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum + != 0) else None)) + unit: Cycles + peak: '' + pop: '' + tips: + Wave Occupancy: + value: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + unit: Wavefronts + peak: ($maxWavesPerCU * $numCU) + pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / ($maxWavesPerCU + * $numCU)))) + coll_level: SQ_LEVEL_WAVES + tips: + Instr Fetch BW: + value: AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32)) + unit: GB/s + peak: ((($sclk / 1000) * 32) * $numSQC) + pop: ((100 * AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32))) / ($numSQC + * (($sclk / 1000) * 32))) + coll_level: SQ_IFETCH_LEVEL + tips: + Instr Fetch Latency: + value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH)) + unit: Cycles + peak: '' + pop: '' + coll_level: SQ_IFETCH_LEVEL + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/0500_command-processor.yaml b/src/omniperf_analyze-old/configs/gfx906/0500_command-processor.yaml new file mode 100644 index 000000000..525091879 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/0500_command-processor.yaml @@ -0,0 +1,180 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 500 + title: Command Processor (CPC/CPF) + data source: + - metric_table: + id: 501 + title: Command Processor Fetcher + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy Cycles: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles/Kernel + tips: + CPF Busy: + avg: AVG(CPF_CPF_STAT_BUSY) + min: MIN(CPF_CPF_STAT_BUSY) + max: MAX(CPF_CPF_STAT_BUSY) + unit: Cycles/Kernel + tips: + CPF Util: + avg: AVG((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + min: MIN((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + unit: pct + tips: + CPF Stall: + avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + unit: Cycles/Kernel + tips: + L2Cache Intf Busy: + avg: AVG(CPF_CPF_TCIU_BUSY) + min: MIN(CPF_CPF_TCIU_BUSY) + max: MAX(CPF_CPF_TCIU_BUSY) + unit: Cycles/Kernel + tips: + L2Cache Intf Util: + avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + min: MIN((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + unit: pct + tips: + L2Cache Intf Stall: + avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + min: MIN((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + unit: pct + tips: + UTCL1 Stall: + avg: AVG(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + min: MIN(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + max: MAX(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + unit: Cycles/Kernel + tips: + + - metric_table: + id: 502 + title: Command Processor Compute + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy Cycles: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles + tips: + CPC Busy Cycles: + avg: AVG(CPC_CPC_STAT_BUSY) + min: MIN(CPC_CPC_STAT_BUSY) + max: MAX(CPC_CPC_STAT_BUSY) + unit: Cycles + tips: + CPC Util: + avg: AVG((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + unit: pct + tips: + CPC Stall Cycles: + avg: AVG(CPC_CPC_STAT_STALL) + min: MIN(CPC_CPC_STAT_STALL) + max: MAX(CPC_CPC_STAT_STALL) + unit: Cycles + tips: + CPC Stall Rate: + avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + unit: pct + tips: + CPC Packet Decoding: + avg: AVG(CPC_ME1_BUSY_FOR_PACKET_DECODE) + min: MIN(CPC_ME1_BUSY_FOR_PACKET_DECODE) + max: MAX(CPC_ME1_BUSY_FOR_PACKET_DECODE) + unit: Cycles + tips: + SPI Intf Busy Cycles: + avg: AVG(CPC_ME1_DC0_SPI_BUSY) + min: MIN(CPC_ME1_DC0_SPI_BUSY) + max: MAX(CPC_ME1_DC0_SPI_BUSY) + unit: Cycles + tips: + SPI Intf Util: + avg: AVG((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + unit: pct + tips: + L2Cache Intf Util: + avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + unit: pct + tips: + UTCL1 Stall Cycles: + avg: AVG(CPC_UTCL1_STALL_ON_TRANSLATION) + min: MIN(CPC_UTCL1_STALL_ON_TRANSLATION) + max: MAX(CPC_UTCL1_STALL_ON_TRANSLATION) + unit: Cycles + tips: + UTCL2 Intf Busy Cycles: + avg: AVG(CPC_CPC_UTCL2IU_BUSY) + min: MIN(CPC_CPC_UTCL2IU_BUSY) + max: MAX(CPC_CPC_UTCL2IU_BUSY) + unit: Cycles + tips: + UTCL2 Intf Util: + avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + unit: pct + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/0600_shader-processor-input.yaml b/src/omniperf_analyze-old/configs/gfx906/0600_shader-processor-input.yaml new file mode 100644 index 000000000..bab48700a --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/0600_shader-processor-input.yaml @@ -0,0 +1,174 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 600 + title: Shader Processor Input (SPI) + data source: + - metric_table: + id: 601 + title: SPI Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles + tips: + CS Busy: + avg: AVG(SPI_CSN_BUSY) + min: MIN(SPI_CSN_BUSY) + max: MAX(SPI_CSN_BUSY) + unit: Cycles + tips: + SPI Busy: + avg: AVG(GRBM_SPI_BUSY) + min: MIN(GRBM_SPI_BUSY) + max: MAX(GRBM_SPI_BUSY) + unit: Cycles + tips: + SQ Busy: + avg: AVG(SQ_BUSY_CYCLES) + min: MIN(SQ_BUSY_CYCLES) + max: MAX(SQ_BUSY_CYCLES) + unit: Cycles + tips: + Dispatched Workgroups: + avg: AVG(SPI_CSN_NUM_THREADGROUPS) + min: MIN(SPI_CSN_NUM_THREADGROUPS) + max: MAX(SPI_CSN_NUM_THREADGROUPS) + unit: Workgroups + tips: + Dispatched Wavefronts: + avg: AVG(SPI_CSN_WAVE) + min: MIN(SPI_CSN_WAVE) + max: MAX(SPI_CSN_WAVE) + unit: Wavefronts + tips: + Wave Alloc Failed: + avg: AVG(SPI_RA_REQ_NO_ALLOC) + min: MIN(SPI_RA_REQ_NO_ALLOC) + max: MAX(SPI_RA_REQ_NO_ALLOC) + unit: Cycles + tips: + Wave Alloc Failed - CS: + avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) + min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) + max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) + unit: Cycles + tips: + + - metric_table: + id: 602 + title: SPI Resource Allocation + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Wave request Failed (CS): + avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) + min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) + max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) + unit: Cycles + tips: + CS Stall: + avg: AVG(SPI_RA_RES_STALL_CSN) + min: MIN(SPI_RA_RES_STALL_CSN) + max: MAX(SPI_RA_RES_STALL_CSN) + unit: Cycles + tips: + CS Stall Rate: + avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + min: MIN((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + max: MAX((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + unit: pct + tips: + Scratch Stall: + avg: AVG(SPI_RA_TMP_STALL_CSN) + min: MIN(SPI_RA_TMP_STALL_CSN) + max: MAX(SPI_RA_TMP_STALL_CSN) + unit: Cycles + tips: + Insufficient SIMD Waveslots: + avg: AVG(SPI_RA_WAVE_SIMD_FULL_CSN) + min: MIN(SPI_RA_WAVE_SIMD_FULL_CSN) + max: MAX(SPI_RA_WAVE_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient SIMD VGPRs: + avg: AVG(SPI_RA_VGPR_SIMD_FULL_CSN) + min: MIN(SPI_RA_VGPR_SIMD_FULL_CSN) + max: MAX(SPI_RA_VGPR_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient SIMD SGPRs: + avg: AVG(SPI_RA_SGPR_SIMD_FULL_CSN) + min: MIN(SPI_RA_SGPR_SIMD_FULL_CSN) + max: MAX(SPI_RA_SGPR_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient CU LDS: + avg: AVG(SPI_RA_LDS_CU_FULL_CSN) + min: MIN(SPI_RA_LDS_CU_FULL_CSN) + max: MAX(SPI_RA_LDS_CU_FULL_CSN) + unit: CU + tips: + Insufficient CU Barries: + avg: AVG(SPI_RA_BAR_CU_FULL_CSN) + min: MIN(SPI_RA_BAR_CU_FULL_CSN) + max: MAX(SPI_RA_BAR_CU_FULL_CSN) + unit: CU + tips: + Insufficient Bulky Resource: + avg: AVG(SPI_RA_BULKY_CU_FULL_CSN) + min: MIN(SPI_RA_BULKY_CU_FULL_CSN) + max: MAX(SPI_RA_BULKY_CU_FULL_CSN) + unit: CU + tips: + Reach CU Threadgroups Limit: + avg: AVG(SPI_RA_TGLIM_CU_FULL_CSN) + min: MIN(SPI_RA_TGLIM_CU_FULL_CSN) + max: MAX(SPI_RA_TGLIM_CU_FULL_CSN) + unit: Cycles + tips: + Reach CU Wave Limit: + avg: AVG(SPI_RA_WVLIM_STALL_CSN) + min: MIN(SPI_RA_WVLIM_STALL_CSN) + max: MAX(SPI_RA_WVLIM_STALL_CSN) + unit: Cycles + tips: + VGPR Writes: + avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + min: MIN((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + unit: Cycles/wave + tips: + SGPR Writes: + avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + min: MIN((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + max: MAX((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + unit: Cycles/wave + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/0700_wavefront-launch.yaml b/src/omniperf_analyze-old/configs/gfx906/0700_wavefront-launch.yaml new file mode 100644 index 000000000..70141193e --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/0700_wavefront-launch.yaml @@ -0,0 +1,142 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 700 + title: Wavefront + data source: + - metric_table: + id: 701 + title: Wavefront Launch Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Grid Size: + avg: AVG(grd) + min: MIN(grd) + max: MAX(grd) + unit: Work Items + tips: + Workgroup Size: + avg: AVG(wgr) + min: MIN(wgr) + max: MAX(wgr) + unit: Work Items + tips: + Total Wavefronts: + avg: AVG(SPI_CSN_WAVE) + min: MIN(SPI_CSN_WAVE) + max: MAX(SPI_CSN_WAVE) + unit: Wavefronts + tips: + Saved Wavefronts: + avg: AVG(SQ_WAVES_SAVED) + min: MIN(SQ_WAVES_SAVED) + max: MAX(SQ_WAVES_SAVED) + unit: Wavefronts + tips: + Restored Wavefronts: + avg: AVG(SQ_WAVES_RESTORED) + min: MIN(SQ_WAVES_RESTORED) + max: MAX(SQ_WAVES_RESTORED) + unit: Wavefronts + tips: + VGPRs: + avg: AVG(arch_vgpr) + min: MIN(arch_vgpr) + max: MAX(arch_vgpr) + unit: Registers + tips: + AGPRs: + avg: AVG(accum_vgpr) + min: MIN(accum_vgpr) + max: MAX(accum_vgpr) + unit: Registers + tips: + SGPRs: + avg: AVG(sgpr) + min: MIN(sgpr) + max: MAX(sgpr) + unit: Registers + tips: + LDS Allocation: + avg: AVG(lds) + min: MIN(lds) + max: MAX(lds) + unit: Bytes + tips: + Scratch Allocation: + avg: AVG(scr) + min: MIN(scr) + max: MAX(scr) + unit: Bytes + tips: + + - metric_table: + id: 702 + title: Wavefront Runtime Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Kernel Time (Nanosec): + avg: AVG((EndNs - BeginNs)) + min: MIN((EndNs - BeginNs)) + max: MAX((EndNs - BeginNs)) + unit: ns + tips: + Kernel Time (Cycles): + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycle + tips: + Instr/wavefront: + avg: AVG((SQ_INSTS / SQ_WAVES)) + min: MIN((SQ_INSTS / SQ_WAVES)) + max: MAX((SQ_INSTS / SQ_WAVES)) + unit: Instr/wavefront + tips: + Wave Cycles: + avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom)) + min: MIN(((4 * SQ_WAVE_CYCLES) / $denom)) + max: MAX(((4 * SQ_WAVE_CYCLES) / $denom)) + unit: (Cycles + $normUnit) + tips: + Dependency Wait Cycles: + avg: AVG(((4 * SQ_WAIT_ANY) / $denom)) + min: MIN(((4 * SQ_WAIT_ANY) / $denom)) + max: MAX(((4 * SQ_WAIT_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Issue Wait Cycles: + avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom)) + min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom)) + max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Active Cycles: + avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Wavefront Occupancy: + avg: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + min: MIN((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + max: MAX((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + unit: Wavefronts + coll_level: SQ_LEVEL_WAVES + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1000_compute-unit-instruction-mix.yaml b/src/omniperf_analyze-old/configs/gfx906/1000_compute-unit-instruction-mix.yaml new file mode 100644 index 000000000..679acc34d --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1000_compute-unit-instruction-mix.yaml @@ -0,0 +1,234 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1000 + title: Compute Units - Instruction Mix + data source: + - metric_table: + id: 1001 + title: Instruction Mix + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_bar + label_txt: (# of instr + $normUnit) + metric: + VALU - Vector: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + VMEM: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + LDS: + avg: AVG((SQ_INSTS_LDS / $denom)) + min: MIN((SQ_INSTS_LDS / $denom)) + max: MAX((SQ_INSTS_LDS / $denom)) + unit: (instr + $normUnit) + tips: + VALU - MFMA: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + SALU: + avg: AVG((SQ_INSTS_SALU / $denom)) + min: MIN((SQ_INSTS_SALU / $denom)) + max: MAX((SQ_INSTS_SALU / $denom)) + unit: (instr + $normUnit) + tips: + SMEM: + avg: AVG((SQ_INSTS_SMEM / $denom)) + min: MIN((SQ_INSTS_SMEM / $denom)) + max: MAX((SQ_INSTS_SMEM / $denom)) + unit: (instr + $normUnit) + tips: + Branch: + avg: AVG((SQ_INSTS_BRANCH / $denom)) + min: MIN((SQ_INSTS_BRANCH / $denom)) + max: MAX((SQ_INSTS_BRANCH / $denom)) + unit: (instr + $normUnit) + tips: + GDS: + avg: AVG((SQ_INSTS_GDS / $denom)) + min: MIN((SQ_INSTS_GDS / $denom)) + max: MAX((SQ_INSTS_GDS / $denom)) + unit: (instr + $normUnit) + tips: + + - metric_table: + id: 1002 + title: VALU Arithmetic Instr Mix + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_bar + label_txt: (# of instr + $normUnit) + metric: + INT-32: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + INT-64: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F16-ADD: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F16-Mult: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F16-FMA: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F16-Trans: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F32-ADD: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F32-Mult: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F32-FMA: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F32-Trans: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F64-ADD: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F64-Mult: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F64-FMA: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + F64-Trans: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + Conversion: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + + - metric_table: + id: 1003 + title: VMEM Instr Mix + header: + type: Type + count: Count + tips: Tips + metric: + Buffer Instr: + count: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) + tips: + Buffer Read: + count: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + tips: + Buffer Write: + count: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + tips: + Buffer Atomic: + count: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + tips: + Flat Instr: + count: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) + tips: + Flat Read: + count: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + tips: + Flat Write: + count: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + tips: + Flat Atomic: + count: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + tips: + + - metric_table: + id: 1004 + title: MFMA Arithmetic Instr Mix + header: + type: Type + count: Count + tips: Tips + metric: + MFMA-I8: + count: None # No HW module + tips: + MFMA-F16: + count: None # No HW module + tips: + MFMA-BF16: + count: None # No HW module + tips: + MFMA-F32: + count: None # No HW module + tips: + MFMA-F64: + count: None # No HW module + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1100_compute-unit-compute-pipeline.yaml b/src/omniperf_analyze-old/configs/gfx906/1100_compute-unit-compute-pipeline.yaml new file mode 100644 index 000000000..8cffb24c7 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1100_compute-unit-compute-pipeline.yaml @@ -0,0 +1,154 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1100 + title: Compute Units - Compute Pipeline + data source: + - metric_table: + id: 1101 + title: Speed-of-Light + header: + metric: Metric + value: Value + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + valu_flops_pop: + value: None # No perf counter + tips: + mfma_flops_bf16_pop: + value: None # No perf counter + tips: + mfma_flops_f16_pop: + value: None # No perf counter + tips: + mfma_flops_f32_pop: + value: None # No perf counter + tips: + mfma_flops_f64_pop: + value: None # No perf counter + tips: + mfma_flops_i8_pop: + value: None # No perf counter + tips: + + - metric_table: + id: 1102 + title: Pipeline Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + IPC (Avg): + avg: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + unit: Instr/cycle + tips: + IPC (Issue): + avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + unit: Instr/cycle + tips: + SALU Util: + avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + min: MIN((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + max: MAX((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + unit: pct + tips: + VALU Util: + avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + min: MIN((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + max: MAX((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + unit: pct + tips: + VALU Active Threads: + avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + min: MIN(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + unit: Threads + tips: + MFMA Util: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: pct + tips: + MFMA Instr Cycles: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: cycles/instr + tips: + + - metric_table: + id: 1103 + title: Arithmetic Operations + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + FLOPs (Total): + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + INT8 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + F16 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + BF16 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + F32 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + F64 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + + diff --git a/src/omniperf_analyze-old/configs/gfx906/1200_lds.yaml b/src/omniperf_analyze-old/configs/gfx906/1200_lds.yaml new file mode 100644 index 000000000..3fd52c3b1 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1200_lds.yaml @@ -0,0 +1,121 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1200 + title: Local Data Share (LDS) + data source: + - metric_table: + id: 1201 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Utilization: + value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))) + unit: Pct of Peak + tips: + Access Rate: + value: AVG(((200 * SQ_ACTIVE_INST_LDS) / (GRBM_GUI_ACTIVE * $numCU))) + unit: Pct of Peak + tips: + Bandwidth (Pct-of-Peak): + value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) + unit: Pct of Peak + tips: + Bank Conflict Rate: + value: AVG((((SQ_LDS_BANK_CONFLICT * 3.125) / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1202 + title: LDS Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + LDS Instrs: + avg: AVG((SQ_INSTS_LDS / $denom)) + min: MIN((SQ_INSTS_LDS / $denom)) + max: MAX((SQ_INSTS_LDS / $denom)) + unit: (Instr + $normUnit) + tips: + Bandwidth: + avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + min: MIN(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + unit: (Bytes + $normUnit) + tips: + Bank Conficts/Access: + avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + min: MIN(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Conflicts/Access + tips: + Index Accesses: + avg: AVG((SQ_LDS_IDX_ACTIVE / $denom)) + min: MIN((SQ_LDS_IDX_ACTIVE / $denom)) + max: MAX((SQ_LDS_IDX_ACTIVE / $denom)) + unit: (Cycles + $normUnit) + tips: + Atomic Cycles: + avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom)) + min: MIN((SQ_LDS_ATOMIC_RETURN / $denom)) + max: MAX((SQ_LDS_ATOMIC_RETURN / $denom)) + unit: (Cycles + $normUnit) + tips: + Bank Conflict: + avg: AVG((SQ_LDS_BANK_CONFLICT / $denom)) + min: MIN((SQ_LDS_BANK_CONFLICT / $denom)) + max: MAX((SQ_LDS_BANK_CONFLICT / $denom)) + unit: (Cycles + $normUnit) + tips: + Addr Conflict: + avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom)) + min: MIN((SQ_LDS_ADDR_CONFLICT / $denom)) + max: MAX((SQ_LDS_ADDR_CONFLICT / $denom)) + unit: (Cycles + $normUnit) + tips: + Unaligned Stall: + avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom)) + min: MIN((SQ_LDS_UNALIGNED_STALL / $denom)) + max: MAX((SQ_LDS_UNALIGNED_STALL / $denom)) + unit: (Cycles + $normUnit) + tips: + Mem Violations: + avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom)) + min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom)) + max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom)) + unit: ( + $normUnit) + tips: + LDS Latency: + avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + unit: Cycles + coll_level: SQ_INST_LEVEL_LDS + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1300_instruction-cache.yaml b/src/omniperf_analyze-old/configs/gfx906/1300_instruction-cache.yaml new file mode 100644 index 000000000..05dc75980 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1300_instruction-cache.yaml @@ -0,0 +1,79 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1300 + title: Instruction Cache + data source: + - metric_table: + id: 1301 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Bandwidth: + value: AVG(((SQC_ICACHE_REQ * 100000) / (($sclk * $numSQC) + * (EndNs - BeginNs)))) + unit: Pct of Peak + tips: + Cache Hit: + value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + unit: Pct of Peak + tips: + + - metric_table: + id: 1302 + title: Instruction Cache Accesses + header: + metric: L1I Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((SQC_ICACHE_REQ / $denom)) + min: MIN((SQC_ICACHE_REQ / $denom)) + max: MAX((SQC_ICACHE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((SQC_ICACHE_HITS / $denom)) + min: MIN((SQC_ICACHE_HITS / $denom)) + max: MAX((SQC_ICACHE_HITS / $denom)) + unit: (Hits + $normUnit) + tips: + Misses - Non Duplicated: + avg: AVG((SQC_ICACHE_MISSES / $denom)) + min: MIN((SQC_ICACHE_MISSES / $denom)) + max: MAX((SQC_ICACHE_MISSES / $denom)) + unit: (Misses + $normUnit) + tips: + Misses - Duplicated: + avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + unit: (Misses + $normUnit) + tips: + Cache Hit: + avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + min: MIN(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + unit: pct + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1400_constant-cache.yaml b/src/omniperf_analyze-old/configs/gfx906/1400_constant-cache.yaml new file mode 100644 index 000000000..563caad13 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1400_constant-cache.yaml @@ -0,0 +1,164 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1400 + title: Scalar L1 Data Cache + data source: + - metric_table: + id: 1401 + title: Speed-of-Light + header: + mertic: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Bandwidth: + value: AVG(((SQC_DCACHE_REQ * 100000) / (($sclk * $numSQC) + * (EndNs - BeginNs)))) + unit: Pct of Peak + tips: + Cache Hit: + value: + AVG((((SQC_DCACHE_HITS * 100) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1402 + title: Scalar L1D Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((SQC_DCACHE_REQ / $denom)) + min: MIN((SQC_DCACHE_REQ / $denom)) + max: MAX((SQC_DCACHE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((SQC_DCACHE_HITS / $denom)) + min: MIN((SQC_DCACHE_HITS / $denom)) + max: MAX((SQC_DCACHE_HITS / $denom)) + unit: (Req + $normUnit) + tips: + Misses - Non Duplicated: + avg: AVG((SQC_DCACHE_MISSES / $denom)) + min: MIN((SQC_DCACHE_MISSES / $denom)) + max: MAX((SQC_DCACHE_MISSES / $denom)) + unit: (Req + $normUnit) + tips: + Misses- Duplicated: + avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hit: + avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + min: MIN((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + max: MAX((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + unit: pct + tips: + Read Req (Total): + avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + min: MIN((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((SQC_DCACHE_ATOMIC / $denom)) + min: MIN((SQC_DCACHE_ATOMIC / $denom)) + max: MAX((SQC_DCACHE_ATOMIC / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (1 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_1 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_1 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (2 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_2 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_2 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (4 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_4 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_4 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (8 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_8 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_8 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (16 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_16 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_16 / $denom)) + unit: (Req + $normUnit) + tips: + + - metric_table: + id: 1403 + title: Scalar L1D Cache - L2 Interface + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Read Req: + avg: AVG((SQC_TC_DATA_READ_REQ / $denom)) + min: MIN((SQC_TC_DATA_READ_REQ / $denom)) + max: MAX((SQC_TC_DATA_READ_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom)) + min: MIN((SQC_TC_DATA_WRITE_REQ / $denom)) + max: MAX((SQC_TC_DATA_WRITE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)) + min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom)) + max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Stall: + avg: AVG((SQC_TC_STALL / $denom)) + min: MIN((SQC_TC_STALL / $denom)) + max: MAX((SQC_TC_STALL / $denom)) + unit: (Cycles + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1500_TA_and_TD.yaml b/src/omniperf_analyze-old/configs/gfx906/1500_TA_and_TD.yaml new file mode 100644 index 000000000..8f71cedc9 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1500_TA_and_TD.yaml @@ -0,0 +1,174 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1500 + title: Texture Addresser and Texture Data (TA/TD) + data source: + - metric_table: + id: 1501 + title: TA + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + TA Busy: + avg: AVG(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TA Addr Stall: + avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TA Data Stall: + avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TD2TA Addr Stall: + avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + Total Instructions: + avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom)) + min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom)) + max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Instr: + avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Read Instr: + avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Write Instr: + avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Atomic Instr: + avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Instr: + avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Read Instr: + avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Write Instr: + avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Atomic Instr: + avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Total Cylces: + avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + Buffer Coalesced Read: + avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + Buffer Coalesced Write: + avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + + - metric_table: + id: 1502 + title: TD + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + TD Busy: + avg: AVG(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TD Stall: + avg: AVG(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + SPI2TD Stall: + avg: # No perf counter + min: # No perf counter + max: # No perf counter + unit: pct + tips: + Coalescable Instr: + avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Load Instr: + avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + min: MIN((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + unit: (Instr + $normUnit) + tips: + Store Instr: + avg: AVG((TD_STORE_WAVEFRONT_sum / $denom)) + min: MIN((TD_STORE_WAVEFRONT_sum / $denom)) + max: MAX((TD_STORE_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Atomic Instr: + avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom)) + min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom)) + max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1600_L1_cache.yaml b/src/omniperf_analyze-old/configs/gfx906/1600_L1_cache.yaml new file mode 100644 index 000000000..01e6d29d7 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1600_L1_cache.yaml @@ -0,0 +1,404 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1600 + title: Vector L1 Data Cache + data source: + - metric_table: + id: 1601 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Buffer Coalescing: + value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum + * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None)) + unit: Pct of Peak + tips: + Cache Util: + value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: Pct of Peak + tips: + Cache BW: + value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) + / ((($sclk / 1000) * 64) * $numCU)) + unit: Pct of Peak + tips: + Cache Hit: + value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1602 + title: L1D Cache Stalls + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Stalled on L2 Data: + avg: AVG((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + min: MIN((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + max: MAX((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: pct + tips: + Stalled on L2 Req: + avg: AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + min: MIN((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + max: MAX((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Read): + avg: AVG((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Write): + avg: AVG((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Atomic): + avg: AVG((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + + - metric_table: + id: 1603 + title: L1D Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Total Req: + avg: AVG((TCP_TOTAL_ACCESSES_sum / $denom)) + min: MIN((TCP_TOTAL_ACCESSES_sum / $denom)) + max: MAX((TCP_TOTAL_ACCESSES_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Req: + avg: AVG((TCP_TOTAL_READ_sum / $denom)) + min: MIN((TCP_TOTAL_READ_sum / $denom)) + max: MAX((TCP_TOTAL_READ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((TCP_TOTAL_WRITE_sum / $denom)) + min: MIN((TCP_TOTAL_WRITE_sum / $denom)) + max: MAX((TCP_TOTAL_WRITE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + min: MIN(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + max: MAX(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + unit: (Req + $normUnit) + tips: + Cache BW: + avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + unit: GB/s + tips: + Cache Accesses: + avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hits: + avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hit Rate: + avg: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + min: MIN(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + max: MAX(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: pct + tips: + Invalidate: + avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + unit: ( + $normUnit) + tips: + L1-L2 BW: + avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + unit: (Bytes + $normUnit) + tips: + L1-L2 Read: + avg: AVG((TCP_TCC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + L1-L2 Write: + avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + L1-L2 Atomic: + avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + min: MIN(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + unit: (Req + $normUnit) + tips: + L1 Access Latency: + avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + min: MIN(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + unit: Cycles + tips: + L1-L2 Read Latency: + avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + min: MIN(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + unit: Cycles + tips: + L1-L2 Write Latency: + avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + min: MIN(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + max: MAX(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + unit: Cycles + tips: + + - metric_table: + id: 1604 + title: L1D - L2 Transactions + header: + metric: Metric + xfer: Xfer + coherency: Coherency + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_multi_bar + metric: + NC - Read: + xfer: Read + coherency: NC + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + UC - Read: + xfer: Read + coherency: UC + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + CC - Read: + xfer: Read + coherency: CC + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + RW - Read: + xfer: Read + coherency: RW + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + RW - Write: + xfer: Write + coherency: RW + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + NC - Write: + xfer: Write + coherency: NC + avg: AVG((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC - Write: + xfer: Write + coherency: CC + avg: AVG((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC - Write: + xfer: Write + coherency: UC + avg: AVG((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + NC - Atomic: + xfer: Atomic + coherency: NC + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + UC - Atomic: + xfer: Atomic + coherency: UC + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + CC - Atomic: + xfer: Atomic + coherency: CC + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + RW - Atomic: + xfer: Atomic + coherency: RW + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Req + $normUnit) + tips: + + - metric_table: + id: 1605 + title: L1D Addr Translation + header: + metric: Metric + avg: Avg + min: Min + max: Max + units: Units + tips: Tips + metric: + Req: + avg: AVG((TCP_UTCL1_REQUEST_sum / $denom)) + min: MIN((TCP_UTCL1_REQUEST_sum / $denom)) + max: MAX((TCP_UTCL1_REQUEST_sum / $denom)) + units: (Req + $normUnit) + tips: + Hit Ratio: + avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + min: MIN((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + units: pct + tips: + Hits: + avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + units: (Hits + $normUnit) + tips: + Misses (Translation): + avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + units: (Misses + $normUnit) + tips: + Misses (Permission): + avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + units: (Misses + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1700_L2_cache.yaml b/src/omniperf_analyze-old/configs/gfx906/1700_L2_cache.yaml new file mode 100644 index 000000000..0b5f5e827 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1700_L2_cache.yaml @@ -0,0 +1,364 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1700 + title: L2 Cache + data source: + - metric_table: + id: 1701 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + metric: + L2 Util: + value: AVG(((TCC_BUSY_sum * 100) / (TO_INT($L2Banks) * GRBM_GUI_ACTIVE))) + unit: pct + tips: + Cache Hit: + value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else 0)) + unit: pct + tips: + L2-EA Rd BW: + value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs))) + unit: GB/s + tips: + L2-EA Wr BW: + value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs))) + unit: GB/s + tips: + + - metric_table: + id: 1702 + title: L2 - Fabric Transactions + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Read BW: + avg: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + min: MIN((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + max: MAX((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + unit: (Bytes + $normUnit) + tips: + Write BW: + avg: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + min: MIN((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + max: MAX((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + unit: (Bytes + $normUnit) + tips: + Read (32B): + avg: AVG((TCC_EA_RDREQ_32B_sum / $denom)) + min: MIN((TCC_EA_RDREQ_32B_sum / $denom)) + max: MAX((TCC_EA_RDREQ_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read (Uncached 32B): + avg: AVG((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + min: MIN((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + max: MAX((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read (64B): + avg: AVG(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + min: MIN(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + max: MAX(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + unit: (Req + $normUnit) + tips: + HBM Read: + avg: AVG((TCC_EA_RDREQ_DRAM_sum / $denom)) + min: MIN((TCC_EA_RDREQ_DRAM_sum / $denom)) + max: MAX((TCC_EA_RDREQ_DRAM_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write (32B): + avg: AVG(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + min: MIN(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + max: MAX(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + unit: (Req + $normUnit) + tips: + Write (Uncached 32B): + avg: AVG((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + min: MIN((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + max: MAX((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write (64B): + avg: AVG((TCC_EA_WRREQ_64B_sum / $denom)) + min: MIN((TCC_EA_WRREQ_64B_sum / $denom)) + max: MAX((TCC_EA_WRREQ_64B_sum / $denom)) + unit: (Req + $normUnit) + tips: + HBM Write: + avg: AVG((TCC_EA_WRREQ_DRAM_sum / $denom)) + min: MIN((TCC_EA_WRREQ_DRAM_sum / $denom)) + max: MAX((TCC_EA_WRREQ_DRAM_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Latency: + avg: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + min: MIN(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + max: MAX(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + unit: Cycles + tips: + Write Latency: + avg: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + min: MIN(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + max: MAX(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + unit: Cycles + tips: + Atomic Latency: + avg: AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + min: MIN(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + max: MAX(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + unit: Cycles + tips: + Read Stall: + avg: AVG((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + min: MIN((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + max: MAX((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + unit: pct + tips: + Write Stall: + avg: AVG((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + min: MIN((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + max: MAX((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + unit: pct + tips: + + - metric_table: + id: 1703 + title: L2 Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((TCC_REQ_sum / $denom)) + min: MIN((TCC_REQ_sum / $denom)) + max: MAX((TCC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Streaming Req: + avg: AVG((TCC_STREAMING_REQ_sum / $denom)) + min: MIN((TCC_STREAMING_REQ_sum / $denom)) + max: MAX((TCC_STREAMING_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Req: + avg: AVG((TCC_READ_sum / $denom)) + min: MIN((TCC_READ_sum / $denom)) + max: MAX((TCC_READ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((TCC_WRITE_sum / $denom)) + min: MIN((TCC_WRITE_sum / $denom)) + max: MAX((TCC_WRITE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((TCC_ATOMIC_sum / $denom)) + min: MIN((TCC_ATOMIC_sum / $denom)) + max: MAX((TCC_ATOMIC_sum / $denom)) + unit: (Req + $normUnit) + tips: + Probe Req: + avg: AVG((TCC_PROBE_sum / $denom)) + min: MIN((TCC_PROBE_sum / $denom)) + max: MAX((TCC_PROBE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((TCC_HIT_sum / $denom)) + min: MIN((TCC_HIT_sum / $denom)) + max: MAX((TCC_HIT_sum / $denom)) + unit: (Hits + $normUnit) + tips: + Misses: + avg: AVG((TCC_MISS_sum / $denom)) + min: MIN((TCC_MISS_sum / $denom)) + max: MAX((TCC_MISS_sum / $denom)) + unit: (Misses + $normUnit) + tips: + Cache Hit: + avg: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + min: MIN((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + max: MAX((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + unit: pct + tips: + Writeback: + avg: AVG((TCC_WRITEBACK_sum / $denom)) + min: MIN((TCC_WRITEBACK_sum / $denom)) + max: MAX((TCC_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + NC Req: + avg: AVG((TCC_NC_REQ_sum / $denom)) + min: MIN((TCC_NC_REQ_sum / $denom)) + max: MAX((TCC_NC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC Req: + avg: AVG((TCC_UC_REQ_sum / $denom)) + min: MIN((TCC_UC_REQ_sum / $denom)) + max: MAX((TCC_UC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC Req: + avg: AVG((TCC_CC_REQ_sum / $denom)) + min: MIN((TCC_CC_REQ_sum / $denom)) + max: MAX((TCC_CC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW Req: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (Req + $normUnit) + tips: + Writeback (Normal): + avg: AVG((TCC_NORMAL_WRITEBACK_sum / $denom)) + min: MIN((TCC_NORMAL_WRITEBACK_sum / $denom)) + max: MAX((TCC_NORMAL_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + Writeback (TC Req): + avg: AVG((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + min: MIN((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + max: MAX((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + Evict (Normal): + avg: AVG((TCC_NORMAL_EVICT_sum / $denom)) + min: MIN((TCC_NORMAL_EVICT_sum / $denom)) + max: MAX((TCC_NORMAL_EVICT_sum / $denom)) + unit: ( + $normUnit) + tips: + Evict (TC Req): + avg: AVG((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + min: MIN((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + max: MAX((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + unit: ( + $normUnit) + tips: + + - metric_table: + id: 1704 + title: L2 - EA Interface Stalls + header: + metric: Metric + type: Type + transaction: Transaction + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_multi_bar + metric: + Read - Remote Socket Stall: + type: Remote Socket Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read - Peer GCD Stall: + type: Peer GCD Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read - HBM Stall: + type: HBM Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Remote Socket Stall: + type: Remote Socket Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Peer GCD Stall: + type: Peer GCD Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - HBM Stall: + type: HBM Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Credit Starvation: + type: Credit Starvation + transaction: Write + avg: AVG((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + min: MIN((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + max: MAX((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1800_L2_cache_per_channel.yaml b/src/omniperf_analyze-old/configs/gfx906/1800_L2_cache_per_channel.yaml new file mode 100644 index 000000000..7a808c5b8 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1800_L2_cache_per_channel.yaml @@ -0,0 +1,1721 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1800 + title: L2 Cache (per Channel) + data source: + - metric_table: + id: 1801 + title: Aggregate Stats (All 32 channels) + header: + metric: Metric + avg: Mean + std dev: Std Dev + min: Min + max: Max + unit: Unit + tips: Tips + metric: + L2 Cache Hit Rate: + avg: AVG(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[29] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + std dev: STD(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + min: MIN(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + max: MAX(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + unit: pct + tips: + Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Read Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Write Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Atomic Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Read Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Write Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Atomic Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Read Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + unit: Cycles + tips: + L2 - EA Write Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + unit: Cycles + tips: + L2 - EA Atomic Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + unit: Cycles + tips: + L2 - EA Read Stall (IO): + avg: None # No perf counter + std dev: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Cycles + $normUnit) + tips: + L2 - EA Read Stall (GMI): + avg: None # No perf counter + std dev: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Cycles + $normUnit) + tips: + L2 - EA Read Stall (DRAM): + avg: None # No perf counter + std dev: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (IO): + avg: None # No perf counter + std dev: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (GMI): + avg: None # No perf counter + std dev: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (DRAM): + avg: None # No perf counter + std dev: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Starve: + avg: None # No perf counter + std dev: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (Cycles + $normUnit) + tips: + - metric_table: + id: 1802 + title: Channel 0-15 + columnwise: True + header: + channel: Channel + hit rate: L2 Cache Hit Rate (%) + req: Requests (Requests) + read req: L1-L2 Read (Requests) + write req: L1-L2 Write (Requests) + atomic req: L1-L2 Atomic (Requests) + ea read req: L2-EA Read (Requests) + ea write req: L2-EA Write (Requests) + ea atomic req: L2-EA Atomic (Requests) + ea read lat - cycles: L2-EA Read Latency (Cycles) + ea write lat - cycles: L2-EA Write Latency (Cycles) + ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) + ea read stall - io: L2-EA Read Stall - IO (Cycles per) + ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) + ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) + ea write stall - io: L2-EA Write Stall - IO (Cycles per) + ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) + ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) + ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) + tips: Tips + metric: + "0": + hit rate: + AVG((((100 * TCC_HIT[0]) / (TCC_HIT[0] + TCC_MISS[0])) if ((TCC_HIT[0] + + TCC_MISS[0]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[0]) / $denom)) + read req: AVG((TO_INT(TCC_READ[0]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[0]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[0]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[0]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[0]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[0]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[0] / TCC_EA_RDREQ[0]) if (TCC_EA_RDREQ[0] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[0] / TCC_EA_WRREQ[0]) if (TCC_EA_WRREQ[0] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[0] / TCC_EA_ATOMIC[0]) if + (TCC_EA_ATOMIC[0] != 0) else 0)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "1": + hit rate: + AVG((((100 * TCC_HIT[1]) / (TCC_HIT[1] + TCC_MISS[1])) if ((TCC_HIT[1] + + TCC_MISS[1]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[1]) / $denom)) + read req: AVG((TO_INT(TCC_READ[1]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[1]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[1]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[1]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[1]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[1]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[1] / TCC_EA_RDREQ[1]) if (TCC_EA_RDREQ[1] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[1] / TCC_EA_WRREQ[1]) if (TCC_EA_WRREQ[1] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[1] / TCC_EA_ATOMIC[1]) if + (TCC_EA_ATOMIC[1] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "2": + hit rate: + AVG((((100 * TCC_HIT[2]) / (TCC_HIT[2] + TCC_MISS[2])) if ((TCC_HIT[2] + + TCC_MISS[2]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[2]) / $denom)) + read req: AVG((TO_INT(TCC_READ[2]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[2]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[2]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[2]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[2]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[2]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[2] / TCC_EA_RDREQ[2]) if (TCC_EA_RDREQ[2] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[2] / TCC_EA_WRREQ[2]) if (TCC_EA_WRREQ[2] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[2] / TCC_EA_ATOMIC[2]) if + (TCC_EA_ATOMIC[2] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "3": + hit rate: + AVG((((100 * TCC_HIT[3]) / (TCC_HIT[3] + TCC_MISS[3])) if ((TCC_HIT[3] + + TCC_MISS[3]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[3]) / $denom)) + read req: AVG((TO_INT(TCC_READ[3]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[3]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[3]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[3]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[3]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[3]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[3] / TCC_EA_RDREQ[3]) if (TCC_EA_RDREQ[3] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[3] / TCC_EA_WRREQ[3]) if (TCC_EA_WRREQ[3] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[3] / TCC_EA_ATOMIC[3]) if + (TCC_EA_ATOMIC[3] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "4": + hit rate: + AVG((((100 * TCC_HIT[4]) / (TCC_HIT[4] + TCC_MISS[4])) if ((TCC_HIT[4] + + TCC_MISS[4]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[4]) / $denom)) + read req: AVG((TO_INT(TCC_READ[4]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[4]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[4]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[4]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[4]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[4]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[4] / TCC_EA_RDREQ[4]) if (TCC_EA_RDREQ[4] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[4] / TCC_EA_WRREQ[4]) if (TCC_EA_WRREQ[4] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[4] / TCC_EA_ATOMIC[4]) if + (TCC_EA_ATOMIC[4] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "5": + hit rate: + AVG((((100 * TCC_HIT[5]) / (TCC_HIT[5] + TCC_MISS[5])) if ((TCC_HIT[5] + + TCC_MISS[5]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[5]) / $denom)) + read req: AVG((TO_INT(TCC_READ[5]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[5]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[5]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[5]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[5]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[5]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[5] / TCC_EA_RDREQ[5]) if (TCC_EA_RDREQ[5] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[5] / TCC_EA_WRREQ[5]) if (TCC_EA_WRREQ[5] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[5] / TCC_EA_ATOMIC[5]) if + (TCC_EA_ATOMIC[5] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "6": + hit rate: + AVG((((100 * TCC_HIT[6]) / (TCC_HIT[6] + TCC_MISS[6])) if ((TCC_HIT[6] + + TCC_MISS[6]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[6]) / $denom)) + read req: AVG((TO_INT(TCC_READ[6]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[6]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[6]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[6]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[6]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[6]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[6] / TCC_EA_RDREQ[6]) if (TCC_EA_RDREQ[6] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[6] / TCC_EA_WRREQ[6]) if (TCC_EA_WRREQ[6] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[6] / TCC_EA_ATOMIC[6]) if + (TCC_EA_ATOMIC[6] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "7": + hit rate: + AVG((((100 * TCC_HIT[7]) / (TCC_HIT[7] + TCC_MISS[7])) if ((TCC_HIT[7] + + TCC_MISS[7]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[7]) / $denom)) + read req: AVG((TO_INT(TCC_READ[7]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[7]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[7]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[7]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[7]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[7]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[7] / TCC_EA_RDREQ[7]) if (TCC_EA_RDREQ[7] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[7] / TCC_EA_WRREQ[7]) if (TCC_EA_WRREQ[7] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[7] / TCC_EA_ATOMIC[7]) if + (TCC_EA_ATOMIC[7] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "8": + hit rate: + AVG((((100 * TCC_HIT[8]) / (TCC_HIT[8] + TCC_MISS[8])) if ((TCC_HIT[8] + + TCC_MISS[8]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[8]) / $denom)) + read req: AVG((TO_INT(TCC_READ[8]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[8]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[8]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[8]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[8]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[8]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[8] / TCC_EA_RDREQ[8]) if (TCC_EA_RDREQ[8] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[8] / TCC_EA_WRREQ[8]) if (TCC_EA_WRREQ[8] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[8] / TCC_EA_ATOMIC[8]) if + (TCC_EA_ATOMIC[8] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "9": + hit rate: + AVG((((100 * TCC_HIT[9]) / (TCC_HIT[9] + TCC_MISS[9])) if ((TCC_HIT[9] + + TCC_MISS[9]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[9]) / $denom)) + read req: AVG((TO_INT(TCC_READ[9]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[9]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[9]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[9]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[9]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[9]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[9] / TCC_EA_RDREQ[9]) if (TCC_EA_RDREQ[9] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[9] / TCC_EA_WRREQ[9]) if (TCC_EA_WRREQ[9] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[9] / TCC_EA_ATOMIC[9]) if + (TCC_EA_ATOMIC[9] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "10": + hit rate: + AVG((((100 * TCC_HIT[10]) / (TCC_HIT[10] + TCC_MISS[10])) if ((TCC_HIT[10] + + TCC_MISS[10]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[10]) / $denom)) + read req: AVG((TO_INT(TCC_READ[10]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[10]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[10]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[10]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[10]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[10]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[10] / TCC_EA_RDREQ[10]) if (TCC_EA_RDREQ[10] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[10] / TCC_EA_WRREQ[10]) if (TCC_EA_WRREQ[10] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[10] / TCC_EA_ATOMIC[10]) if + (TCC_EA_ATOMIC[10] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "11": + hit rate: + AVG((((100 * TCC_HIT[11]) / (TCC_HIT[11] + TCC_MISS[11])) if ((TCC_HIT[11] + + TCC_MISS[11]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[11]) / $denom)) + read req: AVG((TO_INT(TCC_READ[11]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[11]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[11]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[11]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[11]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[11]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[11] / TCC_EA_RDREQ[11]) if (TCC_EA_RDREQ[11] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[11] / TCC_EA_WRREQ[11]) if (TCC_EA_WRREQ[11] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[11] / TCC_EA_ATOMIC[11]) if + (TCC_EA_ATOMIC[11] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "12": + hit rate: + AVG((((100 * TCC_HIT[12]) / (TCC_HIT[12] + TCC_MISS[12])) if ((TCC_HIT[12] + + TCC_MISS[12]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[12]) / $denom)) + read req: AVG((TO_INT(TCC_READ[12]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[12]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[12]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[12]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[12]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[12]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[12] / TCC_EA_RDREQ[12]) if (TCC_EA_RDREQ[12] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[12] / TCC_EA_WRREQ[12]) if (TCC_EA_WRREQ[12] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[12] / TCC_EA_ATOMIC[12]) if + (TCC_EA_ATOMIC[12] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "13": + hit rate: + AVG((((100 * TCC_HIT[13]) / (TCC_HIT[13] + TCC_MISS[13])) if ((TCC_HIT[13] + + TCC_MISS[13]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[13]) / $denom)) + read req: AVG((TO_INT(TCC_READ[13]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[13]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[13]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[13]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[13]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[13]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[13] / TCC_EA_RDREQ[13]) if (TCC_EA_RDREQ[13] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[13] / TCC_EA_WRREQ[13]) if (TCC_EA_WRREQ[13] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[13] / TCC_EA_ATOMIC[13]) if + (TCC_EA_ATOMIC[13] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "14": + hit rate: + AVG((((100 * TCC_HIT[14]) / (TCC_HIT[14] + TCC_MISS[14])) if ((TCC_HIT[14] + + TCC_MISS[14]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[14]) / $denom)) + read req: AVG((TO_INT(TCC_READ[14]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[14]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[14]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[14]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[14]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[14]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[14] / TCC_EA_RDREQ[14]) if (TCC_EA_RDREQ[14] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[14] / TCC_EA_WRREQ[14]) if (TCC_EA_WRREQ[14] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[14] / TCC_EA_ATOMIC[14]) if + (TCC_EA_ATOMIC[14] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "15": + hit rate: + AVG((((100 * TCC_HIT[15]) / (TCC_HIT[15] + TCC_MISS[15])) if ((TCC_HIT[15] + + TCC_MISS[15]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[15]) / $denom)) + read req: AVG((TO_INT(TCC_READ[15]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[15]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[15]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[15]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[15]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[15]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[15] / TCC_EA_RDREQ[15]) if (TCC_EA_RDREQ[15] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[15] / TCC_EA_WRREQ[15]) if (TCC_EA_WRREQ[15] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[15] / TCC_EA_ATOMIC[15]) if + (TCC_EA_ATOMIC[15] != 0) else None)) + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + + - metric_table: + id: 1803 + title: Channel 16-31 + columnwise: True + header: + channel: Channel + hit rate: L2 Cache Hit Rate (%) + req: Requests (Requests) + read req: L1-L2 Read (Requests) + write req: L1-L2 Write (Requests) + atomic req: L1-L2 Atomic (Requests) + ea read req: L2-EA Read (Requests) + ea write req: L2-EA Write (Requests) + ea atomic req: L2-EA Atomic (Requests) + ea read lat - cycles: L2-EA Read Latency (Cycles) + ea write lat - cycles: L2-EA Write Latency (Cycles) + ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) + ea read stall - io: L2-EA Read Stall - IO (Cycles per) + ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) + ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) + ea write stall - io: L2-EA Write Stall - IO (Cycles per) + ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) + ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) + ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) + tips: Tips + metric: + "16": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "17": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "18": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "19": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "20": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "21": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "22": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "23": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "24": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "25": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "26": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "27": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "28": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "29": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "30": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: + "31": + hit rate: None # No perf counter + req: None # No perf counter + read req: None # No perf counter + write req: None # No perf counter + atomic req: None # No perf counter + ea read req: None # No perf counter + ea write req: None # No perf counter + ea atomic req: None # No perf counter + ea read lat - cycles: None # No perf counter + ea write lat - cycles: None # No perf counter + ea atomic lat - cycles: None # No perf counter + ea read stall - io: None # No perf counter + ea read stall - gmi: None # No perf counter + ea read stall - dram: None # No perf counter + ea write stall - io: None # No perf counter + ea write stall - gmi: None # No perf counter + ea write stall - dram: None # No perf counter + ea write stall - starve: None # No perf counter + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/1900_memory_chart.yaml b/src/omniperf_analyze-old/configs/gfx906/1900_memory_chart.yaml new file mode 100644 index 000000000..905204601 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/1900_memory_chart.yaml @@ -0,0 +1,259 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1900 + title: Memory Chart Analysis + data source: + - metric_table: + id: 1901 + title: # subtitle for this table(optional) + header: + metric: Metric + value: Value + alias: Alias + tips: Tips + metric: + Wave Life: + value: ROUND(AVG(((4 * (SQ_WAVE_CYCLES / SQ_WAVES)) if (SQ_WAVES != 0) else + None)), 0) + alias: wave_life_ + tips: + Active CUs: + value: CONCAT(CONCAT($numActiveCUs, "/"), $numCU) + alias: active_cu_ + tips: + SALU: + value: ROUND(AVG((SQ_INSTS_SALU / $denom)), 0) + alias: salu_ + tips: + SMEM: + value: ROUND(AVG((SQ_INSTS_SMEM / $denom)), 0) + alias: smem_ + tips: + VALU: + value: ROUND(AVG((SQ_INSTS_VALU / $denom)), 0) + alias: valu_ + tips: + MFMA: + value: None # No perf counter + alias: mfma_ + tips: + VMEM: + value: ROUND(AVG((SQ_INSTS_VMEM / $denom)), 0) + alias: vmem_ + tips: + LDS: + value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) + alias: lds_ + tips: + GWS: + value: ROUND(AVG((SQ_INSTS_GDS / $denom)), 0) + alias: gws_ + tips: + BR: + value: ROUND(AVG((SQ_INSTS_BRANCH / $denom)), 0) + alias: br_ + tips: + VGPR: + value: ROUND(AVG(vgpr), 0) + alias: vgpr_ + tips: + SGPR: + value: ROUND(AVG(sgpr), 0) + alias: sgpr_ + tips: + LDS Allocation: + value: ROUND(AVG(lds), 0) + alias: lds_alloc_ + tips: + Scratch Allocation: + value: ROUND(AVG(scr), 0) + alias: scratch_alloc_ + tips: + Wavefronts: + value: ROUND(AVG(SPI_CSN_WAVE), 0) + alias: wavefronts_ + tips: + Workgroups: + value: ROUND(AVG(SPI_CSN_NUM_THREADGROUPS), 0) + alias: workgroups_ + tips: + LDS Req: + value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) + alias: lds_req_ + tips: + IL1 Fetch: + value: ROUND(AVG((SQC_ICACHE_REQ / $denom)), 0) + alias: il1_fetch_ + tips: + IL1 Hit: + value: ROUND((AVG((SQC_ICACHE_HITS / SQC_ICACHE_REQ)) * 100), 0) + alias: il1_hit_ + tips: + IL1_L2 Rd: + value: ROUND(AVG((SQC_TC_INST_REQ / $denom)), 0) + alias: il1_l2_req_ + tips: + vL1D Rd: + value: ROUND(AVG((SQC_DCACHE_REQ / $denom)), 0) + alias: sl1_rd_ + tips: + vL1D Hit: + value: ROUND((AVG(((SQC_DCACHE_HITS / SQC_DCACHE_REQ) if (SQC_DCACHE_REQ != + 0) else None)) * 100), 0) + alias: sl1_hit_ + tips: + vL1D_L2 Rd: + value: ROUND(AVG((SQC_TC_DATA_READ_REQ / $denom)), 0) + alias: sl1_l2_rd_ + tips: + vL1D_L2 Wr: + value: ROUND(AVG((SQC_TC_DATA_WRITE_REQ / $denom)), 0) + alias: sl1_l2_wr_ + tips: + vL1D_L2 Atomic: + value: ROUND(AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)), 0) + alias: sl1_l2_atom_ + tips: + VL1 Rd: + value: ROUND(AVG((TCP_TOTAL_READ_sum / $denom)), 0) + alias: vl1_rd_ + tips: + VL1 Wr: + value: ROUND(AVG((TCP_TOTAL_WRITE_sum / $denom)), 0) + alias: vl1_wr_ + tips: + VL1 Atomic: + value: ROUND(AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)), 0) + alias: vl1_atom_ + tips: + VL1 Hit: + value: ROUND(AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)), 0) + alias: vl1_hit_ + tips: + VL1 Lat: + value: ROUND(AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)), 0) + alias: vl1_lat_ + tips: + VL1_L2 Rd: + value: ROUND(AVG((TCP_TCC_READ_REQ_sum / $denom)), 0) + alias: vl1_l2_rd_ + tips: + VL1_L2 Wr: + value: ROUND(AVG((TCP_TCC_WRITE_REQ_sum / $denom)), 0) + alias: vl1_l2_wr_ + tips: + vL1_L2 Atomic: + value: ROUND(AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)), 0) + alias: vl1_l2_atom_ + tips: + L2 Rd: + value: ROUND(AVG((TCC_READ_sum / $denom)), 0) + alias: l2_rd_ + tips: + L2 Wr: + value: ROUND(AVG((TCC_WRITE_sum / $denom)), 0) + alias: l2_wr_ + tips: + L2 Atomic: + value: ROUND(AVG((TCC_ATOMIC_sum / $denom)), 0) + alias: l2_atom_ + tips: + L2 Hit: + value: ROUND(AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)), 0) + alias: l2_hit_ + tips: + L2 Rd Lat: + value: ROUND(AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)), + 0) + alias: l2_rd_lat_ + tips: + L2 Wr Lat: + value: ROUND(AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + != 0) else None)), 0) + alias: l2_wr_lat_ + tips: + Fabric Rd Lat: + value: ROUND(AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum + != 0) else None)), 0) + alias: fabric_rd_lat_ + tips: + Fabric Wr Lat: + value: ROUND(AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum + != 0) else None)), 0) + alias: fabric_wr_lat_ + tips: + Fabric Atomic Lat: + value: ROUND(AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)), 0) + alias: fabric_atom_lat_ + tips: + Fabric_L2 Rd: + value: ROUND(AVG((TCC_EA_RDREQ_sum / $denom)), 0) + alias: l2_fabric_rd_ + tips: + Fabric_L2 Wr: + value: ROUND(AVG((TCC_EA_WRREQ_sum / $denom)), 0) + alias: l2_fabric_wr_ + tips: + Fabric_l2 Atomic: + value: ROUND(AVG((TCC_EA_ATOMIC_sum / $denom)), 0) + alias: l2_fabric_atom_ + tips: + HBM Rd: + value: ROUND(AVG((TCC_EA_RDREQ_DRAM_sum / $denom)), 0) + alias: hbm_rd_ + tips: + HBM Wr: + value: ROUND(AVG((TCC_EA_WRREQ_DRAM_sum / $denom)), 0) + alias: hbm_wr_ + tips: + LDS Util: + value: ROUND(AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))), + 0) + alias: lds_util_ + tips: + VL1 Coalesce: + value: ROUND(AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum + * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else 0)), 0) + alias: vl1_coales_ + tips: + VL1 Stall: + value: ROUND(AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)), 0) + alias: vl1_stall_ + tips: + LDS Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) + if (SQ_INSTS_LDS != 0) else None)), 0) + alias: lds_lat_ + coll_level: SQ_INST_LEVEL_LDS + tips: + vL1D Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_DCACHE_REQ) + if (SQC_DCACHE_REQ != 0) else None)), 0) + alias: sl1_lat_ + tips: + IL1 Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_ICACHE_REQ) + if (SQC_ICACHE_REQ != 0) else None)), 0) + alias: il1_lat_ + tips: + Wave Occupancy: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / $numActiveCUs)), 0) + alias: wave_occ_ + coll_level: SQ_LEVEL_WAVES + tips: diff --git a/src/omniperf_analyze-old/configs/gfx906/2000_kernels.yaml b/src/omniperf_analyze-old/configs/gfx906/2000_kernels.yaml new file mode 100644 index 000000000..ed566f75a --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx906/2000_kernels.yaml @@ -0,0 +1,8 @@ +--- +Panel Config: + id: 2000 + title: Kernels + data source: + - raw_csv_table: + id: 2001 + source: pmc_dispatch_info.csv diff --git a/src/omniperf_analyze-old/configs/gfx908/0000_top_stat.yaml b/src/omniperf_analyze-old/configs/gfx908/0000_top_stat.yaml new file mode 100644 index 000000000..077004080 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/0000_top_stat.yaml @@ -0,0 +1,8 @@ +--- +Panel Config: + id: 000 + title: Top Stat + data source: + - raw_csv_table: + id: 001 + source: pmc_kernel_top.csv diff --git a/src/omniperf_analyze-old/configs/gfx908/0100_system_info.yaml b/src/omniperf_analyze-old/configs/gfx908/0100_system_info.yaml new file mode 100644 index 000000000..b7ec29eaf --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/0100_system_info.yaml @@ -0,0 +1,9 @@ +--- +Panel Config: + id: 100 + title: System Info + data source: + - raw_csv_table: + id: 101 + source: sysinfo.csv + columnwise: True diff --git a/src/omniperf_analyze-old/configs/gfx908/0200_system-speed-of-light.yaml b/src/omniperf_analyze-old/configs/gfx908/0200_system-speed-of-light.yaml new file mode 100644 index 000000000..986b2f0ae --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/0200_system-speed-of-light.yaml @@ -0,0 +1,230 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + SALU: &SALU_anchor Scalar Arithmetic Logic Unit + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 200 + title: System Speed-of-Light + data source: + - metric_table: + id: 201 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + peak: Peak + pop: PoP + tips: Tips + metric: + VALU FLOPs: + value: None # No perf counter + unit: GFLOPs + peak: (((($sclk * $numCU) * 64) * 2) / 1000) + pop: None # No perf counter + tips: + VALU IOPs: + value: None # No perf counter + unit: GOPs + peak: (((($sclk * $numCU) * 64) * 2) / 1000) + pop: None # No perf counter + tips: + MFMA FLOPs (BF16): + value: None # No perf counter + unit: GFLOPs + peak: ((($sclk * $numCU) * 512) / 1000) + pop: None # No perf counter + tips: + MFMA FLOPs (F16): + value: None # No perf counter + unit: GFLOPs + peak: ((($sclk * $numCU) * 1024) / 1000) + pop: None # No perf counter + tips: + MFMA FLOPs (F32): + value: None # No perf counter + unit: GFLOPs + peak: ((($sclk * $numCU) * 256) / 1000) + pop: None # No perf counter + tips: + MFMA FLOPs (F64): + value: None # No perf counter + unit: GFLOPs + peak: ((($sclk * $numCU) * 256) / 1000) + pop: None # No perf counter + tips: + MFMA IOPs (Int8): + value: None # No perf counter + unit: GOPs + peak: ((($sclk * $numCU) * 1024) / 1000) + pop: None # No perf counter + tips: + Active CUs: + value: $numActiveCUs + unit: CUs + peak: $numCU + pop: ((100 * $numActiveCUs) / $numCU) + tips: + SALU Util: + value: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + peak: 100 + pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) + tips: + VALU Util: + value: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + peak: 100 + pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) + tips: + MFMA Util: + value: None # No HW module + unit: pct + peak: 100 + pop: None # No HW module + tips: + VALU Active Threads/Wave: + value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + unit: Threads + peak: 64 + pop: (AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) * 1.5625) + tips: + IPC - Issue: + value: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + unit: Instr/cycle + peak: 5 + pop: ((100 * AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY))) / 5) + tips: + LDS BW: + value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs))) + unit: GB/sec + peak: (($sclk * $numCU) * 0.128) + pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) + tips: + LDS Bank Conflict: + value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Conflicts/access + peak: 32 + pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32) + tips: + Instr Cache Hit Rate: + value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) + unit: pct + peak: 100 + pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) + tips: + Instr Cache BW: + value: AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64)) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numSQC) + pop: ((100 * AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk + / 1000) * 64) * $numSQC)) + tips: + Scalar L1D Cache Hit Rate: + value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) + unit: pct + peak: 100 + pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) + tips: + Scalar L1D Cache BW: + value: AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64)) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numSQC) + pop: ((100 * AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk + / 1000) * 64) * $numSQC)) + tips: + Vector L1D Cache Hit Rate: + value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: pct + peak: 100 + pop: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + tips: + Vector L1D Cache BW: + value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numCU) + pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) + / ((($sclk / 1000) * 64) * $numCU)) + tips: + L2 Cache Hit Rate: + value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + unit: pct + peak: 100 + pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + tips: + L2-Fabric Read BW: + value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs))) + unit: GB/s + peak: $hbmBW + pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs)))) / $hbmBW) + tips: + L2-Fabric Write BW: + value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs))) + unit: GB/s + peak: $hbmBW + pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs)))) / $hbmBW) + tips: + L2-Fabric Read Latency: + value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum + != 0) else None)) + unit: Cycles + peak: '' + pop: '' + tips: + L2-Fabric Write Latency: + value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum + != 0) else None)) + unit: Cycles + peak: '' + pop: '' + tips: + Wave Occupancy: + value: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + unit: Wavefronts + peak: ($maxWavesPerCU * $numCU) + pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / ($maxWavesPerCU + * $numCU)))) + coll_level: SQ_LEVEL_WAVES + tips: + Instr Fetch BW: + value: AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32)) + unit: GB/s + peak: ((($sclk / 1000) * 32) * $numSQC) + pop: ((100 * AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32))) / ($numSQC + * (($sclk / 1000) * 32))) + coll_level: SQ_IFETCH_LEVEL + tips: + Instr Fetch Latency: + value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH)) + unit: Cycles + peak: '' + pop: '' + coll_level: SQ_IFETCH_LEVEL + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/0500_command-processor.yaml b/src/omniperf_analyze-old/configs/gfx908/0500_command-processor.yaml new file mode 100644 index 000000000..525091879 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/0500_command-processor.yaml @@ -0,0 +1,180 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 500 + title: Command Processor (CPC/CPF) + data source: + - metric_table: + id: 501 + title: Command Processor Fetcher + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy Cycles: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles/Kernel + tips: + CPF Busy: + avg: AVG(CPF_CPF_STAT_BUSY) + min: MIN(CPF_CPF_STAT_BUSY) + max: MAX(CPF_CPF_STAT_BUSY) + unit: Cycles/Kernel + tips: + CPF Util: + avg: AVG((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + min: MIN((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + unit: pct + tips: + CPF Stall: + avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + unit: Cycles/Kernel + tips: + L2Cache Intf Busy: + avg: AVG(CPF_CPF_TCIU_BUSY) + min: MIN(CPF_CPF_TCIU_BUSY) + max: MAX(CPF_CPF_TCIU_BUSY) + unit: Cycles/Kernel + tips: + L2Cache Intf Util: + avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + min: MIN((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + unit: pct + tips: + L2Cache Intf Stall: + avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + min: MIN((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + unit: pct + tips: + UTCL1 Stall: + avg: AVG(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + min: MIN(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + max: MAX(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + unit: Cycles/Kernel + tips: + + - metric_table: + id: 502 + title: Command Processor Compute + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy Cycles: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles + tips: + CPC Busy Cycles: + avg: AVG(CPC_CPC_STAT_BUSY) + min: MIN(CPC_CPC_STAT_BUSY) + max: MAX(CPC_CPC_STAT_BUSY) + unit: Cycles + tips: + CPC Util: + avg: AVG((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + unit: pct + tips: + CPC Stall Cycles: + avg: AVG(CPC_CPC_STAT_STALL) + min: MIN(CPC_CPC_STAT_STALL) + max: MAX(CPC_CPC_STAT_STALL) + unit: Cycles + tips: + CPC Stall Rate: + avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + unit: pct + tips: + CPC Packet Decoding: + avg: AVG(CPC_ME1_BUSY_FOR_PACKET_DECODE) + min: MIN(CPC_ME1_BUSY_FOR_PACKET_DECODE) + max: MAX(CPC_ME1_BUSY_FOR_PACKET_DECODE) + unit: Cycles + tips: + SPI Intf Busy Cycles: + avg: AVG(CPC_ME1_DC0_SPI_BUSY) + min: MIN(CPC_ME1_DC0_SPI_BUSY) + max: MAX(CPC_ME1_DC0_SPI_BUSY) + unit: Cycles + tips: + SPI Intf Util: + avg: AVG((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + unit: pct + tips: + L2Cache Intf Util: + avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + unit: pct + tips: + UTCL1 Stall Cycles: + avg: AVG(CPC_UTCL1_STALL_ON_TRANSLATION) + min: MIN(CPC_UTCL1_STALL_ON_TRANSLATION) + max: MAX(CPC_UTCL1_STALL_ON_TRANSLATION) + unit: Cycles + tips: + UTCL2 Intf Busy Cycles: + avg: AVG(CPC_CPC_UTCL2IU_BUSY) + min: MIN(CPC_CPC_UTCL2IU_BUSY) + max: MAX(CPC_CPC_UTCL2IU_BUSY) + unit: Cycles + tips: + UTCL2 Intf Util: + avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + unit: pct + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/0600_shader-processor-input.yaml b/src/omniperf_analyze-old/configs/gfx908/0600_shader-processor-input.yaml new file mode 100644 index 000000000..38b81ed4f --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/0600_shader-processor-input.yaml @@ -0,0 +1,174 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 600 + title: Shader Processor Input (SPI) + data source: + - metric_table: + id: 601 + title: SPI Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles + tips: + CS Busy: + avg: AVG(SPI_CSN_BUSY) + min: MIN(SPI_CSN_BUSY) + max: MAX(SPI_CSN_BUSY) + unit: Cycles + tips: + SPI Busy: + avg: AVG(GRBM_SPI_BUSY) + min: MIN(GRBM_SPI_BUSY) + max: MAX(GRBM_SPI_BUSY) + unit: Cycles + tips: + SQ Busy: + avg: AVG(SQ_BUSY_CYCLES) + min: MIN(SQ_BUSY_CYCLES) + max: MAX(SQ_BUSY_CYCLES) + unit: Cycles + tips: + Dispatched Workgroups: + avg: AVG(SPI_CSN_NUM_THREADGROUPS) + min: MIN(SPI_CSN_NUM_THREADGROUPS) + max: MAX(SPI_CSN_NUM_THREADGROUPS) + unit: Workgroups + tips: + Dispatched Wavefronts: + avg: AVG(SPI_CSN_WAVE) + min: MIN(SPI_CSN_WAVE) + max: MAX(SPI_CSN_WAVE) + unit: Wavefronts + tips: + Wave Alloc Failed: + avg: AVG(SPI_RA_REQ_NO_ALLOC) + min: MIN(SPI_RA_REQ_NO_ALLOC) + max: MAX(SPI_RA_REQ_NO_ALLOC) + unit: Cycles + tips: + Wave Alloc Failed - CS: + avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) + min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) + max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) + unit: Cycles + tips: + + - metric_table: + id: 602 + title: SPI Resource Allocation + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Wave request Failed (CS): + avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) + min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) + max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) + unit: Cycles + tips: + CS Stall: + avg: AVG(SPI_RA_RES_STALL_CSN) + min: MIN(SPI_RA_RES_STALL_CSN) + max: MAX(SPI_RA_RES_STALL_CSN) + unit: Cycles + tips: + CS Stall Rate: + avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + min: MIN((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + max: MAX((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + unit: pct + tips: + Scratch Stall: + avg: AVG(SPI_RA_TMP_STALL_CSN) + min: MIN(SPI_RA_TMP_STALL_CSN) + max: MAX(SPI_RA_TMP_STALL_CSN) + unit: Cycles + tips: + Insufficient SIMD Waveslots: + avg: AVG(SPI_RA_WAVE_SIMD_FULL_CSN) + min: MIN(SPI_RA_WAVE_SIMD_FULL_CSN) + max: MAX(SPI_RA_WAVE_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient SIMD VGPRs: + avg: AVG(SPI_RA_VGPR_SIMD_FULL_CSN) + min: MIN(SPI_RA_VGPR_SIMD_FULL_CSN) + max: MAX(SPI_RA_VGPR_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient SIMD SGPRs: + avg: AVG(SPI_RA_SGPR_SIMD_FULL_CSN) + min: MIN(SPI_RA_SGPR_SIMD_FULL_CSN) + max: MAX(SPI_RA_SGPR_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient CU LDS: + avg: AVG(SPI_RA_LDS_CU_FULL_CSN) + min: MIN(SPI_RA_LDS_CU_FULL_CSN) + max: MAX(SPI_RA_LDS_CU_FULL_CSN) + unit: CU + tips: + Insufficient CU Barries: + avg: AVG(SPI_RA_BAR_CU_FULL_CSN) + min: MIN(SPI_RA_BAR_CU_FULL_CSN) + max: MAX(SPI_RA_BAR_CU_FULL_CSN) + unit: CU + tips: + Insufficient Bulky Resource: + avg: AVG(SPI_RA_BULKY_CU_FULL_CSN) + min: MIN(SPI_RA_BULKY_CU_FULL_CSN) + max: MAX(SPI_RA_BULKY_CU_FULL_CSN) + unit: CU + tips: + Reach CU Threadgroups Limit: + avg: AVG(SPI_RA_TGLIM_CU_FULL_CSN) + min: MIN(SPI_RA_TGLIM_CU_FULL_CSN) + max: MAX(SPI_RA_TGLIM_CU_FULL_CSN) + unit: Cycles + tips: + Reach CU Wave Limit: + avg: AVG(SPI_RA_WVLIM_STALL_CSN) + min: MIN(SPI_RA_WVLIM_STALL_CSN) + max: MAX(SPI_RA_WVLIM_STALL_CSN) + unit: Cycles + tips: + VGPR Writes: + avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + min: MIN((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + unit: Cycles/wave + tips: + SGPR Writes: + avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + min: MIN((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + max: MAX((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + unit: Cycles/wave + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/0700_wavefront-launch.yaml b/src/omniperf_analyze-old/configs/gfx908/0700_wavefront-launch.yaml new file mode 100644 index 000000000..70141193e --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/0700_wavefront-launch.yaml @@ -0,0 +1,142 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 700 + title: Wavefront + data source: + - metric_table: + id: 701 + title: Wavefront Launch Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Grid Size: + avg: AVG(grd) + min: MIN(grd) + max: MAX(grd) + unit: Work Items + tips: + Workgroup Size: + avg: AVG(wgr) + min: MIN(wgr) + max: MAX(wgr) + unit: Work Items + tips: + Total Wavefronts: + avg: AVG(SPI_CSN_WAVE) + min: MIN(SPI_CSN_WAVE) + max: MAX(SPI_CSN_WAVE) + unit: Wavefronts + tips: + Saved Wavefronts: + avg: AVG(SQ_WAVES_SAVED) + min: MIN(SQ_WAVES_SAVED) + max: MAX(SQ_WAVES_SAVED) + unit: Wavefronts + tips: + Restored Wavefronts: + avg: AVG(SQ_WAVES_RESTORED) + min: MIN(SQ_WAVES_RESTORED) + max: MAX(SQ_WAVES_RESTORED) + unit: Wavefronts + tips: + VGPRs: + avg: AVG(arch_vgpr) + min: MIN(arch_vgpr) + max: MAX(arch_vgpr) + unit: Registers + tips: + AGPRs: + avg: AVG(accum_vgpr) + min: MIN(accum_vgpr) + max: MAX(accum_vgpr) + unit: Registers + tips: + SGPRs: + avg: AVG(sgpr) + min: MIN(sgpr) + max: MAX(sgpr) + unit: Registers + tips: + LDS Allocation: + avg: AVG(lds) + min: MIN(lds) + max: MAX(lds) + unit: Bytes + tips: + Scratch Allocation: + avg: AVG(scr) + min: MIN(scr) + max: MAX(scr) + unit: Bytes + tips: + + - metric_table: + id: 702 + title: Wavefront Runtime Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Kernel Time (Nanosec): + avg: AVG((EndNs - BeginNs)) + min: MIN((EndNs - BeginNs)) + max: MAX((EndNs - BeginNs)) + unit: ns + tips: + Kernel Time (Cycles): + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycle + tips: + Instr/wavefront: + avg: AVG((SQ_INSTS / SQ_WAVES)) + min: MIN((SQ_INSTS / SQ_WAVES)) + max: MAX((SQ_INSTS / SQ_WAVES)) + unit: Instr/wavefront + tips: + Wave Cycles: + avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom)) + min: MIN(((4 * SQ_WAVE_CYCLES) / $denom)) + max: MAX(((4 * SQ_WAVE_CYCLES) / $denom)) + unit: (Cycles + $normUnit) + tips: + Dependency Wait Cycles: + avg: AVG(((4 * SQ_WAIT_ANY) / $denom)) + min: MIN(((4 * SQ_WAIT_ANY) / $denom)) + max: MAX(((4 * SQ_WAIT_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Issue Wait Cycles: + avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom)) + min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom)) + max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Active Cycles: + avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Wavefront Occupancy: + avg: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + min: MIN((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + max: MAX((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + unit: Wavefronts + coll_level: SQ_LEVEL_WAVES + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1000_compute-unit-instruction-mix.yaml b/src/omniperf_analyze-old/configs/gfx908/1000_compute-unit-instruction-mix.yaml new file mode 100644 index 000000000..13c27dd20 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1000_compute-unit-instruction-mix.yaml @@ -0,0 +1,234 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1000 + title: Compute Units - Instruction Mix + data source: + - metric_table: + id: 1001 + title: Instruction Mix + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_bar + label_txt: (# of instr + $normUnit) + metric: + VALU - Vector: + avg: AVG(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) + min: MIN(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) + max: MAX(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) + unit: (instr + $normUnit) + tips: + VMEM: + avg: AVG(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) + min: MIN(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) + max: MAX(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) + unit: (instr + $normUnit) + tips: + LDS: + avg: AVG((SQ_INSTS_LDS / $denom)) + min: MIN((SQ_INSTS_LDS / $denom)) + max: MAX((SQ_INSTS_LDS / $denom)) + unit: (instr + $normUnit) + tips: + VALU - MFMA: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: (instr + $normUnit) + tips: + SALU: + avg: AVG((SQ_INSTS_SALU / $denom)) + min: MIN((SQ_INSTS_SALU / $denom)) + max: MAX((SQ_INSTS_SALU / $denom)) + unit: (instr + $normUnit) + tips: + SMEM: + avg: AVG((SQ_INSTS_SMEM / $denom)) + min: MIN((SQ_INSTS_SMEM / $denom)) + max: MAX((SQ_INSTS_SMEM / $denom)) + unit: (instr + $normUnit) + tips: + Branch: + avg: AVG((SQ_INSTS_BRANCH / $denom)) + min: MIN((SQ_INSTS_BRANCH / $denom)) + max: MAX((SQ_INSTS_BRANCH / $denom)) + unit: (instr + $normUnit) + tips: + GDS: + avg: AVG((SQ_INSTS_GDS / $denom)) + min: MIN((SQ_INSTS_GDS / $denom)) + max: MAX((SQ_INSTS_GDS / $denom)) + unit: (instr + $normUnit) + tips: + + - metric_table: + id: 1002 + title: VALU Arithmetic Instr Mix + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_bar + label_txt: (# of instr + $normUnit) + metric: + INT-32: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + INT-64: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F16-ADD: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F16-Mult: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F16-FMA: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F16-Trans: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F32-ADD: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F32-Mult: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F32-FMA: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F32-Trans: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F64-ADD: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F64-Mult: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F64-FMA: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + F64-Trans: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + Conversion: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (instr + $normUnit) + tips: + + - metric_table: + id: 1003 + title: VMEM Instr Mix + header: + type: Type + count: Count + tips: Tips + metric: + Buffer Instr: + count: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) + tips: + Buffer Read: + count: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + tips: + Buffer Write: + count: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + tips: + Buffer Atomic: + count: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + tips: + Flat Instr: + count: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) + tips: + Flat Read: + count: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + tips: + Flat Write: + count: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + tips: + Flat Atomic: + count: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + tips: + + - metric_table: + id: 1004 + title: MFMA Arithmetic Instr Mix + header: + type: Type + count: Count + tips: Tips + metric: + MFMA-I8: + count: None # No HW module + tips: + MFMA-F16: + count: None # No HW module + tips: + MFMA-BF16: + count: None # No HW module + tips: + MFMA-F32: + count: None # No HW module + tips: + MFMA-F64: + count: None # No HW module + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1100_compute-unit-compute-pipeline.yaml b/src/omniperf_analyze-old/configs/gfx908/1100_compute-unit-compute-pipeline.yaml new file mode 100644 index 000000000..061311d62 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1100_compute-unit-compute-pipeline.yaml @@ -0,0 +1,155 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1100 + title: Compute Units - Compute Pipeline + data source: + - metric_table: + id: 1101 + title: Speed-of-Light + header: + metric: Metric + value: Value + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + valu_flops_pop: + value: None # No perf counter + tips: + mfma_flops_bf16_pop: + value: None # No perf counter + tips: + mfma_flops_f16_pop: + value: None # No perf counter + tips: + mfma_flops_f32_pop: + value: None # No perf counter + tips: + mfma_flops_f64_pop: + value: None # No perf counter + tips: + mfma_flops_i8_pop: + value: None # No perf counter + tips: + + - metric_table: + id: 1102 + title: Pipeline Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + IPC (Avg): + avg: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + unit: Instr/cycle + tips: + IPC (Issue): + avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + unit: Instr/cycle + tips: + SALU Util: + avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + min: MIN((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + max: MAX((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + unit: pct + tips: + VALU Util: + avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + min: MIN((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + max: MAX((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + unit: pct + tips: + VALU Active Threads: + avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + min: MIN(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + unit: Threads + tips: + MFMA Util: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: pct + tips: + MFMA Instr Cycles: + avg: None # No HW module + min: None # No HW module + max: None # No HW module + unit: cycles/instr + tips: + + - metric_table: + id: 1103 + title: Arithmetic Operations + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + FLOPs (Total): + #FIXME: double check what is available on MI100!!! + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + INT8 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + F16 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + BF16 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + F32 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + F64 OPs: + avg: None # No perf counter + min: None # No perf counter + max: None # No perf counter + unit: (OPs + $normUnit) + tips: + + diff --git a/src/omniperf_analyze-old/configs/gfx908/1200_lds.yaml b/src/omniperf_analyze-old/configs/gfx908/1200_lds.yaml new file mode 100644 index 000000000..3fd52c3b1 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1200_lds.yaml @@ -0,0 +1,121 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1200 + title: Local Data Share (LDS) + data source: + - metric_table: + id: 1201 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Utilization: + value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))) + unit: Pct of Peak + tips: + Access Rate: + value: AVG(((200 * SQ_ACTIVE_INST_LDS) / (GRBM_GUI_ACTIVE * $numCU))) + unit: Pct of Peak + tips: + Bandwidth (Pct-of-Peak): + value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) + unit: Pct of Peak + tips: + Bank Conflict Rate: + value: AVG((((SQ_LDS_BANK_CONFLICT * 3.125) / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1202 + title: LDS Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + LDS Instrs: + avg: AVG((SQ_INSTS_LDS / $denom)) + min: MIN((SQ_INSTS_LDS / $denom)) + max: MAX((SQ_INSTS_LDS / $denom)) + unit: (Instr + $normUnit) + tips: + Bandwidth: + avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + min: MIN(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + unit: (Bytes + $normUnit) + tips: + Bank Conficts/Access: + avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + min: MIN(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Conflicts/Access + tips: + Index Accesses: + avg: AVG((SQ_LDS_IDX_ACTIVE / $denom)) + min: MIN((SQ_LDS_IDX_ACTIVE / $denom)) + max: MAX((SQ_LDS_IDX_ACTIVE / $denom)) + unit: (Cycles + $normUnit) + tips: + Atomic Cycles: + avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom)) + min: MIN((SQ_LDS_ATOMIC_RETURN / $denom)) + max: MAX((SQ_LDS_ATOMIC_RETURN / $denom)) + unit: (Cycles + $normUnit) + tips: + Bank Conflict: + avg: AVG((SQ_LDS_BANK_CONFLICT / $denom)) + min: MIN((SQ_LDS_BANK_CONFLICT / $denom)) + max: MAX((SQ_LDS_BANK_CONFLICT / $denom)) + unit: (Cycles + $normUnit) + tips: + Addr Conflict: + avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom)) + min: MIN((SQ_LDS_ADDR_CONFLICT / $denom)) + max: MAX((SQ_LDS_ADDR_CONFLICT / $denom)) + unit: (Cycles + $normUnit) + tips: + Unaligned Stall: + avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom)) + min: MIN((SQ_LDS_UNALIGNED_STALL / $denom)) + max: MAX((SQ_LDS_UNALIGNED_STALL / $denom)) + unit: (Cycles + $normUnit) + tips: + Mem Violations: + avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom)) + min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom)) + max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom)) + unit: ( + $normUnit) + tips: + LDS Latency: + avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + unit: Cycles + coll_level: SQ_INST_LEVEL_LDS + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1300_instruction-cache.yaml b/src/omniperf_analyze-old/configs/gfx908/1300_instruction-cache.yaml new file mode 100644 index 000000000..05dc75980 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1300_instruction-cache.yaml @@ -0,0 +1,79 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1300 + title: Instruction Cache + data source: + - metric_table: + id: 1301 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Bandwidth: + value: AVG(((SQC_ICACHE_REQ * 100000) / (($sclk * $numSQC) + * (EndNs - BeginNs)))) + unit: Pct of Peak + tips: + Cache Hit: + value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + unit: Pct of Peak + tips: + + - metric_table: + id: 1302 + title: Instruction Cache Accesses + header: + metric: L1I Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((SQC_ICACHE_REQ / $denom)) + min: MIN((SQC_ICACHE_REQ / $denom)) + max: MAX((SQC_ICACHE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((SQC_ICACHE_HITS / $denom)) + min: MIN((SQC_ICACHE_HITS / $denom)) + max: MAX((SQC_ICACHE_HITS / $denom)) + unit: (Hits + $normUnit) + tips: + Misses - Non Duplicated: + avg: AVG((SQC_ICACHE_MISSES / $denom)) + min: MIN((SQC_ICACHE_MISSES / $denom)) + max: MAX((SQC_ICACHE_MISSES / $denom)) + unit: (Misses + $normUnit) + tips: + Misses - Duplicated: + avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + unit: (Misses + $normUnit) + tips: + Cache Hit: + avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + min: MIN(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + unit: pct + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1400_constant-cache.yaml b/src/omniperf_analyze-old/configs/gfx908/1400_constant-cache.yaml new file mode 100644 index 000000000..563caad13 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1400_constant-cache.yaml @@ -0,0 +1,164 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1400 + title: Scalar L1 Data Cache + data source: + - metric_table: + id: 1401 + title: Speed-of-Light + header: + mertic: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Bandwidth: + value: AVG(((SQC_DCACHE_REQ * 100000) / (($sclk * $numSQC) + * (EndNs - BeginNs)))) + unit: Pct of Peak + tips: + Cache Hit: + value: + AVG((((SQC_DCACHE_HITS * 100) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1402 + title: Scalar L1D Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((SQC_DCACHE_REQ / $denom)) + min: MIN((SQC_DCACHE_REQ / $denom)) + max: MAX((SQC_DCACHE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((SQC_DCACHE_HITS / $denom)) + min: MIN((SQC_DCACHE_HITS / $denom)) + max: MAX((SQC_DCACHE_HITS / $denom)) + unit: (Req + $normUnit) + tips: + Misses - Non Duplicated: + avg: AVG((SQC_DCACHE_MISSES / $denom)) + min: MIN((SQC_DCACHE_MISSES / $denom)) + max: MAX((SQC_DCACHE_MISSES / $denom)) + unit: (Req + $normUnit) + tips: + Misses- Duplicated: + avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hit: + avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + min: MIN((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + max: MAX((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + unit: pct + tips: + Read Req (Total): + avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + min: MIN((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((SQC_DCACHE_ATOMIC / $denom)) + min: MIN((SQC_DCACHE_ATOMIC / $denom)) + max: MAX((SQC_DCACHE_ATOMIC / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (1 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_1 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_1 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (2 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_2 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_2 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (4 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_4 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_4 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (8 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_8 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_8 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (16 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_16 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_16 / $denom)) + unit: (Req + $normUnit) + tips: + + - metric_table: + id: 1403 + title: Scalar L1D Cache - L2 Interface + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Read Req: + avg: AVG((SQC_TC_DATA_READ_REQ / $denom)) + min: MIN((SQC_TC_DATA_READ_REQ / $denom)) + max: MAX((SQC_TC_DATA_READ_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom)) + min: MIN((SQC_TC_DATA_WRITE_REQ / $denom)) + max: MAX((SQC_TC_DATA_WRITE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)) + min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom)) + max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Stall: + avg: AVG((SQC_TC_STALL / $denom)) + min: MIN((SQC_TC_STALL / $denom)) + max: MAX((SQC_TC_STALL / $denom)) + unit: (Cycles + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1500_TA_and_TD.yaml b/src/omniperf_analyze-old/configs/gfx908/1500_TA_and_TD.yaml new file mode 100644 index 000000000..8f71cedc9 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1500_TA_and_TD.yaml @@ -0,0 +1,174 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1500 + title: Texture Addresser and Texture Data (TA/TD) + data source: + - metric_table: + id: 1501 + title: TA + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + TA Busy: + avg: AVG(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TA Addr Stall: + avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TA Data Stall: + avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TD2TA Addr Stall: + avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + Total Instructions: + avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom)) + min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom)) + max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Instr: + avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Read Instr: + avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Write Instr: + avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Atomic Instr: + avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Instr: + avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Read Instr: + avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Write Instr: + avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Atomic Instr: + avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Total Cylces: + avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + Buffer Coalesced Read: + avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + Buffer Coalesced Write: + avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + + - metric_table: + id: 1502 + title: TD + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + TD Busy: + avg: AVG(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TD Stall: + avg: AVG(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + SPI2TD Stall: + avg: # No perf counter + min: # No perf counter + max: # No perf counter + unit: pct + tips: + Coalescable Instr: + avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Load Instr: + avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + min: MIN((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + unit: (Instr + $normUnit) + tips: + Store Instr: + avg: AVG((TD_STORE_WAVEFRONT_sum / $denom)) + min: MIN((TD_STORE_WAVEFRONT_sum / $denom)) + max: MAX((TD_STORE_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Atomic Instr: + avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom)) + min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom)) + max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1600_L1_cache.yaml b/src/omniperf_analyze-old/configs/gfx908/1600_L1_cache.yaml new file mode 100644 index 000000000..cac92b1f2 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1600_L1_cache.yaml @@ -0,0 +1,404 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1600 + title: Vector L1 Data Cache + data source: + - metric_table: + id: 1601 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Buffer Coalescing: + value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum + * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None)) + unit: Pct of Peak + tips: + Cache Util: + value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: Pct of Peak + tips: + Cache BW: + value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) + / ((($sclk / 1000) * 64) * $numCU)) + unit: Pct of Peak + tips: + Cache Hit: + value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1602 + title: L1D Cache Stalls + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Stalled on L2 Data: + avg: AVG((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + min: MIN((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + max: MAX((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: pct + tips: + Stalled on L2 Req: + avg: AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + min: MIN((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + max: MAX((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Read): + avg: AVG((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Write): + avg: AVG((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Atomic): + avg: AVG((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + + - metric_table: + id: 1603 + title: L1D Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Total Req: + avg: AVG((TCP_TOTAL_ACCESSES_sum / $denom)) + min: MIN((TCP_TOTAL_ACCESSES_sum / $denom)) + max: MAX((TCP_TOTAL_ACCESSES_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Req: + avg: AVG((TCP_TOTAL_READ_sum / $denom)) + min: MIN((TCP_TOTAL_READ_sum / $denom)) + max: MAX((TCP_TOTAL_READ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((TCP_TOTAL_WRITE_sum / $denom)) + min: MIN((TCP_TOTAL_WRITE_sum / $denom)) + max: MAX((TCP_TOTAL_WRITE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + min: MIN(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + max: MAX(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + unit: (Req + $normUnit) + tips: + Cache BW: + avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + unit: GB/s + tips: + Cache Accesses: + avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hits: + avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hit Rate: + avg: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + min: MIN(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + max: MAX(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: pct + tips: + Invalidate: + avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + unit: ( + $normUnit) + tips: + L1-L2 BW: + avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + unit: (Bytes + $normUnit) + tips: + L1-L2 Read: + avg: AVG((TCP_TCC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + L1-L2 Write: + avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + L1-L2 Atomic: + avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + min: MIN(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + unit: (Req + $normUnit) + tips: + L1 Access Latency: + avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + min: MIN(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + unit: Cycles + tips: + L1-L2 Read Latency: + avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + min: MIN(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + unit: Cycles + tips: + L1-L2 Write Latency: + avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + min: MIN(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + max: MAX(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + unit: Cycles + tips: + + - metric_table: + id: 1604 + title: L1D - L2 Transactions + header: + metric: Metric + xfer: Xfer + coherency: Coherency + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_multi_bar + metric: + NC - Read: + xfer: Read + coherency: NC + avg: AVG((TCP_TCC_NC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_NC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_NC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC - Read: + xfer: Read + coherency: UC + avg: AVG((TCP_TCC_UC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_UC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_UC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC - Read: + xfer: Read + coherency: CC + avg: AVG((TCP_TCC_CC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_CC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_CC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW - Read: + xfer: Read + coherency: RW + avg: AVG((TCP_TCC_RW_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_RW_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_RW_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW - Write: + xfer: Write + coherency: RW + avg: AVG((TCP_TCC_RW_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_RW_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_RW_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + NC - Write: + xfer: Write + coherency: NC + avg: AVG((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC - Write: + xfer: Write + coherency: UC + avg: AVG((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC - Write: + xfer: Write + coherency: CC + avg: AVG((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + NC - Atomic: + xfer: Atomic + coherency: NC + avg: AVG((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) + min: MIN((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) + max: MAX((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC - Atomic: + xfer: Atomic + coherency: UC + avg: AVG((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) + min: MIN((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) + max: MAX((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC - Atomic: + xfer: Atomic + coherency: CC + avg: AVG((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) + min: MIN((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) + max: MAX((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW - Atomic: + xfer: Atomic + coherency: RW + avg: AVG((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) + min: MIN((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) + max: MAX((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + + - metric_table: + id: 1605 + title: L1D Addr Translation + header: + metric: Metric + avg: Avg + min: Min + max: Max + units: Units + tips: Tips + metric: + Req: + avg: AVG((TCP_UTCL1_REQUEST_sum / $denom)) + min: MIN((TCP_UTCL1_REQUEST_sum / $denom)) + max: MAX((TCP_UTCL1_REQUEST_sum / $denom)) + units: (Req + $normUnit) + tips: + Hit Ratio: + avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + min: MIN((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + units: pct + tips: + Hits: + avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + units: (Hits + $normUnit) + tips: + Misses (Translation): + avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + units: (Misses + $normUnit) + tips: + Misses (Permission): + avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + units: (Misses + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1700_L2_cache.yaml b/src/omniperf_analyze-old/configs/gfx908/1700_L2_cache.yaml new file mode 100644 index 000000000..0c7b03811 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1700_L2_cache.yaml @@ -0,0 +1,364 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1700 + title: L2 Cache + data source: + - metric_table: + id: 1701 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + metric: + L2 Util: + value: AVG(((TCC_BUSY_sum * 100) / (TO_INT($L2Banks) * GRBM_GUI_ACTIVE))) + unit: pct + tips: + Cache Hit: + value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else 0)) + unit: pct + tips: + L2-EA Rd BW: + value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs))) + unit: GB/s + tips: + L2-EA Wr BW: + value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs))) + unit: GB/s + tips: + + - metric_table: + id: 1702 + title: L2 - Fabric Transactions + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Read BW: + avg: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + min: MIN((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + max: MAX((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + unit: (Bytes + $normUnit) + tips: + Write BW: + avg: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + min: MIN((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + max: MAX((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + unit: (Bytes + $normUnit) + tips: + Read (32B): + avg: AVG((TCC_EA_RDREQ_32B_sum / $denom)) + min: MIN((TCC_EA_RDREQ_32B_sum / $denom)) + max: MAX((TCC_EA_RDREQ_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read (Uncached 32B): + avg: AVG((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + min: MIN((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + max: MAX((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read (64B): + avg: AVG(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + min: MIN(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + max: MAX(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + unit: (Req + $normUnit) + tips: + HBM Read: + avg: AVG((TCC_EA_RDREQ_DRAM_sum / $denom)) + min: MIN((TCC_EA_RDREQ_DRAM_sum / $denom)) + max: MAX((TCC_EA_RDREQ_DRAM_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write (32B): + avg: AVG(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + min: MIN(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + max: MAX(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + unit: (Req + $normUnit) + tips: + Write (Uncached 32B): + avg: AVG((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + min: MIN((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + max: MAX((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write (64B): + avg: AVG((TCC_EA_WRREQ_64B_sum / $denom)) + min: MIN((TCC_EA_WRREQ_64B_sum / $denom)) + max: MAX((TCC_EA_WRREQ_64B_sum / $denom)) + unit: (Req + $normUnit) + tips: + HBM Write: + avg: AVG((TCC_EA_WRREQ_DRAM_sum / $denom)) + min: MIN((TCC_EA_WRREQ_DRAM_sum / $denom)) + max: MAX((TCC_EA_WRREQ_DRAM_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Latency: + avg: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + min: MIN(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + max: MAX(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + unit: Cycles + tips: + Write Latency: + avg: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + min: MIN(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + max: MAX(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + unit: Cycles + tips: + Atomic Latency: + avg: AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + min: MIN(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + max: MAX(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + unit: Cycles + tips: + Read Stall: + avg: AVG((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + min: MIN((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + max: MAX((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + unit: pct + tips: + Write Stall: + avg: AVG((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + min: MIN((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + max: MAX((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + unit: pct + tips: + + - metric_table: + id: 1703 + title: L2 Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((TCC_REQ_sum / $denom)) + min: MIN((TCC_REQ_sum / $denom)) + max: MAX((TCC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Streaming Req: + avg: AVG((TCC_STREAMING_REQ_sum / $denom)) + min: MIN((TCC_STREAMING_REQ_sum / $denom)) + max: MAX((TCC_STREAMING_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Req: + avg: AVG((TCC_READ_sum / $denom)) + min: MIN((TCC_READ_sum / $denom)) + max: MAX((TCC_READ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((TCC_WRITE_sum / $denom)) + min: MIN((TCC_WRITE_sum / $denom)) + max: MAX((TCC_WRITE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((TCC_ATOMIC_sum / $denom)) + min: MIN((TCC_ATOMIC_sum / $denom)) + max: MAX((TCC_ATOMIC_sum / $denom)) + unit: (Req + $normUnit) + tips: + Probe Req: + avg: AVG((TCC_PROBE_sum / $denom)) + min: MIN((TCC_PROBE_sum / $denom)) + max: MAX((TCC_PROBE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((TCC_HIT_sum / $denom)) + min: MIN((TCC_HIT_sum / $denom)) + max: MAX((TCC_HIT_sum / $denom)) + unit: (Hits + $normUnit) + tips: + Misses: + avg: AVG((TCC_MISS_sum / $denom)) + min: MIN((TCC_MISS_sum / $denom)) + max: MAX((TCC_MISS_sum / $denom)) + unit: (Misses + $normUnit) + tips: + Cache Hit: + avg: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + min: MIN((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + max: MAX((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + unit: pct + tips: + Writeback: + avg: AVG((TCC_WRITEBACK_sum / $denom)) + min: MIN((TCC_WRITEBACK_sum / $denom)) + max: MAX((TCC_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + NC Req: + avg: AVG((TCC_NC_REQ_sum / $denom)) + min: MIN((TCC_NC_REQ_sum / $denom)) + max: MAX((TCC_NC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC Req: + avg: AVG((TCC_UC_REQ_sum / $denom)) + min: MIN((TCC_UC_REQ_sum / $denom)) + max: MAX((TCC_UC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC Req: + avg: AVG((TCC_CC_REQ_sum / $denom)) + min: MIN((TCC_CC_REQ_sum / $denom)) + max: MAX((TCC_CC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW Req: + avg: AVG((TCC_RW_REQ_sum / $denom)) + min: MIN((TCC_RW_REQ_sum / $denom)) + max: MAX((TCC_RW_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Writeback (Normal): + avg: AVG((TCC_NORMAL_WRITEBACK_sum / $denom)) + min: MIN((TCC_NORMAL_WRITEBACK_sum / $denom)) + max: MAX((TCC_NORMAL_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + Writeback (TC Req): + avg: AVG((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + min: MIN((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + max: MAX((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + Evict (Normal): + avg: AVG((TCC_NORMAL_EVICT_sum / $denom)) + min: MIN((TCC_NORMAL_EVICT_sum / $denom)) + max: MAX((TCC_NORMAL_EVICT_sum / $denom)) + unit: ( + $normUnit) + tips: + Evict (TC Req): + avg: AVG((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + min: MIN((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + max: MAX((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + unit: ( + $normUnit) + tips: + + - metric_table: + id: 1704 + title: L2 - EA Interface Stalls + header: + metric: Metric + type: Type + transaction: Transaction + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_multi_bar + metric: + Read - Remote Socket Stall: + type: Remote Socket Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read - Peer GCD Stall: + type: Peer GCD Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read - HBM Stall: + type: HBM Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Remote Socket Stall: + type: Remote Socket Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Peer GCD Stall: + type: Peer GCD Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - HBM Stall: + type: HBM Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Credit Starvation: + type: Credit Starvation + transaction: Write + avg: AVG((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + min: MIN((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + max: MAX((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1800_L2_cache_per_channel.yaml b/src/omniperf_analyze-old/configs/gfx908/1800_L2_cache_per_channel.yaml new file mode 100644 index 000000000..45f8abb41 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1800_L2_cache_per_channel.yaml @@ -0,0 +1,2297 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1800 + title: L2 Cache (per Channel) + data source: + - metric_table: + id: 1801 + title: Aggregate Stats (All 32 channels) + header: + metric: Metric + avg: Avg + std dev: Std Dev + min: Min + max: Max + unit: Unit + tips: Tips + metric: + L2 Cache Hit Rate: + avg: AVG(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[29] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + std dev: STD(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + min: MIN(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + max: MAX(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + unit: pct + tips: + Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Read Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Write Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Atomic Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Read Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Write Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Atomic Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Read Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + unit: Cycles + tips: + L2 - EA Write Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + unit: Cycles + tips: + L2 - EA Atomic Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + unit: Cycles + tips: + L2 - EA Read Stall (IO): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Read Stall (GMI): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Read Stall (DRAM): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (IO): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (GMI): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (DRAM): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Starve: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + - metric_table: + id: 1802 + title: Channel 0-15 + columnwise: True + header: + channel: Channel + hit rate: L2 Cache Hit Rate (%) + req: Requests (Requests) + read req: L1-L2 Read (Requests) + write req: L1-L2 Write (Requests) + atomic req: L1-L2 Atomic (Requests) + ea read req: L2-EA Read (Requests) + ea write req: L2-EA Write (Requests) + ea atomic req: L2-EA Atomic (Requests) + ea read lat - cycles: L2-EA Read Latency (Cycles) + ea write lat - cycles: L2-EA Write Latency (Cycles) + ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) + ea read stall - io: L2-EA Read Stall - IO (Cycles per) + ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) + ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) + ea write stall - io: L2-EA Write Stall - IO (Cycles per) + ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) + ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) + ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) + tips: Tips + metric: + "0": + hit rate: + AVG((((100 * TCC_HIT[0]) / (TCC_HIT[0] + TCC_MISS[0])) if ((TCC_HIT[0] + + TCC_MISS[0]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[0]) / $denom)) + read req: AVG((TO_INT(TCC_READ[0]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[0]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[0]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[0]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[0]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[0]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[0] / TCC_EA_RDREQ[0]) if (TCC_EA_RDREQ[0] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[0] / TCC_EA_WRREQ[0]) if (TCC_EA_WRREQ[0] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[0] / TCC_EA_ATOMIC[0]) if + (TCC_EA_ATOMIC[0] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) / $denom)) + tips: + "1": + hit rate: + AVG((((100 * TCC_HIT[1]) / (TCC_HIT[1] + TCC_MISS[1])) if ((TCC_HIT[1] + + TCC_MISS[1]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[1]) / $denom)) + read req: AVG((TO_INT(TCC_READ[1]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[1]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[1]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[1]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[1]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[1]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[1] / TCC_EA_RDREQ[1]) if (TCC_EA_RDREQ[1] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[1] / TCC_EA_WRREQ[1]) if (TCC_EA_WRREQ[1] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[1] / TCC_EA_ATOMIC[1]) if + (TCC_EA_ATOMIC[1] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1]) / $denom)) + tips: + "2": + hit rate: + AVG((((100 * TCC_HIT[2]) / (TCC_HIT[2] + TCC_MISS[2])) if ((TCC_HIT[2] + + TCC_MISS[2]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[2]) / $denom)) + read req: AVG((TO_INT(TCC_READ[2]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[2]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[2]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[2]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[2]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[2]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[2] / TCC_EA_RDREQ[2]) if (TCC_EA_RDREQ[2] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[2] / TCC_EA_WRREQ[2]) if (TCC_EA_WRREQ[2] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[2] / TCC_EA_ATOMIC[2]) if + (TCC_EA_ATOMIC[2] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2]) / $denom)) + tips: + "3": + hit rate: + AVG((((100 * TCC_HIT[3]) / (TCC_HIT[3] + TCC_MISS[3])) if ((TCC_HIT[3] + + TCC_MISS[3]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[3]) / $denom)) + read req: AVG((TO_INT(TCC_READ[3]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[3]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[3]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[3]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[3]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[3]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[3] / TCC_EA_RDREQ[3]) if (TCC_EA_RDREQ[3] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[3] / TCC_EA_WRREQ[3]) if (TCC_EA_WRREQ[3] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[3] / TCC_EA_ATOMIC[3]) if + (TCC_EA_ATOMIC[3] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3]) / $denom)) + tips: + "4": + hit rate: + AVG((((100 * TCC_HIT[4]) / (TCC_HIT[4] + TCC_MISS[4])) if ((TCC_HIT[4] + + TCC_MISS[4]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[4]) / $denom)) + read req: AVG((TO_INT(TCC_READ[4]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[4]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[4]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[4]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[4]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[4]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[4] / TCC_EA_RDREQ[4]) if (TCC_EA_RDREQ[4] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[4] / TCC_EA_WRREQ[4]) if (TCC_EA_WRREQ[4] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[4] / TCC_EA_ATOMIC[4]) if + (TCC_EA_ATOMIC[4] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4]) / $denom)) + tips: + "5": + hit rate: + AVG((((100 * TCC_HIT[5]) / (TCC_HIT[5] + TCC_MISS[5])) if ((TCC_HIT[5] + + TCC_MISS[5]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[5]) / $denom)) + read req: AVG((TO_INT(TCC_READ[5]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[5]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[5]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[5]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[5]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[5]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[5] / TCC_EA_RDREQ[5]) if (TCC_EA_RDREQ[5] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[5] / TCC_EA_WRREQ[5]) if (TCC_EA_WRREQ[5] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[5] / TCC_EA_ATOMIC[5]) if + (TCC_EA_ATOMIC[5] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5]) / $denom)) + tips: + "6": + hit rate: + AVG((((100 * TCC_HIT[6]) / (TCC_HIT[6] + TCC_MISS[6])) if ((TCC_HIT[6] + + TCC_MISS[6]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[6]) / $denom)) + read req: AVG((TO_INT(TCC_READ[6]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[6]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[6]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[6]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[6]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[6]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[6] / TCC_EA_RDREQ[6]) if (TCC_EA_RDREQ[6] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[6] / TCC_EA_WRREQ[6]) if (TCC_EA_WRREQ[6] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[6] / TCC_EA_ATOMIC[6]) if + (TCC_EA_ATOMIC[6] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6]) / $denom)) + tips: + "7": + hit rate: + AVG((((100 * TCC_HIT[7]) / (TCC_HIT[7] + TCC_MISS[7])) if ((TCC_HIT[7] + + TCC_MISS[7]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[7]) / $denom)) + read req: AVG((TO_INT(TCC_READ[7]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[7]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[7]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[7]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[7]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[7]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[7] / TCC_EA_RDREQ[7]) if (TCC_EA_RDREQ[7] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[7] / TCC_EA_WRREQ[7]) if (TCC_EA_WRREQ[7] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[7] / TCC_EA_ATOMIC[7]) if + (TCC_EA_ATOMIC[7] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7]) / $denom)) + tips: + "8": + hit rate: + AVG((((100 * TCC_HIT[8]) / (TCC_HIT[8] + TCC_MISS[8])) if ((TCC_HIT[8] + + TCC_MISS[8]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[8]) / $denom)) + read req: AVG((TO_INT(TCC_READ[8]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[8]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[8]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[8]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[8]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[8]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[8] / TCC_EA_RDREQ[8]) if (TCC_EA_RDREQ[8] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[8] / TCC_EA_WRREQ[8]) if (TCC_EA_WRREQ[8] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[8] / TCC_EA_ATOMIC[8]) if + (TCC_EA_ATOMIC[8] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8]) / $denom)) + tips: + "9": + hit rate: + AVG((((100 * TCC_HIT[9]) / (TCC_HIT[9] + TCC_MISS[9])) if ((TCC_HIT[9] + + TCC_MISS[9]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[9]) / $denom)) + read req: AVG((TO_INT(TCC_READ[9]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[9]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[9]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[9]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[9]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[9]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[9] / TCC_EA_RDREQ[9]) if (TCC_EA_RDREQ[9] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[9] / TCC_EA_WRREQ[9]) if (TCC_EA_WRREQ[9] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[9] / TCC_EA_ATOMIC[9]) if + (TCC_EA_ATOMIC[9] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9]) / $denom)) + tips: + "10": + hit rate: + AVG((((100 * TCC_HIT[10]) / (TCC_HIT[10] + TCC_MISS[10])) if ((TCC_HIT[10] + + TCC_MISS[10]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[10]) / $denom)) + read req: AVG((TO_INT(TCC_READ[10]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[10]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[10]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[10]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[10]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[10]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[10] / TCC_EA_RDREQ[10]) if (TCC_EA_RDREQ[10] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[10] / TCC_EA_WRREQ[10]) if (TCC_EA_WRREQ[10] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[10] / TCC_EA_ATOMIC[10]) if + (TCC_EA_ATOMIC[10] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10]) / $denom)) + tips: + "11": + hit rate: + AVG((((100 * TCC_HIT[11]) / (TCC_HIT[11] + TCC_MISS[11])) if ((TCC_HIT[11] + + TCC_MISS[11]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[11]) / $denom)) + read req: AVG((TO_INT(TCC_READ[11]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[11]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[11]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[11]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[11]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[11]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[11] / TCC_EA_RDREQ[11]) if (TCC_EA_RDREQ[11] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[11] / TCC_EA_WRREQ[11]) if (TCC_EA_WRREQ[11] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[11] / TCC_EA_ATOMIC[11]) if + (TCC_EA_ATOMIC[11] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11]) / $denom)) + tips: + "12": + hit rate: + AVG((((100 * TCC_HIT[12]) / (TCC_HIT[12] + TCC_MISS[12])) if ((TCC_HIT[12] + + TCC_MISS[12]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[12]) / $denom)) + read req: AVG((TO_INT(TCC_READ[12]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[12]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[12]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[12]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[12]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[12]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[12] / TCC_EA_RDREQ[12]) if (TCC_EA_RDREQ[12] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[12] / TCC_EA_WRREQ[12]) if (TCC_EA_WRREQ[12] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[12] / TCC_EA_ATOMIC[12]) if + (TCC_EA_ATOMIC[12] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12]) / $denom)) + tips: + "13": + hit rate: + AVG((((100 * TCC_HIT[13]) / (TCC_HIT[13] + TCC_MISS[13])) if ((TCC_HIT[13] + + TCC_MISS[13]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[13]) / $denom)) + read req: AVG((TO_INT(TCC_READ[13]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[13]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[13]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[13]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[13]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[13]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[13] / TCC_EA_RDREQ[13]) if (TCC_EA_RDREQ[13] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[13] / TCC_EA_WRREQ[13]) if (TCC_EA_WRREQ[13] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[13] / TCC_EA_ATOMIC[13]) if + (TCC_EA_ATOMIC[13] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13]) / $denom)) + tips: + "14": + hit rate: + AVG((((100 * TCC_HIT[14]) / (TCC_HIT[14] + TCC_MISS[14])) if ((TCC_HIT[14] + + TCC_MISS[14]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[14]) / $denom)) + read req: AVG((TO_INT(TCC_READ[14]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[14]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[14]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[14]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[14]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[14]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[14] / TCC_EA_RDREQ[14]) if (TCC_EA_RDREQ[14] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[14] / TCC_EA_WRREQ[14]) if (TCC_EA_WRREQ[14] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[14] / TCC_EA_ATOMIC[14]) if + (TCC_EA_ATOMIC[14] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14]) / $denom)) + tips: + "15": + hit rate: + AVG((((100 * TCC_HIT[15]) / (TCC_HIT[15] + TCC_MISS[15])) if ((TCC_HIT[15] + + TCC_MISS[15]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[15]) / $denom)) + read req: AVG((TO_INT(TCC_READ[15]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[15]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[15]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[15]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[15]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[15]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[15] / TCC_EA_RDREQ[15]) if (TCC_EA_RDREQ[15] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[15] / TCC_EA_WRREQ[15]) if (TCC_EA_WRREQ[15] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[15] / TCC_EA_ATOMIC[15]) if + (TCC_EA_ATOMIC[15] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15]) / $denom)) + tips: + + - metric_table: + id: 1803 + title: Channel 16-31 + columnwise: True + header: + channel: Channel + hit rate: L2 Cache Hit Rate (%) + req: Requests (Requests) + read req: L1-L2 Read (Requests) + write req: L1-L2 Write (Requests) + atomic req: L1-L2 Atomic (Requests) + ea read req: L2-EA Read (Requests) + ea write req: L2-EA Write (Requests) + ea atomic req: L2-EA Atomic (Requests) + ea read lat - cycles: L2-EA Read Latency (Cycles) + ea write lat - cycles: L2-EA Write Latency (Cycles) + ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) + ea read stall - io: L2-EA Read Stall - IO (Cycles per) + ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) + ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) + ea write stall - io: L2-EA Write Stall - IO (Cycles per) + ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) + ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) + ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) + tips: Tips + metric: + "16": + hit rate: + AVG((((100 * TCC_HIT[16]) / (TCC_HIT[16] + TCC_MISS[16])) if ((TCC_HIT[16] + + TCC_MISS[16]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[16]) / $denom)) + read req: AVG((TO_INT(TCC_READ[16]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[16]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[16]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[16]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[16]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[16]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[16] / TCC_EA_RDREQ[16]) if (TCC_EA_RDREQ[16] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[16] / TCC_EA_WRREQ[16]) if (TCC_EA_WRREQ[16] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[16] / TCC_EA_ATOMIC[16]) if + (TCC_EA_ATOMIC[16] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16]) / $denom)) + tips: + "17": + hit rate: + AVG((((100 * TCC_HIT[17]) / (TCC_HIT[17] + TCC_MISS[17])) if ((TCC_HIT[17] + + TCC_MISS[17]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[17]) / $denom)) + read req: AVG((TO_INT(TCC_READ[17]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[17]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[17]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[17]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[17]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[17]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[17] / TCC_EA_RDREQ[17]) if (TCC_EA_RDREQ[17] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[17] / TCC_EA_WRREQ[17]) if (TCC_EA_WRREQ[17] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[17] / TCC_EA_ATOMIC[17]) if + (TCC_EA_ATOMIC[17] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17]) / $denom)) + tips: + "18": + hit rate: + AVG((((100 * TCC_HIT[18]) / (TCC_HIT[18] + TCC_MISS[18])) if ((TCC_HIT[18] + + TCC_MISS[18]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[18]) / $denom)) + read req: AVG((TO_INT(TCC_READ[18]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[18]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[18]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[18]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[18]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[18]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[18] / TCC_EA_RDREQ[18]) if (TCC_EA_RDREQ[18] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[18] / TCC_EA_WRREQ[18]) if (TCC_EA_WRREQ[18] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[18] / TCC_EA_ATOMIC[18]) if + (TCC_EA_ATOMIC[18] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18]) / $denom)) + tips: + "19": + hit rate: + AVG((((100 * TCC_HIT[19]) / (TCC_HIT[19] + TCC_MISS[19])) if ((TCC_HIT[19] + + TCC_MISS[19]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[19]) / $denom)) + read req: AVG((TO_INT(TCC_READ[19]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[19]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[19]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[19]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[19]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[19]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[19] / TCC_EA_RDREQ[19]) if (TCC_EA_RDREQ[19] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[19] / TCC_EA_WRREQ[19]) if (TCC_EA_WRREQ[19] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[19] / TCC_EA_ATOMIC[19]) if + (TCC_EA_ATOMIC[19] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19]) / $denom)) + tips: + "20": + hit rate: + AVG((((100 * TCC_HIT[20]) / (TCC_HIT[20] + TCC_MISS[20])) if ((TCC_HIT[20] + + TCC_MISS[20]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[20]) / $denom)) + read req: AVG((TO_INT(TCC_READ[20]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[20]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[20]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[20]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[20]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[20]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[20] / TCC_EA_RDREQ[20]) if (TCC_EA_RDREQ[20] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[20] / TCC_EA_WRREQ[20]) if (TCC_EA_WRREQ[20] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[20] / TCC_EA_ATOMIC[20]) if + (TCC_EA_ATOMIC[20] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20]) / $denom)) + tips: + "21": + hit rate: + AVG((((100 * TCC_HIT[21]) / (TCC_HIT[21] + TCC_MISS[21])) if ((TCC_HIT[21] + + TCC_MISS[21]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[21]) / $denom)) + read req: AVG((TO_INT(TCC_READ[21]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[21]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[21]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[21]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[21]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[21]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[21] / TCC_EA_RDREQ[21]) if (TCC_EA_RDREQ[21] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[21] / TCC_EA_WRREQ[21]) if (TCC_EA_WRREQ[21] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[21] / TCC_EA_ATOMIC[21]) if + (TCC_EA_ATOMIC[21] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21]) / $denom)) + tips: + "22": + hit rate: + AVG((((100 * TCC_HIT[22]) / (TCC_HIT[22] + TCC_MISS[22])) if ((TCC_HIT[22] + + TCC_MISS[22]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[22]) / $denom)) + read req: AVG((TO_INT(TCC_READ[22]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[22]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[22]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[22]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[22]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[22]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[22] / TCC_EA_RDREQ[22]) if (TCC_EA_RDREQ[22] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[22] / TCC_EA_WRREQ[22]) if (TCC_EA_WRREQ[22] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[22] / TCC_EA_ATOMIC[22]) if + (TCC_EA_ATOMIC[22] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22]) / $denom)) + tips: + "23": + hit rate: + AVG((((100 * TCC_HIT[23]) / (TCC_HIT[23] + TCC_MISS[23])) if ((TCC_HIT[23] + + TCC_MISS[23]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[23]) / $denom)) + read req: AVG((TO_INT(TCC_READ[23]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[23]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[23]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[23]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[23]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[23]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[23] / TCC_EA_RDREQ[23]) if (TCC_EA_RDREQ[23] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[23] / TCC_EA_WRREQ[23]) if (TCC_EA_WRREQ[23] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[23] / TCC_EA_ATOMIC[23]) if + (TCC_EA_ATOMIC[23] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23]) / $denom)) + tips: + "24": + hit rate: + AVG((((100 * TCC_HIT[24]) / (TCC_HIT[24] + TCC_MISS[24])) if ((TCC_HIT[24] + + TCC_MISS[24]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[24]) / $denom)) + read req: AVG((TO_INT(TCC_READ[24]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[24]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[24]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[24]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[24]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[24]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[24] / TCC_EA_RDREQ[24]) if (TCC_EA_RDREQ[24] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[24] / TCC_EA_WRREQ[24]) if (TCC_EA_WRREQ[24] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[24] / TCC_EA_ATOMIC[24]) if + (TCC_EA_ATOMIC[24] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24]) / $denom)) + tips: + "25": + hit rate: + AVG((((100 * TCC_HIT[25]) / (TCC_HIT[25] + TCC_MISS[25])) if ((TCC_HIT[25] + + TCC_MISS[25]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[25]) / $denom)) + read req: AVG((TO_INT(TCC_READ[25]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[25]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[25]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[25]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[25]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[25]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[25] / TCC_EA_RDREQ[25]) if (TCC_EA_RDREQ[25] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[25] / TCC_EA_WRREQ[25]) if (TCC_EA_WRREQ[25] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[25] / TCC_EA_ATOMIC[25]) if + (TCC_EA_ATOMIC[25] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25]) / $denom)) + tips: + "26": + hit rate: + AVG((((100 * TCC_HIT[26]) / (TCC_HIT[26] + TCC_MISS[26])) if ((TCC_HIT[26] + + TCC_MISS[26]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[26]) / $denom)) + read req: AVG((TO_INT(TCC_READ[26]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[26]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[26]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[26]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[26]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[26]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[26] / TCC_EA_RDREQ[26]) if (TCC_EA_RDREQ[26] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[26] / TCC_EA_WRREQ[26]) if (TCC_EA_WRREQ[26] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[26] / TCC_EA_ATOMIC[26]) if + (TCC_EA_ATOMIC[26] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26]) / $denom)) + tips: + "27": + hit rate: + AVG((((100 * TCC_HIT[27]) / (TCC_HIT[27] + TCC_MISS[27])) if ((TCC_HIT[27] + + TCC_MISS[27]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[27]) / $denom)) + read req: AVG((TO_INT(TCC_READ[27]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[27]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[27]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[27]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[27]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[27]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[27] / TCC_EA_RDREQ[27]) if (TCC_EA_RDREQ[27] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[27] / TCC_EA_WRREQ[27]) if (TCC_EA_WRREQ[27] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[27] / TCC_EA_ATOMIC[27]) if + (TCC_EA_ATOMIC[27] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27]) / $denom)) + tips: + "28": + hit rate: + AVG((((100 * TCC_HIT[28]) / (TCC_HIT[28] + TCC_MISS[28])) if ((TCC_HIT[28] + + TCC_MISS[28]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[28]) / $denom)) + read req: AVG((TO_INT(TCC_READ[28]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[28]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[28]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[28]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[28]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[28]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[28] / TCC_EA_RDREQ[28]) if (TCC_EA_RDREQ[28] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[28] / TCC_EA_WRREQ[28]) if (TCC_EA_WRREQ[28] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[28] / TCC_EA_ATOMIC[28]) if + (TCC_EA_ATOMIC[28] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28]) / $denom)) + tips: + "29": + hit rate: + AVG((((100 * TCC_HIT[29]) / (TCC_HIT[29] + TCC_MISS[29])) if ((TCC_HIT[29] + + TCC_MISS[29]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[29]) / $denom)) + read req: AVG((TO_INT(TCC_READ[29]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[29]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[29]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[29]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[29]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[29]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[29] / TCC_EA_RDREQ[29]) if (TCC_EA_RDREQ[29] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[29] / TCC_EA_WRREQ[29]) if (TCC_EA_WRREQ[29] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[29] / TCC_EA_ATOMIC[29]) if + (TCC_EA_ATOMIC[29] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29]) / $denom)) + tips: + "30": + hit rate: + AVG((((100 * TCC_HIT[30]) / (TCC_HIT[30] + TCC_MISS[30])) if ((TCC_HIT[30] + + TCC_MISS[30]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[30]) / $denom)) + read req: AVG((TO_INT(TCC_READ[30]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[30]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[30]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[30]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[30]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[30]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[30] / TCC_EA_RDREQ[30]) if (TCC_EA_RDREQ[30] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[30] / TCC_EA_WRREQ[30]) if (TCC_EA_WRREQ[30] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[30] / TCC_EA_ATOMIC[30]) if + (TCC_EA_ATOMIC[30] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30]) / $denom)) + tips: + "31": + hit rate: + AVG((((100 * TCC_HIT[31]) / (TCC_HIT[31] + TCC_MISS[31])) if ((TCC_HIT[31] + + TCC_MISS[31]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[31]) / $denom)) + read req: AVG((TO_INT(TCC_READ[31]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[31]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[31]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[31]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[31]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[31]) / $denom)) + ea read lat - cycles: + AVG(((TCC_EA_RDREQ_LEVEL[31] / TCC_EA_RDREQ[31]) if (TCC_EA_RDREQ[31] + != 0) else None)) + ea write lat - cycles: + AVG(((TCC_EA_WRREQ_LEVEL[31] / TCC_EA_WRREQ[31]) if (TCC_EA_WRREQ[31] + != 0) else None)) + ea atomic lat - cycles: + AVG(((TCC_EA_ATOMIC_LEVEL[31] / TCC_EA_ATOMIC[31]) if + (TCC_EA_ATOMIC[31] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31]) / $denom)) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/1900_memory_chart.yaml b/src/omniperf_analyze-old/configs/gfx908/1900_memory_chart.yaml new file mode 100644 index 000000000..3728934e2 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/1900_memory_chart.yaml @@ -0,0 +1,259 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1900 + title: Memory Chart Analysis + data source: + - metric_table: + id: 1901 + title: # subtitle for this table(optional) + header: + metric: Metric + value: Value + alias: Alias + tips: Tips + metric: + Wave Life: + value: ROUND(AVG(((4 * (SQ_WAVE_CYCLES / SQ_WAVES)) if (SQ_WAVES != 0) else + None)), 0) + alias: wave_life_ + tips: + Active CUs: + value: CONCAT(CONCAT($numActiveCUs, "/"), $numCU) + alias: active_cu_ + tips: + SALU: + value: ROUND(AVG((SQ_INSTS_SALU / $denom)), 0) + alias: salu_ + tips: + SMEM: + value: ROUND(AVG((SQ_INSTS_SMEM / $denom)), 0) + alias: smem_ + tips: + VALU: + value: ROUND(AVG((SQ_INSTS_VALU / $denom)), 0) + alias: valu_ + tips: + MFMA: + value: None # No perf counter + alias: mfma_ + tips: + VMEM: + value: ROUND(AVG((SQ_INSTS_VMEM / $denom)), 0) + alias: vmem_ + tips: + LDS: + value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) + alias: lds_ + tips: + GWS: + value: ROUND(AVG((SQ_INSTS_GDS / $denom)), 0) + alias: gws_ + tips: + BR: + value: ROUND(AVG((SQ_INSTS_BRANCH / $denom)), 0) + alias: br_ + tips: + VGPR: + value: ROUND(AVG(vgpr), 0) + alias: vgpr_ + tips: + SGPR: + value: ROUND(AVG(sgpr), 0) + alias: sgpr_ + tips: + LDS Allocation: + value: ROUND(AVG(lds), 0) + alias: lds_alloc_ + tips: + Scratch Allocation: + value: ROUND(AVG(scr), 0) + alias: scratch_alloc_ + tips: + Wavefronts: + value: ROUND(AVG(SPI_CSN_WAVE), 0) + alias: wavefronts_ + tips: + Workgroups: + value: ROUND(AVG(SPI_CSN_NUM_THREADGROUPS), 0) + alias: workgroups_ + tips: + LDS Req: + value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) + alias: lds_req_ + tips: + IL1 Fetch: + value: ROUND(AVG((SQC_ICACHE_REQ / $denom)), 0) + alias: il1_fetch_ + tips: + IL1 Hit: + value: ROUND((AVG((SQC_ICACHE_HITS / SQC_ICACHE_REQ)) * 100), 0) + alias: il1_hit_ + tips: + IL1_L2 Rd: + value: ROUND(AVG((SQC_TC_INST_REQ / $denom)), 0) + alias: il1_l2_req_ + tips: + vL1D Rd: + value: ROUND(AVG((SQC_DCACHE_REQ / $denom)), 0) + alias: sl1_rd_ + tips: + vL1D Hit: + value: ROUND((AVG(((SQC_DCACHE_HITS / SQC_DCACHE_REQ) if (SQC_DCACHE_REQ != + 0) else None)) * 100), 0) + alias: sl1_hit_ + tips: + vL1D_L2 Rd: + value: ROUND(AVG((SQC_TC_DATA_READ_REQ / $denom)), 0) + alias: sl1_l2_rd_ + tips: + vL1D_L2 Wr: + value: ROUND(AVG((SQC_TC_DATA_WRITE_REQ / $denom)), 0) + alias: sl1_l2_wr_ + tips: + vL1D_L2 Atomic: + value: ROUND(AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)), 0) + alias: sl1_l2_atom_ + tips: + VL1 Rd: + value: ROUND(AVG((TCP_TOTAL_READ_sum / $denom)), 0) + alias: vl1_rd_ + tips: + VL1 Wr: + value: ROUND(AVG((TCP_TOTAL_WRITE_sum / $denom)), 0) + alias: vl1_wr_ + tips: + VL1 Atomic: + value: ROUND(AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)), 0) + alias: vl1_atom_ + tips: + VL1 Hit: + value: ROUND(AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)), 0) + alias: vl1_hit_ + tips: + VL1 Lat: + value: ROUND(AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)), 0) + alias: vl1_lat_ + tips: + VL1_L2 Rd: + value: ROUND(AVG((TCP_TCC_READ_REQ_sum / $denom)), 0) + alias: vl1_l2_rd_ + tips: + VL1_L2 Wr: + value: ROUND(AVG((TCP_TCC_WRITE_REQ_sum / $denom)), 0) + alias: vl1_l2_wr_ + tips: + vL1_L2 Atomic: + value: ROUND(AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)), 0) + alias: vl1_l2_atom_ + tips: + L2 Rd: + value: ROUND(AVG((TCC_READ_sum / $denom)), 0) + alias: l2_rd_ + tips: + L2 Wr: + value: ROUND(AVG((TCC_WRITE_sum / $denom)), 0) + alias: l2_wr_ + tips: + L2 Atomic: + value: ROUND(AVG((TCC_ATOMIC_sum / $denom)), 0) + alias: l2_atom_ + tips: + L2 Hit: + value: ROUND(AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)), 0) + alias: l2_hit_ + tips: + L2 Rd Lat: + value: ROUND(AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)), + 0) + alias: l2_rd_lat_ + tips: + L2 Wr Lat: + value: ROUND(AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + != 0) else None)), 0) + alias: l2_wr_lat_ + tips: + Fabric Rd Lat: + value: ROUND(AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum + != 0) else None)), 0) + alias: fabric_rd_lat_ + tips: + Fabric Wr Lat: + value: ROUND(AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum + != 0) else None)), 0) + alias: fabric_wr_lat_ + tips: + Fabric Atomic Lat: + value: ROUND(AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)), 0) + alias: fabric_atom_lat_ + tips: + Fabric_L2 Rd: + value: ROUND(AVG((TCC_EA_RDREQ_sum / $denom)), 0) + alias: l2_fabric_rd_ + tips: + Fabric_L2 Wr: + value: ROUND(AVG((TCC_EA_WRREQ_sum / $denom)), 0) + alias: l2_fabric_wr_ + tips: + Fabric_l2 Atomic: + value: ROUND(AVG((TCC_EA_ATOMIC_sum / $denom)), 0) + alias: l2_fabric_atom_ + tips: + HBM Rd: + value: ROUND(AVG((TCC_EA_RDREQ_DRAM_sum / $denom)), 0) + alias: hbm_rd_ + tips: + HBM Wr: + value: ROUND(AVG((TCC_EA_WRREQ_DRAM_sum / $denom)), 0) + alias: hbm_wr_ + tips: + LDS Util: + value: ROUND(AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))), + 0) + alias: lds_util_ + tips: + VL1 Coalesce: + value: ROUND(AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum + * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else 0)), 0) + alias: vl1_coales_ + tips: + VL1 Stall: + value: ROUND(AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)), 0) + alias: vl1_stall_ + tips: + LDS Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) + if (SQ_INSTS_LDS != 0) else None)), 0) + alias: lds_lat_ + coll_level: SQ_INST_LEVEL_LDS + tips: + vL1D Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_DCACHE_REQ) + if (SQC_DCACHE_REQ != 0) else None)), 0) + alias: sl1_lat_ + tips: + IL1 Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_ICACHE_REQ) + if (SQC_ICACHE_REQ != 0) else None)), 0) + alias: il1_lat_ + tips: + Wave Occupancy: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / $numActiveCUs)), 0) + alias: wave_occ_ + coll_level: SQ_LEVEL_WAVES + tips: diff --git a/src/omniperf_analyze-old/configs/gfx908/2000_kernels.yaml b/src/omniperf_analyze-old/configs/gfx908/2000_kernels.yaml new file mode 100644 index 000000000..ed566f75a --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx908/2000_kernels.yaml @@ -0,0 +1,8 @@ +--- +Panel Config: + id: 2000 + title: Kernels + data source: + - raw_csv_table: + id: 2001 + source: pmc_dispatch_info.csv diff --git a/src/omniperf_analyze-old/configs/gfx90a/0000_top_stat.yaml b/src/omniperf_analyze-old/configs/gfx90a/0000_top_stat.yaml new file mode 100644 index 000000000..077004080 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/0000_top_stat.yaml @@ -0,0 +1,8 @@ +--- +Panel Config: + id: 000 + title: Top Stat + data source: + - raw_csv_table: + id: 001 + source: pmc_kernel_top.csv diff --git a/src/omniperf_analyze-old/configs/gfx90a/0100_system_info.yaml b/src/omniperf_analyze-old/configs/gfx90a/0100_system_info.yaml new file mode 100644 index 000000000..b7ec29eaf --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/0100_system_info.yaml @@ -0,0 +1,9 @@ +--- +Panel Config: + id: 100 + title: System Info + data source: + - raw_csv_table: + id: 101 + source: sysinfo.csv + columnwise: True diff --git a/src/omniperf_analyze-old/configs/gfx90a/0200_system-speed-of-light.yaml b/src/omniperf_analyze-old/configs/gfx90a/0200_system-speed-of-light.yaml new file mode 100644 index 000000000..c197c0fc5 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/0200_system-speed-of-light.yaml @@ -0,0 +1,247 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + SALU: &SALU_anchor Scalar Arithmetic Logic Unit + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 200 + title: System Speed-of-Light + data source: + - metric_table: + id: 201 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + peak: Peak + pop: PoP + tips: Tips + metric: + VALU FLOPs: + value: AVG(((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + SQ_INSTS_VALU_TRANS_F16) + + (2 * SQ_INSTS_VALU_FMA_F16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + + SQ_INSTS_VALU_TRANS_F32) + (2 * SQ_INSTS_VALU_FMA_F32)))) + (64 * (((SQ_INSTS_VALU_ADD_F64 + + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + (2 * SQ_INSTS_VALU_FMA_F64)))) + / (EndNs - BeginNs))) + unit: GFLOP + peak: (((($sclk * $numCU) * 64) * 2) / 1000) + pop: ((100 * AVG(((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + + SQ_INSTS_VALU_TRANS_F16) + (2 * SQ_INSTS_VALU_FMA_F16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) + (2 * SQ_INSTS_VALU_FMA_F32)))) + + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + + (2 * SQ_INSTS_VALU_FMA_F64)))) / (EndNs - BeginNs)))) / (((($sclk + * $numCU) * 64) * 2) / 1000)) + tips: + VALU IOPs: + value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (EndNs - BeginNs))) + unit: GIOP + peak: (((($sclk * $numCU) * 64) * 2) / 1000) + pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (EndNs + - BeginNs)))) / (((($sclk * $numCU) * 64) * 2) / 1000)) + tips: + MFMA FLOPs (BF16): + value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (EndNs - BeginNs))) + unit: GFLOP + peak: ((($sclk * $numCU) * 1024) / 1000) + pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 1024) / 1000)) + tips: + MFMA FLOPs (F16): + value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (EndNs - BeginNs))) + unit: GFLOP + peak: ((($sclk * $numCU) * 1024) / 1000) + pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 1024) / 1000)) + tips: + MFMA FLOPs (F32): + value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (EndNs - BeginNs))) + unit: GFLOP + peak: ((($sclk * $numCU) * 256) / 1000) + pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 256) / 1000)) + tips: + MFMA FLOPs (F64): + value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (EndNs - BeginNs))) + unit: GFLOP + peak: ((($sclk * $numCU) * 256) / 1000) + pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 256) / 1000)) + tips: + MFMA IOPs (Int8): + value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (EndNs - BeginNs))) + unit: GIOP + peak: ((($sclk * $numCU) * 1024) / 1000) + pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 1024) / 1000)) + tips: + Active CUs: + value: $numActiveCUs + unit: CUs + peak: $numCU + pop: ((100 * $numActiveCUs) / $numCU) + tips: + SALU Util: + value: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + peak: 100 + pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) + tips: + VALU Util: + value: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + peak: 100 + pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) + tips: + MFMA Util: + value: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((GRBM_GUI_ACTIVE * $numCU) + * 4))) + unit: pct + peak: 100 + pop: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((GRBM_GUI_ACTIVE * $numCU) + * 4))) + tips: + VALU Active Threads/Wave: + value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + unit: Threads + peak: 64 + pop: (AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) * 1.5625) + tips: + IPC - Issue: + value: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + unit: Instr/cycle + peak: 5 + pop: ((100 * AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY))) / 5) + tips: + LDS BW: + value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs))) + unit: GB/sec + peak: (($sclk * $numCU) * 0.128) + pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) + tips: + LDS Bank Conflict: + value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Conflicts/access + peak: 32 + pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32) + tips: + Instr Cache Hit Rate: + value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) + unit: pct + peak: 100 + pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) + tips: + Instr Cache BW: + value: AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64)) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numSQC) + pop: ((100 * AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk + / 1000) * 64) * $numSQC)) + tips: + Scalar L1D Cache Hit Rate: + value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) + unit: pct + peak: 100 + pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) + tips: + Scalar L1D Cache BW: + value: AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64)) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numSQC) + pop: ((100 * AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk + / 1000) * 64) * $numSQC)) + tips: + Vector L1D Cache Hit Rate: + value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: pct + peak: 100 + pop: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + tips: + Vector L1D Cache BW: + value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + unit: GB/s + peak: ((($sclk / 1000) * 64) * $numCU) + pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) + / ((($sclk / 1000) * 64) * $numCU)) + tips: + L2 Cache Hit Rate: + value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + unit: pct + peak: 100 + pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + tips: + L2-Fabric Read BW: + value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs))) + unit: GB/s + peak: $hbmBW + pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs)))) / $hbmBW) + tips: + L2-Fabric Write BW: + value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs))) + unit: GB/s + peak: $hbmBW + pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs)))) / $hbmBW) + tips: + L2-Fabric Read Latency: + value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum + != 0) else None)) + unit: Cycles + peak: '' + pop: '' + tips: + L2-Fabric Write Latency: + value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum + != 0) else None)) + unit: Cycles + peak: '' + pop: '' + tips: + Wave Occupancy: + value: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + unit: Wavefronts + peak: ($maxWavesPerCU * $numCU) + pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / ($maxWavesPerCU + * $numCU)))) + coll_level: SQ_LEVEL_WAVES + tips: + Instr Fetch BW: + value: AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32)) + unit: GB/s + peak: ((($sclk / 1000) * 32) * $numSQC) + pop: ((100 * AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32))) / ($numSQC + * (($sclk / 1000) * 32))) + coll_level: SQ_IFETCH_LEVEL + tips: + Instr Fetch Latency: + value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH)) + unit: Cycles + peak: '' + pop: '' + coll_level: SQ_IFETCH_LEVEL + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/0500_command-processor.yaml b/src/omniperf_analyze-old/configs/gfx90a/0500_command-processor.yaml new file mode 100644 index 000000000..d954f6162 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/0500_command-processor.yaml @@ -0,0 +1,180 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 500 + title: Command Processor (CPC/CPF) + data source: + - metric_table: + id: 501 + title: Command Processor Fetcher + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy Cycles: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles/Kernel + tips: + CPF Busy: + avg: AVG(CPF_CPF_STAT_BUSY) + min: MIN(CPF_CPF_STAT_BUSY) + max: MAX(CPF_CPF_STAT_BUSY) + unit: Cycles/Kernel + tips: + CPF Util: + avg: AVG((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + min: MIN((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) + if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) + unit: pct + tips: + CPF Stall: + avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY + != 0) else None)) + unit: Cycles/Kernel + tips: + L2Cache Intf Busy: + avg: AVG(CPF_CPF_TCIU_BUSY) + min: MIN(CPF_CPF_TCIU_BUSY) + max: MAX(CPF_CPF_TCIU_BUSY) + unit: Cycles/Kernel + tips: + L2Cache Intf Util: + avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + min: MIN((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) + if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) + unit: pct + tips: + L2Cache Intf Stall: + avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + min: MIN((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY + != 0) else None)) + unit: pct + tips: + UTCL1 Stall: + avg: AVG(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + min: MIN(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + max: MAX(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) + unit: Cycles/Kernel + tips: + + - metric_table: + id: 502 + title: Command Processor Compute + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy Cycles: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles + tips: + CPC Busy Cycles: + avg: AVG(CPC_CPC_STAT_BUSY) + min: MIN(CPC_CPC_STAT_BUSY) + max: MAX(CPC_CPC_STAT_BUSY) + unit: Cycles + tips: + CPC Util: + avg: AVG((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) + if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) + unit: pct + tips: + CPC Stall Cycles: + avg: AVG(CPC_CPC_STAT_STALL) + min: MIN(CPC_CPC_STAT_STALL) + max: MAX(CPC_CPC_STAT_STALL) + unit: Cycles + tips: + CPC Stall Rate: + avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + unit: pct + tips: + CPC Packet Decoding: + avg: AVG(CPC_ME1_BUSY_FOR_PACKET_DECODE) + min: MIN(CPC_ME1_BUSY_FOR_PACKET_DECODE) + max: MAX(CPC_ME1_BUSY_FOR_PACKET_DECODE) + unit: Cycles + tips: + SPI Intf Busy Cycles: + avg: AVG(CPC_ME1_DC0_SPI_BUSY) + min: MIN(CPC_ME1_DC0_SPI_BUSY) + max: MAX(CPC_ME1_DC0_SPI_BUSY) + unit: Cycles + tips: + SPI Intf Util: + avg: AVG((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + min: MIN((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + max: MAX((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY + != 0) else None)) + unit: pct + tips: + L2Cache Intf Util: + avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) + if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) + unit: pct + tips: + UTCL1 Stall Cycles: + avg: AVG(CPC_UTCL1_STALL_ON_TRANSLATION) + min: MIN(CPC_UTCL1_STALL_ON_TRANSLATION) + max: MAX(CPC_UTCL1_STALL_ON_TRANSLATION) + unit: Cycles + tips: + UTCL2 Intf Busy Cycles: + avg: AVG(CPC_CPC_UTCL2IU_BUSY) + min: MIN(CPC_CPC_UTCL2IU_BUSY) + max: MAX(CPC_CPC_UTCL2IU_BUSY) + unit: Cycles + tips: + UTCL2 Intf Util: + avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + min: MIN((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) + if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) + unit: pct + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/0600_shader-processor-input.yaml b/src/omniperf_analyze-old/configs/gfx90a/0600_shader-processor-input.yaml new file mode 100644 index 000000000..bab48700a --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/0600_shader-processor-input.yaml @@ -0,0 +1,174 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 600 + title: Shader Processor Input (SPI) + data source: + - metric_table: + id: 601 + title: SPI Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + GPU Busy: + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycles + tips: + CS Busy: + avg: AVG(SPI_CSN_BUSY) + min: MIN(SPI_CSN_BUSY) + max: MAX(SPI_CSN_BUSY) + unit: Cycles + tips: + SPI Busy: + avg: AVG(GRBM_SPI_BUSY) + min: MIN(GRBM_SPI_BUSY) + max: MAX(GRBM_SPI_BUSY) + unit: Cycles + tips: + SQ Busy: + avg: AVG(SQ_BUSY_CYCLES) + min: MIN(SQ_BUSY_CYCLES) + max: MAX(SQ_BUSY_CYCLES) + unit: Cycles + tips: + Dispatched Workgroups: + avg: AVG(SPI_CSN_NUM_THREADGROUPS) + min: MIN(SPI_CSN_NUM_THREADGROUPS) + max: MAX(SPI_CSN_NUM_THREADGROUPS) + unit: Workgroups + tips: + Dispatched Wavefronts: + avg: AVG(SPI_CSN_WAVE) + min: MIN(SPI_CSN_WAVE) + max: MAX(SPI_CSN_WAVE) + unit: Wavefronts + tips: + Wave Alloc Failed: + avg: AVG(SPI_RA_REQ_NO_ALLOC) + min: MIN(SPI_RA_REQ_NO_ALLOC) + max: MAX(SPI_RA_REQ_NO_ALLOC) + unit: Cycles + tips: + Wave Alloc Failed - CS: + avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) + min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) + max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) + unit: Cycles + tips: + + - metric_table: + id: 602 + title: SPI Resource Allocation + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Wave request Failed (CS): + avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) + min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) + max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) + unit: Cycles + tips: + CS Stall: + avg: AVG(SPI_RA_RES_STALL_CSN) + min: MIN(SPI_RA_RES_STALL_CSN) + max: MAX(SPI_RA_RES_STALL_CSN) + unit: Cycles + tips: + CS Stall Rate: + avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + min: MIN((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + max: MAX((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != + 0) else None)) + unit: pct + tips: + Scratch Stall: + avg: AVG(SPI_RA_TMP_STALL_CSN) + min: MIN(SPI_RA_TMP_STALL_CSN) + max: MAX(SPI_RA_TMP_STALL_CSN) + unit: Cycles + tips: + Insufficient SIMD Waveslots: + avg: AVG(SPI_RA_WAVE_SIMD_FULL_CSN) + min: MIN(SPI_RA_WAVE_SIMD_FULL_CSN) + max: MAX(SPI_RA_WAVE_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient SIMD VGPRs: + avg: AVG(SPI_RA_VGPR_SIMD_FULL_CSN) + min: MIN(SPI_RA_VGPR_SIMD_FULL_CSN) + max: MAX(SPI_RA_VGPR_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient SIMD SGPRs: + avg: AVG(SPI_RA_SGPR_SIMD_FULL_CSN) + min: MIN(SPI_RA_SGPR_SIMD_FULL_CSN) + max: MAX(SPI_RA_SGPR_SIMD_FULL_CSN) + unit: SIMD + tips: + Insufficient CU LDS: + avg: AVG(SPI_RA_LDS_CU_FULL_CSN) + min: MIN(SPI_RA_LDS_CU_FULL_CSN) + max: MAX(SPI_RA_LDS_CU_FULL_CSN) + unit: CU + tips: + Insufficient CU Barries: + avg: AVG(SPI_RA_BAR_CU_FULL_CSN) + min: MIN(SPI_RA_BAR_CU_FULL_CSN) + max: MAX(SPI_RA_BAR_CU_FULL_CSN) + unit: CU + tips: + Insufficient Bulky Resource: + avg: AVG(SPI_RA_BULKY_CU_FULL_CSN) + min: MIN(SPI_RA_BULKY_CU_FULL_CSN) + max: MAX(SPI_RA_BULKY_CU_FULL_CSN) + unit: CU + tips: + Reach CU Threadgroups Limit: + avg: AVG(SPI_RA_TGLIM_CU_FULL_CSN) + min: MIN(SPI_RA_TGLIM_CU_FULL_CSN) + max: MAX(SPI_RA_TGLIM_CU_FULL_CSN) + unit: Cycles + tips: + Reach CU Wave Limit: + avg: AVG(SPI_RA_WVLIM_STALL_CSN) + min: MIN(SPI_RA_WVLIM_STALL_CSN) + max: MAX(SPI_RA_WVLIM_STALL_CSN) + unit: Cycles + tips: + VGPR Writes: + avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + min: MIN((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + unit: Cycles/wave + tips: + SGPR Writes: + avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + min: MIN((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + max: MAX((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else + None)) + unit: Cycles/wave + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/0700_wavefront-launch.yaml b/src/omniperf_analyze-old/configs/gfx90a/0700_wavefront-launch.yaml new file mode 100644 index 000000000..13ba5b8e1 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/0700_wavefront-launch.yaml @@ -0,0 +1,142 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 700 + title: Wavefront + data source: + - metric_table: + id: 701 + title: Wavefront Launch Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Grid Size: + avg: AVG(grd) + min: MIN(grd) + max: MAX(grd) + unit: Work Items + tips: + Workgroup Size: + avg: AVG(wgr) + min: MIN(wgr) + max: MAX(wgr) + unit: Work Items + tips: + Total Wavefronts: + avg: AVG(SPI_CSN_WAVE) + min: MIN(SPI_CSN_WAVE) + max: MAX(SPI_CSN_WAVE) + unit: Wavefronts + tips: + Saved Wavefronts: + avg: AVG(SQ_WAVES_SAVED) + min: MIN(SQ_WAVES_SAVED) + max: MAX(SQ_WAVES_SAVED) + unit: Wavefronts + tips: + Restored Wavefronts: + avg: AVG(SQ_WAVES_RESTORED) + min: MIN(SQ_WAVES_RESTORED) + max: MAX(SQ_WAVES_RESTORED) + unit: Wavefronts + tips: + VGPRs: + avg: AVG(arch_vgpr) + min: MIN(arch_vgpr) + max: MAX(arch_vgpr) + unit: Registers + tips: + AGPRs: + avg: AVG(accum_vgpr) + min: MIN(accum_vgpr) + max: MAX(accum_vgpr) + unit: Registers + tips: + SGPRs: + avg: AVG(sgpr) + min: MIN(sgpr) + max: MAX(sgpr) + unit: Registers + tips: + LDS Allocation: + avg: AVG(lds) + min: MIN(lds) + max: MAX(lds) + unit: Bytes + tips: + Scratch Allocation: + avg: AVG(scr) + min: MIN(scr) + max: MAX(scr) + unit: Bytes + tips: + + - metric_table: + id: 702 + title: Wavefront Runtime Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Kernel Time (Nanosec): + avg: AVG((EndNs - BeginNs)) + min: MIN((EndNs - BeginNs)) + max: MAX((EndNs - BeginNs)) + unit: ns + tips: + Kernel Time (Cycles): + avg: AVG(GRBM_GUI_ACTIVE) + min: MIN(GRBM_GUI_ACTIVE) + max: MAX(GRBM_GUI_ACTIVE) + unit: Cycle + tips: + Instr/wavefront: + avg: AVG((SQ_INSTS / SQ_WAVES)) + min: MIN((SQ_INSTS / SQ_WAVES)) + max: MAX((SQ_INSTS / SQ_WAVES)) + unit: Instr/wavefront + tips: + Wave Cycles: + avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom)) + min: MIN(((4 * SQ_WAVE_CYCLES) / $denom)) + max: MAX(((4 * SQ_WAVE_CYCLES) / $denom)) + unit: (Cycles + $normUnit) + tips: + Dependency Wait Cycles: + avg: AVG(((4 * SQ_WAIT_ANY) / $denom)) + min: MIN(((4 * SQ_WAIT_ANY) / $denom)) + max: MAX(((4 * SQ_WAIT_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Issue Wait Cycles: + avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom)) + min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom)) + max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Active Cycles: + avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom)) + unit: (Cycles + $normUnit) + tips: + Wavefront Occupancy: + avg: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + min: MIN((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + max: MAX((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) + unit: Wavefronts + coll_level: SQ_LEVEL_WAVES + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1000_compute-unit-instruction-mix.yaml b/src/omniperf_analyze-old/configs/gfx90a/1000_compute-unit-instruction-mix.yaml new file mode 100644 index 000000000..8ffd87d2c --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1000_compute-unit-instruction-mix.yaml @@ -0,0 +1,234 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1000 + title: Compute Units - Instruction Mix + data source: + - metric_table: + id: 1001 + title: Instruction Mix + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_bar + label_txt: (# of instr + $normUnit) + metric: + VALU - Vector: + avg: AVG(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) + min: MIN(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) + max: MAX(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) + unit: (instr + $normUnit) + tips: + VMEM: + avg: AVG(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) + min: MIN(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) + max: MAX(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) + unit: (instr + $normUnit) + tips: + LDS: + avg: AVG((SQ_INSTS_LDS / $denom)) + min: MIN((SQ_INSTS_LDS / $denom)) + max: MAX((SQ_INSTS_LDS / $denom)) + unit: (instr + $normUnit) + tips: + VALU - MFMA: + avg: AVG((SQ_INSTS_MFMA / $denom)) + min: MIN((SQ_INSTS_MFMA / $denom)) + max: MAX((SQ_INSTS_MFMA / $denom)) + unit: (instr + $normUnit) + tips: + SALU: + avg: AVG((SQ_INSTS_SALU / $denom)) + min: MIN((SQ_INSTS_SALU / $denom)) + max: MAX((SQ_INSTS_SALU / $denom)) + unit: (instr + $normUnit) + tips: + SMEM: + avg: AVG((SQ_INSTS_SMEM / $denom)) + min: MIN((SQ_INSTS_SMEM / $denom)) + max: MAX((SQ_INSTS_SMEM / $denom)) + unit: (instr + $normUnit) + tips: + Branch: + avg: AVG((SQ_INSTS_BRANCH / $denom)) + min: MIN((SQ_INSTS_BRANCH / $denom)) + max: MAX((SQ_INSTS_BRANCH / $denom)) + unit: (instr + $normUnit) + tips: + GDS: + avg: AVG((SQ_INSTS_GDS / $denom)) + min: MIN((SQ_INSTS_GDS / $denom)) + max: MAX((SQ_INSTS_GDS / $denom)) + unit: (instr + $normUnit) + tips: + + - metric_table: + id: 1002 + title: VALU Arithmetic Instr Mix + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_bar + label_txt: (# of instr + $normUnit) + metric: + INT32: + avg: AVG((SQ_INSTS_VALU_INT32 / $denom)) + min: MIN((SQ_INSTS_VALU_INT32 / $denom)) + max: MAX((SQ_INSTS_VALU_INT32 / $denom)) + unit: (instr + $normUnit) + tips: + INT64: + avg: AVG((SQ_INSTS_VALU_INT64 / $denom)) + min: MIN((SQ_INSTS_VALU_INT64 / $denom)) + max: MAX((SQ_INSTS_VALU_INT64 / $denom)) + unit: (instr + $normUnit) + tips: + F16-ADD: + avg: AVG((SQ_INSTS_VALU_ADD_F16 / $denom)) + min: MIN((SQ_INSTS_VALU_ADD_F16 / $denom)) + max: MAX((SQ_INSTS_VALU_ADD_F16 / $denom)) + unit: (instr + $normUnit) + tips: + F16-MUL: + avg: AVG((SQ_INSTS_VALU_MUL_F16 / $denom)) + min: MIN((SQ_INSTS_VALU_MUL_F16 / $denom)) + max: MAX((SQ_INSTS_VALU_MUL_F16 / $denom)) + unit: (instr + $normUnit) + tips: + F16-FMA: + avg: AVG((SQ_INSTS_VALU_FMA_F16 / $denom)) + min: MIN((SQ_INSTS_VALU_FMA_F16 / $denom)) + max: MAX((SQ_INSTS_VALU_FMA_F16 / $denom)) + unit: (instr + $normUnit) + tips: + F16-Trans: + avg: AVG((SQ_INSTS_VALU_TRANS_F16 / $denom)) + min: MIN((SQ_INSTS_VALU_TRANS_F16 / $denom)) + max: MAX((SQ_INSTS_VALU_TRANS_F16 / $denom)) + unit: (instr + $normUnit) + tips: + F32-ADD: + avg: AVG((SQ_INSTS_VALU_ADD_F32 / $denom)) + min: MIN((SQ_INSTS_VALU_ADD_F32 / $denom)) + max: MAX((SQ_INSTS_VALU_ADD_F32 / $denom)) + unit: (instr + $normUnit) + tips: + F32-MUL: + avg: AVG((SQ_INSTS_VALU_MUL_F32 / $denom)) + min: MIN((SQ_INSTS_VALU_MUL_F32 / $denom)) + max: MAX((SQ_INSTS_VALU_MUL_F32 / $denom)) + unit: (instr + $normUnit) + tips: + F32-FMA: + avg: AVG((SQ_INSTS_VALU_FMA_F32 / $denom)) + min: MIN((SQ_INSTS_VALU_FMA_F32 / $denom)) + max: MAX((SQ_INSTS_VALU_FMA_F32 / $denom)) + unit: (instr + $normUnit) + tips: + F32-Trans: + avg: AVG((SQ_INSTS_VALU_TRANS_F32 / $denom)) + min: MIN((SQ_INSTS_VALU_TRANS_F32 / $denom)) + max: MAX((SQ_INSTS_VALU_TRANS_F32 / $denom)) + unit: (instr + $normUnit) + tips: + F64-ADD: + avg: AVG((SQ_INSTS_VALU_ADD_F64 / $denom)) + min: MIN((SQ_INSTS_VALU_ADD_F64 / $denom)) + max: MAX((SQ_INSTS_VALU_ADD_F64 / $denom)) + unit: (instr + $normUnit) + tips: + F64-MUL: + avg: AVG((SQ_INSTS_VALU_MUL_F64 / $denom)) + min: MIN((SQ_INSTS_VALU_MUL_F64 / $denom)) + max: MAX((SQ_INSTS_VALU_MUL_F64 / $denom)) + unit: (instr + $normUnit) + tips: + F64-FMA: + avg: AVG((SQ_INSTS_VALU_FMA_F64 / $denom)) + min: MIN((SQ_INSTS_VALU_FMA_F64 / $denom)) + max: MAX((SQ_INSTS_VALU_FMA_F64 / $denom)) + unit: (instr + $normUnit) + tips: + F64-Trans: + avg: AVG((SQ_INSTS_VALU_TRANS_F64 / $denom)) + min: MIN((SQ_INSTS_VALU_TRANS_F64 / $denom)) + max: MAX((SQ_INSTS_VALU_TRANS_F64 / $denom)) + unit: (instr + $normUnit) + tips: + Conversion: + avg: AVG((SQ_INSTS_VALU_CVT / $denom)) + min: MIN((SQ_INSTS_VALU_CVT / $denom)) + max: MAX((SQ_INSTS_VALU_CVT / $denom)) + unit: (instr + $normUnit) + tips: + + - metric_table: + id: 1003 + title: VMEM Instr Mix + header: + type: type + count: Count + tips: Tips + metric: + Buffer Instr: + count: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) + tips: + Buffer Read: + count: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + tips: + Buffer Write: + count: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + tips: + Buffer Atomic: + count: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + tips: + Flat Instr: + count: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) + tips: + Flat Read: + count: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + tips: + Flat Write: + count: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + tips: + Flat Atomic: + count: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + tips: + + - metric_table: + id: 1004 + title: MFMA Arithmetic Instr Mix + header: + type: type + count: Count + tips: Tips + metric: + MFMA-I8: + count: AVG((SQ_INSTS_VALU_MFMA_I8 / $denom)) + tips: + MFMA-F16: + count: AVG((SQ_INSTS_VALU_MFMA_F16 / $denom)) + tips: + MFMA-BF16: + count: AVG((SQ_INSTS_VALU_MFMA_BF16 / $denom)) + tips: + MFMA-F32: + count: AVG((SQ_INSTS_VALU_MFMA_F32 / $denom)) + tips: + MFMA-F64: + count: AVG((SQ_INSTS_VALU_MFMA_F64 / $denom)) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1100_compute-unit-compute-pipeline.yaml b/src/omniperf_analyze-old/configs/gfx90a/1100_compute-unit-compute-pipeline.yaml new file mode 100644 index 000000000..5767fe771 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1100_compute-unit-compute-pipeline.yaml @@ -0,0 +1,202 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1100 + title: Compute Units - Compute Pipeline + data source: + - metric_table: + id: 1101 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + valu_flops_pop: + value: ((100 * AVG(((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + + SQ_INSTS_VALU_TRANS_F16) + (2 * SQ_INSTS_VALU_FMA_F16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) + (2 * SQ_INSTS_VALU_FMA_F32)))) + + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + + (2 * SQ_INSTS_VALU_FMA_F64)))) / (EndNs - BeginNs)))) / (((($sclk + * $numCU) * 64) * 2) / 1000)) + unit: Pct of Peak + tips: + mfma_flops_bf16_pop: + value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 512) / 1000)) + unit: Pct of Peak + tips: + mfma_flops_f16_pop: + value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 1024) / 1000)) + unit: Pct of Peak + tips: + mfma_flops_f32_pop: + value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 256) / 1000)) + unit: Pct of Peak + tips: + mfma_flops_f64_pop: + value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 256) / 1000)) + unit: Pct of Peak + tips: + mfma_flops_i8_pop: + value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (EndNs - BeginNs)))) + / ((($sclk * $numCU) * 1024) / 1000)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1102 + title: Pipeline Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + IPC (Avg): + avg: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES)) + unit: Instr/cycle + tips: + IPC (Issue): + avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) + + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) + / SQ_ACTIVE_INST_ANY)) + unit: Instr/cycle + tips: + SALU Util: + avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + min: MIN((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + max: MAX((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) + unit: pct + tips: + VALU Util: + avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + min: MIN((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + max: MAX((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) + unit: pct + tips: + VALU Active Threads: + avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + min: MIN(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU + != 0) else None)) + unit: Threads + tips: + MFMA Util: + avg: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $numCU) * GRBM_GUI_ACTIVE))) + min: MIN(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $numCU) * GRBM_GUI_ACTIVE))) + max: MAX(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $numCU) * GRBM_GUI_ACTIVE))) + unit: pct + tips: + MFMA Instr Cycles: + avg: AVG(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0) + else None)) + min: MIN(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0) + else None)) + max: MAX(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0) + else None)) + unit: cycles/instr + tips: + + - metric_table: + id: 1103 + title: Arithmetic Operations + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + FLOPs (Total): + avg: AVG((((((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + SQ_INSTS_VALU_TRANS_F16) + + (SQ_INSTS_VALU_FMA_F16 * 2))) + ((512 * SQ_INSTS_VALU_MFMA_MOPS_F16) + (512 + * SQ_INSTS_VALU_MFMA_MOPS_BF16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + + SQ_INSTS_VALU_TRANS_F32) + (SQ_INSTS_VALU_FMA_F32 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) + + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + + (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / + $denom)) + min: MIN((((((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + SQ_INSTS_VALU_TRANS_F16) + + (SQ_INSTS_VALU_FMA_F16 * 2))) + ((512 * SQ_INSTS_VALU_MFMA_MOPS_F16) + (512 + * SQ_INSTS_VALU_MFMA_MOPS_BF16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + + SQ_INSTS_VALU_TRANS_F32) + (SQ_INSTS_VALU_FMA_F32 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) + + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + + (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / + $denom)) + max: MAX((((((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + SQ_INSTS_VALU_TRANS_F16) + + (SQ_INSTS_VALU_FMA_F16 * 2))) + ((512 * SQ_INSTS_VALU_MFMA_MOPS_F16) + (512 + * SQ_INSTS_VALU_MFMA_MOPS_BF16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + + SQ_INSTS_VALU_TRANS_F32) + (SQ_INSTS_VALU_FMA_F32 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) + + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + + (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / + $denom)) + unit: (OPs + $normUnit) + tips: + INT8 OPs: + avg: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom)) + min: MIN(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom)) + max: MAX(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom)) + unit: (OPs + $normUnit) + tips: + F16 OPs: + avg: AVG(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) + + (64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 * + SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom)) + min: MIN(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) + + (64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 * + SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom)) + max: MAX(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) + + (64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 * + SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom)) + unit: (OPs + $normUnit) + tips: + BF16 OPs: + avg: AVG(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom)) + min: MIN(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom)) + max: MAX(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom)) + unit: (OPs + $normUnit) + tips: + F32 OPs: + avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) + + (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom)) + min: MIN((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) + + (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom)) + max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) + + (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom)) + unit: (OPs + $normUnit) + tips: + F64 OPs: + avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + + (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom)) + min: MIN((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + + (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom)) + max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + + (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom)) + unit: (OPs + $normUnit) + tips: \ No newline at end of file diff --git a/src/omniperf_analyze-old/configs/gfx90a/1200_lds.yaml b/src/omniperf_analyze-old/configs/gfx90a/1200_lds.yaml new file mode 100644 index 000000000..3fd52c3b1 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1200_lds.yaml @@ -0,0 +1,121 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1200 + title: Local Data Share (LDS) + data source: + - metric_table: + id: 1201 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Utilization: + value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))) + unit: Pct of Peak + tips: + Access Rate: + value: AVG(((200 * SQ_ACTIVE_INST_LDS) / (GRBM_GUI_ACTIVE * $numCU))) + unit: Pct of Peak + tips: + Bandwidth (Pct-of-Peak): + value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) + unit: Pct of Peak + tips: + Bank Conflict Rate: + value: AVG((((SQ_LDS_BANK_CONFLICT * 3.125) / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1202 + title: LDS Stats + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + LDS Instrs: + avg: AVG((SQ_INSTS_LDS / $denom)) + min: MIN((SQ_INSTS_LDS / $denom)) + max: MAX((SQ_INSTS_LDS / $denom)) + unit: (Instr + $normUnit) + tips: + Bandwidth: + avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + min: MIN(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) + / $denom)) + unit: (Bytes + $normUnit) + tips: + Bank Conficts/Access: + avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + min: MIN(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) + if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) + unit: Conflicts/Access + tips: + Index Accesses: + avg: AVG((SQ_LDS_IDX_ACTIVE / $denom)) + min: MIN((SQ_LDS_IDX_ACTIVE / $denom)) + max: MAX((SQ_LDS_IDX_ACTIVE / $denom)) + unit: (Cycles + $normUnit) + tips: + Atomic Cycles: + avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom)) + min: MIN((SQ_LDS_ATOMIC_RETURN / $denom)) + max: MAX((SQ_LDS_ATOMIC_RETURN / $denom)) + unit: (Cycles + $normUnit) + tips: + Bank Conflict: + avg: AVG((SQ_LDS_BANK_CONFLICT / $denom)) + min: MIN((SQ_LDS_BANK_CONFLICT / $denom)) + max: MAX((SQ_LDS_BANK_CONFLICT / $denom)) + unit: (Cycles + $normUnit) + tips: + Addr Conflict: + avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom)) + min: MIN((SQ_LDS_ADDR_CONFLICT / $denom)) + max: MAX((SQ_LDS_ADDR_CONFLICT / $denom)) + unit: (Cycles + $normUnit) + tips: + Unaligned Stall: + avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom)) + min: MIN((SQ_LDS_UNALIGNED_STALL / $denom)) + max: MAX((SQ_LDS_UNALIGNED_STALL / $denom)) + unit: (Cycles + $normUnit) + tips: + Mem Violations: + avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom)) + min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom)) + max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom)) + unit: ( + $normUnit) + tips: + LDS Latency: + avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) + unit: Cycles + coll_level: SQ_INST_LEVEL_LDS + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1300_instruction-cache.yaml b/src/omniperf_analyze-old/configs/gfx90a/1300_instruction-cache.yaml new file mode 100644 index 000000000..329a7edba --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1300_instruction-cache.yaml @@ -0,0 +1,79 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1300 + title: Instruction Cache + data source: + - metric_table: + id: 1301 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Bandwidth: + value: AVG(((SQC_ICACHE_REQ * 100000) / (($sclk * $numSQC) + * (EndNs - BeginNs)))) + unit: Pct of Peak + tips: + Cache Hit: + value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + unit: Pct of Peak + tips: + + - metric_table: + id: 1302 + title: Instruction Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((SQC_ICACHE_REQ / $denom)) + min: MIN((SQC_ICACHE_REQ / $denom)) + max: MAX((SQC_ICACHE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((SQC_ICACHE_HITS / $denom)) + min: MIN((SQC_ICACHE_HITS / $denom)) + max: MAX((SQC_ICACHE_HITS / $denom)) + unit: (Hits + $normUnit) + tips: + Misses - Non Duplicated: + avg: AVG((SQC_ICACHE_MISSES / $denom)) + min: MIN((SQC_ICACHE_MISSES / $denom)) + max: MAX((SQC_ICACHE_MISSES / $denom)) + unit: (Misses + $normUnit) + tips: + Misses - Duplicated: + avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom)) + unit: (Misses + $normUnit) + tips: + Cache Hit: + avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + min: MIN(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + + SQC_ICACHE_MISSES_DUPLICATE))) + unit: pct + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1400_constant-cache.yaml b/src/omniperf_analyze-old/configs/gfx90a/1400_constant-cache.yaml new file mode 100644 index 000000000..563caad13 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1400_constant-cache.yaml @@ -0,0 +1,164 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1400 + title: Scalar L1 Data Cache + data source: + - metric_table: + id: 1401 + title: Speed-of-Light + header: + mertic: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Bandwidth: + value: AVG(((SQC_DCACHE_REQ * 100000) / (($sclk * $numSQC) + * (EndNs - BeginNs)))) + unit: Pct of Peak + tips: + Cache Hit: + value: + AVG((((SQC_DCACHE_HITS * 100) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE)) + if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1402 + title: Scalar L1D Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((SQC_DCACHE_REQ / $denom)) + min: MIN((SQC_DCACHE_REQ / $denom)) + max: MAX((SQC_DCACHE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((SQC_DCACHE_HITS / $denom)) + min: MIN((SQC_DCACHE_HITS / $denom)) + max: MAX((SQC_DCACHE_HITS / $denom)) + unit: (Req + $normUnit) + tips: + Misses - Non Duplicated: + avg: AVG((SQC_DCACHE_MISSES / $denom)) + min: MIN((SQC_DCACHE_MISSES / $denom)) + max: MAX((SQC_DCACHE_MISSES / $denom)) + unit: (Req + $normUnit) + tips: + Misses- Duplicated: + avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hit: + avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + min: MIN((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + max: MAX((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) + + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) + unit: pct + tips: + Read Req (Total): + avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + min: MIN((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) + + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((SQC_DCACHE_ATOMIC / $denom)) + min: MIN((SQC_DCACHE_ATOMIC / $denom)) + max: MAX((SQC_DCACHE_ATOMIC / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (1 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_1 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_1 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (2 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_2 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_2 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (4 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_4 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_4 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (8 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_8 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_8 / $denom)) + unit: (Req + $normUnit) + tips: + Read Req (16 DWord): + avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom)) + min: MIN((SQC_DCACHE_REQ_READ_16 / $denom)) + max: MAX((SQC_DCACHE_REQ_READ_16 / $denom)) + unit: (Req + $normUnit) + tips: + + - metric_table: + id: 1403 + title: Scalar L1D Cache - L2 Interface + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Read Req: + avg: AVG((SQC_TC_DATA_READ_REQ / $denom)) + min: MIN((SQC_TC_DATA_READ_REQ / $denom)) + max: MAX((SQC_TC_DATA_READ_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom)) + min: MIN((SQC_TC_DATA_WRITE_REQ / $denom)) + max: MAX((SQC_TC_DATA_WRITE_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)) + min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom)) + max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom)) + unit: (Req + $normUnit) + tips: + Stall: + avg: AVG((SQC_TC_STALL / $denom)) + min: MIN((SQC_TC_STALL / $denom)) + max: MAX((SQC_TC_STALL / $denom)) + unit: (Cycles + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1500_TA_and_TD.yaml b/src/omniperf_analyze-old/configs/gfx90a/1500_TA_and_TD.yaml new file mode 100644 index 000000000..03af85497 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1500_TA_and_TD.yaml @@ -0,0 +1,174 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1500 + title: Texture Addresser and Texture Data (TA/TD) + data source: + - metric_table: + id: 1501 + title: TA + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + TA Busy: + avg: AVG(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TA Addr Stall: + avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TA Data Stall: + avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TD2TA Addr Stall: + avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + Total Instructions: + avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom)) + min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom)) + max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Instr: + avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Read Instr: + avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Write Instr: + avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Flat Atomic Instr: + avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Instr: + avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Read Instr: + avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Write Instr: + avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Atomic Instr: + avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Buffer Total Cylces: + avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + Buffer Coalesced Read: + avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + Buffer Coalesced Write: + avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + max: MAX((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) + unit: (Cycles + $normUnit) + tips: + + - metric_table: + id: 1502 + title: TD + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + TD Busy: + avg: AVG(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + TC2TD Stall: + avg: AVG(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + SPI2TD Stall: + avg: AVG(((100 * TD_SPI_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + min: MIN(((100 * TD_SPI_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + max: MAX(((100 * TD_SPI_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) + unit: pct + tips: + Coalescable Instr: + avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Load Instr: + avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + min: MIN((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) + / $denom)) + unit: (Instr + $normUnit) + tips: + Store Instr: + avg: AVG((TD_STORE_WAVEFRONT_sum / $denom)) + min: MIN((TD_STORE_WAVEFRONT_sum / $denom)) + max: MAX((TD_STORE_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: + Atomic Instr: + avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom)) + min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom)) + max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom)) + unit: (Instr + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1600_L1_cache.yaml b/src/omniperf_analyze-old/configs/gfx90a/1600_L1_cache.yaml new file mode 100644 index 000000000..d9291de21 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1600_L1_cache.yaml @@ -0,0 +1,404 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1600 + title: Vector L1 Data Cache + data source: + - metric_table: + id: 1601 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + range_color: [1, 100] + label_txt: (%) + xrange: [0, 110] + metric: + Buffer Coalescing: + value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum + * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None)) + unit: Pct of Peak + tips: + Cache Util: + value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: Pct of Peak + tips: + Cache BW: + value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) + / ((($sclk / 1000) * 64) * $numCU)) + unit: Pct of Peak + tips: + Cache Hit: + value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: Pct of Peak + tips: + + - metric_table: + id: 1602 + title: L1D Cache Stalls + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: unit + tips: Tips + metric: + Stalled on L2 Data: + avg: AVG((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + min: MIN((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + max: MAX((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: pct + tips: + Stalled on L2 Req: + avg: AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + min: MIN((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + max: MAX((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum + != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Read): + avg: AVG((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Write): + avg: AVG((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + Tag RAM Stall (Atomic): + avg: AVG((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + min: MIN((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + max: MAX((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)) + unit: pct + tips: + + - metric_table: + id: 1603 + title: L1D Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Total Req: + avg: AVG((TCP_TOTAL_ACCESSES_sum / $denom)) + min: MIN((TCP_TOTAL_ACCESSES_sum / $denom)) + max: MAX((TCP_TOTAL_ACCESSES_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Req: + avg: AVG((TCP_TOTAL_READ_sum / $denom)) + min: MIN((TCP_TOTAL_READ_sum / $denom)) + max: MAX((TCP_TOTAL_READ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((TCP_TOTAL_WRITE_sum / $denom)) + min: MIN((TCP_TOTAL_WRITE_sum / $denom)) + max: MAX((TCP_TOTAL_WRITE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + min: MIN(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + max: MAX(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)) + unit: (Req + $normUnit) + tips: + Cache BW: + avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) + unit: GB/s + tips: + Cache Accesses: + avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hits: + avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / $denom)) + unit: (Req + $normUnit) + tips: + Cache Hit Rate: + avg: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + min: MIN(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + max: MAX(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / + TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)) + unit: pct + tips: + Invalidate: + avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) + unit: (Req + $normUnit) + tips: + L1-L2 BW: + avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) + unit: (Bytes + $normUnit) + tips: + L1-L2 Read: + avg: AVG((TCP_TCC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + L1-L2 Write: + avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + L1-L2 Atomic: + avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + min: MIN(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)) + unit: (Req + $normUnit) + tips: + L1 Access Latency: + avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + min: MIN(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)) + unit: Cycles + tips: + L1-L2 Read Latency: + avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + min: MIN(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) + unit: Cycles + tips: + L1-L2 Write Latency: + avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + min: MIN(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + max: MAX(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else + None)) + unit: Cycles + tips: + + - metric_table: + id: 1604 + title: L1D - L2 Transactions + header: + metric: Metric + xfer: Xfer + coherency: Coherency + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_multi_bar + metric: + NC - Read: + xfer: Read + coherency: NC + avg: AVG((TCP_TCC_NC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_NC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_NC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC - Read: + xfer: Read + coherency: UC + avg: AVG((TCP_TCC_UC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_UC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_UC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC - Read: + xfer: Read + coherency: CC + avg: AVG((TCP_TCC_CC_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_CC_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_CC_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW - Read: + xfer: Read + coherency: RW + avg: AVG((TCP_TCC_RW_READ_REQ_sum / $denom)) + min: MIN((TCP_TCC_RW_READ_REQ_sum / $denom)) + max: MAX((TCP_TCC_RW_READ_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW - Write: + xfer: Write + coherency: RW + avg: AVG((TCP_TCC_RW_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_RW_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_RW_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + NC - Write: + xfer: Write + coherency: NC + avg: AVG((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_NC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC - Write: + xfer: Write + coherency: UC + avg: AVG((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC - Write: + xfer: Write + coherency: CC + avg: AVG((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + NC - Atomic: + xfer: Atomic + coherency: NC + avg: AVG((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) + min: MIN((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) + max: MAX((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC - Atomic: + xfer: Atomic + coherency: UC + avg: AVG((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) + min: MIN((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) + max: MAX((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC - Atomic: + xfer: Atomic + coherency: CC + avg: AVG((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) + min: MIN((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) + max: MAX((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW - Atomic: + xfer: Atomic + coherency: RW + avg: AVG((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) + min: MIN((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) + max: MAX((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + + - metric_table: + id: 1605 + title: L1D Addr Translation + header: + metric: Metric + avg: Avg + min: Min + max: Max + units: Units + tips: Tips + metric: + Req: + avg: AVG((TCP_UTCL1_REQUEST_sum / $denom)) + min: MIN((TCP_UTCL1_REQUEST_sum / $denom)) + max: MAX((TCP_UTCL1_REQUEST_sum / $denom)) + units: (Req + $normUnit) + tips: + Hit Ratio: + avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + min: MIN((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if + (TCP_UTCL1_REQUEST_sum != 0) else None)) + units: pct + tips: + Hits: + avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) + units: (Hits + $normUnit) + tips: + Misses (Translation): + avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) + units: (Misses + $normUnit) + tips: + Misses (Permission): + avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) + units: (Misses + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1700_L2_cache.yaml b/src/omniperf_analyze-old/configs/gfx90a/1700_L2_cache.yaml new file mode 100644 index 000000000..ddbaf9155 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1700_L2_cache.yaml @@ -0,0 +1,364 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1700 + title: L2 Cache + data source: + - metric_table: + id: 1701 + title: Speed-of-Light + header: + metric: Metric + value: Value + unit: Unit + tips: Tips + style: + type: simple_bar + metric: + L2 Util: + value: AVG(((TCC_BUSY_sum * 100) / (TO_INT($L2Banks) * GRBM_GUI_ACTIVE))) + unit: pct + tips: + Cache Hit: + value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else 0)) + unit: pct + tips: + L2-EA Rd BW: + value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / (EndNs - BeginNs))) + unit: GB/s + tips: + L2-EA Wr BW: + value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / (EndNs - BeginNs))) + unit: GB/s + tips: + + - metric_table: + id: 1702 + title: L2 - Fabric Transactions + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Read BW: + avg: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + min: MIN((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + max: MAX((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) + * 64)) / $denom)) + unit: (Bytes + $normUnit) + tips: + Write BW: + avg: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + min: MIN((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + max: MAX((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) + * 32)) / $denom)) + unit: (Bytes + $normUnit) + tips: + Read (32B): + avg: AVG((TCC_EA_RDREQ_32B_sum / $denom)) + min: MIN((TCC_EA_RDREQ_32B_sum / $denom)) + max: MAX((TCC_EA_RDREQ_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read (Uncached 32B): + avg: AVG((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + min: MIN((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + max: MAX((TCC_EA_RD_UNCACHED_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read (64B): + avg: AVG(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + min: MIN(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + max: MAX(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) + unit: (Req + $normUnit) + tips: + HBM Read: + avg: AVG((TCC_EA_RDREQ_DRAM_sum / $denom)) + min: MIN((TCC_EA_RDREQ_DRAM_sum / $denom)) + max: MAX((TCC_EA_RDREQ_DRAM_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write (32B): + avg: AVG(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + min: MIN(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + max: MAX(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) + unit: (Req + $normUnit) + tips: + Write (Uncached 32B): + avg: AVG((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + min: MIN((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + max: MAX((TCC_EA_WR_UNCACHED_32B_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write (64B): + avg: AVG((TCC_EA_WRREQ_64B_sum / $denom)) + min: MIN((TCC_EA_WRREQ_64B_sum / $denom)) + max: MAX((TCC_EA_WRREQ_64B_sum / $denom)) + unit: (Req + $normUnit) + tips: + HBM Write: + avg: AVG((TCC_EA_WRREQ_DRAM_sum / $denom)) + min: MIN((TCC_EA_WRREQ_DRAM_sum / $denom)) + max: MAX((TCC_EA_WRREQ_DRAM_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Latency: + avg: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + min: MIN(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + max: MAX(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != + 0) else None)) + unit: Cycles + tips: + Write Latency: + avg: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + min: MIN(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + max: MAX(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != + 0) else None)) + unit: Cycles + tips: + Atomic Latency: + avg: AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + min: MIN(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + max: MAX(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)) + unit: Cycles + tips: + Read Stall: + avg: AVG((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + min: MIN((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + max: MAX((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + unit: pct + tips: + Write Stall: + avg: AVG((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + min: MIN((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + max: MAX((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) + + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != + 0) else None)) + unit: pct + tips: + + - metric_table: + id: 1703 + title: L2 Cache Accesses + header: + metric: Metric + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + metric: + Req: + avg: AVG((TCC_REQ_sum / $denom)) + min: MIN((TCC_REQ_sum / $denom)) + max: MAX((TCC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Streaming Req: + avg: AVG((TCC_STREAMING_REQ_sum / $denom)) + min: MIN((TCC_STREAMING_REQ_sum / $denom)) + max: MAX((TCC_STREAMING_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read Req: + avg: AVG((TCC_READ_sum / $denom)) + min: MIN((TCC_READ_sum / $denom)) + max: MAX((TCC_READ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write Req: + avg: AVG((TCC_WRITE_sum / $denom)) + min: MIN((TCC_WRITE_sum / $denom)) + max: MAX((TCC_WRITE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Atomic Req: + avg: AVG((TCC_ATOMIC_sum / $denom)) + min: MIN((TCC_ATOMIC_sum / $denom)) + max: MAX((TCC_ATOMIC_sum / $denom)) + unit: (Req + $normUnit) + tips: + Probe Req: + avg: AVG((TCC_PROBE_sum / $denom)) + min: MIN((TCC_PROBE_sum / $denom)) + max: MAX((TCC_PROBE_sum / $denom)) + unit: (Req + $normUnit) + tips: + Hits: + avg: AVG((TCC_HIT_sum / $denom)) + min: MIN((TCC_HIT_sum / $denom)) + max: MAX((TCC_HIT_sum / $denom)) + unit: (Hits + $normUnit) + tips: + Misses: + avg: AVG((TCC_MISS_sum / $denom)) + min: MIN((TCC_MISS_sum / $denom)) + max: MAX((TCC_MISS_sum / $denom)) + unit: (Misses + $normUnit) + tips: + Cache Hit: + avg: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + min: MIN((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + max: MAX((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)) + unit: pct + tips: + Writeback: + avg: AVG((TCC_WRITEBACK_sum / $denom)) + min: MIN((TCC_WRITEBACK_sum / $denom)) + max: MAX((TCC_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + NC Req: + avg: AVG((TCC_NC_REQ_sum / $denom)) + min: MIN((TCC_NC_REQ_sum / $denom)) + max: MAX((TCC_NC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + UC Req: + avg: AVG((TCC_UC_REQ_sum / $denom)) + min: MIN((TCC_UC_REQ_sum / $denom)) + max: MAX((TCC_UC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + CC Req: + avg: AVG((TCC_CC_REQ_sum / $denom)) + min: MIN((TCC_CC_REQ_sum / $denom)) + max: MAX((TCC_CC_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + RW Req: + avg: AVG((TCC_RW_REQ_sum / $denom)) + min: MIN((TCC_RW_REQ_sum / $denom)) + max: MAX((TCC_RW_REQ_sum / $denom)) + unit: (Req + $normUnit) + tips: + Writeback (Normal): + avg: AVG((TCC_NORMAL_WRITEBACK_sum / $denom)) + min: MIN((TCC_NORMAL_WRITEBACK_sum / $denom)) + max: MAX((TCC_NORMAL_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + Writeback (TC Req): + avg: AVG((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + min: MIN((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + max: MAX((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) + unit: ( + $normUnit) + tips: + Evict (Normal): + avg: AVG((TCC_NORMAL_EVICT_sum / $denom)) + min: MIN((TCC_NORMAL_EVICT_sum / $denom)) + max: MAX((TCC_NORMAL_EVICT_sum / $denom)) + unit: ( + $normUnit) + tips: + Evict (TC Req): + avg: AVG((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + min: MIN((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + max: MAX((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) + unit: ( + $normUnit) + tips: + + - metric_table: + id: 1704 + title: L2 - Fabric Interface Stalls + header: + metric: Metric + type: Type + transaction: Transaction + avg: Avg + min: Min + max: Max + unit: Unit + tips: Tips + style: + type: simple_multi_bar + metric: + Read - Remote Socket Stall: + type: Remote Socket Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read - Peer GCD Stall: + type: Peer GCD Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Read - HBM Stall: + type: HBM Stall + transaction: Read + avg: AVG((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Remote Socket Stall: + type: Remote Socket Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Peer GCD Stall: + type: Peer GCD Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - HBM Stall: + type: HBM Stall + transaction: Write + avg: AVG((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + min: MIN((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + max: MAX((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: + Write - Credit Starvation: + type: Credit Starvation + transaction: Write + avg: AVG((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + min: MIN((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + max: MAX((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) + unit: (Req + $normUnit) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1800_L2_cache_per_channel.yaml b/src/omniperf_analyze-old/configs/gfx90a/1800_L2_cache_per_channel.yaml new file mode 100644 index 000000000..c6d93aa61 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1800_L2_cache_per_channel.yaml @@ -0,0 +1,2168 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1800 + title: L2 Cache (per Channel) + data source: + - metric_table: + id: 1801 + title: Aggregate Stats (All 32 channels) + header: + metric: Metric + avg: Avg + std dev: Std Dev + min: Min + max: Max + unit: Unit + tips: Tips + metric: + L2 Cache Hit Rate: + avg: AVG(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[29] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + std dev: STD(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + min: MIN(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + max: MAX(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) + + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * + TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) + + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 + * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) + + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 + * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) + + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 + * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) + + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] + + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) + + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] + + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) + + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] + + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) + + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] + + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) + + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] + + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) + + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] + + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) + + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] + + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) + unit: pct + tips: + Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) + + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) + + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) + + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) + + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) + + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) + + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) + + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) + + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Read Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) + + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) + + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) + + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + + TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) + + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + + TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) + + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + + TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) + + TO_INT(TCC_READ[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Write Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) + + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + + TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) + + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) + + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) + + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) + + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) + + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) + + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) + + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) + + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L1 - L2 Atomic Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) + + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) + + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) + + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) + + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) + + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) + + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) + + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) + + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) + + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) + + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Read Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) + + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) + + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) + + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) + + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) + + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) + + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) + + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) + + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) + + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) + + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Write Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) + + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) + + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) + + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) + + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) + + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) + + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) + + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) + + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) + + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) + + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Atomic Req: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) + + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) + + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) + + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) + + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) + + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) + + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) + + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) + + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) + + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) + + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) + / 32) / $denom)) + unit: (Req + $normUnit) + tips: + L2 - EA Read Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) + + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) + + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) + + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) + + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) + + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) + + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) + + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) + + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) + + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) + + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) + unit: Cycles + tips: + L2 - EA Write Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) + + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) + + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) + + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) + + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) + + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) + + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) + + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) + + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) + + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) + + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) + unit: Cycles + tips: + L2 - EA Atomic Lat: + avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + min: MIN((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + max: MAX((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) + + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) + + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) + + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) + + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) + + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) + + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) + + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) + + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) + + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) + + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) + / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else + None)) + unit: Cycles + tips: + L2 - EA Read Stall (IO): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Read Stall (GMI): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Read Stall (DRAM): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (IO): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (GMI): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Stall (DRAM): + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) + + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + L2 - EA Write Starve: + avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) + std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) + min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) + max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) + + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) + unit: (Cycles + $normUnit) + tips: + - metric_table: + id: 1802 + title: Channel 0-15 + columnwise: True + header: + channel: Channel + hit rate: L2 Cache Hit Rate (%) + req: Requests (Requests) + read req: L1-L2 Read (Requests) + write req: L1-L2 Write (Requests) + atomic req: L1-L2 Atomic (Requests) + ea read req: L2-EA Read (Requests) + ea write req: L2-EA Write (Requests) + ea atomic req: L2-EA Atomic (Requests) + ea read lat - cycles: L2-EA Read Latency (Cycles) + ea write lat - cycles: L2-EA Write Latency (Cycles) + ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) + ea read stall - io: L2-EA Read Stall - IO (Cycles per) + ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) + ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) + ea write stall - io: L2-EA Write Stall - IO (Cycles per) + ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) + ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) + ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) + tips: Tips + metric: + '0': + hit rate: AVG((((100 * TCC_HIT[0]) / (TCC_HIT[0] + TCC_MISS[0])) if ((TCC_HIT[0] + + TCC_MISS[0]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[0]) / $denom)) + read req: AVG((TO_INT(TCC_READ[0]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[0]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[0]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[0]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[0]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[0]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[0] / TCC_EA_RDREQ[0]) if (TCC_EA_RDREQ[0] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[0] / TCC_EA_WRREQ[0]) if (TCC_EA_WRREQ[0] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[0] / TCC_EA_ATOMIC[0]) if + (TCC_EA_ATOMIC[0] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) / $denom)) + tips: + '1': + hit rate: AVG((((100 * TCC_HIT[1]) / (TCC_HIT[1] + TCC_MISS[1])) if ((TCC_HIT[1] + + TCC_MISS[1]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[1]) / $denom)) + read req: AVG((TO_INT(TCC_READ[1]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[1]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[1]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[1]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[1]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[1]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[1] / TCC_EA_RDREQ[1]) if (TCC_EA_RDREQ[1] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[1] / TCC_EA_WRREQ[1]) if (TCC_EA_WRREQ[1] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[1] / TCC_EA_ATOMIC[1]) if + (TCC_EA_ATOMIC[1] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1]) / $denom)) + tips: + '2': + hit rate: AVG((((100 * TCC_HIT[2]) / (TCC_HIT[2] + TCC_MISS[2])) if ((TCC_HIT[2] + + TCC_MISS[2]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[2]) / $denom)) + read req: AVG((TO_INT(TCC_READ[2]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[2]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[2]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[2]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[2]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[2]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[2] / TCC_EA_RDREQ[2]) if (TCC_EA_RDREQ[2] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[2] / TCC_EA_WRREQ[2]) if (TCC_EA_WRREQ[2] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[2] / TCC_EA_ATOMIC[2]) if + (TCC_EA_ATOMIC[2] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2]) / $denom)) + tips: + '3': + hit rate: AVG((((100 * TCC_HIT[3]) / (TCC_HIT[3] + TCC_MISS[3])) if ((TCC_HIT[3] + + TCC_MISS[3]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[3]) / $denom)) + read req: AVG((TO_INT(TCC_READ[3]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[3]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[3]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[3]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[3]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[3]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[3] / TCC_EA_RDREQ[3]) if (TCC_EA_RDREQ[3] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[3] / TCC_EA_WRREQ[3]) if (TCC_EA_WRREQ[3] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[3] / TCC_EA_ATOMIC[3]) if + (TCC_EA_ATOMIC[3] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3]) / $denom)) + tips: + '4': + hit rate: AVG((((100 * TCC_HIT[4]) / (TCC_HIT[4] + TCC_MISS[4])) if ((TCC_HIT[4] + + TCC_MISS[4]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[4]) / $denom)) + read req: AVG((TO_INT(TCC_READ[4]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[4]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[4]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[4]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[4]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[4]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[4] / TCC_EA_RDREQ[4]) if (TCC_EA_RDREQ[4] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[4] / TCC_EA_WRREQ[4]) if (TCC_EA_WRREQ[4] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[4] / TCC_EA_ATOMIC[4]) if + (TCC_EA_ATOMIC[4] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4]) / $denom)) + tips: + '5': + hit rate: AVG((((100 * TCC_HIT[5]) / (TCC_HIT[5] + TCC_MISS[5])) if ((TCC_HIT[5] + + TCC_MISS[5]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[5]) / $denom)) + read req: AVG((TO_INT(TCC_READ[5]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[5]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[5]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[5]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[5]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[5]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[5] / TCC_EA_RDREQ[5]) if (TCC_EA_RDREQ[5] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[5] / TCC_EA_WRREQ[5]) if (TCC_EA_WRREQ[5] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[5] / TCC_EA_ATOMIC[5]) if + (TCC_EA_ATOMIC[5] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5]) / $denom)) + tips: + '6': + hit rate: AVG((((100 * TCC_HIT[6]) / (TCC_HIT[6] + TCC_MISS[6])) if ((TCC_HIT[6] + + TCC_MISS[6]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[6]) / $denom)) + read req: AVG((TO_INT(TCC_READ[6]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[6]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[6]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[6]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[6]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[6]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[6] / TCC_EA_RDREQ[6]) if (TCC_EA_RDREQ[6] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[6] / TCC_EA_WRREQ[6]) if (TCC_EA_WRREQ[6] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[6] / TCC_EA_ATOMIC[6]) if + (TCC_EA_ATOMIC[6] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6]) / $denom)) + tips: + '7': + hit rate: AVG((((100 * TCC_HIT[7]) / (TCC_HIT[7] + TCC_MISS[7])) if ((TCC_HIT[7] + + TCC_MISS[7]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[7]) / $denom)) + read req: AVG((TO_INT(TCC_READ[7]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[7]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[7]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[7]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[7]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[7]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[7] / TCC_EA_RDREQ[7]) if (TCC_EA_RDREQ[7] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[7] / TCC_EA_WRREQ[7]) if (TCC_EA_WRREQ[7] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[7] / TCC_EA_ATOMIC[7]) if + (TCC_EA_ATOMIC[7] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7]) / $denom)) + tips: + '8': + hit rate: AVG((((100 * TCC_HIT[8]) / (TCC_HIT[8] + TCC_MISS[8])) if ((TCC_HIT[8] + + TCC_MISS[8]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[8]) / $denom)) + read req: AVG((TO_INT(TCC_READ[8]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[8]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[8]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[8]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[8]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[8]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[8] / TCC_EA_RDREQ[8]) if (TCC_EA_RDREQ[8] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[8] / TCC_EA_WRREQ[8]) if (TCC_EA_WRREQ[8] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[8] / TCC_EA_ATOMIC[8]) if + (TCC_EA_ATOMIC[8] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8]) / $denom)) + tips: + '9': + hit rate: AVG((((100 * TCC_HIT[9]) / (TCC_HIT[9] + TCC_MISS[9])) if ((TCC_HIT[9] + + TCC_MISS[9]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[9]) / $denom)) + read req: AVG((TO_INT(TCC_READ[9]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[9]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[9]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[9]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[9]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[9]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[9] / TCC_EA_RDREQ[9]) if (TCC_EA_RDREQ[9] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[9] / TCC_EA_WRREQ[9]) if (TCC_EA_WRREQ[9] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[9] / TCC_EA_ATOMIC[9]) if + (TCC_EA_ATOMIC[9] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9]) / $denom)) + tips: + '10': + hit rate: AVG((((100 * TCC_HIT[10]) / (TCC_HIT[10] + TCC_MISS[10])) if ((TCC_HIT[10] + + TCC_MISS[10]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[10]) / $denom)) + read req: AVG((TO_INT(TCC_READ[10]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[10]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[10]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[10]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[10]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[10]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[10] / TCC_EA_RDREQ[10]) if (TCC_EA_RDREQ[10] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[10] / TCC_EA_WRREQ[10]) if (TCC_EA_WRREQ[10] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[10] / TCC_EA_ATOMIC[10]) if + (TCC_EA_ATOMIC[10] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10]) / $denom)) + tips: + '11': + hit rate: AVG((((100 * TCC_HIT[11]) / (TCC_HIT[11] + TCC_MISS[11])) if ((TCC_HIT[11] + + TCC_MISS[11]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[11]) / $denom)) + read req: AVG((TO_INT(TCC_READ[11]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[11]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[11]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[11]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[11]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[11]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[11] / TCC_EA_RDREQ[11]) if (TCC_EA_RDREQ[11] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[11] / TCC_EA_WRREQ[11]) if (TCC_EA_WRREQ[11] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[11] / TCC_EA_ATOMIC[11]) if + (TCC_EA_ATOMIC[11] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11]) / $denom)) + tips: + '12': + hit rate: AVG((((100 * TCC_HIT[12]) / (TCC_HIT[12] + TCC_MISS[12])) if ((TCC_HIT[12] + + TCC_MISS[12]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[12]) / $denom)) + read req: AVG((TO_INT(TCC_READ[12]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[12]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[12]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[12]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[12]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[12]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[12] / TCC_EA_RDREQ[12]) if (TCC_EA_RDREQ[12] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[12] / TCC_EA_WRREQ[12]) if (TCC_EA_WRREQ[12] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[12] / TCC_EA_ATOMIC[12]) if + (TCC_EA_ATOMIC[12] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12]) / $denom)) + tips: + '13': + hit rate: AVG((((100 * TCC_HIT[13]) / (TCC_HIT[13] + TCC_MISS[13])) if ((TCC_HIT[13] + + TCC_MISS[13]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[13]) / $denom)) + read req: AVG((TO_INT(TCC_READ[13]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[13]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[13]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[13]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[13]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[13]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[13] / TCC_EA_RDREQ[13]) if (TCC_EA_RDREQ[13] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[13] / TCC_EA_WRREQ[13]) if (TCC_EA_WRREQ[13] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[13] / TCC_EA_ATOMIC[13]) if + (TCC_EA_ATOMIC[13] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13]) / $denom)) + tips: + '14': + hit rate: AVG((((100 * TCC_HIT[14]) / (TCC_HIT[14] + TCC_MISS[14])) if ((TCC_HIT[14] + + TCC_MISS[14]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[14]) / $denom)) + read req: AVG((TO_INT(TCC_READ[14]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[14]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[14]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[14]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[14]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[14]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[14] / TCC_EA_RDREQ[14]) if (TCC_EA_RDREQ[14] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[14] / TCC_EA_WRREQ[14]) if (TCC_EA_WRREQ[14] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[14] / TCC_EA_ATOMIC[14]) if + (TCC_EA_ATOMIC[14] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14]) / $denom)) + tips: + '15': + hit rate: AVG((((100 * TCC_HIT[15]) / (TCC_HIT[15] + TCC_MISS[15])) if ((TCC_HIT[15] + + TCC_MISS[15]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[15]) / $denom)) + read req: AVG((TO_INT(TCC_READ[15]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[15]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[15]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[15]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[15]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[15]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[15] / TCC_EA_RDREQ[15]) if (TCC_EA_RDREQ[15] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[15] / TCC_EA_WRREQ[15]) if (TCC_EA_WRREQ[15] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[15] / TCC_EA_ATOMIC[15]) if + (TCC_EA_ATOMIC[15] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15]) / $denom)) + tips: + - metric_table: + id: 1803 + title: Channel 16-31 + columnwise: True + header: + channel: Channel + hit rate: L2 Cache Hit Rate (%) + req: Requests (Requests) + read req: L1-L2 Read (Requests) + write req: L1-L2 Write (Requests) + atomic req: L1-L2 Atomic (Requests) + ea read req: L2-EA Read (Requests) + ea write req: L2-EA Write (Requests) + ea atomic req: L2-EA Atomic (Requests) + ea read lat - cycles: L2-EA Read Latency (Cycles) + ea write lat - cycles: L2-EA Write Latency (Cycles) + ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) + ea read stall - io: L2-EA Read Stall - IO (Cycles per) + ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) + ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) + ea write stall - io: L2-EA Write Stall - IO (Cycles per) + ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) + ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) + ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) + tips: Tips + metric: + '16': + hit rate: AVG((((100 * TCC_HIT[16]) / (TCC_HIT[16] + TCC_MISS[16])) if ((TCC_HIT[16] + + TCC_MISS[16]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[16]) / $denom)) + read req: AVG((TO_INT(TCC_READ[16]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[16]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[16]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[16]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[16]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[16]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[16] / TCC_EA_RDREQ[16]) if (TCC_EA_RDREQ[16] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[16] / TCC_EA_WRREQ[16]) if (TCC_EA_WRREQ[16] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[16] / TCC_EA_ATOMIC[16]) if + (TCC_EA_ATOMIC[16] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16]) / $denom)) + tips: + '17': + hit rate: AVG((((100 * TCC_HIT[17]) / (TCC_HIT[17] + TCC_MISS[17])) if ((TCC_HIT[17] + + TCC_MISS[17]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[17]) / $denom)) + read req: AVG((TO_INT(TCC_READ[17]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[17]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[17]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[17]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[17]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[17]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[17] / TCC_EA_RDREQ[17]) if (TCC_EA_RDREQ[17] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[17] / TCC_EA_WRREQ[17]) if (TCC_EA_WRREQ[17] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[17] / TCC_EA_ATOMIC[17]) if + (TCC_EA_ATOMIC[17] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17]) / $denom)) + tips: + '18': + hit rate: AVG((((100 * TCC_HIT[18]) / (TCC_HIT[18] + TCC_MISS[18])) if ((TCC_HIT[18] + + TCC_MISS[18]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[18]) / $denom)) + read req: AVG((TO_INT(TCC_READ[18]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[18]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[18]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[18]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[18]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[18]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[18] / TCC_EA_RDREQ[18]) if (TCC_EA_RDREQ[18] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[18] / TCC_EA_WRREQ[18]) if (TCC_EA_WRREQ[18] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[18] / TCC_EA_ATOMIC[18]) if + (TCC_EA_ATOMIC[18] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18]) / $denom)) + tips: + '19': + hit rate: AVG((((100 * TCC_HIT[19]) / (TCC_HIT[19] + TCC_MISS[19])) if ((TCC_HIT[19] + + TCC_MISS[19]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[19]) / $denom)) + read req: AVG((TO_INT(TCC_READ[19]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[19]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[19]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[19]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[19]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[19]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[19] / TCC_EA_RDREQ[19]) if (TCC_EA_RDREQ[19] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[19] / TCC_EA_WRREQ[19]) if (TCC_EA_WRREQ[19] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[19] / TCC_EA_ATOMIC[19]) if + (TCC_EA_ATOMIC[19] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19]) / $denom)) + tips: + '20': + hit rate: AVG((((100 * TCC_HIT[20]) / (TCC_HIT[20] + TCC_MISS[20])) if ((TCC_HIT[20] + + TCC_MISS[20]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[20]) / $denom)) + read req: AVG((TO_INT(TCC_READ[20]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[20]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[20]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[20]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[20]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[20]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[20] / TCC_EA_RDREQ[20]) if (TCC_EA_RDREQ[20] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[20] / TCC_EA_WRREQ[20]) if (TCC_EA_WRREQ[20] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[20] / TCC_EA_ATOMIC[20]) if + (TCC_EA_ATOMIC[20] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20]) / $denom)) + tips: + '21': + hit rate: AVG((((100 * TCC_HIT[21]) / (TCC_HIT[21] + TCC_MISS[21])) if ((TCC_HIT[21] + + TCC_MISS[21]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[21]) / $denom)) + read req: AVG((TO_INT(TCC_READ[21]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[21]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[21]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[21]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[21]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[21]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[21] / TCC_EA_RDREQ[21]) if (TCC_EA_RDREQ[21] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[21] / TCC_EA_WRREQ[21]) if (TCC_EA_WRREQ[21] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[21] / TCC_EA_ATOMIC[21]) if + (TCC_EA_ATOMIC[21] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21]) / $denom)) + tips: + '22': + hit rate: AVG((((100 * TCC_HIT[22]) / (TCC_HIT[22] + TCC_MISS[22])) if ((TCC_HIT[22] + + TCC_MISS[22]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[22]) / $denom)) + read req: AVG((TO_INT(TCC_READ[22]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[22]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[22]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[22]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[22]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[22]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[22] / TCC_EA_RDREQ[22]) if (TCC_EA_RDREQ[22] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[22] / TCC_EA_WRREQ[22]) if (TCC_EA_WRREQ[22] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[22] / TCC_EA_ATOMIC[22]) if + (TCC_EA_ATOMIC[22] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22]) / $denom)) + tips: + '23': + hit rate: AVG((((100 * TCC_HIT[23]) / (TCC_HIT[23] + TCC_MISS[23])) if ((TCC_HIT[23] + + TCC_MISS[23]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[23]) / $denom)) + read req: AVG((TO_INT(TCC_READ[23]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[23]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[23]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[23]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[23]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[23]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[23] / TCC_EA_RDREQ[23]) if (TCC_EA_RDREQ[23] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[23] / TCC_EA_WRREQ[23]) if (TCC_EA_WRREQ[23] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[23] / TCC_EA_ATOMIC[23]) if + (TCC_EA_ATOMIC[23] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23]) / $denom)) + tips: + '24': + hit rate: AVG((((100 * TCC_HIT[24]) / (TCC_HIT[24] + TCC_MISS[24])) if ((TCC_HIT[24] + + TCC_MISS[24]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[24]) / $denom)) + read req: AVG((TO_INT(TCC_READ[24]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[24]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[24]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[24]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[24]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[24]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[24] / TCC_EA_RDREQ[24]) if (TCC_EA_RDREQ[24] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[24] / TCC_EA_WRREQ[24]) if (TCC_EA_WRREQ[24] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[24] / TCC_EA_ATOMIC[24]) if + (TCC_EA_ATOMIC[24] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24]) / $denom)) + tips: + '25': + hit rate: AVG((((100 * TCC_HIT[25]) / (TCC_HIT[25] + TCC_MISS[25])) if ((TCC_HIT[25] + + TCC_MISS[25]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[25]) / $denom)) + read req: AVG((TO_INT(TCC_READ[25]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[25]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[25]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[25]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[25]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[25]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[25] / TCC_EA_RDREQ[25]) if (TCC_EA_RDREQ[25] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[25] / TCC_EA_WRREQ[25]) if (TCC_EA_WRREQ[25] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[25] / TCC_EA_ATOMIC[25]) if + (TCC_EA_ATOMIC[25] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25]) / $denom)) + tips: + '26': + hit rate: AVG((((100 * TCC_HIT[26]) / (TCC_HIT[26] + TCC_MISS[26])) if ((TCC_HIT[26] + + TCC_MISS[26]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[26]) / $denom)) + read req: AVG((TO_INT(TCC_READ[26]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[26]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[26]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[26]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[26]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[26]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[26] / TCC_EA_RDREQ[26]) if (TCC_EA_RDREQ[26] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[26] / TCC_EA_WRREQ[26]) if (TCC_EA_WRREQ[26] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[26] / TCC_EA_ATOMIC[26]) if + (TCC_EA_ATOMIC[26] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26]) / $denom)) + tips: + '27': + hit rate: AVG((((100 * TCC_HIT[27]) / (TCC_HIT[27] + TCC_MISS[27])) if ((TCC_HIT[27] + + TCC_MISS[27]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[27]) / $denom)) + read req: AVG((TO_INT(TCC_READ[27]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[27]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[27]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[27]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[27]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[27]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[27] / TCC_EA_RDREQ[27]) if (TCC_EA_RDREQ[27] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[27] / TCC_EA_WRREQ[27]) if (TCC_EA_WRREQ[27] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[27] / TCC_EA_ATOMIC[27]) if + (TCC_EA_ATOMIC[27] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27]) / $denom)) + tips: + '28': + hit rate: AVG((((100 * TCC_HIT[28]) / (TCC_HIT[28] + TCC_MISS[28])) if ((TCC_HIT[28] + + TCC_MISS[28]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[28]) / $denom)) + read req: AVG((TO_INT(TCC_READ[28]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[28]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[28]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[28]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[28]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[28]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[28] / TCC_EA_RDREQ[28]) if (TCC_EA_RDREQ[28] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[28] / TCC_EA_WRREQ[28]) if (TCC_EA_WRREQ[28] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[28] / TCC_EA_ATOMIC[28]) if + (TCC_EA_ATOMIC[28] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28]) / $denom)) + tips: + '29': + hit rate: AVG((((100 * TCC_HIT[29]) / (TCC_HIT[29] + TCC_MISS[29])) if ((TCC_HIT[29] + + TCC_MISS[29]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[29]) / $denom)) + read req: AVG((TO_INT(TCC_READ[29]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[29]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[29]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[29]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[29]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[29]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[29] / TCC_EA_RDREQ[29]) if (TCC_EA_RDREQ[29] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[29] / TCC_EA_WRREQ[29]) if (TCC_EA_WRREQ[29] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[29] / TCC_EA_ATOMIC[29]) if + (TCC_EA_ATOMIC[29] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29]) / $denom)) + tips: + '30': + hit rate: AVG((((100 * TCC_HIT[30]) / (TCC_HIT[30] + TCC_MISS[30])) if ((TCC_HIT[30] + + TCC_MISS[30]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[30]) / $denom)) + read req: AVG((TO_INT(TCC_READ[30]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[30]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[30]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[30]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[30]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[30]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[30] / TCC_EA_RDREQ[30]) if (TCC_EA_RDREQ[30] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[30] / TCC_EA_WRREQ[30]) if (TCC_EA_WRREQ[30] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[30] / TCC_EA_ATOMIC[30]) if + (TCC_EA_ATOMIC[30] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30]) / $denom)) + tips: + '31': + hit rate: AVG((((100 * TCC_HIT[31]) / (TCC_HIT[31] + TCC_MISS[31])) if ((TCC_HIT[31] + + TCC_MISS[31]) != 0) else None)) + req: AVG((TO_INT(TCC_REQ[31]) / $denom)) + read req: AVG((TO_INT(TCC_READ[31]) / $denom)) + write req: AVG((TO_INT(TCC_WRITE[31]) / $denom)) + atomic req: AVG((TO_INT(TCC_ATOMIC[31]) / $denom)) + ea read req: AVG((TO_INT(TCC_EA_RDREQ[31]) / $denom)) + ea write req: AVG((TO_INT(TCC_EA_WRREQ[31]) / $denom)) + ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[31]) / $denom)) + ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[31] / TCC_EA_RDREQ[31]) if (TCC_EA_RDREQ[31] + != 0) else None)) + ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[31] / TCC_EA_WRREQ[31]) if (TCC_EA_WRREQ[31] + != 0) else None)) + ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[31] / TCC_EA_ATOMIC[31]) if + (TCC_EA_ATOMIC[31] != 0) else None)) + ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31]) / $denom)) + ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31]) / $denom)) + ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31]) / $denom)) + ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31]) / $denom)) + ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31]) / $denom)) + ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31]) / $denom)) + ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31]) / $denom)) + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/1900_memory_chart.yaml b/src/omniperf_analyze-old/configs/gfx90a/1900_memory_chart.yaml new file mode 100644 index 000000000..c0d086f12 --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/1900_memory_chart.yaml @@ -0,0 +1,259 @@ +--- +# Add description/tips for each metric in this section. +# So it could be shown in hover. +Metric Description: + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 1900 + title: Memory Chart Analysis + data source: + - metric_table: + id: 1901 + title: # subtitle for this table(optional) + header: + metric: Metric + value: Value + alias: Alias + tips: Tips + metric: + Wave Life: + value: ROUND(AVG(((4 * (SQ_WAVE_CYCLES / SQ_WAVES)) if (SQ_WAVES != 0) else + None)), 0) + alias: wave_life_ + tips: + Active CUs: + value: CONCAT(CONCAT($numActiveCUs, "/"), $numCU) + alias: active_cu_ + tips: + SALU: + value: ROUND(AVG((SQ_INSTS_SALU / $denom)), 0) + alias: salu_ + tips: + SMEM: + value: ROUND(AVG((SQ_INSTS_SMEM / $denom)), 0) + alias: smem_ + tips: + VALU: + value: ROUND(AVG((SQ_INSTS_VALU / $denom)), 0) + alias: valu_ + tips: + MFMA: + value: ROUND(AVG((SQ_INSTS_MFMA / $denom)), 0) + alias: mfma_ + tips: + VMEM: + value: ROUND(AVG((SQ_INSTS_VMEM / $denom)), 0) + alias: vmem_ + tips: + LDS: + value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) + alias: lds_ + tips: + GWS: + value: ROUND(AVG((SQ_INSTS_GDS / $denom)), 0) + alias: gws_ + tips: + BR: + value: ROUND(AVG((SQ_INSTS_BRANCH / $denom)), 0) + alias: br_ + tips: + VGPR: + value: ROUND(AVG(vgpr), 0) + alias: vgpr_ + tips: + SGPR: + value: ROUND(AVG(sgpr), 0) + alias: sgpr_ + tips: + LDS Allocation: + value: ROUND(AVG(lds), 0) + alias: lds_alloc_ + tips: + Scratch Allocation: + value: ROUND(AVG(scr), 0) + alias: scratch_alloc_ + tips: + Wavefronts: + value: ROUND(AVG(SPI_CSN_WAVE), 0) + alias: wavefronts_ + tips: + Workgroups: + value: ROUND(AVG(SPI_CSN_NUM_THREADGROUPS), 0) + alias: workgroups_ + tips: + LDS Req: + value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) + alias: lds_req_ + tips: + IL1 Fetch: + value: ROUND(AVG((SQC_ICACHE_REQ / $denom)), 0) + alias: il1_fetch_ + tips: + IL1 Hit: + value: ROUND((AVG((SQC_ICACHE_HITS / SQC_ICACHE_REQ)) * 100), 0) + alias: il1_hit_ + tips: + IL1_L2 Rd: + value: ROUND(AVG((SQC_TC_INST_REQ / $denom)), 0) + alias: il1_l2_req_ + tips: + vL1D Rd: + value: ROUND(AVG((SQC_DCACHE_REQ / $denom)), 0) + alias: sl1_rd_ + tips: + vL1D Hit: + value: ROUND((AVG(((SQC_DCACHE_HITS / SQC_DCACHE_REQ) if (SQC_DCACHE_REQ != + 0) else None)) * 100), 0) + alias: sl1_hit_ + tips: + vL1D_L2 Rd: + value: ROUND(AVG((SQC_TC_DATA_READ_REQ / $denom)), 0) + alias: sl1_l2_rd_ + tips: + vL1D_L2 Wr: + value: ROUND(AVG((SQC_TC_DATA_WRITE_REQ / $denom)), 0) + alias: sl1_l2_wr_ + tips: + vL1D_L2 Atomic: + value: ROUND(AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)), 0) + alias: sl1_l2_atom_ + tips: + VL1 Rd: + value: ROUND(AVG((TCP_TOTAL_READ_sum / $denom)), 0) + alias: vl1_rd_ + tips: + VL1 Wr: + value: ROUND(AVG((TCP_TOTAL_WRITE_sum / $denom)), 0) + alias: vl1_wr_ + tips: + VL1 Atomic: + value: ROUND(AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) + / $denom)), 0) + alias: vl1_atom_ + tips: + VL1 Hit: + value: ROUND(AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) + / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else + None)), 0) + alias: vl1_hit_ + tips: + VL1 Lat: + value: ROUND(AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum + != 0) else None)), 0) + alias: vl1_lat_ + tips: + VL1_L2 Rd: + value: ROUND(AVG((TCP_TCC_READ_REQ_sum / $denom)), 0) + alias: vl1_l2_rd_ + tips: + VL1_L2 Wr: + value: ROUND(AVG((TCP_TCC_WRITE_REQ_sum / $denom)), 0) + alias: vl1_l2_wr_ + tips: + vL1_L2 Atomic: + value: ROUND(AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + / $denom)), 0) + alias: vl1_l2_atom_ + tips: + L2 Rd: + value: ROUND(AVG((TCC_READ_sum / $denom)), 0) + alias: l2_rd_ + tips: + L2 Wr: + value: ROUND(AVG((TCC_WRITE_sum / $denom)), 0) + alias: l2_wr_ + tips: + L2 Atomic: + value: ROUND(AVG((TCC_ATOMIC_sum / $denom)), 0) + alias: l2_atom_ + tips: + L2 Hit: + value: ROUND(AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum + + TCC_MISS_sum) != 0) else None)), 0) + alias: l2_hit_ + tips: + L2 Rd Lat: + value: ROUND(AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) + if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)), + 0) + alias: l2_rd_lat_ + tips: + L2 Wr Lat: + value: ROUND(AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) + != 0) else None)), 0) + alias: l2_wr_lat_ + tips: + Fabric Rd Lat: + value: ROUND(AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum + != 0) else None)), 0) + alias: fabric_rd_lat_ + tips: + Fabric Wr Lat: + value: ROUND(AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum + != 0) else None)), 0) + alias: fabric_wr_lat_ + tips: + Fabric Atomic Lat: + value: ROUND(AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum + != 0) else None)), 0) + alias: fabric_atom_lat_ + tips: + Fabric_L2 Rd: + value: ROUND(AVG((TCC_EA_RDREQ_sum / $denom)), 0) + alias: l2_fabric_rd_ + tips: + Fabric_L2 Wr: + value: ROUND(AVG((TCC_EA_WRREQ_sum / $denom)), 0) + alias: l2_fabric_wr_ + tips: + Fabric_l2 Atomic: + value: ROUND(AVG((TCC_EA_ATOMIC_sum / $denom)), 0) + alias: l2_fabric_atom_ + tips: + HBM Rd: + value: ROUND(AVG((TCC_EA_RDREQ_DRAM_sum / $denom)), 0) + alias: hbm_rd_ + tips: + HBM Wr: + value: ROUND(AVG((TCC_EA_WRREQ_DRAM_sum / $denom)), 0) + alias: hbm_wr_ + tips: + LDS Util: + value: ROUND(AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))), + 0) + alias: lds_util_ + tips: + VL1 Coalesce: + value: ROUND(AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum + * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else 0)), 0) + alias: vl1_coales_ + tips: + VL1 Stall: + value: ROUND(AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) + if (TCP_GATE_EN1_sum != 0) else None)), 0) + alias: vl1_stall_ + tips: + LDS Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) + if (SQ_INSTS_LDS != 0) else None)), 0) + alias: lds_lat_ + coll_level: SQ_INST_LEVEL_LDS + tips: + vL1D Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_DCACHE_REQ) + if (SQC_DCACHE_REQ != 0) else None)), 0) + alias: sl1_lat_ + tips: + IL1 Lat: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_ICACHE_REQ) + if (SQC_ICACHE_REQ != 0) else None)), 0) + alias: il1_lat_ + tips: + Wave Occupancy: + value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / $numActiveCUs)), 0) + alias: wave_occ_ + coll_level: SQ_LEVEL_WAVES + tips: diff --git a/src/omniperf_analyze-old/configs/gfx90a/2000_kernels.yaml b/src/omniperf_analyze-old/configs/gfx90a/2000_kernels.yaml new file mode 100644 index 000000000..ed566f75a --- /dev/null +++ b/src/omniperf_analyze-old/configs/gfx90a/2000_kernels.yaml @@ -0,0 +1,8 @@ +--- +Panel Config: + id: 2000 + title: Kernels + data source: + - raw_csv_table: + id: 2001 + source: pmc_dispatch_info.csv diff --git a/src/omniperf_analyze-old/configs/panel_config_template.yaml b/src/omniperf_analyze-old/configs/panel_config_template.yaml new file mode 100644 index 000000000..e241896b4 --- /dev/null +++ b/src/omniperf_analyze-old/configs/panel_config_template.yaml @@ -0,0 +1,51 @@ +--- +# +# Rules to define a panel and its data sources: +# - Each panel has its own yaml file. +# - Each yaml file has 2 sections: (1) Description Details. (2) Panel Config. +# - id for each panel/ data_source has to be unique. +# - The data source of panel support only: raw_csv_table and metric_table for now. +# - For raw_csv_table, data will be loaded from the specified csv file directly, +# and may be sorted. +# - For metric_table, the number of entries of each metric must match of +# the number of entries of table header. The metric can be raw pmc counters +# or an expression derived from them. The key keyword of the metric has to be +# one defined in parser.supported_field, i.e. "Value", "Min", "Max", "Avg" etc. +# + +Metric Description: + METRIC01: &METRIC01_anchor Scalar Arithmetic Logic Unit + +# Define the panel properties and properties of each metric in the panel. +Panel Config: + id: 800 + title: # define panel title to display + data source: + # Metric table sample + - metric_table: + id: 801 + title: # subtitle for this table(optional) + header: + metric: Metric + value: Value + unit: Unit + peak: Peak + pop: PoP + tips: Tips + metric: + METRIC01: + value: AVG(100 * SQ_ACTIVE_INST_SCA / ( GRBM_GUI_ACTIVE * $numCU )) + unit: pct + peak: 100 + pop: AVG(100* SQ_ACTIVE_INST_SCA/(GRBM_GUI_ACTIVE*$numCU)) + tips: *METRIC01_anchor + METRIC02: + value: AVG(100 * SQ_ACTIVE_INST_VALU / ( GRBM_GUI_ACTIVE * $numCU)) + unit: pct + peak: 100 + pop: AVG(100* SQ_ACTIVE_INST_VALU/(GRBM_GUI_ACTIVE*$numCU)) + tips: + # CSV table sample + - raw_csv_table: + id: 802 + source: abc.csv diff --git a/src/omniperf_analyze/convertor/mongodb/README.md b/src/omniperf_analyze-old/convertor/mongodb/README.md similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/README.md rename to src/omniperf_analyze-old/convertor/mongodb/README.md diff --git a/src/omniperf_analyze/convertor/mongodb/convert b/src/omniperf_analyze-old/convertor/mongodb/convert similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/convert rename to src/omniperf_analyze-old/convertor/mongodb/convert diff --git a/src/omniperf_analyze/convertor/mongodb/modified_query/00_id_159_SYSTEM-INFO.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/modified_query/00_id_159_SYSTEM-INFO.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/modified_query/00_id_159_SYSTEM-INFO.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/modified_query/00_id_159_SYSTEM-INFO.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/modified_query/02_id_110_SPEED-OF-LIGHT.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/modified_query/02_id_110_SPEED-OF-LIGHT.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/modified_query/02_id_110_SPEED-OF-LIGHT.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/modified_query/02_id_110_SPEED-OF-LIGHT.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/modified_query/03_id_175_DISPATCH-IDS-CURRENT.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/modified_query/03_id_175_DISPATCH-IDS-CURRENT.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/modified_query/03_id_175_DISPATCH-IDS-CURRENT.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/modified_query/03_id_175_DISPATCH-IDS-CURRENT.s0_original_query.json diff --git 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b/src/omniperf_analyze-old/convertor/mongodb/original_query/42_id_52_SCALAR-L1D-CACHE-L2-INTERFACE.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/42_id_52_SCALAR-L1D-CACHE-L2-INTERFACE.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/42_id_52_SCALAR-L1D-CACHE-L2-INTERFACE.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/44_id_132_TA.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/44_id_132_TA.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/44_id_132_TA.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/44_id_132_TA.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/45_id_134_TD.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/45_id_134_TD.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/45_id_134_TD.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/45_id_134_TD.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/47_id_165_SPEED-OF-LIGHT-VECTOR-L1D-CACHE.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/47_id_165_SPEED-OF-LIGHT-VECTOR-L1D-CACHE.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/47_id_165_SPEED-OF-LIGHT-VECTOR-L1D-CACHE.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/47_id_165_SPEED-OF-LIGHT-VECTOR-L1D-CACHE.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/48_id_116_VECTOR-L1D-CACHE-STALLS.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/48_id_116_VECTOR-L1D-CACHE-STALLS.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/48_id_116_VECTOR-L1D-CACHE-STALLS.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/48_id_116_VECTOR-L1D-CACHE-STALLS.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/49_id_128_VECTOR-L1D-CACHE-ACCESSES.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/49_id_128_VECTOR-L1D-CACHE-ACCESSES.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/49_id_128_VECTOR-L1D-CACHE-ACCESSES.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/49_id_128_VECTOR-L1D-CACHE-ACCESSES.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/50_id_120_VECTOR-L1D-L2-TRANSACTIONS-REQ-NORMUNIT.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/50_id_120_VECTOR-L1D-L2-TRANSACTIONS-REQ-NORMUNIT.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/50_id_120_VECTOR-L1D-L2-TRANSACTIONS-REQ-NORMUNIT.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/50_id_120_VECTOR-L1D-L2-TRANSACTIONS-REQ-NORMUNIT.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/51_id_124_VECTOR-L1D-ADDR-TRANSLATION.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/51_id_124_VECTOR-L1D-ADDR-TRANSLATION.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/51_id_124_VECTOR-L1D-ADDR-TRANSLATION.s0_original_query.json rename to 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src/omniperf_analyze/convertor/mongodb/original_query/54_id_62_L2-FABRIC-TRANSACTIONS.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/54_id_62_L2-FABRIC-TRANSACTIONS.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/55_id_58_L2-CACHE-ACCESSES.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/55_id_58_L2-CACHE-ACCESSES.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/55_id_58_L2-CACHE-ACCESSES.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/55_id_58_L2-CACHE-ACCESSES.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/56_id_60_L2-FABRIC-INTERFACE-STALLS-CYCLES-NORMUNIT.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/56_id_60_L2-FABRIC-INTERFACE-STALLS-CYCLES-NORMUNIT.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/56_id_60_L2-FABRIC-INTERFACE-STALLS-CYCLES-NORMUNIT.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/56_id_60_L2-FABRIC-INTERFACE-STALLS-CYCLES-NORMUNIT.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/58_id_314_AGGREGATE-STATS-ALL-32-CHANNELS.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/58_id_314_AGGREGATE-STATS-ALL-32-CHANNELS.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/58_id_314_AGGREGATE-STATS-ALL-32-CHANNELS.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/58_id_314_AGGREGATE-STATS-ALL-32-CHANNELS.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/73_id_68_L2-EA-READ-LATENCY-CHANNEL-0-15-CYCLES.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/73_id_68_L2-EA-READ-LATENCY-CHANNEL-0-15-CYCLES.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/73_id_68_L2-EA-READ-LATENCY-CHANNEL-0-15-CYCLES.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/73_id_68_L2-EA-READ-LATENCY-CHANNEL-0-15-CYCLES.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/original_query/74_id_70_L2-EA-READ-LATENCY-CHANNEL-16-31-CYCLES.s0_original_query.json b/src/omniperf_analyze-old/convertor/mongodb/original_query/74_id_70_L2-EA-READ-LATENCY-CHANNEL-16-31-CYCLES.s0_original_query.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/original_query/74_id_70_L2-EA-READ-LATENCY-CHANNEL-16-31-CYCLES.s0_original_query.json rename to src/omniperf_analyze-old/convertor/mongodb/original_query/74_id_70_L2-EA-READ-LATENCY-CHANNEL-16-31-CYCLES.s0_original_query.json diff --git a/src/omniperf_analyze/convertor/mongodb/sample.json b/src/omniperf_analyze-old/convertor/mongodb/sample.json similarity index 100% rename from src/omniperf_analyze/convertor/mongodb/sample.json rename to src/omniperf_analyze-old/convertor/mongodb/sample.json diff --git a/src/omniperf_analyze/convertor/sql/1001_TA.config b/src/omniperf_analyze-old/convertor/sql/1001_TA.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/1001_TA.config rename to src/omniperf_analyze-old/convertor/sql/1001_TA.config diff --git a/src/omniperf_analyze/convertor/sql/1002_TD.config b/src/omniperf_analyze-old/convertor/sql/1002_TD.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/1002_TD.config rename to src/omniperf_analyze-old/convertor/sql/1002_TD.config diff --git a/src/omniperf_analyze/convertor/sql/100_System-speed-of-light.config b/src/omniperf_analyze-old/convertor/sql/100_System-speed-of-light.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/100_System-speed-of-light.config rename to src/omniperf_analyze-old/convertor/sql/100_System-speed-of-light.config diff --git a/src/omniperf_analyze/convertor/sql/401_CPF.config b/src/omniperf_analyze-old/convertor/sql/401_CPF.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/401_CPF.config rename to src/omniperf_analyze-old/convertor/sql/401_CPF.config diff --git a/src/omniperf_analyze/convertor/sql/402_CPC.config b/src/omniperf_analyze-old/convertor/sql/402_CPC.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/402_CPC.config rename to src/omniperf_analyze-old/convertor/sql/402_CPC.config diff --git a/src/omniperf_analyze/convertor/sql/501_SPI-Stats.config b/src/omniperf_analyze-old/convertor/sql/501_SPI-Stats.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/501_SPI-Stats.config rename to src/omniperf_analyze-old/convertor/sql/501_SPI-Stats.config diff --git a/src/omniperf_analyze/convertor/sql/502_SPI-Resource-Allocation.config b/src/omniperf_analyze-old/convertor/sql/502_SPI-Resource-Allocation.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/502_SPI-Resource-Allocation.config rename to src/omniperf_analyze-old/convertor/sql/502_SPI-Resource-Allocation.config diff --git a/src/omniperf_analyze/convertor/sql/801_LDS.config b/src/omniperf_analyze-old/convertor/sql/801_LDS.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/801_LDS.config rename to src/omniperf_analyze-old/convertor/sql/801_LDS.config diff --git a/src/omniperf_analyze/convertor/sql/901_L1I_cache.config b/src/omniperf_analyze-old/convertor/sql/901_L1I_cache.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/901_L1I_cache.config rename to src/omniperf_analyze-old/convertor/sql/901_L1I_cache.config diff --git a/src/omniperf_analyze/convertor/sql/902_L1K_cache.config b/src/omniperf_analyze-old/convertor/sql/902_L1K_cache.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/902_L1K_cache.config rename to src/omniperf_analyze-old/convertor/sql/902_L1K_cache.config diff --git a/src/omniperf_analyze/convertor/sql/903_L1K_TC_Interface.config b/src/omniperf_analyze-old/convertor/sql/903_L1K_TC_Interface.config similarity index 100% rename from src/omniperf_analyze/convertor/sql/903_L1K_TC_Interface.config rename to src/omniperf_analyze-old/convertor/sql/903_L1K_TC_Interface.config diff --git a/src/omniperf_analyze/convertor/sql/convertor.py b/src/omniperf_analyze-old/convertor/sql/convertor.py similarity index 100% rename from src/omniperf_analyze/convertor/sql/convertor.py rename to src/omniperf_analyze-old/convertor/sql/convertor.py diff --git a/src/omniperf_analyze/convertor/sql/convertor2.py b/src/omniperf_analyze-old/convertor/sql/convertor2.py similarity index 100% rename from src/omniperf_analyze/convertor/sql/convertor2.py rename to src/omniperf_analyze-old/convertor/sql/convertor2.py diff --git a/src/omniperf_analyze-old/customized/fft/panel_000_top_stat.yaml b/src/omniperf_analyze-old/customized/fft/panel_000_top_stat.yaml new file mode 100644 index 000000000..077004080 --- /dev/null +++ b/src/omniperf_analyze-old/customized/fft/panel_000_top_stat.yaml @@ -0,0 +1,8 @@ +--- +Panel Config: + id: 000 + title: Top Stat + data source: + - raw_csv_table: + id: 001 + source: pmc_kernel_top.csv diff --git a/src/omniperf_analyze/customized/fft/panel_100_system-speed-of-light.yaml b/src/omniperf_analyze-old/customized/fft/panel_100_system-speed-of-light.yaml similarity index 100% rename from src/omniperf_analyze/customized/fft/panel_100_system-speed-of-light.yaml rename to src/omniperf_analyze-old/customized/fft/panel_100_system-speed-of-light.yaml diff --git a/src/omniperf_analyze/doc/baseline_comparison.png b/src/omniperf_analyze-old/doc/baseline_comparison.png similarity index 100% rename from src/omniperf_analyze/doc/baseline_comparison.png rename to src/omniperf_analyze-old/doc/baseline_comparison.png diff --git a/src/omniperf_analyze/doc/classes.png b/src/omniperf_analyze-old/doc/classes.png similarity index 100% rename from src/omniperf_analyze/doc/classes.png rename to src/omniperf_analyze-old/doc/classes.png diff --git a/src/omniperf_analyze/doc/main_flow.png b/src/omniperf_analyze-old/doc/main_flow.png similarity index 100% rename from src/omniperf_analyze/doc/main_flow.png rename to src/omniperf_analyze-old/doc/main_flow.png diff --git a/src/omniperf_analyze/omniperf_analyze.py b/src/omniperf_analyze-old/omniperf_analyze.py similarity index 100% rename from src/omniperf_analyze/omniperf_analyze.py rename to src/omniperf_analyze-old/omniperf_analyze.py diff --git a/src/omniperf_analyze/tests/unit/ast_parser_tester.py b/src/omniperf_analyze-old/tests/unit/ast_parser_tester.py similarity index 100% rename from src/omniperf_analyze/tests/unit/ast_parser_tester.py rename to src/omniperf_analyze-old/tests/unit/ast_parser_tester.py diff --git a/src/omniperf_analyze/tests/unit/config/100_if_else.yaml b/src/omniperf_analyze-old/tests/unit/config/100_if_else.yaml similarity index 100% rename from src/omniperf_analyze/tests/unit/config/100_if_else.yaml rename to src/omniperf_analyze-old/tests/unit/config/100_if_else.yaml diff --git a/src/omniperf_analyze/tests/unit/config/100_more_cases.yaml b/src/omniperf_analyze-old/tests/unit/config/100_more_cases.yaml similarity index 100% rename from src/omniperf_analyze/tests/unit/config/100_more_cases.yaml rename to src/omniperf_analyze-old/tests/unit/config/100_more_cases.yaml diff --git a/src/omniperf_analyze/tests/unit/config/build-in/00_id_00_build_in_variables.s4_converted_table.yaml b/src/omniperf_analyze-old/tests/unit/config/build-in/00_id_00_build_in_variables.s4_converted_table.yaml similarity index 100% rename from src/omniperf_analyze/tests/unit/config/build-in/00_id_00_build_in_variables.s4_converted_table.yaml rename to src/omniperf_analyze-old/tests/unit/config/build-in/00_id_00_build_in_variables.s4_converted_table.yaml diff --git a/src/omniperf_analyze/tests/unit/config/expr_format_tester.py b/src/omniperf_analyze-old/tests/unit/config/expr_format_tester.py similarity index 100% rename from src/omniperf_analyze/tests/unit/config/expr_format_tester.py rename to src/omniperf_analyze-old/tests/unit/config/expr_format_tester.py diff --git a/src/omniperf_analyze/utils/file_io.py b/src/omniperf_analyze-old/utils/file_io.py similarity index 100% rename from src/omniperf_analyze/utils/file_io.py rename to src/omniperf_analyze-old/utils/file_io.py diff --git a/src/omniperf_analyze/utils/gui.py b/src/omniperf_analyze-old/utils/gui.py similarity index 100% rename from src/omniperf_analyze/utils/gui.py rename to src/omniperf_analyze-old/utils/gui.py diff --git a/src/omniperf_analyze/utils/gui_components/header.py b/src/omniperf_analyze-old/utils/gui_components/header.py similarity index 100% rename from src/omniperf_analyze/utils/gui_components/header.py rename to src/omniperf_analyze-old/utils/gui_components/header.py diff --git a/src/omniperf_analyze/utils/gui_components/memchart.py b/src/omniperf_analyze-old/utils/gui_components/memchart.py similarity index 100% rename from src/omniperf_analyze/utils/gui_components/memchart.py rename to src/omniperf_analyze-old/utils/gui_components/memchart.py diff --git a/src/omniperf_analyze/utils/gui_components/roofline.py b/src/omniperf_analyze-old/utils/gui_components/roofline.py similarity index 100% rename from src/omniperf_analyze/utils/gui_components/roofline.py rename to src/omniperf_analyze-old/utils/gui_components/roofline.py diff --git a/src/omniperf_analyze/utils/parser.py b/src/omniperf_analyze-old/utils/parser.py similarity index 100% rename from src/omniperf_analyze/utils/parser.py rename to src/omniperf_analyze-old/utils/parser.py diff --git a/src/omniperf_analyze/utils/roofline_calc.py b/src/omniperf_analyze-old/utils/roofline_calc.py similarity index 100% rename from src/omniperf_analyze/utils/roofline_calc.py rename to src/omniperf_analyze-old/utils/roofline_calc.py diff --git a/src/omniperf_analyze/utils/schema.py b/src/omniperf_analyze-old/utils/schema.py similarity index 100% rename from src/omniperf_analyze/utils/schema.py rename to src/omniperf_analyze-old/utils/schema.py diff --git a/src/omniperf_analyze/utils/simple_charts.py b/src/omniperf_analyze-old/utils/simple_charts.py similarity index 100% rename from src/omniperf_analyze/utils/simple_charts.py rename to src/omniperf_analyze-old/utils/simple_charts.py diff --git a/src/omniperf_analyze/utils/tty.py b/src/omniperf_analyze-old/utils/tty.py similarity index 100% rename from src/omniperf_analyze/utils/tty.py rename to src/omniperf_analyze-old/utils/tty.py diff --git a/src/analysis_base.py b/src/omniperf_analyze/analysis_base.py similarity index 100% rename from src/analysis_base.py rename to src/omniperf_analyze/analysis_base.py diff --git a/src/analysis_cli.py b/src/omniperf_analyze/analysis_cli.py similarity index 96% rename from src/analysis_cli.py rename to src/omniperf_analyze/analysis_cli.py index e91bc14d1..a7a10e636 100644 --- a/src/analysis_cli.py +++ b/src/omniperf_analyze/analysis_cli.py @@ -23,7 +23,7 @@ ##############################################################################el import logging -from analysis_base import OmniAnalyze_Base +from omniperf_analyze.analysis_base import OmniAnalyze_Base from utils.utils import demarcate class cli_analysis(OmniAnalyze_Base): diff --git a/src/analysis_webui.py b/src/omniperf_analyze/analysis_webui.py similarity index 96% rename from src/analysis_webui.py rename to src/omniperf_analyze/analysis_webui.py index 3d7724c19..bd2b655be 100644 --- a/src/analysis_webui.py +++ b/src/omniperf_analyze/analysis_webui.py @@ -23,7 +23,7 @@ ##############################################################################el import logging -from analysis_base import OmniAnalyze_Base +from omniperf_analyze.analysis_base import OmniAnalyze_Base from utils.utils import demarcate class webui_analysis(OmniAnalyze_Base): diff --git a/src/omniperf_base.py b/src/omniperf_base.py index 1d7196fc4..d1a6e010b 100644 --- a/src/omniperf_base.py +++ b/src/omniperf_base.py @@ -26,8 +26,12 @@ import logging import sys import os -from utils.utils import demarcate, trace_logger - +from pathlib import Path +import shutil +from utils.specs import get_machine_specs +from utils.utils import demarcate, trace_logger, get_version, get_version_display, detect_rocprof +from argparser import omniarg_parser +import config class Omniperf: def __init__(self): @@ -35,28 +39,40 @@ def __init__(self): self.__profiler_mode = None self.__soc_name = None self.__soc = None + self.__version = { + "ver": None, + "ver_pretty": None, + } self.__options = {} self.setup_logging() - self.parseArgs() - - # hard-coding dummy examples (comment/uncomment below to instantiate different implementations) - self.__profiler_mode = "rocprof_v1" - self.__profiler_mode = "rocprof_v2" - #self.__profiler_mode = "rocscope" - - self.__analyze_mode = "cli" - self.__analyze_mode = "webui" + self.set_version() + self.parse_args() - # hard-code execution mode - self.__mode = "profile" - #self.__mode = "analyze" + self.__mode = self.__args.mode + if self.__mode == "profile": + self.detect_profiler() + + # self.__analyze_mode = "cli" + # self.__analyze_mode = "webui" + logging.info("Execution mode = %s" % self.__mode) - + def print_graphic(self): + """Log program name as ascii art to terminal. + """ + ascii_art = ''' + ___ _ __ + / _ \ _ __ ___ _ __ (_)_ __ ___ _ __ / _| +| | | | '_ ` _ \| '_ \| | '_ \ / _ \ '__| |_ +| |_| | | | | | | | | | | |_) | __/ | | _| + \___/|_| |_| |_|_| |_|_| .__/ \___|_| |_| + |_| +''' + logging.info(ascii_art) + def setup_logging(self): - # register a trace level logger logging.TRACE = logging.DEBUG - 5 logging.addLevelName(logging.TRACE, "TRACE") @@ -83,6 +99,12 @@ def setup_logging(self): def get_mode(self): return self.__mode + + def set_version(self): + vData = get_version(config.omniperf_home) + self.__version["ver"] = vData["version"] + self.__version["ver_pretty"] = get_version_display(vData["version"], vData["sha"], vData["mode"]) + return def error(self,message): logging.error("") @@ -90,50 +112,103 @@ def error(self,message): logging.error("") sys.exit(1) + def detect_profiler(self): + #TODO: + # Currently this will only be called in profile mode + # could we also utilize this function to detect "profiler origin" in analyze mode, + # or is there a better place to do this? + if self.__args.lucky == True or self.__args.summaries == True or self.__args.use_rocscope: + if not shutil.which("rocscope"): + logging.error("Rocscope must be in PATH") + sys.exit(1) + else: + self.__profiler_mode = "rocscope" + else: + #TODO: Add detection logic for rocprofv2 + rocprof_cmd = detect_rocprof() + self.__profiler_mode = "rocprofv1" + return + + @demarcate - def detectSoC(self): - # hard-coded example - self.__soc_name = "gfx906" - self.__soc_name = "gfx908" - self.__soc_name = "gfx90a" + def detect_soc(self): + mspec = get_machine_specs(0) + + target="" + if mspec.GPU == "gfx900": + target = "vega10" + elif mspec.GPU == "gfx906": + target = "mi50" + elif mspec.GPU == "gfx908": + target = "mi100" + elif mspec.GPU == "gfx90a": + target = "mi200" + else: + self.error("Unsupported SoC -> %s" % mspec.GPU) + + self.__soc_name = target + self.__args.target = target # instantiate underlying SoC support class - if self.__soc_name == "gfx906": - from soc_gfx906 import gfx906_soc + if self.__soc_name == "vega10": + from omniperf_soc.soc_gfx900 import gfx900_soc + self.__soc = gfx900_soc(self.__args) + elif self.__soc_name == "mi50": + from omniperf_soc.soc_gfx906 import gfx906_soc self.__soc = gfx906_soc(self.__args) - elif self.__soc_name == "gfx908": - from soc_gfx908 import gfx908_soc + elif self.__soc_name == "mi100": + from omniperf_soc.soc_gfx908 import gfx908_soc self.__soc = gfx908_soc(self.__args) - elif self.__soc_name == "gfx90a": - from soc_gfx90a import gfx90a_soc + elif self.__soc_name == "mi200": + from omniperf_soc.soc_gfx90a import gfx90a_soc self.__soc = gfx90a_soc(self.__args) else: - logging.error("Unsupported SoC") + self.error("Unsupported SoC") sys.exit(1) logging.info("SoC = %s" % self.__soc_name) return - def parseArgs(self): - self.__args = "some arguments" + @demarcate + def parse_args(self): + parser = argparse.ArgumentParser( + description="Command line interface for AMD's GPU profiler, Omniperf", + prog="tool", + formatter_class=lambda prog: argparse.RawTextHelpFormatter( + prog, max_help_position=30 + ), + usage="omniperf [mode] [options]", + ) + omniarg_parser(parser, config.omniperf_home, self.__version) + self.__args = parser.parse_args() + + if self.__args.mode == None: + parser.print_help(sys.stderr) + self.error("Omniperf requires a valid mode.") + return @demarcate def run_profiler(self): - self.detectSoC() + self.print_graphic() + self.detect_soc() + + # Update default path + if self.__args.path == os.path.join(os.getcwd(), "workloads"): + self.__args.path = os.path.join(self.__args.path, self.__args.name, self.__args.target) logging.info("Profiler choice = %s" % self.__profiler_mode) # instantiate desired profiler - if self.__profiler_mode == "rocprof_v1": - from profiler_rocprof import rocprof_v1_profiler - profiler = rocprof_v1_profiler(self.__soc, self.__args) - elif self.__profiler_mode == "rocprof_v2": - from profiler_rocprof_v2 import rocprof_v2_profiler - profiler = rocprof_v2_profiler(self.__soc, self.__args) + if self.__profiler_mode == "rocprofv1": + from omniperf_profile.profiler_rocprof_v1 import rocprof_v1_profiler + profiler = rocprof_v1_profiler(self.__args, self.__profiler_mode, self.__soc) + elif self.__profiler_mode == "rocprofv2": + from omniperf_profile.profiler_rocprof_v2 import rocprof_v2_profiler + profiler = rocprof_v2_profiler(self.__args, self.__profiler_mode, self.__soc) elif self.__profiler_mode == "rocscope": - from profiler_rocscope import rocscope_profiler - profiler = rocscope_profiler(self.__soc, self.__args) + from omniperf_profile.profiler_rocscope import rocscope_profiler + profiler = rocscope_profiler(self.__args, self.__profiler_mode, self.__soc) else: logging.error("Unsupported profiler") sys.exit(1) @@ -144,27 +219,30 @@ def run_profiler(self): self.__soc.profiling_setup() profiler.pre_processing() - profiler.run_profiling() + profiler.run_profiling(self.__version["ver"], config.prog) profiler.post_processing() + self.__soc.post_profiling() return @demarcate def update_DB(self): + self.print_graphic() + #TODO: Add a DB workflow return @demarcate def run_analysis(self): - - self.detectSoC() + self.print_graphic() + self.detect_soc() #NB: See comment in detect_profiler() to explain why this is here logging.info("Analysis mode choie = %s" % self.__analyze_mode) if self.__analyze_mode == "cli": - from analysis_cli import cli_analysis + from analyze.analysis_cli import cli_analysis analyzer = cli_analysis(self.__args,self.__options) elif self.__analyze_mode == "webui": - from analysis_webui import webui_analysis + from analyze.analysis_webui import webui_analysis analyzer = webui_analysis(self.__args,self.__options) else: self.error("Unsupported anlaysis mode -> %s" % self.__analyze_mode) diff --git a/src/omniperf_profile/profiler_base.py b/src/omniperf_profile/profiler_base.py new file mode 100644 index 000000000..1a81deb7b --- /dev/null +++ b/src/omniperf_profile/profiler_base.py @@ -0,0 +1,149 @@ +##############################################################################bl +# MIT License +# +# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all +# copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +##############################################################################el + +from abc import ABC, abstractmethod +import logging +import glob +import sys +import os +from utils.utils import capture_subprocess_output, run_prof, gen_sysinfo, run_rocscope +import config + +class OmniProfiler_Base(): + def __init__(self,args, profiler_mode,soc): + self.__args = args + self.__profiler = profiler_mode + self.__soc = soc + + self.__perfmon_dir = os.path.join(str(config.omniperf_home), "perfmon_configs") + + def error(self,message): + logging.error("") + logging.error("[ERROR]: " + message) + logging.error("") + sys.exit(1) + + def get_args(self): + return self.__args + + # Required methods to be implemented by child classes + @abstractmethod + def pre_processing(self): + """Perform any pre-processing steps prior to profiling. + """ + logging.debug("[profiling] pre-processing using %s profiler" % self.__profiler) + + # verify not accessing parent directories + if ".." in str(self.__args.path): + self.error("Access denied. Cannot access parent directories in path (i.e. ../)") + + # verify correct formatting for application binary + self.__args.remaining = self.__args.remaining[1:] + if self.__args.remaining: + if not os.path.isfile(self.__args.remaining[0]): + self.error("Your command %s doesn't point to a executable. Please verify." % self.__args.remaining[0]) + self.__args.remaining = " ".join(self.__args.remaining) + else: + self.error("Profiling command required. Pass application executable after -- at the end of options.\n\t\ti.e. omniperf profile -n vcopy -- ./vcopy 1048576 256") + + # verify name meets MongoDB length requirements and no illegal chars + if len(self.__args.name) > 35: + self.error("-n/--name exceeds 35 character limit. Try again.") + if self.__args.name.find(".") != -1 or self.__args.name.find("-") != -1: + self.error("'-' and '.' are not permitted in -n/--name") + + @abstractmethod + def run_profiling(self, version:str, prog:str): + """Run profiling. + """ + logging.debug("[profiling] performing profiling using %s profiler" % self.__profiler) + + # log basic info + logging.info(str(prog) + " ver: " + str(version)) + logging.info("Path: " + str(os.path.abspath(self.__args.path))) + logging.info("Target: " + str(self.__args.target)) + logging.info("Command: " + str(self.__args.remaining)) + logging.info("Kernel Selection: " + str(self.__args.kernel)) + logging.info("Dispatch Selection: " + str(self.__args.dispatch)) + if self.__args.ipblocks == None: + logging.info("IP Blocks: All") + else: + logging.info("IP Blocks: "+ str(self.__args.ipblocks)) + if self.__args.kernel_verbose > 5: + logging.info("KernelName verbose: DISABLED") + else: + logging.info("KernelName verbose: " + str(self.__args.kernel_verbose)) + + # Run profiling on each input file + for fname in glob.glob(self.get_args().path + "/perfmon/*.txt"): + # Kernel filtering (in-place replacement) + if not self.__args.kernel == None: + success, output = capture_subprocess_output( + [ + "sed", + "-i", + "-r", + "s%^(kernel:).*%" + "kernel: " + ",".join(self.__args.kernel) + "%g", + fname, + ] + ) + # log output from profile filtering + if not success: + self.error(output) + else: + logging.debug(output) + + # Dispatch filtering (inplace replacement) + if not self.__args.dispatch == None: + success, output = capture_subprocess_output( + [ + "sed", + "-i", + "-r", + "s%^(range:).*%" + "range: " + " ".join(self.__args.dispatch) + "%g", + fname, + ] + ) + # log output from profile filtering + if not success: + self.error(output) + else: + logging.debug(output) + logging.info("\nCurrent input file: %s" % fname) + if self.__profiler == "rocprofv1": + #TODO: Look back at run_prof() definition. We may want to separate this based on SoC + run_prof(fname, self.get_args().path, self.__perfmon_dir, self.__args.remaining, self.__args.target, self.__args.verbose) + + elif self.__profiler == "rocscope": + run_rocscope(self.__args, fname) + else: + #TODO: Finish logic + self.error("profiler not supported") + + @abstractmethod + def post_processing(self): + """Perform any post-processing steps prior to profiling. + """ + logging.debug("[profiling] performing post-processing using %s profiler" % self.__profiler) + gen_sysinfo(self.__args.name, self.get_args().path, self.__args.ipblocks, self.__args.remaining, self.__args.no_roof) \ No newline at end of file diff --git a/src/omniperf_profile/profiler_rocprof_v1.py b/src/omniperf_profile/profiler_rocprof_v1.py new file mode 100644 index 000000000..0ce5ef5d5 --- /dev/null +++ b/src/omniperf_profile/profiler_rocprof_v1.py @@ -0,0 +1,261 @@ +##############################################################################bl +# MIT License +# +# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all +# copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +##############################################################################el + +import logging +import os +import pandas as pd +import glob +import sys +import re +from omniperf_profile.profiler_base import OmniProfiler_Base +from utils.utils import demarcate, replace_timestamps +from utils.csv_processor import kernel_name_shortener + + +class rocprof_v1_profiler(OmniProfiler_Base): + def __init__(self,profiling_args,profiler_mode,soc): + super().__init__(profiling_args,profiler_mode,soc) + self.ready_to_run = (self.get_args().roof_only and not os.path.isfile(os.path.join(self.get_args().path, "pmc_perf.csv")) + or not self.get_args().roof_only) + + + # Required child methods + @demarcate + def pre_processing(self): + """Perform any pre-processing steps prior to profiling. + """ + super().pre_processing() + if self.ready_to_run: + pmc_perf_split(self.get_args().path) + + @demarcate + def run_profiling(self, version:str, prog:str): + """Run profiling. + """ + if self.ready_to_run: + if self.get_args().roof_only: + logging.info("[roofline] Generating pmc_perf.csv") + super().run_profiling(version, prog) + else: + logging.info("[roofline] Detected existing pmc_perf.csv") + + @demarcate + def post_processing(self): + """Perform any post-processing steps prior to profiling. + """ + super().post_processing() + if self.ready_to_run: + # Manually join each pmc_perf*.csv output + join_prof(self.get_args().path, self.get_args().join_type, self.get_args().verbose) + # Replace timestamp data to solve a known rocprof bug + replace_timestamps(self.get_args().path) + # Demangle and overwrite original KernelNames + kernel_name_shortener(self.get_args().path, self.get_args().kernel_verbose) + +@demarcate +def pmc_perf_split(workload_dir): + """Avoid default rocprof join utility by spliting each line into a separate input file + """ + workload_perfmon_dir = os.path.join(workload_dir, "perfmon") + lines = open(os.path.join(workload_perfmon_dir, "pmc_perf.txt"), "r").read().splitlines() + + # Iterate over each line in pmc_perf.txt + mpattern = r"^pmc:(.*)" + i = 0 + for line in lines: + # Verify no comments + stext = line.split("#")[0].strip() + if not stext: + continue + + # all pmc counters start with "pmc:" + m = re.match(mpattern, stext) + if m is None: + continue + + # Create separate file for each line + fd = open(workload_perfmon_dir + "/pmc_perf_" + str(i) + ".txt", "w") + fd.write(stext + "\n\n") + fd.write("gpu:\n") + fd.write("range:\n") + fd.write("kernel:\n") + fd.close() + + i += 1 + + # Remove old pmc_perf.txt input from perfmon dir + os.remove(workload_perfmon_dir + "/pmc_perf.txt") + +def test_df_column_equality(df): + return df.eq(df.iloc[:, 0], axis=0).all(1).all() + +# joins disparate runs less dumbly than rocprof +@demarcate +def join_prof(workload_dir, join_type, verbose, out=None): + """Manually join separated rocprof runs + """ + # Set default output directory if not specified + if type(workload_dir) == str: + if out is None: + out = workload_dir + "/pmc_perf.csv" + files = glob.glob(workload_dir + "/" + "pmc_perf_*.csv") + elif type(workload_dir) == list: + files = workload_dir + else: + logging.error("ERROR: Invalid workload_dir") + sys.exit(1) + + df = None + for i, file in enumerate(files): + _df = pd.read_csv(file) if type(workload_dir) == str else file + if join_type == "kernel": + key = _df.groupby("KernelName").cumcount() + _df["key"] = _df.KernelName + " - " + key.astype(str) + elif join_type == "grid": + key = _df.groupby(["KernelName", "grd"]).cumcount() + _df["key"] = ( + _df.KernelName + " - " + _df.grd.astype(str) + " - " + key.astype(str) + ) + else: + print("ERROR: Unrecognized --join-type") + sys.exit(1) + + if df is None: + df = _df + else: + # join by unique index of kernel + df = pd.merge(df, _df, how="inner", on="key", suffixes=("", f"_{i}")) + + # TODO: check for any mismatch in joins + duplicate_cols = { + "gpu": [col for col in df.columns if "gpu" in col], + "grd": [col for col in df.columns if "grd" in col], + "wgr": [col for col in df.columns if "wgr" in col], + "lds": [col for col in df.columns if "lds" in col], + "scr": [col for col in df.columns if "scr" in col], + "spgr": [col for col in df.columns if "sgpr" in col], + } + # Check for vgpr counter in ROCm < 5.3 + if "vgpr" in df.columns: + duplicate_cols["vgpr"] = [col for col in df.columns if "vgpr" in col] + # Check for vgpr counter in ROCm >= 5.3 + else: + duplicate_cols["arch_vgpr"] = [col for col in df.columns if "arch_vgpr" in col] + duplicate_cols["accum_vgpr"] = [col for col in df.columns if "accum_vgpr" in col] + for key, cols in duplicate_cols.items(): + _df = df[cols] + if not test_df_column_equality(_df): + msg = ( + "WARNING: Detected differing {} values while joining pmc_perf.csv".format( + key + ) + ) + logging.warning(msg + "\n") + else: + msg = "Successfully joined {} in pmc_perf.csv".format(key) + logging.debug(msg + "\n") + if test_df_column_equality(_df) and verbose: + logging.info(msg) + + # now, we can: + #   A) throw away any of the "boring" duplicats + df = df[ + [ + k + for k in df.keys() + if not any( + check in k + for check in [ + # removed merged counters, keep original + "gpu-id_", + "grd_", + "wgr_", + "lds_", + "scr_", + "vgpr_", + "sgpr_", + "Index_", + # un-mergable, remove all + "queue-id", + "queue-index", + "pid", + "tid", + "fbar", + "sig", + "obj", + # rocscope specific merged counters, keep original + "dispatch_", + ] + ) + ] + ] + #   B) any timestamps that are _not_ the duration, which is the one we care + #   about + df = df[ + [ + k + for k in df.keys() + if not any( + check in k + for check in [ + "DispatchNs", + "CompleteNs", + # rocscope specific timestamp + "HostDuration", + ] + ) + ] + ] + #   C) sanity check the name and key + namekeys = [k for k in df.keys() if "KernelName" in k] + assert len(namekeys) + for k in namekeys[1:]: + assert (df[namekeys[0]] == df[k]).all() + df = df.drop(columns=namekeys[1:]) + # now take the median of the durations + bkeys = [] + ekeys = [] + for k in df.keys(): + if "Begin" in k: + bkeys.append(k) + if "End" in k: + ekeys.append(k) + # compute mean begin and end timestamps + endNs = df[ekeys].mean(axis=1) + beginNs = df[bkeys].mean(axis=1) + # and replace + df = df.drop(columns=bkeys) + df = df.drop(columns=ekeys) + df["BeginNs"] = beginNs + df["EndNs"] = endNs + # finally, join the drop key + df = df.drop(columns=["key"]) + # save to file and delete old file(s), skip if we're being called outside of Omniperf + if type(workload_dir) == str: + df.to_csv(out, index=False) + if not verbose: + for file in files: + os.remove(file) + else: + return df \ No newline at end of file diff --git a/src/profiler_rocprof_v2.py b/src/omniperf_profile/profiler_rocprof_v2.py similarity index 81% rename from src/profiler_rocprof_v2.py rename to src/omniperf_profile/profiler_rocprof_v2.py index 01e3167fb..3bcd3bfe1 100644 --- a/src/profiler_rocprof_v2.py +++ b/src/omniperf_profile/profiler_rocprof_v2.py @@ -23,27 +23,28 @@ ##############################################################################el import logging -from profiler_base import OmniProfiler_Base +from omniperf_profile.profiler_base import OmniProfiler_Base from utils.utils import demarcate class rocprof_v2_profiler(OmniProfiler_Base): + def __init__(self,profiling_args,profiler_mode,soc): + super().__init__(profiling_args,profiler_mode,soc) # Required child methods @demarcate def pre_processing(self): """Perform any pre-processing steps prior to profiling. """ - self.__profiler="rocprof_v2" - logging.debug("[profiling] pre-processing using %s profiler (v1)" % self.__profiler) + super().pre_processing() @demarcate - def run_profiling(self): + def run_profiling(self, version, prog): """Run profiling. """ - logging.debug("[profiling] performing profiling using %s profiler (v1)" % self.__profiler) + super().run_profiling() @demarcate def post_processing(self): """Perform any post-processing steps prior to profiling. """ - logging.debug("[profiling] performing post-processing using %s profiler (v1)" % self.__profiler) + super().post_processing() diff --git a/src/profiler_rocscope.py b/src/omniperf_profile/profiler_rocscope.py similarity index 90% rename from src/profiler_rocscope.py rename to src/omniperf_profile/profiler_rocscope.py index e4de27122..e8a42848e 100644 --- a/src/profiler_rocscope.py +++ b/src/omniperf_profile/profiler_rocscope.py @@ -23,10 +23,12 @@ ##############################################################################el import logging -from profiler_base import OmniProfiler_Base +from omniperf_profile.profiler_base import OmniProfiler_Base from utils.utils import demarcate class rocscope_profiler(OmniProfiler_Base): + def __init__(self,profiling_args,profiler_mode,soc): + super().__init__(profiling_args,profiler_mode,soc) # Required child methods @demarcate @@ -36,7 +38,7 @@ def pre_processing(self): self.__profiler="rocscope" logging.debug("[profiling] pre-processing using %s profiler" % self.__profiler) @demarcate - def run_profiling(self): + def run_profiling(self, version, prog): """Run profiling. """ logging.debug("[profiling] performing profiling using %s profiler" % self.__profiler) diff --git a/src/omniperf_soc/soc_base.py b/src/omniperf_soc/soc_base.py new file mode 100644 index 000000000..94bd623c8 --- /dev/null +++ b/src/omniperf_soc/soc_base.py @@ -0,0 +1,352 @@ +##############################################################################bl +# MIT License +# +# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all +# copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +##############################################################################el + +from abc import ABC, abstractmethod +import logging +import sys +import os +import math +import shutil +import glob +import re +import numpy as np +from utils.utils import demarcate + +class OmniSoC_Base(): + def __init__(self,args): + self.__args = args + self.__soc = None + self.__perfmon_dir = None + self.__perfmon_config = {} # Per IP block max number of simulutaneous counters. GFX IP Blocks + if self.__args.path == os.path.join(os.getcwd(), "workloads"): + self.__workload_dir = os.path.join(self.__args.path, self.__args.name, self.__args.target) + else: + self.__workload_dir = self.__args.path + + def error(self,message): + logging.error("") + logging.error("[ERROR]: " + message) + logging.error("") + sys.exit(1) + def set_perfmon_dir(self, path:str): + self.__perfmon_dir = path + def set_perfmon_config(self, config: dict): + self.__perfmon_config = config + def set_soc(self, soc: str): + self.__soc = soc + def get_soc(self): + return self.__soc + def get_args(self): + return self.__args + + @demarcate + def perfmon_filter(self, roofline_perfmon_only: bool): + """Filter default performance counter set based on user arguments + """ + if roofline_perfmon_only and os.path.isfile(os.path.join(self.get_args().path, "pmc_perf.csv")): + return + workload_perfmon_dir = self.__workload_dir + "/perfmon" + + # Initialize directories + if not os.path.isdir(self.__workload_dir): + os.makedirs(self.__workload_dir) + else: + shutil.rmtree(self.__workload_dir) + + os.makedirs(workload_perfmon_dir) + + if not roofline_perfmon_only: + ref_pmc_files_list = glob.glob(self.__perfmon_dir + "/" + "pmc_*perf*.txt") + ref_pmc_files_list += glob.glob(self.__perfmon_dir + "/" + self.__soc + "/pmc_*_perf*.txt") + + # Perfmon list filtering + if self.__args.ipblocks != None: + for i in range(len(self.__args.ipblocks)): + self.__args.ipblocks[i] = self.__args.ipblocks[i].lower() + mpattern = "pmc_([a-zA-Z0-9_]+)_perf*" + + pmc_files_list = [] + for fname in ref_pmc_files_list: + fbase = os.path.splitext(os.path.basename(fname))[0] + ip = re.match(mpattern, fbase).group(1) + if ip in self.__args.ipblocks: + pmc_files_list.append(fname) + logging.info("fname: " + fbase + ": Added") + else: + logging.info("fname: " + fbase + ": Skipped") + + else: + # default: take all perfmons + pmc_files_list = ref_pmc_files_list + else: + ref_pmc_files_list = glob.glob(self.__perfmon_dir + "/" + "pmc_roof_perf.txt") + pmc_files_list = ref_pmc_files_list + + + # Coalesce and writeback workload specific perfmon + pmc_list = perfmon_coalesce(pmc_files_list, self.__perfmon_config, self.__workload_dir) + perfmon_emit(pmc_list, self.__perfmon_config, self.__workload_dir) + + # Required methods to be implemented by child classes + @abstractmethod + def profiling_setup(self): + """Perform any SoC-specific setup prior to profiling. + """ + logging.debug("[profiling] perform SoC profiling setup for %s" % self.__soc) + + + @abstractmethod + def post_profiling(self): + """Perform any SoC-specific post profiling activities. + """ + logging.debug("[profiling] perform SoC post processing for %s" % self.__soc) + + @abstractmethod + def analysis_setup(self): + """Perform any SoC-specific setup prior to analysis. + """ + logging.debug("[analysis] perform SoC analysis setup for %s" % self.__soc) + +@demarcate +def perfmon_coalesce(pmc_files_list, perfmon_config, workload_dir): + """Sort and bucket all related performance counters to minimize required application passes + """ + workload_perfmon_dir = workload_dir + "/perfmon" + + # match pattern for pmc counters + mpattern = r"^pmc:(.*)" + pmc_list = dict( + [ + ("SQ", []), + ("GRBM", []), + ("TCP", []), + ("TA", []), + ("TD", []), + ("TCC", []), + ("SPI", []), + ("CPC", []), + ("CPF", []), + ("GDS", []), + ("TCC2", {}), # per-channel TCC perfmon + ] + ) + for ch in range(perfmon_config["TCC_channels"]): + pmc_list["TCC2"][str(ch)] = [] + + # Extract all PMC counters and store in separate buckets + for fname in pmc_files_list: + lines = open(fname, "r").read().splitlines() + + for line in lines: + # Strip all comements, skip empty lines + stext = line.split("#")[0].strip() + if not stext: + continue + + # all pmc counters start with "pmc:" + m = re.match(mpattern, stext) + if m is None: + continue + + # we have found all the counters, store them in buckets + counters = m.group(1).split() + + # Utilitze helper function once a list of counters has be extracted + save_file = True + pmc_list = update_pmc_bucket( + counters, save_file, perfmon_config, pmc_list, stext, workload_perfmon_dir + ) + + # add a timestamp file + fd = open(workload_perfmon_dir + "/timestamps.txt", "w") + fd.write("pmc:\n\n") + fd.write("gpu:\n") + fd.write("range:\n") + fd.write("kernel:\n") + fd.close() + + # sort the per channel counter, so that same counter in all channels can be aligned + for ch in range(perfmon_config["TCC_channels"]): + pmc_list["TCC2"][str(ch)].sort() + + return pmc_list + +@demarcate +def update_pmc_bucket( + counters, save_file, perfmon_config, pmc_list=None, stext=None, workload_perfmon_dir=None +): + # Verify inputs. + # If save_file is True, we're being called internally, from perfmon_coalesce + # Else we're being called externally, from rocomni + detected_external_call = False + if save_file and (stext is None or workload_perfmon_dir is None): + raise ValueError( + "stext and workload_perfmon_dir must be specified if save_file is True" + ) + if pmc_list is None: + detected_external_call = True + pmc_list = dict( + [ + ("SQ", []), + ("GRBM", []), + ("TCP", []), + ("TA", []), + ("TD", []), + ("TCC", []), + ("SPI", []), + ("CPC", []), + ("CPF", []), + ("GDS", []), + ("TCC2", {}), # per-channel TCC perfmon + ] + ) + for ch in range(perfmon_config["TCC_channels"]): + pmc_list["TCC2"][str(ch)] = [] + + if "SQ_ACCUM_PREV_HIRES" in counters and not detected_external_call: + # save all level counters separately + nindex = counters.index("SQ_ACCUM_PREV_HIRES") + level_counter = counters[nindex - 1] + + if save_file: + # Save to level counter file, file name = level counter name + fd = open(workload_perfmon_dir + "/" + level_counter + ".txt", "w") + fd.write(stext + "\n\n") + fd.write("gpu:\n") + fd.write("range:\n") + fd.write("kernel:\n") + fd.close() + + return pmc_list + + # save normal pmc counters in matching buckets + for counter in counters: + IP_block = counter.split(sep="_")[0].upper() + # SQC and SQ belong to the IP block, coalesce them + if IP_block == "SQC": + IP_block = "SQ" + + if IP_block != "TCC": + # Insert unique pmc counters into its bucket + if counter not in pmc_list[IP_block]: + pmc_list[IP_block].append(counter) + + else: + # TCC counters processing + m = re.match(r"[\s\S]+\[(\d+)\]", counter) + if m is None: + # Aggregated TCC counters + if counter not in pmc_list[IP_block]: + pmc_list[IP_block].append(counter) + + else: + # TCC channel ID + ch = m.group(1) + + # fake IP block for per channel TCC + if str(ch) in pmc_list["TCC2"]: + # append unique counter into the channel + if counter not in pmc_list["TCC2"][str(ch)]: + pmc_list["TCC2"][str(ch)].append(counter) + else: + # initial counter in this channel + pmc_list["TCC2"][str(ch)] = [counter] + + if detected_external_call: + # sort the per channel counter, so that same counter in all channels can be aligned + for ch in range(perfmon_config["TCC_channels"]): + pmc_list["TCC2"][str(ch)].sort() + return pmc_list + +@demarcate +def perfmon_emit(pmc_list, perfmon_config, workload_dir=None): + # Calculate the minimum number of iteration to save the pmc counters + # non-TCC counters + pmc_cnt = [ + len(pmc_list[key]) / perfmon_config[key] + for key in pmc_list + if key not in ["TCC", "TCC2"] + ] + + # TCC counters + tcc_channels = perfmon_config["TCC_channels"] + + tcc_cnt = len(pmc_list["TCC"]) / perfmon_config["TCC"] + tcc2_cnt = ( + np.array([len(pmc_list["TCC2"][str(ch)]) for ch in range(tcc_channels)]) + / perfmon_config["TCC"] + ) + + # Total number iterations to write pmc: counters line + niter = max(math.ceil(max(pmc_cnt)), math.ceil(tcc_cnt) + math.ceil(max(tcc2_cnt))) + + # Emit PMC counters into pmc config file + if workload_dir: + workload_perfmon_dir = workload_dir + "/perfmon" + fd = open(workload_perfmon_dir + "/pmc_perf.txt", "w") + else: + batches = [] + + tcc2_index = 0 + for iter in range(niter): + # Prefix + line = "pmc: " + + # Add all non-TCC counters + for key in pmc_list: + if key not in ["TCC", "TCC2"]: + N = perfmon_config[key] + ip_counters = pmc_list[key][iter * N : iter * N + N] + if ip_counters: + line = line + " " + " ".join(ip_counters) + + # Add TCC counters + N = perfmon_config["TCC"] + tcc_counters = pmc_list["TCC"][iter * N : iter * N + N] + + if not tcc_counters: + # TCC per-channel counters + for ch in range(perfmon_config["TCC_channels"]): + tcc_counters += pmc_list["TCC2"][str(ch)][ + tcc2_index * N : tcc2_index * N + N + ] + + tcc2_index += 1 + + # TCC aggregated counters + line = line + " " + " ".join(tcc_counters) + if workload_dir: + fd.write(line + "\n") + else: + b = line.split() + b.remove("pmc:") + batches.append(b) + + if workload_dir: + fd.write("\ngpu:\n") + fd.write("range:\n") + fd.write("kernel:\n") + fd.close() + else: + return batches \ No newline at end of file diff --git a/src/soc_gfx90a.py b/src/omniperf_soc/soc_gfx900.py similarity index 59% rename from src/soc_gfx90a.py rename to src/omniperf_soc/soc_gfx900.py index 4f38364b7..997eb386c 100644 --- a/src/soc_gfx90a.py +++ b/src/omniperf_soc/soc_gfx900.py @@ -22,24 +22,53 @@ # SOFTWARE. ##############################################################################el -import logging -from soc_base import OmniSoC_Base +import os +import config +from omniperf_soc.soc_base import OmniSoC_Base from utils.utils import demarcate -class gfx90a_soc (OmniSoC_Base): +class gfx900_soc (OmniSoC_Base): def __init__(self,args): - self.__args = args - self.__soc = "gfx90a" + super().__init__(args) + soc = "gfx900" + self.set_soc(soc) + self.set_perfmon_dir(os.path.join(str(config.omniperf_home), "perfmon_configs", soc)) #TODO: Improve extensibility + # Per IP block max number of simulutaneous counters. GFX IP Blocks + self.set_perfmon_config( + { + "SQ": 8, + "TA": 2, + "TD": 2, + "TCP": 4, + "TCC": 4, + "CPC": 2, + "CPF": 2, + "SPI": 2, + "GRBM": 2, + "GDS": 4, + "TCC_channels": 16, + } + ) # Required methods to be implemented by child classes @demarcate def profiling_setup(self): """Perform any SoC-specific setup prior to profiling. """ - logging.debug("[profiling] perform profiling setup for %s" % self.__soc) + super().profiling_setup() + if self.get_args().roof_only: + self.error("%s does not support roofline analysis" % self.get_soc()) + # Perfmon filtering + self.perfmon_filter() + + @demarcate + def post_profiling(self): + """Perform any SoC-specific post profiling activities. + """ + super().post_profiling() @demarcate def analysis_setup(self): """Perform any SoC-specific setup prior to analysis. """ - logging.debug("[analysis] perform analysis setup for %s" % self.__soc) \ No newline at end of file + super().analysis_setup() \ No newline at end of file diff --git a/src/soc_gfx906.py b/src/omniperf_soc/soc_gfx906.py similarity index 61% rename from src/soc_gfx906.py rename to src/omniperf_soc/soc_gfx906.py index 3505366a3..bf566ff2b 100644 --- a/src/soc_gfx906.py +++ b/src/omniperf_soc/soc_gfx906.py @@ -22,24 +22,54 @@ # SOFTWARE. ##############################################################################el -import logging -from soc_base import OmniSoC_Base +import os +import config +from omniperf_soc.soc_base import OmniSoC_Base from utils.utils import demarcate class gfx906_soc (OmniSoC_Base): def __init__(self,args): - self.__args = args - self.__soc = "gfx906" + super().__init__(args) + soc = "gfx906" + self.set_soc(soc) + self.set_perfmon_dir(os.path.join(str(config.omniperf_home), "perfmon_configs", soc)) + # Per IP block max number of simulutaneous counters. GFX IP Blocks + self.set_perfmon_config( + { + "SQ": 8, + "TA": 2, + "TD": 2, + "TCP": 4, + "TCC": 4, + "CPC": 2, + "CPF": 2, + "SPI": 2, + "GRBM": 2, + "GDS": 4, + "TCC_channels": 16, + } + ) # Required methods to be implemented by child classes @demarcate def profiling_setup(self): """Perform any SoC-specific setup prior to profiling. """ - logging.debug("[profiling] perform profiling setup for %s" % self.__soc) + super().profiling_setup() + if self.get_args().roof_only: + self.error("%s does not support roofline analysis" % self.get_soc()) + # Perfmon filtering + self.perfmon_filter() + + @demarcate + def post_profiling(self): + """Perform any SoC-specific post profiling activities. + """ + super().post_profiling() @demarcate def analysis_setup(self): """Perform any SoC-specific setup prior to analysis. """ - logging.debug("[analysis] perform analysis setup for %s" % self.__soc) \ No newline at end of file + super().analysis_setup() + diff --git a/src/soc_gfx908.py b/src/omniperf_soc/soc_gfx908.py similarity index 61% rename from src/soc_gfx908.py rename to src/omniperf_soc/soc_gfx908.py index 30a91edfd..740b914df 100644 --- a/src/soc_gfx908.py +++ b/src/omniperf_soc/soc_gfx908.py @@ -22,24 +22,54 @@ # SOFTWARE. ##############################################################################el -import logging -from soc_base import OmniSoC_Base +import os +import config +from omniperf_soc.soc_base import OmniSoC_Base from utils.utils import demarcate class gfx908_soc (OmniSoC_Base): def __init__(self,args): - self.__args = args - self.__soc = "gfx908" + super().__init__(args) + soc = "gfx908" + self.set_soc(soc) + self.set_perfmon_dir(os.path.join(str(config.omniperf_home), "perfmon_configs", soc)) + # Per IP block max number of simulutaneous counters. GFX IP Blocks + self.set_perfmon_config( + { + "SQ": 8, + "TA": 2, + "TD": 2, + "TCP": 4, + "TCC": 4, + "CPC": 2, + "CPF": 2, + "SPI": 2, + "GRBM": 2, + "GDS": 4, + "TCC_channels": 32, + } + ) + # Required methods to be implemented by child classes @demarcate def profiling_setup(self): """Perform any SoC-specific setup prior to profiling. """ - logging.debug("[profiling] perform profiling setup for %s" % self.__soc) + super().profiling_setup() + if self.get_args().roof_only: + self.error("%s does not support roofline analysis" % self.get_soc()) + # Perfmon filtering + self.perfmon_filter() + + @demarcate + def post_profiling(self): + """Perform any SoC-specific post profiling activities. + """ + super().post_profiling() @demarcate def analysis_setup(self): """Perform any SoC-specific setup prior to analysis. """ - logging.debug("[analysis] perform analysis setup for %s" % self.__soc) \ No newline at end of file + super().analysis_setup() \ No newline at end of file diff --git a/src/omniperf_soc/soc_gfx90a.py b/src/omniperf_soc/soc_gfx90a.py new file mode 100644 index 000000000..40346b4ce --- /dev/null +++ b/src/omniperf_soc/soc_gfx90a.py @@ -0,0 +1,89 @@ +##############################################################################bl +# MIT License +# +# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all +# copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +##############################################################################el + +import os +import config +from omniperf_soc.soc_base import OmniSoC_Base +from utils.utils import demarcate, mibench +from roofline import Roofline +import logging + +class gfx90a_soc (OmniSoC_Base): + def __init__(self,args): + super().__init__(args) + soc = "gfx90a" + self.set_soc(soc) + if self.get_args().roof_only: + self.set_perfmon_dir(os.path.join(str(config.omniperf_home), "perfmon_configs", "roofline")) + else: + self.set_perfmon_dir(os.path.join(str(config.omniperf_home), "perfmon_configs", soc)) + self.__metric_config_dir = os.path.join(str(config.omniperf_home), "metric_configs", soc) + # Per IP block max number of simulutaneous counters. GFX IP Blocks + self.set_perfmon_config( + { + "SQ": 8, + "TA": 2, + "TD": 2, + "TCP": 4, + "TCC": 4, + "CPC": 2, + "CPF": 2, + "SPI": 2, + "GRBM": 2, + "GDS": 4, + "TCC_channels": 32 + } + ) + self.roofline_obj = Roofline(args) + + # Required methods to be implemented by child classes + @demarcate + def profiling_setup(self): + """Perform any SoC-specific setup prior to profiling. + """ + super().profiling_setup() + # Performance counter filtering + self.perfmon_filter(self.get_args().roof_only) + + + @demarcate + def post_profiling(self): + """Perform any SoC-specific post profiling activities. + """ + super().post_profiling() + if not self.get_args().no_roof: + logging.info("[roofline] Checking for roofline.csv in " + str(self.get_args().path)) + if not os.path.isfile(os.path.join(self.get_args().path, "roofline.csv")): + mibench(self.get_args()) + self.roofline_obj.post_processing() + else: + logging.info("[roofline] Skipping roofline") + + + @demarcate + def analysis_setup(self): + """Perform any SoC-specific setup prior to analysis. + """ + super().analysis_setup() + diff --git a/src/perfmon_pub/mi100/pmc_cpc_perf.txt b/src/perfmon_configs/gfx900/pmc_cpc_perf.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_cpc_perf.txt rename to src/perfmon_configs/gfx900/pmc_cpc_perf.txt diff --git a/src/perfmon_pub/mi100/pmc_cpf_perf.txt b/src/perfmon_configs/gfx900/pmc_cpf_perf.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_cpf_perf.txt rename to src/perfmon_configs/gfx900/pmc_cpf_perf.txt diff --git a/src/perfmon_pub/mi100/pmc_spi_perf.txt b/src/perfmon_configs/gfx900/pmc_spi_perf.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_spi_perf.txt rename to src/perfmon_configs/gfx900/pmc_spi_perf.txt diff --git a/src/perfmon_pub/mi100/pmc_sq_perf1.txt b/src/perfmon_configs/gfx900/pmc_sq_perf1.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_sq_perf1.txt rename to src/perfmon_configs/gfx900/pmc_sq_perf1.txt diff --git a/src/perfmon_pub/mi100/pmc_sq_perf2.txt b/src/perfmon_configs/gfx900/pmc_sq_perf2.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_sq_perf2.txt rename to src/perfmon_configs/gfx900/pmc_sq_perf2.txt diff --git a/src/perfmon_pub/mi100/pmc_sq_perf3.txt b/src/perfmon_configs/gfx900/pmc_sq_perf3.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_sq_perf3.txt rename to src/perfmon_configs/gfx900/pmc_sq_perf3.txt diff --git a/src/perfmon_pub/mi100/pmc_sq_perf4.txt b/src/perfmon_configs/gfx900/pmc_sq_perf4.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_sq_perf4.txt rename to src/perfmon_configs/gfx900/pmc_sq_perf4.txt diff --git a/src/perfmon_pub/mi100/pmc_sq_perf6.txt b/src/perfmon_configs/gfx900/pmc_sq_perf6.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_sq_perf6.txt rename to src/perfmon_configs/gfx900/pmc_sq_perf6.txt diff --git a/src/perfmon_pub/mi100/pmc_sq_perf8.txt b/src/perfmon_configs/gfx900/pmc_sq_perf8.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_sq_perf8.txt rename to src/perfmon_configs/gfx900/pmc_sq_perf8.txt diff --git a/src/perfmon_pub/mi100/pmc_sqc_perf1.txt b/src/perfmon_configs/gfx900/pmc_sqc_perf1.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_sqc_perf1.txt rename to src/perfmon_configs/gfx900/pmc_sqc_perf1.txt diff --git a/src/perfmon_pub/vega10/pmc_ta_perf.txt b/src/perfmon_configs/gfx900/pmc_ta_perf.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_ta_perf.txt rename to src/perfmon_configs/gfx900/pmc_ta_perf.txt diff --git a/src/perfmon_pub/mi50/pmc_tcc2_perf.txt b/src/perfmon_configs/gfx900/pmc_tcc2_perf.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_tcc2_perf.txt rename to src/perfmon_configs/gfx900/pmc_tcc2_perf.txt diff --git a/src/perfmon_pub/mi50/pmc_tcc_perf.txt b/src/perfmon_configs/gfx900/pmc_tcc_perf.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_tcc_perf.txt rename to src/perfmon_configs/gfx900/pmc_tcc_perf.txt diff --git a/src/perfmon_pub/mi50/pmc_tcp_perf.txt b/src/perfmon_configs/gfx900/pmc_tcp_perf.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_tcp_perf.txt rename to src/perfmon_configs/gfx900/pmc_tcp_perf.txt diff --git a/src/perfmon_pub/mi100/pmc_td_perf.txt b/src/perfmon_configs/gfx900/pmc_td_perf.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_td_perf.txt rename to src/perfmon_configs/gfx900/pmc_td_perf.txt diff --git a/src/perfmon_pub/mi200/pmc_cpc_perf.txt b/src/perfmon_configs/gfx906/pmc_cpc_perf.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_cpc_perf.txt rename to src/perfmon_configs/gfx906/pmc_cpc_perf.txt diff --git a/src/perfmon_pub/mi200/pmc_cpf_perf.txt b/src/perfmon_configs/gfx906/pmc_cpf_perf.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_cpf_perf.txt rename to src/perfmon_configs/gfx906/pmc_cpf_perf.txt diff --git a/src/perfmon_pub/mi200/pmc_spi_perf.txt b/src/perfmon_configs/gfx906/pmc_spi_perf.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_spi_perf.txt rename to src/perfmon_configs/gfx906/pmc_spi_perf.txt diff --git a/src/perfmon_pub/mi50/pmc_sq_perf1.txt b/src/perfmon_configs/gfx906/pmc_sq_perf1.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_sq_perf1.txt rename to src/perfmon_configs/gfx906/pmc_sq_perf1.txt diff --git a/src/perfmon_pub/mi200/pmc_sq_perf2.txt b/src/perfmon_configs/gfx906/pmc_sq_perf2.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_sq_perf2.txt rename to src/perfmon_configs/gfx906/pmc_sq_perf2.txt diff --git a/src/perfmon_pub/mi200/pmc_sq_perf3.txt b/src/perfmon_configs/gfx906/pmc_sq_perf3.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_sq_perf3.txt rename to src/perfmon_configs/gfx906/pmc_sq_perf3.txt diff --git a/src/perfmon_pub/mi200/pmc_sq_perf4.txt b/src/perfmon_configs/gfx906/pmc_sq_perf4.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_sq_perf4.txt rename to src/perfmon_configs/gfx906/pmc_sq_perf4.txt diff --git a/src/perfmon_pub/mi200/pmc_sq_perf6.txt b/src/perfmon_configs/gfx906/pmc_sq_perf6.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_sq_perf6.txt rename to src/perfmon_configs/gfx906/pmc_sq_perf6.txt diff --git a/src/perfmon_pub/mi200/pmc_sq_perf8.txt b/src/perfmon_configs/gfx906/pmc_sq_perf8.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_sq_perf8.txt rename to src/perfmon_configs/gfx906/pmc_sq_perf8.txt diff --git a/src/perfmon_pub/mi200/pmc_sqc_perf1.txt b/src/perfmon_configs/gfx906/pmc_sqc_perf1.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_sqc_perf1.txt rename to src/perfmon_configs/gfx906/pmc_sqc_perf1.txt diff --git a/src/perfmon_pub/mi50/pmc_ta_perf.txt b/src/perfmon_configs/gfx906/pmc_ta_perf.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_ta_perf.txt rename to src/perfmon_configs/gfx906/pmc_ta_perf.txt diff --git a/src/perfmon_pub/vega10/pmc_tcc2_perf.txt b/src/perfmon_configs/gfx906/pmc_tcc2_perf.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_tcc2_perf.txt rename to src/perfmon_configs/gfx906/pmc_tcc2_perf.txt diff --git a/src/perfmon_pub/vega10/pmc_tcc_perf.txt b/src/perfmon_configs/gfx906/pmc_tcc_perf.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_tcc_perf.txt rename to src/perfmon_configs/gfx906/pmc_tcc_perf.txt diff --git a/src/perfmon_pub/vega10/pmc_tcp_perf.txt b/src/perfmon_configs/gfx906/pmc_tcp_perf.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_tcp_perf.txt rename to src/perfmon_configs/gfx906/pmc_tcp_perf.txt diff --git a/src/perfmon_pub/mi50/pmc_td_perf.txt b/src/perfmon_configs/gfx906/pmc_td_perf.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_td_perf.txt rename to src/perfmon_configs/gfx906/pmc_td_perf.txt diff --git a/src/perfmon_pub/mi50/pmc_cpc_perf.txt b/src/perfmon_configs/gfx908/pmc_cpc_perf.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_cpc_perf.txt rename to src/perfmon_configs/gfx908/pmc_cpc_perf.txt diff --git a/src/perfmon_pub/mi50/pmc_cpf_perf.txt b/src/perfmon_configs/gfx908/pmc_cpf_perf.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_cpf_perf.txt rename to src/perfmon_configs/gfx908/pmc_cpf_perf.txt diff --git a/src/perfmon_pub/mi50/pmc_spi_perf.txt b/src/perfmon_configs/gfx908/pmc_spi_perf.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_spi_perf.txt rename to src/perfmon_configs/gfx908/pmc_spi_perf.txt diff --git a/src/perfmon_pub/vega10/pmc_sq_perf1.txt b/src/perfmon_configs/gfx908/pmc_sq_perf1.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_sq_perf1.txt rename to src/perfmon_configs/gfx908/pmc_sq_perf1.txt diff --git a/src/perfmon_pub/mi50/pmc_sq_perf2.txt b/src/perfmon_configs/gfx908/pmc_sq_perf2.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_sq_perf2.txt rename to src/perfmon_configs/gfx908/pmc_sq_perf2.txt diff --git a/src/perfmon_pub/mi50/pmc_sq_perf3.txt b/src/perfmon_configs/gfx908/pmc_sq_perf3.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_sq_perf3.txt rename to src/perfmon_configs/gfx908/pmc_sq_perf3.txt diff --git a/src/perfmon_pub/mi50/pmc_sq_perf4.txt b/src/perfmon_configs/gfx908/pmc_sq_perf4.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_sq_perf4.txt rename to src/perfmon_configs/gfx908/pmc_sq_perf4.txt diff --git a/src/perfmon_pub/mi50/pmc_sq_perf6.txt b/src/perfmon_configs/gfx908/pmc_sq_perf6.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_sq_perf6.txt rename to src/perfmon_configs/gfx908/pmc_sq_perf6.txt diff --git a/src/perfmon_pub/mi50/pmc_sq_perf8.txt b/src/perfmon_configs/gfx908/pmc_sq_perf8.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_sq_perf8.txt rename to src/perfmon_configs/gfx908/pmc_sq_perf8.txt diff --git a/src/perfmon_pub/mi50/pmc_sqc_perf1.txt b/src/perfmon_configs/gfx908/pmc_sqc_perf1.txt similarity index 100% rename from src/perfmon_pub/mi50/pmc_sqc_perf1.txt rename to src/perfmon_configs/gfx908/pmc_sqc_perf1.txt diff --git a/src/perfmon_pub/mi100/pmc_ta_perf.txt b/src/perfmon_configs/gfx908/pmc_ta_perf.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_ta_perf.txt rename to src/perfmon_configs/gfx908/pmc_ta_perf.txt diff --git a/src/perfmon_pub/mi100/pmc_tcc2_perf.txt b/src/perfmon_configs/gfx908/pmc_tcc2_perf.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_tcc2_perf.txt rename to src/perfmon_configs/gfx908/pmc_tcc2_perf.txt diff --git a/src/perfmon_pub/mi100/pmc_tcc_perf.txt b/src/perfmon_configs/gfx908/pmc_tcc_perf.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_tcc_perf.txt rename to src/perfmon_configs/gfx908/pmc_tcc_perf.txt diff --git a/src/perfmon_pub/mi100/pmc_tcp_perf.txt b/src/perfmon_configs/gfx908/pmc_tcp_perf.txt similarity index 100% rename from src/perfmon_pub/mi100/pmc_tcp_perf.txt rename to src/perfmon_configs/gfx908/pmc_tcp_perf.txt diff --git a/src/perfmon_pub/vega10/pmc_td_perf.txt b/src/perfmon_configs/gfx908/pmc_td_perf.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_td_perf.txt rename to src/perfmon_configs/gfx908/pmc_td_perf.txt diff --git a/src/perfmon_pub/gfx908_metrics.xml b/src/perfmon_configs/gfx908_metrics.xml similarity index 100% rename from src/perfmon_pub/gfx908_metrics.xml rename to src/perfmon_configs/gfx908_metrics.xml diff --git a/src/perfmon_pub/vega10/pmc_cpc_perf.txt b/src/perfmon_configs/gfx90a/pmc_cpc_perf.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_cpc_perf.txt rename to src/perfmon_configs/gfx90a/pmc_cpc_perf.txt diff --git a/src/perfmon_pub/vega10/pmc_cpf_perf.txt b/src/perfmon_configs/gfx90a/pmc_cpf_perf.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_cpf_perf.txt rename to src/perfmon_configs/gfx90a/pmc_cpf_perf.txt diff --git a/src/perfmon_pub/vega10/pmc_spi_perf.txt b/src/perfmon_configs/gfx90a/pmc_spi_perf.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_spi_perf.txt rename to src/perfmon_configs/gfx90a/pmc_spi_perf.txt diff --git a/src/perfmon_pub/mi200/pmc_sq_perf1.txt b/src/perfmon_configs/gfx90a/pmc_sq_perf1.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_sq_perf1.txt rename to src/perfmon_configs/gfx90a/pmc_sq_perf1.txt diff --git a/src/perfmon_pub/vega10/pmc_sq_perf2.txt b/src/perfmon_configs/gfx90a/pmc_sq_perf2.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_sq_perf2.txt rename to src/perfmon_configs/gfx90a/pmc_sq_perf2.txt diff --git a/src/perfmon_pub/vega10/pmc_sq_perf3.txt b/src/perfmon_configs/gfx90a/pmc_sq_perf3.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_sq_perf3.txt rename to src/perfmon_configs/gfx90a/pmc_sq_perf3.txt diff --git a/src/perfmon_pub/vega10/pmc_sq_perf4.txt b/src/perfmon_configs/gfx90a/pmc_sq_perf4.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_sq_perf4.txt rename to src/perfmon_configs/gfx90a/pmc_sq_perf4.txt diff --git a/src/perfmon_pub/vega10/pmc_sq_perf6.txt b/src/perfmon_configs/gfx90a/pmc_sq_perf6.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_sq_perf6.txt rename to src/perfmon_configs/gfx90a/pmc_sq_perf6.txt diff --git a/src/perfmon_pub/vega10/pmc_sq_perf8.txt b/src/perfmon_configs/gfx90a/pmc_sq_perf8.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_sq_perf8.txt rename to src/perfmon_configs/gfx90a/pmc_sq_perf8.txt diff --git a/src/perfmon_pub/vega10/pmc_sqc_perf1.txt b/src/perfmon_configs/gfx90a/pmc_sqc_perf1.txt similarity index 100% rename from src/perfmon_pub/vega10/pmc_sqc_perf1.txt rename to src/perfmon_configs/gfx90a/pmc_sqc_perf1.txt diff --git a/src/perfmon_pub/mi200/pmc_ta_perf.txt b/src/perfmon_configs/gfx90a/pmc_ta_perf.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_ta_perf.txt rename to src/perfmon_configs/gfx90a/pmc_ta_perf.txt diff --git a/src/perfmon_pub/mi200/pmc_tcc2_perf.txt b/src/perfmon_configs/gfx90a/pmc_tcc2_perf.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_tcc2_perf.txt rename to src/perfmon_configs/gfx90a/pmc_tcc2_perf.txt diff --git a/src/perfmon_pub/mi200/pmc_tcc_perf.txt b/src/perfmon_configs/gfx90a/pmc_tcc_perf.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_tcc_perf.txt rename to src/perfmon_configs/gfx90a/pmc_tcc_perf.txt diff --git a/src/perfmon_pub/mi200/pmc_tcp_perf.txt b/src/perfmon_configs/gfx90a/pmc_tcp_perf.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_tcp_perf.txt rename to src/perfmon_configs/gfx90a/pmc_tcp_perf.txt diff --git a/src/perfmon_pub/mi200/pmc_td_perf.txt b/src/perfmon_configs/gfx90a/pmc_td_perf.txt similarity index 100% rename from src/perfmon_pub/mi200/pmc_td_perf.txt rename to src/perfmon_configs/gfx90a/pmc_td_perf.txt diff --git a/src/perfmon_pub/metrics.xml b/src/perfmon_configs/metrics.xml similarity index 100% rename from src/perfmon_pub/metrics.xml rename to src/perfmon_configs/metrics.xml diff --git a/src/perfmon_pub/roofline/pmc_roof_perf.txt b/src/perfmon_configs/roofline/pmc_roof_perf.txt similarity index 100% rename from src/perfmon_pub/roofline/pmc_roof_perf.txt rename to src/perfmon_configs/roofline/pmc_roof_perf.txt diff --git a/src/profiler_base.py b/src/profiler_base.py deleted file mode 100644 index ec69ffb1b..000000000 --- a/src/profiler_base.py +++ /dev/null @@ -1,50 +0,0 @@ -##############################################################################bl -# MIT License -# -# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in all -# copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -# SOFTWARE. -##############################################################################el - -from abc import ABC, abstractmethod -# from utils2 import demarcate - -class OmniProfiler_Base(): - def __init__(self,soc,profiling_args): - self.__soc = soc - self.__args = profiling_args - - # Required methods to be implemented by child classes - @abstractmethod - def pre_processing(self): - """Perform any pre-processing steps prior to profiling. - """ - pass - - @abstractmethod - def run_profiling(self): - """Run profiling. - """ - pass - - @abstractmethod - def post_processing(self): - """Perform any post-processing steps prior to profiling. - """ - pass \ No newline at end of file diff --git a/src/profiler_rocprof.py b/src/profiler_rocprof.py deleted file mode 100644 index 533373ad7..000000000 --- a/src/profiler_rocprof.py +++ /dev/null @@ -1,49 +0,0 @@ -##############################################################################bl -# MIT License -# -# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in all -# copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -# SOFTWARE. -##############################################################################el - -import logging -from profiler_base import OmniProfiler_Base -from utils.utils import demarcate - -class rocprof_v1_profiler(OmniProfiler_Base): - - # Required child methods - @demarcate - def pre_processing(self): - """Perform any pre-processing steps prior to profiling. - """ - self.__profiler="rocprof" - logging.debug("[profiling] pre-processing using %s profiler (v1)" % self.__profiler) - - @demarcate - def run_profiling(self): - """Run profiling. - """ - logging.debug("[profiling] performing profiling using %s profiler (v1)" % self.__profiler) - - @demarcate - def post_processing(self): - """Perform any post-processing steps prior to profiling. - """ - logging.debug("[profiling] performing post-processing using %s profiler (v1)" % self.__profiler) diff --git a/src/roofline.py b/src/roofline.py new file mode 100644 index 000000000..11557eb6b --- /dev/null +++ b/src/roofline.py @@ -0,0 +1,384 @@ +##############################################################################bl +# MIT License +# +# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all +# copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +##############################################################################el + +from abc import ABC, abstractmethod +import logging +import os +import sys +import time +from dash import dcc +from utils.utils import mibench, gen_sysinfo, demarcate +from dash import html +import plotly.graph_objects as go +from utils.roofline_calc import calc_ai, constuct_roof +import numpy as np + +SYMBOLS = [0, 1, 2, 3, 4, 5, 13, 17, 18, 20] + +class Roofline: + def __init__(self, args): + self.__args = args + + def error(self,message): + logging.error("") + logging.error("[ERROR]: " + message) + logging.error("") + sys.exit(1) + def roof_setup(self): + # set default workload path if not specified + if self.__args.path == os.path.join(os.getcwd(), 'workloads'): + self.__args.path = os.path.join(self.__args.path, self.__args.name, self.__args.target) + # create new directory for roofline if it doesn't exist + if not os.path.isdir(self.__args.path): + os.makedirs(self.__args.path) + + # Main methods + @abstractmethod + def pre_processing(self): + self.roof_setup() + if self.__args.roof_only: + # check for sysinfo + logging.info("[roofline] Checking for sysinfo.csv in " + str(self.__args.path)) + sysinfo_path = os.path.join(self.__args.path, "sysinfo.csv") + if not os.path.isfile(sysinfo_path): + logging.info("[roofline] sysinfo.csv not found. Generating...") + gen_sysinfo(self.__args.name, self.__workload_dir, self.__args.ipblocks, self.__args.remaining, self.__args.no_roof) + + @abstractmethod + def profile(self): + if self.__args.roof_only: + # check for roofline benchmark + logging.info("[roofline] Checking for roofline.csv in " + str(self.__args.path)) + roof_path = os.path.join(self.__args.path, "roofline.csv") + if not os.path.isfile(roof_path): + mibench(self.__args) + + # check for profiling data + logging.info("[roofline] Checking for pmc_perf.csv in " + str(self.__args.path)) + app_path = os.path.join(self.__args.path, "pmc_perf.csv") + if not os.path.isfile(app_path): + logging.info("[roofline] pmc_perf.csv not found. Generating...") + if not self.__args.remaining: + self.error("An is required to run.\nomniperf profile -n test -- ") + #TODO: Add an equivelent of characterize_app() to run profiling directly out of this module + + elif self.__args.no_roof: + logging.info("[roofline] Skipping roofline.") + else: + mibench(self.__args) + + #NB: Currently the post_prossesing() method is the only one being used by omniperf, + # we include pre_processing() and profile() methods for those who wish to borrow the roofline module + @abstractmethod + def post_processing(self): + if self.__args.roof_only: + standalone_roofline(self.__args.path, self.__args.device, self.__args.sort, self.__args.mem_level, self.__args.kernel_names, self.__args.verbose) + +def to_int(a): + if str(type(a)) == "": + return np.nan + else: + return int(a) + +@demarcate +def standalone_roofline(path_to_dir, dev_id, sort_type, targ_mem_level, kernel_names, verbose): + import pandas as pd + from collections import OrderedDict + + # Change vL1D to a interpretable str, if required + if "vL1D" in targ_mem_level: + targ_mem_level.remove("vL1D") + targ_mem_level.append("L1") + + app_path = path_to_dir + "/pmc_perf.csv" + roofline_exists = os.path.isfile(app_path) + if not roofline_exists: + logging.error("[roofline] Error: {} does not exist".format(app_path)) + sys.exit(1) + t_df = OrderedDict() + t_df["pmc_perf"] = pd.read_csv(app_path) + empirical_roofline( + path_to_dir, + t_df, + verbose, + dev_id, # [Optional] Specify device id to collect roofline info from + sort_type, # [Optional] Sort AI by top kernels or dispatches + targ_mem_level, # [Optional] Toggle particular level(s) of memory hierarchy + kernel_names, # [Optional] Toggle overlay of kernel names in plot + True, # [Optional] Generate a standalone roofline analysis + ) + +@demarcate +def generate_plot( + roof_specs, ai_data, targ_mem_level, is_standalone, kernel_names, verbose, fig=None +) -> go.Figure(): + """Create graph object from ai_data (coordinate points) and ceiling_data (peak FLOP and BW) data. + """ + if fig is None: + fig = go.Figure() + plot_mode = "lines+text" if is_standalone else "lines" + ceiling_data = constuct_roof(roof_specs, targ_mem_level, verbose) + logging.debug("[roofline] Ceiling data:\n", ceiling_data) + + ####################### + # Plot ceilings + ####################### + if targ_mem_level == "ALL": + cache_hierarchy = ["HBM", "L2", "L1", "LDS"] + else: + cache_hierarchy = targ_mem_level + + # Plot peak BW ceiling(s) + for cache_level in cache_hierarchy: + fig.add_trace( + go.Scatter( + x=ceiling_data[cache_level.lower()][0], + y=ceiling_data[cache_level.lower()][1], + name="{}-{}".format(cache_level, roof_specs["dtype"]), + mode=plot_mode, + hovertemplate="%{text}", + text=[ + "{} GB/s".format(to_int(ceiling_data[cache_level.lower()][2])), + None + if is_standalone + else "{} GB/s".format(to_int(ceiling_data[cache_level.lower()][2])), + ], + textposition="top right", + ) + ) + + # Plot peak VALU ceiling + if roof_specs["dtype"] != "FP16" and roof_specs["dtype"] != "I8": + fig.add_trace( + go.Scatter( + x=ceiling_data["valu"][0], + y=ceiling_data["valu"][1], + name="Peak VALU-{}".format(roof_specs["dtype"]), + mode=plot_mode, + hovertemplate="%{text}", + text=[ + None + if is_standalone + else "{} GFLOP/s".format(to_int(ceiling_data["valu"][2])), + "{} GFLOP/s".format(to_int(ceiling_data["valu"][2])), + ], + textposition="top left", + ) + ) + + if roof_specs["dtype"] == "FP16": + pos = "bottom left" + else: + pos = "top left" + # Plot peak MFMA ceiling + fig.add_trace( + go.Scatter( + x=ceiling_data["mfma"][0], + y=ceiling_data["mfma"][1], + name="Peak MFMA-{}".format(roof_specs["dtype"]), + mode=plot_mode, + hovertemplate="%{text}", + text=[ + None + if is_standalone + else "{} GFLOP/s".format(to_int(ceiling_data["mfma"][2])), + "{} GFLOP/s".format(to_int(ceiling_data["mfma"][2])), + ], + textposition=pos, + ) + ) + ####################### + # Plot Application AI + ####################### + if roof_specs["dtype"] != "I8": + # Plot the arithmetic intensity points for each cache level + fig.add_trace( + go.Scatter( + x=ai_data["ai_l1"][0], + y=ai_data["ai_l1"][1], + name="ai_l1", + mode="markers", + marker={"color": "#00CC96"}, + marker_symbol=SYMBOLS if kernel_names else None, + ) + ) + fig.add_trace( + go.Scatter( + x=ai_data["ai_l2"][0], + y=ai_data["ai_l2"][1], + name="ai_l2", + mode="markers", + marker={"color": "#EF553B"}, + marker_symbol=SYMBOLS if kernel_names else None, + ) + ) + fig.add_trace( + go.Scatter( + x=ai_data["ai_hbm"][0], + y=ai_data["ai_hbm"][1], + name="ai_hbm", + mode="markers", + marker={"color": "#636EFA"}, + marker_symbol=SYMBOLS if kernel_names else None, + ) + ) + + # Set layout + fig.update_layout( + xaxis_title="Arithmetic Intensity (FLOPs/Byte)", + yaxis_title="Performance (GFLOP/sec)", + hovermode="x unified", + margin=dict(l=50, r=50, b=50, t=50, pad=4), + ) + fig.update_xaxes(type="log", autorange=True) + fig.update_yaxes(type="log", autorange=True) + + return fig + +@demarcate +def empirical_roofline( + path_to_dir, + ret_df, + verbose, + dev_id=None, + sort_type="kernels", + targ_mem_level="ALL", + incl_kernel_names=False, + is_standalone=False, +): + """Generate a set of empirical roofline plots given a directory containing required profiling and benchmarking data + """ + if incl_kernel_names and (not is_standalone): + logging.error("ERROR: --roof-only is required for --kernel-names") + sys.exit(1) + + # Set roofline specifications for targeted data types + fp32_details = { + "path": path_to_dir, + "sort": sort_type, + "device": 0, # hardcode gpu-id (for benchmark data extraction) to device 0 + "dtype": "FP32", + } + fp16_details = { + "path": path_to_dir, + "sort": sort_type, + "device": 0, + "dtype": "FP16", + } + int8_details = { + "path": path_to_dir, + "sort": sort_type, + "device": 0, + "dtype": "I8", + } + + # Create arithmetic intensity data that will populate the roofline model + logging.debug("[roofline] Path: ", path_to_dir) + ai_data = calc_ai(sort_type, ret_df, verbose) + + logging.debug("[roofline] AI at each mem level:") + for i in ai_data: + logging.debug(i, "->", ai_data[i]) + logging.debug("\n") + + # Generate a roofline figure for each data type + fp32_fig = generate_plot( + fp32_details, ai_data, targ_mem_level, is_standalone, incl_kernel_names, verbose + ) + fp16_fig = generate_plot( + fp16_details, ai_data, targ_mem_level, is_standalone, incl_kernel_names, verbose + ) + ml_combo_fig = generate_plot( + int8_details, ai_data, targ_mem_level, is_standalone, incl_kernel_names, verbose, fp16_fig + ) + # Create a legend and distinct kernel markers. This can be saved, optionally + legend = go.Figure( + go.Scatter( + mode="markers", + x=[0] * 10, + y=ai_data["kernelNames"], + marker_symbol=SYMBOLS, + marker_size=15, + ) + ) + legend.update_layout( + title="Kernel Names and Markers", + margin=dict(b=0, r=0), + xaxis_range=[-1, 1], + xaxis_side="top", + yaxis_side="right", + height=400, + width=1000, + ) + legend.update_xaxes(dtick=1) + # Output will be different depending on interaction type: + # Save PDFs if we're in "standalone roofline" mode, otherwise return HTML to be used in GUI output + if is_standalone: + dev_id = "ALL" if dev_id == -1 else str(dev_id) + + fp32_fig.write_image(path_to_dir + "/empirRoof_gpu-{}_fp32.pdf".format(dev_id)) + ml_combo_fig.write_image( + path_to_dir + "/empirRoof_gpu-{}_int8_fp16.pdf".format(dev_id) + ) + # only save a legend if kernel_names option is toggled + if incl_kernel_names: + legend.write_image(path_to_dir + "/kernelName_legend.pdf") + time.sleep(1) + # Re-save to remove loading MathJax pop up + fp32_fig.write_image(path_to_dir + "/empirRoof_gpu-{}_fp32.pdf".format(dev_id)) + ml_combo_fig.write_image( + path_to_dir + "/empirRoof_gpu-{}_int8_fp16.pdf".format(dev_id) + ) + if incl_kernel_names: + legend.write_image(path_to_dir + "/kernelName_legend.pdf") + logging.info("[roofline] Empirical Roofline PDFs saved!") + else: + return html.Section( + id="roofline", + children=[ + html.Div( + className="float-container", + children=[ + html.Div( + className="float-child", + children=[ + html.H3( + children="Empirical Roofline Analysis (FP32/FP64)" + ), + dcc.Graph(figure=fp32_fig), + ], + ), + html.Div( + className="float-child", + children=[ + html.H3( + children="Empirical Roofline Analysis (FP16/INT8)" + ), + dcc.Graph(figure=ml_combo_fig), + ], + ), + ], + ) + ], + ) diff --git a/src/utils/csv_processor.py b/src/utils/csv_processor.py index c4e340670..5795b0b07 100644 --- a/src/utils/csv_processor.py +++ b/src/utils/csv_processor.py @@ -33,7 +33,8 @@ from pymongo import MongoClient from tqdm import tqdm import glob -from common import resolve_rocprof +import re +import logging cache = dict() @@ -129,12 +130,12 @@ def shorten_file(df, level): if level < 5: cpp_filt = os.path.join("/usr", "bin", "c++filt") if not os.path.isfile(cpp_filt): - print( + logging.error( "Error: Could not resolve c++filt in expected directory: {}".format( cpp_filt ) ) - sys.exit(0) + sys.exit(1) for fpath in glob.glob(workload_dir + "/*.csv"): try: @@ -146,9 +147,9 @@ def shorten_file(df, level): modified_df = shorten_file(orig_df, level) modified_df.to_csv(fpath, index=False) except pd.errors.EmptyDataError: - print("Skipping empty csv " + str(fpath)) + logging.debug("[profiling] Skipping shortening on empty csv " + str(fpath)) - print("KernelName shortening complete!") + logging.info("[profiling] KernelName shortening complete!") # Verify target directory and setup connection diff --git a/src/utils/perfagg.py b/src/utils/perfagg.py deleted file mode 100755 index c486faccf..000000000 --- a/src/utils/perfagg.py +++ /dev/null @@ -1,555 +0,0 @@ -##############################################################################bl -# MIT License -# -# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in all -# copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -# SOFTWARE. -##############################################################################el - -import sys, os, shutil, glob, re -import numpy as np -import math -import warnings -import pandas as pd - -prog = "omniperf" - -# Per IP block max number of simulutaneous counters -# GFX IP Blocks -perfmon_config = { - "vega10": { - "SQ": 8, - "TA": 2, - "TD": 2, - "TCP": 4, - "TCC": 4, - "CPC": 2, - "CPF": 2, - "SPI": 2, - "GRBM": 2, - "GDS": 4, - "TCC_channels": 16, - }, - "mi50": { - "SQ": 8, - "TA": 2, - "TD": 2, - "TCP": 4, - "TCC": 4, - "CPC": 2, - "CPF": 2, - "SPI": 2, - "GRBM": 2, - "GDS": 4, - "TCC_channels": 16, - }, - "mi100": { - "SQ": 8, - "TA": 2, - "TD": 2, - "TCP": 4, - "TCC": 4, - "CPC": 2, - "CPF": 2, - "SPI": 2, - "GRBM": 2, - "GDS": 4, - "TCC_channels": 32, - }, - "mi200": { - "SQ": 8, - "TA": 2, - "TD": 2, - "TCP": 4, - "TCC": 4, - "CPC": 2, - "CPF": 2, - "SPI": 2, - "GRBM": 2, - "GDS": 4, - "TCC_channels": 32, - }, -} - - -def test_df_column_equality(df): - return df.eq(df.iloc[:, 0], axis=0).all(1).all() - - -# joins disparate runs less dumbly than rocprof -def join_prof(workload_dir, join_type, log_file, verbose, out=None): - # Set default output directory if not specified - if type(workload_dir) == str: - if out is None: - out = workload_dir + "/pmc_perf.csv" - files = glob.glob(workload_dir + "/" + "pmc_perf_*.csv") - elif type(workload_dir) == list: - files = workload_dir - else: - print("ERROR: Invalid workload_dir") - sys.exit(1) - - df = None - for i, file in enumerate(files): - _df = pd.read_csv(file) if type(workload_dir) == str else file - if join_type == "kernel": - key = _df.groupby("KernelName").cumcount() - _df["key"] = _df.KernelName + " - " + key.astype(str) - elif join_type == "grid": - key = _df.groupby(["KernelName", "grd"]).cumcount() - _df["key"] = ( - _df.KernelName + " - " + _df.grd.astype(str) + " - " + key.astype(str) - ) - else: - print("ERROR: Unrecognized --join-type") - sys.exit(1) - - if df is None: - df = _df - else: - # join by unique index of kernel - df = pd.merge(df, _df, how="inner", on="key", suffixes=("", f"_{i}")) - - # TODO: check for any mismatch in joins - duplicate_cols = { - "gpu": [col for col in df.columns if "gpu" in col], - "grd": [col for col in df.columns if "grd" in col], - "wgr": [col for col in df.columns if "wgr" in col], - "lds": [col for col in df.columns if "lds" in col], - "scr": [col for col in df.columns if "scr" in col], - "spgr": [col for col in df.columns if "sgpr" in col], - } - # Check for vgpr counter in ROCm < 5.3 - if "vgpr" in df.columns: - duplicate_cols["vgpr"] = [col for col in df.columns if "vgpr" in col] - # Check for vgpr counter in ROCm >= 5.3 - else: - duplicate_cols["arch_vgpr"] = [col for col in df.columns if "arch_vgpr" in col] - duplicate_cols["accum_vgpr"] = [col for col in df.columns if "accum_vgpr" in col] - for key, cols in duplicate_cols.items(): - _df = df[cols] - if not test_df_column_equality(_df): - msg = ( - "WARNING: Detected differing {} values while joining pmc_perf.csv".format( - key - ) - ) - warnings.warn(msg) - if log_file: - log_file.write(msg + "\n") - else: - msg = "Successfully joined {} in pmc_perf.csv".format(key) - if log_file: - log_file.write(msg + "\n") - if test_df_column_equality(_df) and verbose: - print(msg) - - # now, we can: - #   A) throw away any of the "boring" duplicats - df = df[ - [ - k - for k in df.keys() - if not any( - check in k - for check in [ - # removed merged counters, keep original - "gpu-id_", - "grd_", - "wgr_", - "lds_", - "scr_", - "vgpr_", - "sgpr_", - "Index_", - # un-mergable, remove all - "queue-id", - "queue-index", - "pid", - "tid", - "fbar", - "sig", - "obj", - # rocscope specific merged counters, keep original - "dispatch_", - ] - ) - ] - ] - #   B) any timestamps that are _not_ the duration, which is the one we care - #   about - df = df[ - [ - k - for k in df.keys() - if not any( - check in k - for check in [ - "DispatchNs", - "CompleteNs", - # rocscope specific timestamp - "HostDuration", - ] - ) - ] - ] - #   C) sanity check the name and key - namekeys = [k for k in df.keys() if "KernelName" in k] - assert len(namekeys) - for k in namekeys[1:]: - assert (df[namekeys[0]] == df[k]).all() - df = df.drop(columns=namekeys[1:]) - # now take the median of the durations - bkeys = [] - ekeys = [] - for k in df.keys(): - if "Begin" in k: - bkeys.append(k) - if "End" in k: - ekeys.append(k) - # compute mean begin and end timestamps - endNs = df[ekeys].mean(axis=1) - beginNs = df[bkeys].mean(axis=1) - # and replace - df = df.drop(columns=bkeys) - df = df.drop(columns=ekeys) - df["BeginNs"] = beginNs - df["EndNs"] = endNs - # finally, join the drop key - df = df.drop(columns=["key"]) - # save to file and delete old file(s), skip if we're being called outside of Omniperf - if type(workload_dir) == str: - df.to_csv(out, index=False) - if not verbose: - for file in files: - os.remove(file) - else: - return df - - -def pmc_perf_split(workload_dir): - workload_perfmon_dir = workload_dir + "/perfmon" - lines = open(workload_perfmon_dir + "/pmc_perf.txt", "r").read().splitlines() - - # Iterate over each line in pmc_perf.txt - mpattern = r"^pmc:(.*)" - i = 0 - for line in lines: - # Verify no comments - stext = line.split("#")[0].strip() - if not stext: - continue - - # all pmc counters start with "pmc:" - m = re.match(mpattern, stext) - if m is None: - continue - - # Create separate file for each line - fd = open(workload_perfmon_dir + "/pmc_perf_" + str(i) + ".txt", "w") - fd.write(stext + "\n\n") - fd.write("gpu:\n") - fd.write("range:\n") - fd.write("kernel:\n") - fd.close() - - i += 1 - - # Remove old pmc_perf.txt input from perfmon dir - os.remove(workload_perfmon_dir + "/pmc_perf.txt") - - -def update_pmc_bucket( - counters, save_file, soc, pmc_list=None, stext=None, workload_perfmon_dir=None -): - # Verify inputs. - # If save_file is True, we're being called internally, from perfmon_coalesce - # Else we're being called externally, from rocomni - detected_external_call = False - if save_file and (stext is None or workload_perfmon_dir is None): - raise ValueError( - "stext and workload_perfmon_dir must be specified if save_file is True" - ) - if pmc_list is None: - detected_external_call = True - pmc_list = dict( - [ - ("SQ", []), - ("GRBM", []), - ("TCP", []), - ("TA", []), - ("TD", []), - ("TCC", []), - ("SPI", []), - ("CPC", []), - ("CPF", []), - ("GDS", []), - ("TCC2", {}), # per-channel TCC perfmon - ] - ) - for ch in range(perfmon_config[soc]["TCC_channels"]): - pmc_list["TCC2"][str(ch)] = [] - - if "SQ_ACCUM_PREV_HIRES" in counters and not detected_external_call: - # save all level counters separately - nindex = counters.index("SQ_ACCUM_PREV_HIRES") - level_counter = counters[nindex - 1] - - if save_file: - # Save to level counter file, file name = level counter name - fd = open(workload_perfmon_dir + "/" + level_counter + ".txt", "w") - fd.write(stext + "\n\n") - fd.write("gpu:\n") - fd.write("range:\n") - fd.write("kernel:\n") - fd.close() - - return pmc_list - - # save normal pmc counters in matching buckets - for counter in counters: - IP_block = counter.split(sep="_")[0].upper() - # SQC and SQ belong to the IP block, coalesce them - if IP_block == "SQC": - IP_block = "SQ" - - if IP_block != "TCC": - # Insert unique pmc counters into its bucket - if counter not in pmc_list[IP_block]: - pmc_list[IP_block].append(counter) - - else: - # TCC counters processing - m = re.match(r"[\s\S]+\[(\d+)\]", counter) - if m is None: - # Aggregated TCC counters - if counter not in pmc_list[IP_block]: - pmc_list[IP_block].append(counter) - - else: - # TCC channel ID - ch = m.group(1) - - # fake IP block for per channel TCC - if str(ch) in pmc_list["TCC2"]: - # append unique counter into the channel - if counter not in pmc_list["TCC2"][str(ch)]: - pmc_list["TCC2"][str(ch)].append(counter) - else: - # initial counter in this channel - pmc_list["TCC2"][str(ch)] = [counter] - - if detected_external_call: - # sort the per channel counter, so that same counter in all channels can be aligned - for ch in range(perfmon_config[soc]["TCC_channels"]): - pmc_list["TCC2"][str(ch)].sort() - return pmc_list - - -def perfmon_coalesce(pmc_files_list, soc, workload_dir): - workload_perfmon_dir = workload_dir + "/perfmon" - - # match pattern for pmc counters - mpattern = r"^pmc:(.*)" - pmc_list = dict( - [ - ("SQ", []), - ("GRBM", []), - ("TCP", []), - ("TA", []), - ("TD", []), - ("TCC", []), - ("SPI", []), - ("CPC", []), - ("CPF", []), - ("GDS", []), - ("TCC2", {}), # per-channel TCC perfmon - ] - ) - for ch in range(perfmon_config[soc]["TCC_channels"]): - pmc_list["TCC2"][str(ch)] = [] - - # Extract all PMC counters and store in separate buckets - for fname in pmc_files_list: - lines = open(fname, "r").read().splitlines() - - for line in lines: - # Strip all comements, skip empty lines - stext = line.split("#")[0].strip() - if not stext: - continue - - # all pmc counters start with "pmc:" - m = re.match(mpattern, stext) - if m is None: - continue - - # we have found all the counters, store them in buckets - counters = m.group(1).split() - - # Utilitze helper function once a list of counters has be extracted - save_file = True - pmc_list = update_pmc_bucket( - counters, save_file, soc, pmc_list, stext, workload_perfmon_dir - ) - - # add a timestamp file - fd = open(workload_perfmon_dir + "/timestamps.txt", "w") - fd.write("pmc:\n\n") - fd.write("gpu:\n") - fd.write("range:\n") - fd.write("kernel:\n") - fd.close() - - # sort the per channel counter, so that same counter in all channels can be aligned - for ch in range(perfmon_config[soc]["TCC_channels"]): - pmc_list["TCC2"][str(ch)].sort() - - return pmc_list - - -def perfmon_emit(pmc_list, soc, workload_dir=None): - # Calculate the minimum number of iteration to save the pmc counters - # non-TCC counters - pmc_cnt = [ - len(pmc_list[key]) / perfmon_config[soc][key] - for key in pmc_list - if key not in ["TCC", "TCC2"] - ] - - # TCC counters - tcc_channels = perfmon_config[soc]["TCC_channels"] - - tcc_cnt = len(pmc_list["TCC"]) / perfmon_config[soc]["TCC"] - tcc2_cnt = ( - np.array([len(pmc_list["TCC2"][str(ch)]) for ch in range(tcc_channels)]) - / perfmon_config[soc]["TCC"] - ) - - # Total number iterations to write pmc: counters line - niter = max(math.ceil(max(pmc_cnt)), math.ceil(tcc_cnt) + math.ceil(max(tcc2_cnt))) - - # Emit PMC counters into pmc config file - if workload_dir: - workload_perfmon_dir = workload_dir + "/perfmon" - fd = open(workload_perfmon_dir + "/pmc_perf.txt", "w") - else: - batches = [] - - tcc2_index = 0 - for iter in range(niter): - # Prefix - line = "pmc: " - - # Add all non-TCC counters - for key in pmc_list: - if key not in ["TCC", "TCC2"]: - N = perfmon_config[soc][key] - ip_counters = pmc_list[key][iter * N : iter * N + N] - if ip_counters: - line = line + " " + " ".join(ip_counters) - - # Add TCC counters - N = perfmon_config[soc]["TCC"] - tcc_counters = pmc_list["TCC"][iter * N : iter * N + N] - - if not tcc_counters: - # TCC per-channel counters - for ch in range(perfmon_config[soc]["TCC_channels"]): - tcc_counters += pmc_list["TCC2"][str(ch)][ - tcc2_index * N : tcc2_index * N + N - ] - - tcc2_index += 1 - - # TCC aggregated counters - line = line + " " + " ".join(tcc_counters) - if workload_dir: - fd.write(line + "\n") - else: - b = line.split() - b.remove("pmc:") - batches.append(b) - - if workload_dir: - fd.write("\ngpu:\n") - fd.write("range:\n") - fd.write("kernel:\n") - fd.close() - else: - return batches - - -def perfmon_filter(workload_dir, perfmon_dir, args): - workload_perfmon_dir = workload_dir + "/perfmon" - soc = args.target - - # Initialize directories - # TODO: Modify this so that data is appended to previous? - if not os.path.isdir(workload_dir): - os.makedirs(workload_dir) - else: - shutil.rmtree(workload_dir) - - os.makedirs(workload_perfmon_dir) - - ref_pmc_files_list = glob.glob(perfmon_dir + "/" + "pmc_*perf*.txt") - ref_pmc_files_list += glob.glob(perfmon_dir + "/" + soc + "/pmc_*_perf*.txt") - - # Perfmon list filtering - if args.ipblocks != None: - for i in range(len(args.ipblocks)): - args.ipblocks[i] = args.ipblocks[i].lower() - mpattern = "pmc_([a-zA-Z0-9_]+)_perf*" - - pmc_files_list = [] - for fname in ref_pmc_files_list: - fbase = os.path.splitext(os.path.basename(fname))[0] - ip = re.match(mpattern, fbase).group(1) - if ip in args.ipblocks: - pmc_files_list.append(fname) - print("fname: " + fbase + ": Added") - else: - print("fname: " + fbase + ": Skipped") - - else: - # default: take all perfmons - pmc_files_list = ref_pmc_files_list - - # Coalesce and writeback workload specific perfmon - pmc_list = perfmon_coalesce(pmc_files_list, soc, workload_dir) - perfmon_emit(pmc_list, soc, workload_dir) - - -def pmc_filter(workload_dir, perfmon_dir, soc): - workload_perfmon_dir = workload_dir + "/perfmon" - - if not os.path.isdir(workload_perfmon_dir): - os.makedirs(workload_perfmon_dir) - else: - shutil.rmtree(workload_perfmon_dir) - - ref_pmc_files_list = glob.glob(perfmon_dir + "/roofline/" + "pmc_roof_perf.txt") - # ref_pmc_files_list += glob.glob(perfmon_dir + "/" + soc + "/pmc_*_perf*.txt") - - pmc_files_list = ref_pmc_files_list - - # Coalesce and writeback workload specific perfmon - pmc_list = perfmon_coalesce(pmc_files_list, soc, workload_dir) - perfmon_emit(pmc_list, soc, workload_dir) diff --git a/src/utils/roofline_calc.py b/src/utils/roofline_calc.py new file mode 100644 index 000000000..9c3815dd4 --- /dev/null +++ b/src/utils/roofline_calc.py @@ -0,0 +1,533 @@ +##############################################################################bl +# MIT License +# +# Copyright (c) 2021 - 2023 Advanced Micro Devices, Inc. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in all +# copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +##############################################################################el + +import sys + +from dataclasses import dataclass +import csv + +################################################ +# Global vars +################################################ + +IMGNAME = "empirRoof" + +L2_BANKS = 32 # default assuming mi200 + +XMIN = 0.01 +XMAX = 1000 + +FONT_SIZE = 16 +FONT_COLOR = "black" +FONT_WEIGHT = "bold" + +SUPPORTED_SOC = ["mi200"] + +TOP_N = 10 + + +################################################ +# Helper funcs +################################################ +@dataclass +class AI_Data: + KernelName: str + numCalls: float + + total_flops: float + valu_flops: float + mfma_flops_f16: float + mfma_flops_bf16: float + mfma_flops_f32: float + mfma_flops_f64: float + mfma_iops_i8: float + lds_data: float + L1cache_data: float + L2cache_data: float + hbm_data: float + + totalDuration: float + avgDuration: float + + +def get_font(): + return { + "size": FONT_SIZE, + "color": FONT_COLOR, + "weight": FONT_WEIGHT, + "family": "serif", + } + + +def get_color(catagory): + if catagory == "ai_l1": + return "green" + elif catagory == "ai_l2": + return "blue" + elif catagory == "ai_hbm": + return "red" + else: + raise RuntimeError("Invalid catagory passed to get_color()") + + +# ------------------------------------------------------------------------------------- +# Plot BW at each cache level +# ------------------------------------------------------------------------------------- +def calc_ceilings(roof_specs, benchmark_data, targ_mem_level, verbose): + """Given benchmarking data, calculate ceilings (or peak performance) for empirical roofline + """ + # TODO: This is where filtering by memory level will need to occur for standalone + graphPoints = {"hbm": [], "l2": [], "l1": [], "lds": [], "valu": [], "mfma": []} + + if targ_mem_level == "ALL": + cacheHierarchy = ["HBM", "L2", "L1", "LDS"] + else: + cacheHierarchy = targ_mem_level + + x1 = y1 = x2 = y2 = -1 + x1_mfma = y1_mfma = x2_mfma = y2_mfma = -1 + target_precision = roof_specs["dtype"][2:] + + if roof_specs["dtype"] != "FP16" and roof_specs["dtype"] != "I8": + peakOps = float( + benchmark_data[roof_specs["dtype"] + "Flops"][roof_specs["device"]] + ) + for i in range(0, len(cacheHierarchy)): + # Plot BW line + if verbose >= 3: + print("Current cache level is ", cacheHierarchy[i]) + curr_bw = cacheHierarchy[i] + "Bw" + peakBw = float(benchmark_data[curr_bw][roof_specs["device"]]) + + if roof_specs["dtype"] == "I8": + peakMFMA = float(benchmark_data["MFMAI8Ops"][roof_specs["device"]]) + else: + peakMFMA = float( + benchmark_data["MFMAF{}Flops".format(target_precision)][roof_specs["device"]] + ) + + x1 = float(XMIN) + y1 = float(XMIN) * peakBw + # Note: No reg peakOps for FP16 or INT8 + if roof_specs["dtype"] != "FP16" and roof_specs["dtype"] != "I8": + x2 = peakOps / peakBw + y2 = peakOps + + # Plot MFMA lines (NOTE: Assuming MI200 soc) + x1_mfma = peakOps / peakBw + y1_mfma = peakOps + + x2_mfma = peakMFMA / peakBw + y2_mfma = peakMFMA + + # These are the points to use: + if verbose >= 3: + print("x = [{}, {}]".format(x1, x2_mfma)) + print("y = [{}, {}]".format(y1, y2_mfma)) + + graphPoints[cacheHierarchy[i].lower()].append([x1, x2_mfma]) + graphPoints[cacheHierarchy[i].lower()].append([y1, y2_mfma]) + graphPoints[cacheHierarchy[i].lower()].append(peakBw) + + # ------------------------------------------------------------------------------------- + # Plot computing roof + # ------------------------------------------------------------------------------------- + # Note: No FMA roof for FP16 or INT8 + if roof_specs["dtype"] != "FP16" and roof_specs["dtype"] != "I8": + # Plot FMA roof + x0 = XMAX + if x2 < x0: + x0 = x2 + + if verbose >= 3: + print("FMA ROOF [{}, {}], [{},{}]".format(x0, XMAX, peakOps, peakOps)) + graphPoints["valu"].append([x0, XMAX]) + graphPoints["valu"].append([peakOps, peakOps]) + graphPoints["valu"].append(peakOps) + + # Plot MFMA roof + if ( + x1_mfma != -1 or roof_specs["dtype"] == "FP16" or roof_specs["dtype"] == "I8" + ): # assert that mfma has been assigned + x0_mfma = XMAX + if x2_mfma < x0_mfma: + x0_mfma = x2_mfma + + if verbose >= 3: + print("MFMA ROOF [{}, {}], [{},{}]".format(x0_mfma, XMAX, peakMFMA, peakMFMA)) + graphPoints["mfma"].append([x0_mfma, XMAX]) + graphPoints["mfma"].append([peakMFMA, peakMFMA]) + graphPoints["mfma"].append(peakMFMA) + + return graphPoints + + +# ------------------------------------------------------------------------------------- +# Overlay application performance +# ------------------------------------------------------------------------------------- +# Calculate relevent metrics for ai calculation +def calc_ai(sort_type, ret_df, verbose): + """Given counter data, caclulate arithmetic intensity for each kernel in the application. + """ + df = ret_df["pmc_perf"] + # Sort by top kernels or top dispatches? + df = df.sort_values(by=["KernelName"]) + df = df.reset_index(drop=True) + + total_flops = ( + valu_flops + ) = ( + mfma_flops_bf16 + ) = ( + mfma_flops_f16 + ) = ( + mfma_iops_i8 + ) = ( + mfma_flops_f32 + ) = ( + mfma_flops_f64 + ) = ( + lds_data + ) = L1cache_data = L2cache_data = hbm_data = calls = totalDuration = avgDuration = 0.0 + + kernelName = "" + + myList = [] + at_end = False + next_kernelName = "" + + for idx in df.index: + # CASE: Top kernels + # Calculate + append AI data if + # a) current KernelName is different than previous OR + # b) We've reached the end of list + if idx + 1 == df.shape[0]: + at_end = True + else: + next_kernelName = df["KernelName"][idx + 1] + + kernelName = df["KernelName"][idx] + try: + total_flops += ( + ( + 64 + * ( + df["SQ_INSTS_VALU_ADD_F16"][idx] + + df["SQ_INSTS_VALU_MUL_F16"][idx] + + (2 * df["SQ_INSTS_VALU_FMA_F16"][idx]) + + df["SQ_INSTS_VALU_TRANS_F16"][idx] + ) + ) + + ( + 64 + * ( + df["SQ_INSTS_VALU_ADD_F32"][idx] + + df["SQ_INSTS_VALU_MUL_F32"][idx] + + (2 * df["SQ_INSTS_VALU_FMA_F32"][idx]) + + df["SQ_INSTS_VALU_TRANS_F32"][idx] + ) + ) + + ( + 64 + * ( + df["SQ_INSTS_VALU_ADD_F64"][idx] + + df["SQ_INSTS_VALU_MUL_F64"][idx] + + (2 * df["SQ_INSTS_VALU_FMA_F64"][idx]) + + df["SQ_INSTS_VALU_TRANS_F64"][idx] + ) + ) + + (df["SQ_INSTS_VALU_MFMA_MOPS_F16"][idx] * 512) + + (df["SQ_INSTS_VALU_MFMA_MOPS_BF16"][idx] * 512) + + (df["SQ_INSTS_VALU_MFMA_MOPS_F32"][idx] * 512) + + (df["SQ_INSTS_VALU_MFMA_MOPS_F64"][idx] * 512) + ) + except KeyError: + if verbose >= 3: + print("{}: Skipped total_flops at index {}".format(kernelName[:35], idx)) + pass + try: + valu_flops += ( + 64 + * ( + df["SQ_INSTS_VALU_ADD_F16"][idx] + + df["SQ_INSTS_VALU_MUL_F16"][idx] + + (2 * df["SQ_INSTS_VALU_FMA_F16"][idx]) + + df["SQ_INSTS_VALU_TRANS_F16"][idx] + ) + + 64 + * ( + df["SQ_INSTS_VALU_ADD_F32"][idx] + + df["SQ_INSTS_VALU_MUL_F32"][idx] + + (2 * df["SQ_INSTS_VALU_FMA_F32"][idx]) + + df["SQ_INSTS_VALU_TRANS_F32"][idx] + ) + + 64 + * ( + df["SQ_INSTS_VALU_ADD_F64"][idx] + + df["SQ_INSTS_VALU_MUL_F64"][idx] + + (2 * df["SQ_INSTS_VALU_FMA_F64"][idx]) + + df["SQ_INSTS_VALU_TRANS_F64"][idx] + ) + ) + except KeyError: + if verbose >= 3: + print("{}: Skipped valu_flops at index {}".format(kernelName[:35], idx)) + pass + + try: + mfma_flops_f16 += df["SQ_INSTS_VALU_MFMA_MOPS_F16"][idx] * 512 + mfma_flops_bf16 += df["SQ_INSTS_VALU_MFMA_MOPS_BF16"][idx] * 512 + mfma_flops_f32 += df["SQ_INSTS_VALU_MFMA_MOPS_F32"][idx] * 512 + mfma_flops_f64 += df["SQ_INSTS_VALU_MFMA_MOPS_F64"][idx] * 512 + mfma_iops_i8 += df["SQ_INSTS_VALU_MFMA_MOPS_I8"][idx] * 512 + except KeyError: + if verbose >= 3: + print("{}: Skipped mfma ops at index {}".format(kernelName[:35], idx)) + pass + + try: + lds_data += ( + (df["SQ_LDS_IDX_ACTIVE"][idx] - df["SQ_LDS_BANK_CONFLICT"][idx]) + * 4 + * L2_BANKS + ) # L2_BANKS = 32 (since assuming mi200) + except KeyError: + if verbose >= 3: + print("{}: Skipped lds_data at index {}".format(kernelName[:35], idx)) + pass + + try: + L1cache_data += df["TCP_TOTAL_CACHE_ACCESSES_sum"][idx] * 64 + except KeyError: + if verbose >= 3: + print("{}: Skipped L1cache_data at index {}".format(kernelName[:35], idx)) + pass + + try: + L2cache_data += ( + df["TCP_TCC_WRITE_REQ_sum"][idx] * 64 + + df["TCP_TCC_ATOMIC_WITH_RET_REQ_sum"][idx] * 64 + + df["TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum"][idx] * 64 + + df["TCP_TCC_READ_REQ_sum"][idx] * 64 + ) + except KeyError: + if verbose >= 3: + print("{}: Skipped L2cache_data at index {}".format(kernelName[:35], idx)) + pass + try: + hbm_data += ( + (df["TCC_EA_RDREQ_32B_sum"][idx] * 32) + + ((df["TCC_EA_RDREQ_sum"][idx] - df["TCC_EA_RDREQ_32B_sum"][idx]) * 64) + + (df["TCC_EA_WRREQ_64B_sum"][idx] * 64) + + ((df["TCC_EA_WRREQ_sum"][idx] - df["TCC_EA_WRREQ_64B_sum"][idx]) * 32) + ) + except KeyError: + if verbose >= 3: + print("{}: Skipped hbm_data at index {}".format(kernelName[:35], idx)) + pass + + totalDuration += df["EndNs"][idx] - df["BeginNs"][idx] + avgDuration += df["EndNs"][idx] - df["BeginNs"][idx] + + calls += 1 + + if sort_type == "kernels" and (at_end == True or (kernelName != next_kernelName)): + myList.append( + AI_Data( + kernelName, + calls, + total_flops / calls, + valu_flops / calls, + mfma_flops_f16 / calls, + mfma_flops_bf16 / calls, + mfma_flops_f32 / calls, + mfma_flops_f64 / calls, + mfma_iops_i8 / calls, + lds_data / calls, + L1cache_data / calls, + L2cache_data / calls, + hbm_data / calls, + totalDuration, + avgDuration / calls, + ) + ) + if verbose >= 2: + print( + "Just added {} to AI_Data at index {}. # of calls: {}".format( + kernelName, idx, calls + ) + ) + total_flops = ( + valu_flops + ) = ( + mfma_flops_bf16 + ) = ( + mfma_flops_f16 + ) = ( + mfma_iops_i8 + ) = ( + mfma_flops_f32 + ) = ( + mfma_flops_f64 + ) = ( + lds_data + ) = ( + L1cache_data + ) = L2cache_data = hbm_data = calls = totalDuration = avgDuration = 0.0 + + if sort_type == "dispatches": + myList.append( + AI_Data( + kernelName, + calls, + total_flops, + valu_flops, + mfma_flops_f16, + mfma_flops_bf16, + mfma_flops_f32, + mfma_flops_f64, + mfma_iops_i8, + lds_data, + L1cache_data, + L2cache_data, + hbm_data, + totalDuration, + avgDuration, + ) + ) + total_flops = ( + valu_flops + ) = ( + mfma_flops_bf16 + ) = ( + mfma_flops_f16 + ) = ( + mfma_iops_i8 + ) = ( + mfma_flops_f32 + ) = ( + mfma_flops_f64 + ) = ( + lds_data + ) = ( + L1cache_data + ) = L2cache_data = hbm_data = calls = totalDuration = avgDuration = 0.0 + + myList.sort(key=lambda x: x.totalDuration, reverse=True) + + # print("Top 5 intensities ('{}')...".format(roof_details["sort"])) + intensities = {"ai_l1": [], "ai_l2": [], "ai_hbm": []} + curr_perf = [] + kernelNames = [] + i = 0 + # Create list of top 5 intensities + while i < TOP_N and i != len(myList): + kernelNames.append(myList[i].KernelName) + intensities["ai_l1"].append( + myList[i].total_flops / myList[i].L1cache_data + ) if myList[i].L1cache_data else intensities["ai_l1"].append(0) + # print("cur_ai_L1", myList[i].total_flops/myList[i].L1cache_data) if myList[i].L1cache_data else print("null") + # print() + intensities["ai_l2"].append( + myList[i].total_flops / myList[i].L2cache_data + ) if myList[i].L2cache_data else intensities["ai_l2"].append(0) + # print("cur_ai_L2", myList[i].total_flops/myList[i].L2cache_data) if myList[i].L2cache_data else print("null") + # print() + intensities["ai_hbm"].append( + myList[i].total_flops / myList[i].hbm_data + ) if myList[i].hbm_data else intensities["ai_hbm"].append(0) + # print("cur_ai_hbm", myList[i].total_flops/myList[i].hbm_data) if myList[i].hbm_data else print("null") + # print() + curr_perf.append(myList[i].total_flops / myList[i].avgDuration) if myList[ + i + ].avgDuration else curr_perf.append(0) + # print("cur_perf", myList[i].total_flops/myList[i].avgDuration) if myList[i].avgDuration else print("null") + + i += 1 + + intensityPoints = {"ai_l1": [], "ai_l2": [], "ai_hbm": []} + + for i in intensities: + values = intensities[i] + + color = get_color(i) + x = [] + y = [] + for entryIndx in range(0, len(values)): + x.append(values[entryIndx]) + y.append(curr_perf[entryIndx]) + + intensityPoints[i].append(x) + intensityPoints[i].append(y) + + # Add an entry for kernel names + intensityPoints["kernelNames"] = kernelNames + + return intensityPoints + + +def constuct_roof(roof_specs, targ_mem_level, verbose): + benchmark_results = roof_specs["path"] + "/roofline.csv" + # ----------------------------------------------------- + # Initialize roofline data dictionary from roofline.csv + # ----------------------------------------------------- + benchmark_data = ( + {} + ) # TODO: consider changing this to an ordered dict for consistency over py versions + headers = [] + try: + with open(benchmark_results, "r") as csvfile: + csvReader = csv.reader(csvfile, delimiter=",") + rowCount = 0 + for row in csvReader: + row.pop(0) # remove devID + if rowCount == 0: + headers = row + for i in headers: + benchmark_data[i] = [] + else: + for i, key in enumerate(headers): + benchmark_data[key].append(row[i]) + + rowCount += 1 + csvfile.close() + except: + graphPoints = { + "hbm": [None, None, None], + "l2": [None, None, None], + "l1": [None, None, None], + "lds": [None, None, None], + "valu": [None, None, None], + "mfma": [None, None, None], + } + return graphPoints + + # ------------------ + # Generate Roofline + # ------------------ + results = calc_ceilings(roof_specs, benchmark_data, targ_mem_level, verbose) + # for key in results: + # print(key, "->", results[key]) + + return results diff --git a/src/utils/utils.py b/src/utils/utils.py index 9115c8551..b0d18cf73 100644 --- a/src/utils/utils.py +++ b/src/utils/utils.py @@ -23,6 +23,21 @@ ##############################################################################el import logging +import sys +import subprocess +import shutil +import os +import io +import selectors +import pandas as pd +import glob +from utils import specs +from datetime import datetime +from pathlib import Path as path +import config + + +rocprof_cmd = "" def demarcate(function): def wrap_function(*args, **kwargs): @@ -33,4 +48,355 @@ def wrap_function(*args, **kwargs): return wrap_function def trace_logger(message, *args, **kwargs): - logging.log(logging.TRACE, message, *args, **kwargs) \ No newline at end of file + logging.log(logging.TRACE, message, *args, **kwargs) + +def get_version(omniperf_home) -> dict: + """Return Omniperf versioning info + """ + # symantic version info + version = os.path.join(omniperf_home.parent, "VERSION") + try: + with open(version, "r") as file: + VER = file.read().replace("\n", "") + except EnvironmentError: + logging.critical("ERROR: Cannot find VERSION file at {}".format(version)) + sys.exit(1) + + # git version info + gitDir = os.path.join(omniperf_home.parent, ".git") + if (shutil.which("git") is not None) and os.path.exists(gitDir): + gitQuery = subprocess.run( + ["git", "log", "--pretty=format:%h", "-n", "1"], + stdout=subprocess.PIPE, + stderr=subprocess.DEVNULL, + ) + if gitQuery.returncode != 0: + SHA = "unknown" + MODE = "unknown" + else: + SHA = gitQuery.stdout.decode("utf-8") + MODE = "dev" + else: + shaFile = os.path.join(omniperf_home.parent, "VERSION.sha") + try: + with open(shaFile, "r") as file: + SHA = file.read().replace("\n", "") + except EnvironmentError: + logging.error("ERROR: Cannot find VERSION.sha file at {}".format(shaFile)) + sys.exit(1) + + MODE = "release" + + versionData = {"version": VER, "sha": SHA, "mode": MODE} + return versionData + +def get_version_display(version, sha, mode): + """Pretty print versioning info + """ + buf = io.StringIO() + print("-" * 40, file=buf) + print("Omniperf version: %s (%s)" % (version, mode), file=buf) + print("Git revision: %s" % sha, file=buf) + print("-" * 40, file=buf) + return buf.getvalue() + +def detect_rocprof(): + """Detect loaded rocprof version. Resolve path and set cmd globally. + """ + global rocprof_cmd + # rocprof info + if not "ROCPROF" in os.environ.keys(): + rocprof_cmd = "rocprofv2" + else: + rocprof_cmd = os.environ["ROCPROF"] + rocprof_path = shutil.which(rocprof_cmd) + + # TODO: this could be more elegant, clean code later + if not rocprof_path: + rocprof_cmd = "rocprof" + rocprof_path = shutil.which(rocprof_cmd) + + if not rocprof_path: + logging.error("\nError: Unable to resolve path to %s binary" % rocprof_cmd) + logging.error( + "Please verify installation or set ROCPROF environment variable with full path." + ) + sys.exit(1) + else: + # Resolve any sym links in file path + rocprof_path = os.path.realpath(rocprof_path.rstrip("\n")) + logging.info("ROC Profiler: " + str(rocprof_path)) + return rocprof_cmd #TODO: Do we still need to return this? It's not being used in the function call + +def capture_subprocess_output(subprocess_args): + """Run specified subprocess and concurrently capture output + """ + # Start subprocess + # bufsize = 1 means output is line buffered + # universal_newlines = True is required for line buffering + process = subprocess.Popen(subprocess_args, + bufsize=1, + stdout=subprocess.PIPE, + stderr=subprocess.STDOUT, + universal_newlines=True) + + # Create callback function for process output + buf = io.StringIO() + def handle_output(stream, mask): + # Because the process' output is line buffered, there's only ever one + # line to read when this function is called + line = stream.readline() + buf.write(line) + sys.stdout.write(line) + + # Register callback for an "available for read" event from subprocess' stdout stream + selector = selectors.DefaultSelector() + selector.register(process.stdout, selectors.EVENT_READ, handle_output) + + # Loop until subprocess is terminated + while process.poll() is None: + # Wait for events and handle them with their registered callbacks + events = selector.select() + for key, mask in events: + callback = key.data + callback(key.fileobj, mask) + + # Get process return code + return_code = process.wait() + selector.close() + + success = (return_code == 0) + + # Store buffered output + output = buf.getvalue() + buf.close() + + return (success, output) + +def run_prof(fname, workload_dir, perfmon_dir, cmd, target, verbose): + + fbase = os.path.splitext(os.path.basename(fname))[0] + + logging.debug("pmc file:", os.path.basename(fname)) + + # profile the app (run w/ custom config files for mi100) + if target == "mi100": + logging.info("RUNNING WITH CUSTOM METRICS") + success, output = capture_subprocess_output( + [ + rocprof_cmd, + "-i", + fname, + "-m", + perfmon_dir + "/" + "metrics.xml", + "--timestamp", + "on", + "-o", + workload_dir + "/" + fbase + ".csv", + '"' + cmd + '"', + ] + ) + else: + success, output = capture_subprocess_output( + [ + rocprof_cmd, + "-i", + fname, + "--timestamp", + "on", + "-o", + workload_dir + "/" + fbase + ".csv", + '"' + cmd + '"', + ] + ) + # write rocprof output to logging + logging.info(output) + +def replace_timestamps(workload_dir): + df_stamps = pd.read_csv(workload_dir + "/timestamps.csv") + if "BeginNs" in df_stamps.columns and "EndNs" in df_stamps.columns: + # Update timestamps for all *.csv output files + for fname in glob.glob(workload_dir + "/" + "*.csv"): + df_pmc_perf = pd.read_csv(fname) + + df_pmc_perf["BeginNs"] = df_stamps["BeginNs"] + df_pmc_perf["EndNs"] = df_stamps["EndNs"] + df_pmc_perf.to_csv(fname, index=False) + else: + warning = "WARNING: Incomplete profiling data detected. Unable to update timestamps." + logging.warning(warning + "\n") + +def gen_sysinfo(workload_name, workload_dir, ip_blocks, app_cmd, skip_roof): + # Record system information + mspec = specs.get_machine_specs(0) + sysinfo = open(workload_dir + "/" + "sysinfo.csv", "w") + + # write header + header = "workload_name," + header += "command," + header += "host_name,host_cpu,host_distro,host_kernel,host_rocmver,date," + header += "gpu_soc,numSE,numCU,numSIMD,waveSize,maxWavesPerCU,maxWorkgroupSize," + header += "L1,L2,sclk,mclk,cur_sclk,cur_mclk,L2Banks,LDSBanks,name,numSQC,hbmBW," + header += "ip_blocks\n" + sysinfo.write(header) + + # timestamp + now = datetime.now() + local_now = now.astimezone() + local_tz = local_now.tzinfo + local_tzname = local_tz.tzname(local_now) + timestamp = now.strftime("%c") + " (" + local_tzname + ")" + # host info + param = [workload_name] + param += ['"' + app_cmd + '"'] + param += [ + mspec.hostname, + mspec.cpu, + mspec.distro, + mspec.kernel, + mspec.rocmversion, + timestamp, + ] + + # GPU info + param += [ + mspec.GPU, + mspec.SE, + mspec.CU, + mspec.SIMD, + mspec.wave_size, + mspec.wave_occu, + mspec.workgroup_size, + ] + param += [ + mspec.L1, + mspec.L2, + mspec.SCLK, + mspec.cur_MCLK, + mspec.cur_SCLK, + mspec.cur_MCLK, + ] + + blocks = [] + hbmBW = int(mspec.cur_MCLK) / 1000 * 4096 / 8 * 2 + if mspec.GPU == "gfx906": + param += ["16", "32", "mi50", str(int(mspec.CU) // 4), str(hbmBW)] + elif mspec.GPU == "gfx908": + param += ["32", "32", "mi100", "48", str(hbmBW)] + elif mspec.GPU == "gfx90a": + param += ["32", "32", "mi200", "56", str(hbmBW)] + if not skip_roof: + blocks.append("roofline") + + # ip block info + if ip_blocks == None: + t = ["SQ", "LDS", "SQC", "TA", "TD", "TCP", "TCC", "SPI", "CPC", "CPF"] + blocks += t + else: + blocks += ip_blocks + param.append("|".join(blocks)) + + sysinfo.write(",".join(param)) + sysinfo.close() + +def detect_roofline(): + mspec = specs.get_machine_specs(0) + rocm_ver = mspec.rocmversion[:1] + + os_release = path("/etc/os-release").read_text() + ubuntu_distro = specs.search(r'VERSION_ID="(.*?)"', os_release) + rhel_distro = specs.search(r'PLATFORM_ID="(.*?)"', os_release) + sles_distro = specs.search(r'VERSION_ID="(.*?)"', os_release) + + if "ROOFLINE_BIN" in os.environ.keys(): + rooflineBinary = os.environ["ROOFLINE_BIN"] + if os.path.exists(rooflineBinary): + logging._SysExcInfoType("Detected user-supplied binary") + return {"rocm_ver": "override", "distro": "override", "path": rooflineBinary} + else: + logging.error("ROOFLINE ERROR: user-supplied path to binary not accessible") + logging.error("--> ROOFLINE_BIN = %s\n" % target_binary) + sys.exit(1) + elif rhel_distro == "platform:el8": + # Must be a valid RHEL machine + distro = rhel_distro + elif ( + (type(sles_distro) == str and len(sles_distro) >= 3) and # confirm string and len + sles_distro[:2] == "15" and int(sles_distro[3]) >= 3 # SLES15 and SP >= 3 + ): + # Must be a valid SLES machine + # Use SP3 binary for all forward compatible service pack versions + distro = "15.3" + elif ubuntu_distro == "20.04": + # Must be a valid Ubuntu machine + distro = ubuntu_distro + else: + logging.error("ROOFLINE ERROR: Cannot find a valid binary for your operating system") + sys.exit(1) + + target_binary = {"rocm_ver": rocm_ver, "distro": distro} + return target_binary + +def run_rocscope(args, fname): + # profile the app + if args.use_rocscope == True: + result = shutil.which("rocscope") + if result: + rs_cmd = [ + result.stdout.decode("ascii").strip(), + "metrics", + "-p", + args.path, + "-n", + args.name, + "-t", + fname, + "--", + ] + for i in args.remaining.split(): + rs_cmd.append(i) + logging.info(rs_cmd) + success, output = capture_subprocess_output( + rs_cmd + ) + if not success: + logging.error(result.stderr.decode("ascii")) + sys.exit(1) + +def mibench(args): + """Run roofline microbenchmark to generate peak BW and FLOP measurements. + """ + logging.info("[roofline] No roofline data found. Generating...") + distro_map = {"platform:el8": "rhel8", "15.3": "sle15sp3", "20.04": "ubuntu20_04"} + + target_binary = detect_roofline() + if target_binary["rocm_ver"] == "override": + path_to_binary = target_binary["path"] + else: + path_to_binary = ( + str(config.omniperf_home) + + "/utils/rooflines/roofline" + + "-" + + distro_map[target_binary["distro"]] + + "-" + + args.target.lower() + + "-rocm" + + target_binary["rocm_ver"] + ) + + # Distro is valid but cant find rocm ver + if not os.path.exists(path_to_binary): + logging.error("ROOFLINE ERROR: Unable to locate expected binary (%s)." % path_to_binary) + sys.exit(1) + + subprocess.run( + [ + path_to_binary, + "-o", + args.path + "/" + "roofline.csv", + "-d", + str(args.device), + ], + check=True + ) + \ No newline at end of file diff --git a/tests/test_analyze_commands.py b/tests/test_analyze_commands.py index 8193d2bba..f218d156c 100644 --- a/tests/test_analyze_commands.py +++ b/tests/test_analyze_commands.py @@ -1301,7 +1301,7 @@ def test_kernel_verbose_0(): "analyze", "--path", "tests/workloads/mixbench/mi100", - "--kernelVerbose", + "--kernel-verbose", "0", ], ): @@ -1316,7 +1316,7 @@ def test_kernel_verbose_0(): "analyze", "--path", "tests/workloads/mixbench/mi200", - "--kernelVerbose", + "--kernel-verbose", "0", ], ): @@ -1333,7 +1333,7 @@ def test_kernel_verbose_1(): "analyze", "--path", "tests/workloads/mixbench/mi100", - "--kernelVerbose", + "--kernel-verbose", "1", ], ): @@ -1348,7 +1348,7 @@ def test_kernel_verbose_1(): "analyze", "--path", "tests/workloads/mixbench/mi200", - "--kernelVerbose", + "--kernel-verbose", "1", ], ): @@ -1365,7 +1365,7 @@ def test_kernel_verbose_2(): "analyze", "--path", "tests/workloads/mixbench/mi100", - "--kernelVerbose", + "--kernel-verbose", "2", ], ): @@ -1380,7 +1380,7 @@ def test_kernel_verbose_2(): "analyze", "--path", "tests/workloads/mixbench/mi200", - "--kernelVerbose", + "--kernel-verbose", "2", ], ): @@ -1397,7 +1397,7 @@ def test_kernel_verbose_3(): "analyze", "--path", "tests/workloads/mixbench/mi100", - "--kernelVerbose", + "--kernel-verbose", "3", ], ): @@ -1412,7 +1412,7 @@ def test_kernel_verbose_3(): "analyze", "--path", "tests/workloads/mixbench/mi200", - "--kernelVerbose", + "--kernel-verbose", "3", ], ): @@ -1429,7 +1429,7 @@ def test_kernel_verbose_4(): "analyze", "--path", "tests/workloads/mixbench/mi100", - "--kernelVerbose", + "--kernel-verbose", "4", ], ): @@ -1444,7 +1444,7 @@ def test_kernel_verbose_4(): "analyze", "--path", "tests/workloads/mixbench/mi200", - "--kernelVerbose", + "--kernel-verbose", "4", ], ): @@ -1461,7 +1461,7 @@ def test_kernel_verbose_5(): "analyze", "--path", "tests/workloads/mixbench/mi100", - "--kernelVerbose", + "--kernel-verbose", "5", ], ): @@ -1476,7 +1476,7 @@ def test_kernel_verbose_5(): "analyze", "--path", "tests/workloads/mixbench/mi200", - "--kernelVerbose", + "--kernel-verbose", "5", ], ): @@ -1493,7 +1493,7 @@ def test_kernel_verbose_6(): "analyze", "--path", "tests/workloads/mixbench/mi100", - "--kernelVerbose", + "--kernel-verbose", "6", ], ): @@ -1508,7 +1508,7 @@ def test_kernel_verbose_6(): "analyze", "--path", "tests/workloads/mixbench/mi200", - "--kernelVerbose", + "--kernel-verbose", "6", ], ): diff --git a/tests/test_profile_general.py b/tests/test_profile_general.py index 563ed18ef..903c8a752 100644 --- a/tests/test_profile_general.py +++ b/tests/test_profile_general.py @@ -1495,7 +1495,7 @@ def test_kernel_verbose_0(): "-VVV", "--path", workload_1, - "--kernelVerbose", + "--kernel-verbose", "0", "--", ] @@ -1539,7 +1539,7 @@ def test_kernel_verbose_1(): "-VVV", "--path", workload_1, - "--kernelVerbose", + "--kernel-verbose", "1", "--", ] @@ -1583,7 +1583,7 @@ def test_kernel_verbose_2(): "-VVV", "--path", workload_1, - "--kernelVerbose", + "--kernel-verbose", "2", "--", ] @@ -1627,7 +1627,7 @@ def test_kernel_verbose_3(): "-VVV", "--path", workload_1, - "--kernelVerbose", + "--kernel-verbose", "3", "--", ] @@ -1671,7 +1671,7 @@ def test_kernel_verbose_4(): "-VVV", "--path", workload_1, - "--kernelVerbose", + "--kernel-verbose", "4", "--", ] @@ -1715,7 +1715,7 @@ def test_kernel_verbose_5(): "-VVV", "--path", workload_1, - "--kernelVerbose", + "--kernel-verbose", "5", "--", ] diff --git a/utils/build.sh b/utils/build.sh index e980aff88..5aebc0f9b 100755 --- a/utils/build.sh +++ b/utils/build.sh @@ -34,7 +34,7 @@ done echo "distpath=$distpath" echo "(build.sh) Checking for submodules" -# Check to se if submodules are availible +# Check to se if submodules are available if [ -d "src/waveparser/" ] && [ -d "src/multevent/" ] then echo "Found submodules"