diff --git a/packages/colibri/src/formatter/bin/standalone_vhdl/VHDLFormatter.ts b/packages/colibri/src/formatter/bin/standalone_vhdl/VHDLFormatter.ts index fad219a8..af8f3ccb 100644 --- a/packages/colibri/src/formatter/bin/standalone_vhdl/VHDLFormatter.ts +++ b/packages/colibri/src/formatter/bin/standalone_vhdl/VHDLFormatter.ts @@ -169,6 +169,7 @@ function SetKeywordCase(input: string, keywordcase: string, keywords: string[]): return input; } +//TODO: bug fix export function SetNewLinesAfterSymbols(text: string, newLineSettings: NewLineSettings): string { if (newLineSettings == null) { return text; @@ -176,7 +177,13 @@ export function SetNewLinesAfterSymbols(text: string, newLineSettings: NewLineSe if (newLineSettings.newLineAfter != null) { newLineSettings.newLineAfter.forEach(symbol => { const upper = symbol.toUpperCase(); - const rexString = "(" + upper + ")[ ]?([^ \r\n@])"; + let rexString = ""; + if (upper === 'PORT' || upper === 'GENERIC'){ + //Fix unwanted match when generic and/or port names contain "generic" or "port" keywords. + rexString = "[^A-Za-z0-9_](" + upper + ")[^A-Za-z0-9_][ ]?([^ \r\n@])"; + }else{ + rexString = "(" + upper + ")[ ]?([^ \r\n@])"; + } let regex: any = null; if (upper.regexStartsWith(/\w/)) { regex = new RegExp("\\b" + rexString, "g"); diff --git a/packages/colibri/tests/formatter/helpers/case_0.vhd b/packages/colibri/tests/formatter/helpers/case_0.vhd new file mode 100644 index 00000000..b54b435a --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/case_0.vhd @@ -0,0 +1,22 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity my_ent_generic_port is + generic (PORT_COUNT : natural; --! This comment will be removed + port_COUNT : natural; --! This comment will be removed + generic_COUNT : natural; --! This comment will be removed + ENTITY_COUNT : natural; --! This comment will be removed + GENERIC_COUNT : natural); + port(port_ena : in bit_vector(PORT_COUNT-1 downto 0); --! This comment will be removed + ENTITY_signal : in bit_vector(ENTITY_COUNT-1 downto 0); --! This comment will be removed + GENERIC_signal : in bit_vector(GENERIC_COUNT-1 downto 0); --! This comment will be removed + generic_signal : in bit_vector(GENERIC_COUNT-1 downto 0); --! This comment will be removed + architecture_signal : in bit_vector(architecture_COUNT-1 downto 0); --! This comment will be removed + end_signal : in std_logic); + end entity; + +architecture e_arch of my_ent is + +begin + +end e_arch; diff --git a/packages/colibri/tests/formatter/helpers/case_0b.vhd b/packages/colibri/tests/formatter/helpers/case_0b.vhd new file mode 100644 index 00000000..064865ec --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/case_0b.vhd @@ -0,0 +1,22 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity my_ent_generic_port is + generic (PORT_COUNT : natural; --! This comment will be removed + port_COUNT : natural; --! This comment will be removed + generic_COUNT : natural; --! This comment will be removed + ENTITY_COUNT : natural; --! This comment will be removed + GENERIC_COUNT : natural); + port(port_ena : in bit_vector(PORT_COUNT-1 downto 0); --! This comment will be removed + ENTITY_signal : in bit_vector(port_COUNT-1 downto 0); --! This comment will be removed + GENERIC_signal : in bit_vector(generic_COUNT-1 downto 0); --! This comment will be removed + generic_signal : in bit_vector(GENERIC_COUNT-1 downto 0); --! This comment will be removed + architecture_signal : in bit_vector(architecture_COUNT-1 downto 0); --! This comment will be removed + end_signal : in std_logic); + end entity; + +architecture e_arch of my_ent is + +begin + +end e_arch; diff --git a/packages/colibri/tests/formatter/helpers/case_0c.vhd b/packages/colibri/tests/formatter/helpers/case_0c.vhd new file mode 100644 index 00000000..064865ec --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/case_0c.vhd @@ -0,0 +1,22 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity my_ent_generic_port is + generic (PORT_COUNT : natural; --! This comment will be removed + port_COUNT : natural; --! This comment will be removed + generic_COUNT : natural; --! This comment will be removed + ENTITY_COUNT : natural; --! This comment will be removed + GENERIC_COUNT : natural); + port(port_ena : in bit_vector(PORT_COUNT-1 downto 0); --! This comment will be removed + ENTITY_signal : in bit_vector(port_COUNT-1 downto 0); --! This comment will be removed + GENERIC_signal : in bit_vector(generic_COUNT-1 downto 0); --! This comment will be removed + generic_signal : in bit_vector(GENERIC_COUNT-1 downto 0); --! This comment will be removed + architecture_signal : in bit_vector(architecture_COUNT-1 downto 0); --! This comment will be removed + end_signal : in std_logic); + end entity; + +architecture e_arch of my_ent is + +begin + +end e_arch; diff --git a/packages/colibri/tests/formatter/helpers/case_1.vhd b/packages/colibri/tests/formatter/helpers/case_1.vhd new file mode 100644 index 00000000..40585e8f --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/case_1.vhd @@ -0,0 +1,13 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity my_ent is + generic (PORT_COUNT : natural); + port(port_ena : in bit_vector(PORT_COUNT-1 downto 0)); + end entity; + +architecture e_arch of my_ent is + +begin + +end e_arch; diff --git a/packages/colibri/tests/formatter/helpers/case_2.vhdl b/packages/colibri/tests/formatter/helpers/case_2.vhdl new file mode 100644 index 00000000..c4e5f354 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/case_2.vhdl @@ -0,0 +1,75 @@ +library ieee; +use ieee.std_logic_1164.all; + +ENTITY test_entity_name is +generic ( + a : integer; + b : std_logic := '1'; + c, d : std_logic_vector(1 downto 0) + ); +port( + e: in std_logic; -- comment 0 + f: OUT std_logic; -- comment 1 + g: inout std_logic; -- comment 2 + h: in std_logic_vector(31 downto 0); -- comment 3 + i: in std_logic_vector(31 downto 0) := "0010"; -- comment 4 + j,k : in std_logic := '1' -- comment 5 +); +end test_entity_name; + +architecture e_arch of test_entity_name is + signal m : integer; + signal n,p : std_logic_vector(1 downto 0); + + constant r : integer := 0; + CONSTANT q,s : integer := 0; + + function counter(minutes : integer := 0; seconds : integer := 0) + return integer is variable total_seconds : integer; + begin + end function; + + begin + +label_0: process begin +end process; + +label_1: process (a, b) begin +g <= '0'; +end process; + +half_adder_inst : entity work.half_adder + port map ( + g => g, + h => h, + i => i + ); + + process(a) is + begin + if rising_edge(a) then + if b = '0' then + f <= d; + else + case a is + + when a => + f <= '1'; + -- If 5 seconds have passed + if b then + f <= 0; + end if; + + when d => + f <= '1'; + if c then + f <= 0; + end if; + + end case; + + end if; + end if; + end process; + +end e_arch; \ No newline at end of file diff --git a/packages/colibri/tests/formatter/helpers/case_3.vhdl b/packages/colibri/tests/formatter/helpers/case_3.vhdl new file mode 100644 index 00000000..c4e5f354 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/case_3.vhdl @@ -0,0 +1,75 @@ +library ieee; +use ieee.std_logic_1164.all; + +ENTITY test_entity_name is +generic ( + a : integer; + b : std_logic := '1'; + c, d : std_logic_vector(1 downto 0) + ); +port( + e: in std_logic; -- comment 0 + f: OUT std_logic; -- comment 1 + g: inout std_logic; -- comment 2 + h: in std_logic_vector(31 downto 0); -- comment 3 + i: in std_logic_vector(31 downto 0) := "0010"; -- comment 4 + j,k : in std_logic := '1' -- comment 5 +); +end test_entity_name; + +architecture e_arch of test_entity_name is + signal m : integer; + signal n,p : std_logic_vector(1 downto 0); + + constant r : integer := 0; + CONSTANT q,s : integer := 0; + + function counter(minutes : integer := 0; seconds : integer := 0) + return integer is variable total_seconds : integer; + begin + end function; + + begin + +label_0: process begin +end process; + +label_1: process (a, b) begin +g <= '0'; +end process; + +half_adder_inst : entity work.half_adder + port map ( + g => g, + h => h, + i => i + ); + + process(a) is + begin + if rising_edge(a) then + if b = '0' then + f <= d; + else + case a is + + when a => + f <= '1'; + -- If 5 seconds have passed + if b then + f <= 0; + end if; + + when d => + f <= '1'; + if c then + f <= 0; + end if; + + end case; + + end if; + end if; + end process; + +end e_arch; \ No newline at end of file diff --git a/packages/colibri/tests/formatter/helpers/case_4.vhdl b/packages/colibri/tests/formatter/helpers/case_4.vhdl new file mode 100644 index 00000000..a95f6314 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/case_4.vhdl @@ -0,0 +1,107 @@ +library ieee; +use ieee.std_logic_1164.all; + +ENTITY test_entity_name is +generic ( + a : integer; + b : std_logic := '1'; + c, d : std_logic_vector(1 downto 0) + ); +port( + e: in std_logic; -- comment 0 + f: OUT std_logic; -- comment 1 + g: inout std_logic; -- comment 2 + h: in std_logic_vector(31 downto 0); -- comment 3 + i: in std_logic_vector(31 downto 0) := "0010"; -- comment 4 + j,k : in std_logic := '1' -- comment 5 +); +end test_entity_name; + +architecture e_arch of test_entity_name is + signal m : integer; + signal n,p : std_logic_vector(1 downto 0); + + constant r : integer := 0; + CONSTANT q,s : integer := 0; + + function counter(minutes : integer := 0; seconds : integer := 0) + return integer is variable total_seconds : integer; + begin + end function; + + --! Type + --! description without state comments +type state_0 is (INIT, +S1, + S2, + S3 ); + + --! Sample record type 1 + type sample_record1 is record + single_bit : std_logic; --! Comment single_bit + byte_data : std_logic_vector (7 downto 0); --! comment byte_data + end record sample_record1; + + --! Sample record type 2 + type sample_record2 is record + valid : std_logic; --! Comment valid + byte_data1 : std_logic_vector (7 downto 0); --! comment byte_data1 + byte_data2 : std_logic_vector (7 downto 0); --! comment byte_data2 + byte_data3 : std_logic_vector (7 downto 0); --! comment byte_data3 + end record sample_record2; + + --! My type + type my_custom_type0 is range 0 to 1000; --! my type comment 0 + type my_custom_type1 is range -5 to 5; --! my type comment 1 + type my_custom_type2 is range -1000 to 5000; --! my type comment 2 + + --! My FSM... + type t_fsm1 is (FSM1, --! FSM1 comment... + FSM2, --! FSM2 comment... + FSM3 --! FSM3 comment... + ); + + begin + +label_0: process begin +end process; + +label_1: process (a, b) begin +g <= '0'; +end process; + +half_adder_inst : entity work.half_adder + port map ( + g => g, + h => h, + i => i + ); + + process(a) is + begin + if rising_edge(a) then + if b = '0' then + f <= d; + else + case a is + + when a => + f <= '1'; + -- If 5 seconds have passed + if b then + f <= 0; + end if; + + when d => + f <= '1'; + if c then + f <= 0; + end if; + + end case; + + end if; + end if; + end process; + +end e_arch; \ No newline at end of file diff --git a/packages/colibri/tests/formatter/helpers/expected/case_0.vhd b/packages/colibri/tests/formatter/helpers/expected/case_0.vhd new file mode 100644 index 00000000..79937f34 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/expected/case_0.vhd @@ -0,0 +1,24 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity my_ent_generic_port is + generic ( + PORT_COUNT : natural; + port_COUNT : natural; + generic_COUNT : natural; + ENTITY_COUNT : natural; + GENERIC_COUNT : natural); + port ( + port_ena : in bit_vector(PORT_COUNT - 1 downto 0); + ENTITY_signal : in bit_vector(ENTITY_COUNT - 1 downto 0); + GENERIC_signal : in bit_vector(GENERIC_COUNT - 1 downto 0); + generic_signal : in bit_vector(GENERIC_COUNT - 1 downto 0); + architecture_signal : in bit_vector(architecture_COUNT - 1 downto 0); + end_signal : in std_logic); +end entity; + +architecture e_arch of my_ent is + +begin + +end e_arch; diff --git a/packages/colibri/tests/formatter/helpers/expected/case_0b.vhd b/packages/colibri/tests/formatter/helpers/expected/case_0b.vhd new file mode 100644 index 00000000..19b68cf8 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/expected/case_0b.vhd @@ -0,0 +1,24 @@ +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + +ENTITY my_ent_generic_port IS + GENERIC ( + PORT_COUNT : NATURAL; + port_COUNT : NATURAL; + generic_COUNT : NATURAL; + ENTITY_COUNT : NATURAL; + GENERIC_COUNT : NATURAL); + PORT ( + port_ena : IN bit_vector(PORT_COUNT - 1 DOWNTO 0); + ENTITY_signal : IN bit_vector(port_COUNT - 1 DOWNTO 0); + GENERIC_signal : IN bit_vector(generic_COUNT - 1 DOWNTO 0); + generic_signal : IN bit_vector(GENERIC_COUNT - 1 DOWNTO 0); + architecture_signal : IN bit_vector(architecture_COUNT - 1 DOWNTO 0); + end_signal : IN STD_LOGIC); +END ENTITY; + +ARCHITECTURE e_arch OF my_ent IS + +BEGIN + +END e_arch; diff --git a/packages/colibri/tests/formatter/helpers/expected/case_0c.vhd b/packages/colibri/tests/formatter/helpers/expected/case_0c.vhd new file mode 100644 index 00000000..19b68cf8 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/expected/case_0c.vhd @@ -0,0 +1,24 @@ +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + +ENTITY my_ent_generic_port IS + GENERIC ( + PORT_COUNT : NATURAL; + port_COUNT : NATURAL; + generic_COUNT : NATURAL; + ENTITY_COUNT : NATURAL; + GENERIC_COUNT : NATURAL); + PORT ( + port_ena : IN bit_vector(PORT_COUNT - 1 DOWNTO 0); + ENTITY_signal : IN bit_vector(port_COUNT - 1 DOWNTO 0); + GENERIC_signal : IN bit_vector(generic_COUNT - 1 DOWNTO 0); + generic_signal : IN bit_vector(GENERIC_COUNT - 1 DOWNTO 0); + architecture_signal : IN bit_vector(architecture_COUNT - 1 DOWNTO 0); + end_signal : IN STD_LOGIC); +END ENTITY; + +ARCHITECTURE e_arch OF my_ent IS + +BEGIN + +END e_arch; diff --git a/packages/colibri/tests/formatter/helpers/expected/case_1.vhd b/packages/colibri/tests/formatter/helpers/expected/case_1.vhd new file mode 100644 index 00000000..92751500 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/expected/case_1.vhd @@ -0,0 +1,13 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity my_ent is + generic (PORT_COUNT : natural); + port (port_ena : in bit_vector(PORT_COUNT - 1 downto 0)); +end entity; + +architecture e_arch of my_ent is + +begin + +end e_arch; diff --git a/packages/colibri/tests/formatter/helpers/expected/case_2.vhdl b/packages/colibri/tests/formatter/helpers/expected/case_2.vhdl new file mode 100644 index 00000000..da5237b6 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/expected/case_2.vhdl @@ -0,0 +1,75 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity test_entity_name is + generic ( + a : integer; + b : std_logic := '1'; + c, d : std_logic_vector(1 downto 0) + ); + port ( + e : in std_logic; -- comment 0 + f : out std_logic; -- comment 1 + g : inout std_logic; -- comment 2 + h : in std_logic_vector(31 downto 0); -- comment 3 + i : in std_logic_vector(31 downto 0) := "0010"; -- comment 4 + j, k : in std_logic := '1' -- comment 5 + ); +end test_entity_name; + +architecture e_arch of test_entity_name is + signal m : integer; + signal n, p : std_logic_vector(1 downto 0); + + constant r : integer := 0; + constant q, s : integer := 0; + + function counter(minutes : integer := 0; seconds : integer := 0) + return integer is variable total_seconds : integer; + begin + end function; + +begin + + label_0 : process begin + end process; + + label_1 : process (a, b) begin + g <= '0'; + end process; + + half_adder_inst : entity work.half_adder + port map( + g => g, + h => h, + i => i + ); + + process (a) is + begin + if rising_edge(a) then + if b = '0' then + f <= d; + else + case a is + + when a => + f <= '1'; + -- If 5 seconds have passed + if b then + f <= 0; + end if; + + when d => + f <= '1'; + if c then + f <= 0; + end if; + + end case; + + end if; + end if; + end process; + +end e_arch; \ No newline at end of file diff --git a/packages/colibri/tests/formatter/helpers/expected/case_3.vhdl b/packages/colibri/tests/formatter/helpers/expected/case_3.vhdl new file mode 100644 index 00000000..d2483f6b --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/expected/case_3.vhdl @@ -0,0 +1,75 @@ +LIBRARY ieee; +USE ieee.std_logic_1164.ALL; + +ENTITY test_entity_name IS + GENERIC ( + a : INTEGER; + b : STD_LOGIC := '1'; + c, d : STD_LOGIC_VECTOR(1 DOWNTO 0) + ); + PORT ( + e : IN STD_LOGIC; -- comment 0 + f : OUT STD_LOGIC; -- comment 1 + g : INOUT STD_LOGIC; -- comment 2 + h : IN STD_LOGIC_VECTOR(31 DOWNTO 0); -- comment 3 + i : IN STD_LOGIC_VECTOR(31 DOWNTO 0) := "0010"; -- comment 4 + j, k : IN STD_LOGIC := '1' -- comment 5 + ); +END test_entity_name; + +ARCHITECTURE e_arch OF test_entity_name IS + SIGNAL m : INTEGER; + SIGNAL n, p : STD_LOGIC_VECTOR(1 DOWNTO 0); + + CONSTANT r : INTEGER := 0; + CONSTANT q, s : INTEGER := 0; + + FUNCTION counter(minutes : INTEGER := 0; seconds : INTEGER := 0) + RETURN INTEGER IS VARIABLE total_seconds : INTEGER; + BEGIN + END FUNCTION; + +BEGIN + + label_0 : PROCESS BEGIN + END PROCESS; + + label_1 : PROCESS (a, b) BEGIN + g <= '0'; + END PROCESS; + + half_adder_inst : ENTITY work.half_adder + PORT MAP( + g => g, + h => h, + i => i + ); + + PROCESS (a) IS + BEGIN + IF rising_edge(a) THEN + IF b = '0' THEN + f <= d; + ELSE + CASE a IS + + WHEN a => + f <= '1'; + -- If 5 seconds have passed + IF b THEN + f <= 0; + END IF; + + WHEN d => + f <= '1'; + IF c THEN + f <= 0; + END IF; + + END CASE; + + END IF; + END IF; + END PROCESS; + +END e_arch; \ No newline at end of file diff --git a/packages/colibri/tests/formatter/helpers/expected/case_4.vhdl b/packages/colibri/tests/formatter/helpers/expected/case_4.vhdl new file mode 100644 index 00000000..c4bcac63 --- /dev/null +++ b/packages/colibri/tests/formatter/helpers/expected/case_4.vhdl @@ -0,0 +1,108 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity test_entity_name is + generic ( + a : integer; + b : std_logic := '1'; + c, d : std_logic_vector(1 downto 0) + ); + port ( + e : in std_logic; -- comment 0 + f : out std_logic; -- comment 1 + g : inout std_logic; -- comment 2 + h : in std_logic_vector(31 downto 0); -- comment 3 + i : in std_logic_vector(31 downto 0) := "0010"; -- comment 4 + j, k : in std_logic := '1' -- comment 5 + ); +end test_entity_name; + +architecture e_arch of test_entity_name is + signal m : integer; + signal n, p : std_logic_vector(1 downto 0); + + constant r : integer := 0; + constant q, s : integer := 0; + + function counter(minutes : integer := 0; seconds : integer := 0) + return integer is variable total_seconds : integer; + begin + end function; + + --! Type + --! description without state comments + type state_0 is (INIT, + S1, + S2, + S3); + + --! Sample record type 1 + type sample_record1 is record + single_bit : std_logic; --! Comment single_bit + byte_data : std_logic_vector (7 downto 0); --! comment byte_data + end record sample_record1; + + --! Sample record type 2 + type sample_record2 is record + valid : std_logic; --! Comment valid + byte_data1 : std_logic_vector (7 downto 0); --! comment byte_data1 + byte_data2 : std_logic_vector (7 downto 0); --! comment byte_data2 + byte_data3 : std_logic_vector (7 downto 0); --! comment byte_data3 + end record sample_record2; + + --! My type + type my_custom_type0 is range 0 to 1000; --! my type comment 0 + type my_custom_type1 is range -5 to 5; --! my type comment 1 + type my_custom_type2 is range -1000 to 5000; --! my type comment 2 + + --! My FSM... + type t_fsm1 is (FSM1, --! FSM1 comment... + FSM2, --! FSM2 comment... + FSM3 --! FSM3 comment... + ); + +begin + + label_0 : process begin + end process; + + label_1 : process (a, b) begin + g <= '0'; + end process; + + half_adder_inst : entity work.half_adder + port map + ( + g => g, + h => h, + i => i + ); + + process (a) is + begin + if rising_edge(a) then + if b = '0' then + f <= d; + else + case a is + + when a => + f <= '1'; + -- If 5 seconds have passed + if b then + f <= 0; + end if; + + when d => + f <= '1'; + if c then + f <= 0; + end if; + + end case; + + end if; + end if; + end process; + +end e_arch; \ No newline at end of file diff --git a/packages/colibri/tests/formatter/helpers/sample_expected.v b/packages/colibri/tests/formatter/helpers/expected/sample.v similarity index 100% rename from packages/colibri/tests/formatter/helpers/sample_expected.v rename to packages/colibri/tests/formatter/helpers/expected/sample.v diff --git a/packages/colibri/tests/formatter/s3sv.spec.ts b/packages/colibri/tests/formatter/s3sv.spec.ts index 4e32f1ca..9b11406b 100644 --- a/packages/colibri/tests/formatter/s3sv.spec.ts +++ b/packages/colibri/tests/formatter/s3sv.spec.ts @@ -23,6 +23,7 @@ import { normalize_breakline_windows } from "../../src/utils/common_utils"; import { read_file_sync, save_file_sync,create_directory, remove_directory } from '../../src/utils/file_utils'; const C_OUTPUT_BASE_PATH = path_lib.join(__dirname, "out"); +const C_EXPECTED_BASE_PATH = path_lib.join(__dirname, "helpers/expected"); function create_output() { remove_directory(C_OUTPUT_BASE_PATH); @@ -51,11 +52,11 @@ describe('s3sv', () => { const formatter = new S3sv(); const result = await formatter.format_from_code(code, config); - const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'sample_formatted.v'); + const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'sample.v'); save_file_sync(output_path, result.code_formatted); expect(result.successful).toBe(true); - const expected_result = read_file_sync(path_lib.join(__dirname, 'helpers', 'sample_expected.v')); + const expected_result = read_file_sync(path_lib.join(C_EXPECTED_BASE_PATH, 'sample.v')); const expected_result_fix = normalize_breakline_windows(expected_result); expect(result.code_formatted).toBe(expected_result_fix); }); diff --git a/packages/colibri/tests/formatter/standalone.spec.ts b/packages/colibri/tests/formatter/standalone.spec.ts new file mode 100644 index 00000000..b6472cd6 --- /dev/null +++ b/packages/colibri/tests/formatter/standalone.spec.ts @@ -0,0 +1,257 @@ +// Copyright 2023 +// Carlos Alberto Ruiz Naranjo [carlosruiznaranjo@gmail.com] +// +// This file is part of TerosHDL +// +// Colibri is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// Colibri is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with TerosHDL. If not, see . + +import * as path_lib from 'path'; +import { Standalone_vhdl } from '../../src/formatter/standalone_vhdl'; +import * as cfg from "../../src/config/config_declaration"; +import { normalize_breakline_windows } from "../../src/utils/common_utils"; +import { read_file_sync, save_file_sync,create_directory, remove_directory } from '../../src/utils/file_utils'; + +const C_OUTPUT_BASE_PATH = path_lib.join(__dirname, "out"); +const C_EXPECTED_BASE_PATH = path_lib.join(__dirname, "helpers/expected"); + +function create_output() { + remove_directory(C_OUTPUT_BASE_PATH); + create_directory(C_OUTPUT_BASE_PATH, true); + return C_OUTPUT_BASE_PATH; +} + +describe('standalone_vhdl', () => { + jest.setTimeout(1000000); + + beforeAll(() => { + create_output(); + }); + it('vhdl_case_0', async () => { + const code_to_format = path_lib.join(__dirname, 'helpers', 'case_0.vhd'); + const code = read_file_sync(code_to_format); + + const config: cfg.e_formatter_standalone = { + keyword_case: cfg.e_formatter_standalone_keyword_case.lowercase, + name_case: cfg.e_formatter_standalone_name_case.lowercase, + indentation: " ", + align_port_generic: true, + align_comment: false, + remove_comments: true, + remove_reports: false, + check_alias: true, + new_line_after_then: cfg.e_formatter_standalone_new_line_after_then.new_line, + new_line_after_semicolon: cfg.e_formatter_standalone_new_line_after_semicolon.new_line, + new_line_after_else: cfg.e_formatter_standalone_new_line_after_else.new_line, + new_line_after_port: cfg.e_formatter_standalone_new_line_after_port.new_line, + new_line_after_generic: cfg.e_formatter_standalone_new_line_after_generic.new_line + }; + + const formatter = new Standalone_vhdl(); + const result = await formatter.format_from_code(code, config); + + const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'case_0.vhd'); + save_file_sync(output_path, result.code_formatted); + + expect(result.successful).toBe(true); + const expected_result = read_file_sync(path_lib.join(C_EXPECTED_BASE_PATH, 'case_0.vhd')); + const expected_result_fix = normalize_breakline_windows(expected_result); + expect(result.code_formatted).toBe(expected_result_fix); + }); + it('vhdl_case_0b', async () => { + const code_to_format = path_lib.join(__dirname, 'helpers', 'case_0b.vhd'); + const code = read_file_sync(code_to_format); + + const config: cfg.e_formatter_standalone = { + keyword_case: cfg.e_formatter_standalone_keyword_case.uppercase, + name_case: cfg.e_formatter_standalone_name_case.uppercase, + indentation: " ", + align_port_generic: true, + align_comment: false, + remove_comments: true, + remove_reports: false, + check_alias: true, + new_line_after_then: cfg.e_formatter_standalone_new_line_after_then.new_line, + new_line_after_semicolon: cfg.e_formatter_standalone_new_line_after_semicolon.new_line, + new_line_after_else: cfg.e_formatter_standalone_new_line_after_else.new_line, + new_line_after_port: cfg.e_formatter_standalone_new_line_after_port.new_line, + new_line_after_generic: cfg.e_formatter_standalone_new_line_after_generic.new_line + }; + + const formatter = new Standalone_vhdl(); + const result = await formatter.format_from_code(code, config); + + const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'case_0b.vhd'); + save_file_sync(output_path, result.code_formatted); + + expect(result.successful).toBe(true); + const expected_result = read_file_sync(path_lib.join(C_EXPECTED_BASE_PATH, 'case_0b.vhd')); + const expected_result_fix = normalize_breakline_windows(expected_result); + expect(result.code_formatted).toBe(expected_result_fix); + }); + it('vhdl_case_0c', async () => { + const code_to_format = path_lib.join(__dirname, 'helpers', 'case_0c.vhd'); + const code = read_file_sync(code_to_format); + + const config: cfg.e_formatter_standalone = { + keyword_case: cfg.e_formatter_standalone_keyword_case.uppercase, + name_case: cfg.e_formatter_standalone_name_case.uppercase, + indentation: " ", + align_port_generic: true, + align_comment: false, + remove_comments: true, + remove_reports: false, + check_alias: true, + new_line_after_then: cfg.e_formatter_standalone_new_line_after_then.new_line, + new_line_after_semicolon: cfg.e_formatter_standalone_new_line_after_semicolon.new_line, + new_line_after_else: cfg.e_formatter_standalone_new_line_after_else.new_line, + new_line_after_port: cfg.e_formatter_standalone_new_line_after_port.no_new_line, + new_line_after_generic: cfg.e_formatter_standalone_new_line_after_generic.no_new_line + }; + + const formatter = new Standalone_vhdl(); + const result = await formatter.format_from_code(code, config); + + const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'case_0c.vhd'); + save_file_sync(output_path, result.code_formatted); + + expect(result.successful).toBe(true); + const expected_result = read_file_sync(path_lib.join(C_EXPECTED_BASE_PATH, 'case_0c.vhd')); + const expected_result_fix = normalize_breakline_windows(expected_result); + expect(result.code_formatted).toBe(expected_result_fix); + }); + it('vhdl_case_1', async () => { + const code_to_format = path_lib.join(__dirname, 'helpers', 'case_1.vhd'); + const code = read_file_sync(code_to_format); + + const config: cfg.e_formatter_standalone = { + keyword_case: cfg.e_formatter_standalone_keyword_case.lowercase, + name_case: cfg.e_formatter_standalone_name_case.lowercase, + indentation: " ", + align_port_generic: true, + align_comment: true, + remove_comments: false, + remove_reports: false, + check_alias: true, + new_line_after_then: cfg.e_formatter_standalone_new_line_after_then.new_line, + new_line_after_semicolon: cfg.e_formatter_standalone_new_line_after_semicolon.new_line, + new_line_after_else: cfg.e_formatter_standalone_new_line_after_else.new_line, + new_line_after_port: cfg.e_formatter_standalone_new_line_after_port.no_new_line, + new_line_after_generic: cfg.e_formatter_standalone_new_line_after_generic.new_line + }; + + const formatter = new Standalone_vhdl(); + const result = await formatter.format_from_code(code, config); + + const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'case_1.vhd'); + save_file_sync(output_path, result.code_formatted); + + expect(result.successful).toBe(true); + const expected_result = read_file_sync(path_lib.join(C_EXPECTED_BASE_PATH, 'case_1.vhd')); + const expected_result_fix = normalize_breakline_windows(expected_result); + expect(result.code_formatted).toBe(expected_result_fix); + }); + it('vhdl_case_2', async () => { + const code_to_format = path_lib.join(__dirname, 'helpers', 'case_2.vhdl'); + const code = read_file_sync(code_to_format); + + const config: cfg.e_formatter_standalone = { + keyword_case: cfg.e_formatter_standalone_keyword_case.lowercase, + name_case: cfg.e_formatter_standalone_name_case.lowercase, + indentation: " ", + align_port_generic: true, + align_comment: true, + remove_comments: false, + remove_reports: false, + check_alias: true, + new_line_after_then: cfg.e_formatter_standalone_new_line_after_then.new_line, + new_line_after_semicolon: cfg.e_formatter_standalone_new_line_after_semicolon.new_line, + new_line_after_else: cfg.e_formatter_standalone_new_line_after_else.new_line, + new_line_after_port: cfg.e_formatter_standalone_new_line_after_port.no_new_line, + new_line_after_generic: cfg.e_formatter_standalone_new_line_after_generic.no_new_line + }; + + const formatter = new Standalone_vhdl(); + const result = await formatter.format_from_code(code, config); + + const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'case_2.vhdl'); + save_file_sync(output_path, result.code_formatted); + + expect(result.successful).toBe(true); + const expected_result = read_file_sync(path_lib.join(C_EXPECTED_BASE_PATH, 'case_2.vhdl')); + const expected_result_fix = normalize_breakline_windows(expected_result); + expect(result.code_formatted).toBe(expected_result_fix); + }); + it('vhdl_case_3', async () => { + const code_to_format = path_lib.join(__dirname, 'helpers', 'case_3.vhdl'); + const code = read_file_sync(code_to_format); + + const config: cfg.e_formatter_standalone = { + keyword_case: cfg.e_formatter_standalone_keyword_case.uppercase, + name_case: cfg.e_formatter_standalone_name_case.uppercase, + indentation: " ", + align_port_generic: true, + align_comment: false, + remove_comments: false, + remove_reports: false, + check_alias: true, + new_line_after_then: cfg.e_formatter_standalone_new_line_after_then.new_line, + new_line_after_semicolon: cfg.e_formatter_standalone_new_line_after_semicolon.new_line, + new_line_after_else: cfg.e_formatter_standalone_new_line_after_else.new_line, + new_line_after_port: cfg.e_formatter_standalone_new_line_after_port.no_new_line, + new_line_after_generic: cfg.e_formatter_standalone_new_line_after_generic.no_new_line + }; + + const formatter = new Standalone_vhdl(); + const result = await formatter.format_from_code(code, config); + + const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'case_3.vhdl'); + save_file_sync(output_path, result.code_formatted); + + expect(result.successful).toBe(true); + const expected_result = read_file_sync(path_lib.join(C_EXPECTED_BASE_PATH, 'case_3.vhdl')); + const expected_result_fix = normalize_breakline_windows(expected_result); + expect(result.code_formatted).toBe(expected_result_fix); + }); + it('vhdl_case_4', async () => { + const code_to_format = path_lib.join(__dirname, 'helpers', 'case_4.vhdl'); + const code = read_file_sync(code_to_format); + + const config: cfg.e_formatter_standalone = { + keyword_case: cfg.e_formatter_standalone_keyword_case.lowercase, + name_case: cfg.e_formatter_standalone_name_case.lowercase, + indentation: " ", + align_port_generic: true, + align_comment: true, + remove_comments: false, + remove_reports: false, + check_alias: true, + new_line_after_then: cfg.e_formatter_standalone_new_line_after_then.new_line, + new_line_after_semicolon: cfg.e_formatter_standalone_new_line_after_semicolon.new_line, + new_line_after_else: cfg.e_formatter_standalone_new_line_after_else.new_line, + new_line_after_port: cfg.e_formatter_standalone_new_line_after_port.new_line, + new_line_after_generic: cfg.e_formatter_standalone_new_line_after_generic.new_line + }; + + const formatter = new Standalone_vhdl(); + const result = await formatter.format_from_code(code, config); + + const output_path = path_lib.join(C_OUTPUT_BASE_PATH, 'case_4.vhdl'); + save_file_sync(output_path, result.code_formatted); + + expect(result.successful).toBe(true); + const expected_result = read_file_sync(path_lib.join(C_EXPECTED_BASE_PATH, 'case_4.vhdl')); + const expected_result_fix = normalize_breakline_windows(expected_result); + expect(result.code_formatted).toBe(expected_result_fix); + }); +});