From 3c970b95f271f9bfd4186b2999741fbd37db2fe2 Mon Sep 17 00:00:00 2001 From: Benjamin Landers Date: Mon, 27 Apr 2020 21:51:08 -0700 Subject: [PATCH] Add missing tooltips for performance counting CSRs --- .../riscv/hardware/ControlAndStatusRegisterFile.java | 1 + src/rars/venus/registers/ControlAndStatusWindow.java | 10 ++++++++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/rars/riscv/hardware/ControlAndStatusRegisterFile.java b/src/rars/riscv/hardware/ControlAndStatusRegisterFile.java index 375b47d4..fa3aaa20 100644 --- a/src/rars/riscv/hardware/ControlAndStatusRegisterFile.java +++ b/src/rars/riscv/hardware/ControlAndStatusRegisterFile.java @@ -51,6 +51,7 @@ public class ControlAndStatusRegisterFile { static { // TODO: consider making time, cycle and instret 64 bit registers which then are linked to by *h + // Remember to update the window tooltips when adding a CSR Register[] tmp = { new MaskedRegister("ustatus", 0x000, 0,~0x11), null, // fflags diff --git a/src/rars/venus/registers/ControlAndStatusWindow.java b/src/rars/venus/registers/ControlAndStatusWindow.java index d2cecd8c..0a33219d 100644 --- a/src/rars/venus/registers/ControlAndStatusWindow.java +++ b/src/rars/venus/registers/ControlAndStatusWindow.java @@ -12,7 +12,7 @@ public class ControlAndStatusWindow extends RegisterBlockWindow { private static final String[] regToolTips = { /*ustatus"*/ "Interrupt status information (set the lowest bit to enable exceptions)", /*fflags*/ "The accumulated floating point flags", - /*frm*/ "Rounding mode for floating point operatations (currently ignored)", + /*frm*/ "Rounding mode for floating point operatations", /*fcsr*/ "Both frm and fflags", /*uie*/ "Finer control for which interrupts are enabled", /*utvec*/ "The base address of the interrupt handler", @@ -20,7 +20,13 @@ public class ControlAndStatusWindow extends RegisterBlockWindow { /*uepc*/ "PC at the time the interrupt was triggered", /*ucause*/ "Cause of the interrupt (top bit is interrupt vs trap)", /*utval*/ "Value associated with the cause", - /*uip*/ "Shows if any interrupt is pending and what type" + /*uip*/ "Shows if any interrupt is pending and what type", + /*cycle*/ "Number of clock cycles executed", + /*time*/ "Time since some time in the past (Milliseconds since 1/1/1970 in RARS)", + /*instret*/"Instructions retired (same as cycle in RARS)", + /*cycleh*/ "High 32 bits of cycle", + /*timeh*/ "High 32 bits of time", + /*instreth*/ "High 32 bits of instret" }; public ControlAndStatusWindow() {