diff --git a/docs/deploy/arm_compute_lib.rst b/docs/deploy/arm_compute_lib.rst index 5dd00764bcbc..1ff034a2cd8d 100644 --- a/docs/deploy/arm_compute_lib.rst +++ b/docs/deploy/arm_compute_lib.rst @@ -234,10 +234,6 @@ Operator support +----------------------+-------------------------------------------------------------------------+ | maximum | fp32 | +----------------------+-------------------------------------------------------------------------+ -| add | fp32 | -+----------------------+-------------------------------------------------------------------------+ -| qnn.add | uint8 | -+----------------------+-------------------------------------------------------------------------+ .. note:: A composite operator is a series of operators that map to a single Arm Compute Library operator. You can view this diff --git a/python/tvm/relay/op/contrib/arm_compute_lib.py b/python/tvm/relay/op/contrib/arm_compute_lib.py index 8dfb3b7e0bf4..586d98d8e1c8 100644 --- a/python/tvm/relay/op/contrib/arm_compute_lib.py +++ b/python/tvm/relay/op/contrib/arm_compute_lib.py @@ -346,23 +346,3 @@ def maximum(attrs, args): type_a = args[0].checked_type type_b = args[0].checked_type return (type_a.dtype == "float32") and (type_b.dtype == "float32") - - -@tvm.ir.register_op_attr("add", "target.arm_compute_lib") -def add(attrs, args): - """Check if the external ACL codegen for add should be used.""" - for typ in [args[0].checked_type, args[1].checked_type]: - if typ.dtype != "float32": - return False - - return True - - -@tvm.ir.register_op_attr("qnn.add", "target.arm_compute_lib") -def qnn_add(attrs, args): - """Check if the external ACL codegen for add should be used.""" - for typ in [args[0].checked_type, args[1].checked_type]: - if typ.dtype != "uint8": - return False - - return True diff --git a/src/runtime/contrib/arm_compute_lib/acl_runtime.cc b/src/runtime/contrib/arm_compute_lib/acl_runtime.cc index e5f2c2d47281..2f8a20599ad5 100644 --- a/src/runtime/contrib/arm_compute_lib/acl_runtime.cc +++ b/src/runtime/contrib/arm_compute_lib/acl_runtime.cc @@ -143,8 +143,6 @@ class ACLRuntime : public JSONRuntimeBase { CreateReshapeLayer(&layer_, node); } else if ("maximum" == op_name) { CreateMaximumLayer(&layer_, node); - } else if ("add" == op_name || "qnn.add" == op_name) { - CreateAddLayer(&layer_, node); } else { LOG(FATAL) << "Unsupported op: " << op_name; } @@ -420,36 +418,6 @@ class ACLRuntime : public JSONRuntimeBase { function->configure(&layer->inputs[0], &layer->inputs[1], &layer->outputs[0]); layer->function = function; } - /*! - * \brief Creates an add/qnn.add layer - * - * \param layer The ACL layer to build. Containing inputs, outputs and the ACL function. - * \param node The JSON representation of the operator. - */ - void CreateAddLayer(CachedLayer* layer, const JSONGraphNode& node) { - auto op_name = node.GetOpName(); - if ("add" == op_name) { - layer->inputs.push_back(MakeACLTensorFromJSONEntry(node.GetInputs()[0])); - layer->inputs.push_back(MakeACLTensorFromJSONEntry(node.GetInputs()[1])); - layer->outputs.push_back(MakeACLTensorFromJSONNode(node)); - } else if ("qnn.add" == op_name) { - layer->inputs.push_back(MakeACLTensorFromJSONEntry(node.GetInputs()[0], &node.GetInputs()[2], - &node.GetInputs()[3])); - layer->inputs.push_back(MakeACLTensorFromJSONEntry(node.GetInputs()[1], &node.GetInputs()[4], - &node.GetInputs()[5])); - layer->outputs.push_back( - MakeACLTensorFromJSONNode(node, &node.GetInputs()[6], &node.GetInputs()[7])); - } else { - throw std::runtime_error("Unsupported form of add op: " + op_name); - } - - auto f = std::make_shared(); - - // SATURATE is used as add_QASYMM8_QASYMM8_QASYMM8 always saturates result - f->configure(&layer->inputs[0], &layer->inputs[1], &layer->outputs[0], - arm_compute::ConvertPolicy::SATURATE); - layer->function = f; - } /*! \brief Allow ACL functions to request auxiliary memory from TVM. */ ACLAllocator allocator_;