From 6344234277b2569b11a56b63812b62ae53e627de Mon Sep 17 00:00:00 2001
From: Marat Dukhan <maratek@google.com>
Date: Fri, 18 Sep 2020 13:35:18 -0700
Subject: [PATCH] Prefetch instructions

---
 proposals/simd/BinarySIMD.md |  2 ++
 proposals/simd/NewOpcodes.md |  5 +++++
 proposals/simd/SIMD.md       | 10 ++++++++++
 3 files changed, 17 insertions(+)

diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md
index 57971f165..116f753a8 100644
--- a/proposals/simd/BinarySIMD.md
+++ b/proposals/simd/BinarySIMD.md
@@ -249,3 +249,5 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `v128.store16_lane`         |     `TBD`| m:memarg, i:ImmLaneIdx8  |
 | `v128.store32_lane`         |     `TBD`| m:memarg, i:ImmLaneIdx4  |
 | `v128.store64_lane`         |     `TBD`| m:memarg, i:ImmLaneIdx2  |
+| `prefetch.t`                |     `TBD`| -                        |
+| `prefetch.nt`               |     `TBD`| -                        |
diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md
index 8241be0f8..b7c94550e 100644
--- a/proposals/simd/NewOpcodes.md
+++ b/proposals/simd/NewOpcodes.md
@@ -130,3 +130,8 @@
 | i32x4.trunc_sat_f32x4_u | 0xf9   |
 | f32x4.convert_i32x4_s   | 0xfa   |
 | f32x4.convert_i32x4_u   | 0xfb   |
+
+| Prefetch Op | opcode |
+| ------------| ------ |
+| prefetch.t  | 0xfc   |
+| prefetch.nt | 0xfd   |
diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md
index 24db53eb1..2979ea9ba 100644
--- a/proposals/simd/SIMD.md
+++ b/proposals/simd/SIMD.md
@@ -1105,3 +1105,13 @@ def S.widen_low_T_u(a):
 def S.widen_high_T_u(a):
     return S.widen_high_T(Zext, a)
 ```
+
+### Prefetch
+
+* `prefetch.t(memarg)`
+* `prefetch.nt(memarg)`
+
+Prefetch memory location into lowest-level cache. Prefetch with temporal hint
+(`prefetch.t`) should be used for data that will be used only once, and
+prefetch with non-temporal (`prefetch.nt`) hint for data that will be reused
+multiple times.