From df8e022cb23ea284bfb97b08697060b672ee5d38 Mon Sep 17 00:00:00 2001 From: alin724 Date: Tue, 20 Aug 2024 10:37:51 +0300 Subject: [PATCH] docs: Add AD-GMSL2ETH-SL-related project page Signed-off-by: alin724 --- .../ad_gmsl2eth_sl/ad_gmsl2eth_hdl.svg | 445 ++++++++++++++++++ docs/projects/ad_gmsl2eth_sl/index.rst | 309 ++++++++++++ docs/projects/index.rst | 1 + 3 files changed, 755 insertions(+) create mode 100644 docs/projects/ad_gmsl2eth_sl/ad_gmsl2eth_hdl.svg create mode 100644 docs/projects/ad_gmsl2eth_sl/index.rst diff --git a/docs/projects/ad_gmsl2eth_sl/ad_gmsl2eth_hdl.svg b/docs/projects/ad_gmsl2eth_sl/ad_gmsl2eth_hdl.svg new file mode 100644 index 0000000000..6a3e6bef9e --- /dev/null +++ b/docs/projects/ad_gmsl2eth_sl/ad_gmsl2eth_hdl.svg @@ -0,0 +1,445 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + image/svg+xml + + + + + + + + MAX96724 + + + + SIOA + + + + + + + SIOB + SIOC + SIOD + + + + + + + + + VC0 + VC1 + VC2 + VC3 + + + + + + + + + + + + CSI-2 1 + CSI-2 2 + + + + + + + + + + + I2C + I2C + + + + + AMD-Xilinx'sMIPI CSI-2Rx Subystem + ADI'sPWM_GEN + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AMD-Xilinx'sAXI IIC + + I2C + MIPI D-PHY 4 Lanes + + + + AMD-Xilinx's VideoFramebufferWrite + + + + + + + + + AMD-Xilinx's VideoFramebufferWrite + AMD-Xilinx's VideoFramebufferWrite + AMD-Xilinx's VideoFramebufferWrite + + + + + AMD-Xilinx'sAXISSwitch + + + AXIS + AXIS + AXIS + AXIS + AXIS + AXI4 + + + + AMD-Xilinx'sMIPI CSI-2Rx Subystem + + MIPI D-PHY 4 Lanes + MIPI D-PHY 4 Lanes + + + AMD-Xilinx's VideoFramebufferWrite + + + + + + + + + AMD-Xilinx's VideoFramebufferWrite + AMD-Xilinx's VideoFramebufferWrite + AMD-Xilinx's VideoFramebufferWrite + + + + CorundumNIC + + + + AXIS + AXIS + AXIS + AXIS + AXI4 + AXI4 + AXI4 + AXI4 + + + + AMD-Xilinx'sAXISSwitch + + AXIS + + + + + + + + + + + + + + + + + + UART + DDRx + SPI + I2C + Interrupts + ZynqMPSoC + Timer + + + + + + SFP+ Cage (10G) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + K26 Industrial SOM + + + + + CSI-2 INTERFACE + + + + + MAX96724 + + + + SIOA + + + + + + + SIOB + SIOC + SIOD + + + + + + + + + VC0 + VC1 + VC2 + VC3 + + + + + + + + + + + + CSI-2 1 + CSI-2 2 + + + + + + + + + + + I2C + I2C + + + + + CSI-2 INTERFACE + + + + + + + + + AXI4 + AXI4 + AXI4 + + + + + + + + + + + + + + + + + + + + + + + + + + MFP0-3 + MFP0-3 + + + + AD9545 + + + + + SERIAL PERIPHERAL INTERFACE + + SPI0 + diff --git a/docs/projects/ad_gmsl2eth_sl/index.rst b/docs/projects/ad_gmsl2eth_sl/index.rst new file mode 100644 index 0000000000..07b0300758 --- /dev/null +++ b/docs/projects/ad_gmsl2eth_sl/index.rst @@ -0,0 +1,309 @@ +.. _ad_gmsl2eth_sl: + +AD-GMSL2ETH-SL HDL project +=============================================================================== + +Overview +------------------------------------------------------------------------------- + +The :adi:`AD-GMSL2ETH-SL` is an edge compute platform enabling low-latency +data transfer from eight Gigabit Multimedia Serial Link™ (GMSL) interfaces +on to a 10 Gb Ethernet link. The target applications include autonomous robots +and vehicles where machine vision and real-time sensor fusion is critical. + +The system includes two :adi:`MAX96724` Quad Tunneling GMSL2/1 to CSI-2 Deserializers, +enabling connectivity to eight GMSL cameras. The video data from the cameras +is transferred from the :adi:`MAX96724` deserializers via MIPI CSI2 interfaces to +an AMD K26 System on Module which implements the logic to aggregate the video +data from all the GMSL cameras into a 10 Gb Ethernet link, so that it can be +sent to a central processing unit. + +The IEEE 1588 Precision Time Protocol (PTP) with hardware timestamping is supported, +enabling accurate synchronization with host systems and other edge devices. +The :adi:`AD9545` Quad Input, 10-Output, Dual DPLL/IEEE 1588, 1 pps Synchronizer and +Jitter Cleaner is used to generate the required clocks for the 10 Gb Ethernet interface +and the PTP logic. + +Supported devices +------------------------------------------------------------------------------- + +- :adi:`MAX96724` +- :adi:`MAX17573` +- :adi:`ADM7154` +- :adi:`MAX25206` +- :adi:`LTC3303` +- :adi:`LTC4355` +- :adi:`AD9545` + +Supported carriers +------------------------------------------------------------------------------- + +- :xilinx:`K26 SOM ` + +Block diagram +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The data path designed in this reference design is as follows: + +- the virtual channel inputs of one CSI-2 output port of the deserializer are + captured using Xilinx's `MIPI CSI-2 Rx Subsystem IP `_ +- data is written into memory by using a Xilinx video-related DMA implementation + `Video Framebuffer Write `_ +- the control of the camera modules is realized through I2C using Xilinx's + `AXI IIC logic `_ +- data is transmitted to a 10G-capable node by using Corundum NIC implementation + +The data path and elements of the video network, 10G NIC, are depicted in the below diagram: + +.. image:: ad_gmsl2eth_hdl.svg + :width: 1200 + :align: center + :alt: AD-GMSL2ETH-SL Evaluation Kit HDL-related block design + +CPU/Memory interconnects addresses +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The addresses are dependent on the architecture of the FPGA, having an offset +added to the base address from HDL (see more at :ref:`architecture`). + +======================== =========== +Instance Address +======================== =========== +mipi_csi2_rx_subsyst_0 0x84A0_0000 +mipi_csi2_rx_subsyst_1 0x84A2_0000 +axi_iic_mipi 0x84A4_0000 +v_frmbuf_wr_0 0x84A6_0000 +v_frmbuf_wr_1 0x84A8_0000 +v_frmbuf_wr_2 0x84AA_0000 +v_frmbuf_wr_3 0x84AC_0000 +v_frmbuf_wr_4 0x84AE_0000 +v_frmbuf_wr_5 0x84B0_0000 +v_frmbuf_wr_6 0x84B2_0000 +v_frmbuf_wr_7 0x84B4_0000 +axi_pwm_gen_0 0x84B6_0000 +corundum/s_axil_ctrl 0xA000_0000 +corundum/s_axil_app_ctrl 0xA800_0000 +======================== =========== + +I2C connections +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. list-table:: + :widths: 20 20 20 20 20 + :header-rows: 1 + + * - I2C type + - I2C manager instance + - Alias + - Address + - I2C subordinate + * - PL + - iic_main + - axi_iic_mipi + - 0x84A4_0000 + - --- + +SPI connections +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. list-table:: + :widths: 25 25 25 25 + :header-rows: 1 + + * - SPI type + - SPI manager instance + - SPI subordinate + - CS + * - PS + - SPI0 + - ad9545_spi + - 0 + +GPIOs +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The Software GPIO number is calculated as follows: + +- ZynqMP: if PS8 EMIOs are used, then offset is 78 + +.. list-table:: + :widths: 25 25 25 25 + :header-rows: 2 + + * - GPIO signal + - Direction + - HDL GPIO EMIO + - Software GPIO + * - + - (from FPGA view) + - + - ZynqMP + * - csirxss_rstn + - OUT + - 0 + - 78 + * - ap_rstn_frmbuf_0 + - OUT + - 2 + - 80 + * - ap_rstn_frmbuf_1 + - OUT + - 3 + - 81 + * - ap_rstn_frmbuf_2 + - OUT + - 4 + - 82 + * - ap_rstn_frmbuf_3 + - OUT + - 5 + - 83 + * - ap_rstn_frmbuf_4 + - OUT + - 6 + - 84 + * - ap_rstn_frmbuf_5 + - OUT + - 7 + - 85 + * - ap_rstn_frmbuf_6 + - OUT + - 8 + - 86 + * - ap_rstn_frmbuf_7 + - OUT + - 9 + - 87 + * - iic_rstn + - OUT + - 10 + - 88 + * - fan_pwm + - INOUT + - 22 + - 100 + * - fan_tach + - INOUT + - 23 + - 101 + +Interrupts +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Below are the Programmable Logic interrupts used in this project. + +======================= === ============ ============= +Instance name HDL Linux ZynqMP Actual ZynqMP +======================= === ============ ============= +mipi0_csirxss_csi_irq 15 111 143 +mipi1_csirxss_csi_irq 14 110 142 +iic2intc_irpt 13 109 141 +v_frmbuf_wr0/interrupt 12 108 140 +v_frmbuf_wr1/interrupt 11 107 139 +v_frmbuf_wr2/interrupt 10 106 138 +v_frmbuf_wr3/interrupt 9 105 137 +v_frmbuf_wr4/interrupt 8 104 136 +v_frmbuf_wr5/interrupt 7 96 128 +v_frmbuf_wr6/interrupt 6 95 127 +v_frmbuf_wr7/interrupt 5 94 126 +combined_corundum_irq 4 93 125 +======================= === ============ ============= + +Building the HDL project +------------------------------------------------------------------------------- + +The design is built upon ADI's generic HDL reference design framework. +ADI distributes the bit/elf files of these projects as part of the +:dokuwiki:`ADI Kuiper Linux `. +If you want to build the sources, ADI makes them available on the +:git-hdl:`HDL repository `. To get the source you must +`clone `__ +the HDL repository, and then build the project as follows:. + +This project uses `Corundum NIC `_ +and it needs to be cloned alongside this repository. + +.. code:: + + hdl/../> git clone https://github.com/corundum/corundum.git + hdl/../corundum/> git checkout ed4a26e2cbc0a429c45d5cd5ddf1177f86838914 + hdl/library/corundum> make & + +.. admonition:: Publications + + The following papers pertain to the Corundum source code: + + - J- A. Forencich, A. C. Snoeren, G. Porter, G. Papen, Corundum: An Open-Source 100-Gbps NIC, in FCCM'20. + (`FCCM Paper`_, `FCCM Presentation`_) + - J- A. Forencich, System-Level Considerations for Optical Switching in Data Center Networks. (`Thesis`_) + +.. _FCCM Paper: https://www.cse.ucsd.edu/~snoeren/papers/corundum-fccm20.pdf +.. _FCCM Presentation: https://www.fccm.org/past/2020/forums/topic/corundum-an-open-source-100-gbps-nic/ +.. _Thesis: https://escholarship.org/uc/item/3mc9070t + +**Linux/Cygwin/WSL** + +.. code-block:: + :linenos: + + user@analog:~$ git clone https://github.com/corundum/corundum.git + user@analog:~$ git checkout ed4a26e2cbc0a429c45d5cd5ddf1177f86838914 + user@analog:~$ cd hdl/projects/ad_gmsl2eth_sl/k26 + user@analog:~/hdl/projects/ad_gmsl2eth_sl/k26$ make + +A more comprehensive build guide can be found in the :ref:`build_hdl` user guide. + +Resources +------------------------------------------------------------------------------- + +Hardware related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- Product datasheets: + + - :adi:`AD-GMSL2ETH-SL` + - :adi:`MAX96724 ` + - :adi:`MAX17573 ` + - :adi:`ADM7154 ` + - :adi:`MAX25206 ` + - :adi:`LTC3303 ` + - :adi:`LTC4355 ` + - :adi:`AD9545 ` + +HDL related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- :git-hdl:`AD-GMSL2ETH-SL HDL project source code ` + +.. list-table:: + :widths: 30 35 35 + :header-rows: 1 + + * - IP name + - Source code link + - Documentation link + * - AXI_CLKGEN + - :git-hdl:`library/axi_clkgen ` + - :ref:`here ` + * - AXI_PWM_GEN + - :git-hdl:`library/axi_pwm_gen ` + - :ref:`here ` + * - AXI_SYSID + - :git-hdl:`library/axi_sysid ` + - :ref:`here ` + * - CORUNDUM + - :git-hdl:`library/corundum ` + - :ref:`here ` + * - SYSID_ROM + - :git-hdl:`library/sysid_rom ` + - :ref:`here ` + +Software related +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +- `GMSL-related repository `_ +- :git-linux:`GMSL drivers/dts ` + +.. include:: ../common/more_information.rst + +.. include:: ../common/support.rst diff --git a/docs/projects/index.rst b/docs/projects/index.rst index 6d43c0cb04..2f580f616a 100644 --- a/docs/projects/index.rst +++ b/docs/projects/index.rst @@ -18,6 +18,7 @@ Contents .. toctree:: :maxdepth: 1 + AD-GMSL2ETH-SL AD411x_AD717x AD4134-FMC AD4170-ASDZ