diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.cpp b/hardware/arduino/sam/cores/arduino/UARTClass.cpp
index 16188b128a4..30d79cd1f39 100644
--- a/hardware/arduino/sam/cores/arduino/UARTClass.cpp
+++ b/hardware/arduino/sam/cores/arduino/UARTClass.cpp
@@ -34,7 +34,12 @@ UARTClass::UARTClass( Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* p
 
 // Public Methods //////////////////////////////////////////////////////////////
 
-void UARTClass::begin( const uint32_t dwBaudRate )
+void UARTClass::begin(const uint32_t dwBaudRate)
+{
+	begin( dwBaudRate, SERIAL_8N1 );
+}
+
+void UARTClass::begin(const uint32_t dwBaudRate, const uint32_t config)
 {
   // Configure PMC
   pmc_enable_periph_clk( _dwId ) ;
@@ -45,8 +50,8 @@ void UARTClass::begin( const uint32_t dwBaudRate )
   // Reset and disable receiver and transmitter
   _pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS ;
 
-  // Configure mode
-  _pUart->UART_MR = UART_MR_PAR_NO | UART_MR_CHMODE_NORMAL ;
+  // Configure mode - AND user config with mask to prevent bad configuration
+  _pUart->UART_MR = (config & 0x00000E00) | UART_MR_CHMODE_NORMAL ;
 
   // Configure baudrate (asynchronous, no oversampling)
   _pUart->UART_BRGR = (SystemCoreClock / dwBaudRate) >> 4 ;
diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.h b/hardware/arduino/sam/cores/arduino/UARTClass.h
index 5836f2e62bd..1885f591dea 100644
--- a/hardware/arduino/sam/cores/arduino/UARTClass.h
+++ b/hardware/arduino/sam/cores/arduino/UARTClass.h
@@ -25,6 +25,13 @@
 // Includes Atmel CMSIS
 #include <chip.h>
 
+// Define config for Serial.begin(baud, config);
+#define SERIAL_8N1 UART_MR_PAR_NO
+#define SERIAL_8E1 UART_MR_PAR_EVEN
+#define SERIAL_8O1 UART_MR_PAR_ODD
+#define SERIAL_8M1 UART_MR_PAR_MARK
+#define SERIAL_8S1 UART_MR_PAR_SPACE
+
 class UARTClass : public HardwareSerial
 {
   protected:
@@ -38,7 +45,8 @@ class UARTClass : public HardwareSerial
   public:
     UARTClass( Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer ) ;
 
-    void begin( const uint32_t dwBaudRate ) ;
+	void begin( const uint32_t dwBaudRate );
+	void begin( const uint32_t dwBaudRate, const uint32_t config );
     void end( void ) ;
     int available( void ) ;
     int peek( void ) ;
diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.cpp b/hardware/arduino/sam/cores/arduino/USARTClass.cpp
index d950c50c9af..e5abea28235 100644
--- a/hardware/arduino/sam/cores/arduino/USARTClass.cpp
+++ b/hardware/arduino/sam/cores/arduino/USARTClass.cpp
@@ -50,9 +50,8 @@ void USARTClass::begin( const uint32_t dwBaudRate, const uint32_t config )
   // Reset and disable receiver and transmitter
   _pUsart->US_CR = US_CR_RSTRX | US_CR_RSTTX | US_CR_RXDIS | US_CR_TXDIS ;
 
-  // Configure mode
-  _pUsart->US_MR = config;
-
+  // Configure mode - AND user config with mask to prevent bad configuration
+  _pUsart->US_MR = US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL | (config & 0x00023EC0);
 
   // Configure baudrate, asynchronous no oversampling
   _pUsart->US_BRGR = (SystemCoreClock / dwBaudRate) / 16 ;
diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.h b/hardware/arduino/sam/cores/arduino/USARTClass.h
index d5d7ff963d5..c21d7d3cb38 100644
--- a/hardware/arduino/sam/cores/arduino/USARTClass.h
+++ b/hardware/arduino/sam/cores/arduino/USARTClass.h
@@ -25,36 +25,108 @@
 // Includes Atmel CMSIS
 #include <chip.h>
 
-// Define config for Serial.begin(baud, config);
-#define SERIAL_5N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_6N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_7N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_8N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-
-#define SERIAL_5N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_6N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_7N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_8N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-
-#define SERIAL_5E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_6E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_7E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_8E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-
-#define SERIAL_5E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_6E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_7E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_8E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-
-#define SERIAL_5O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_6O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_7O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_8O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
-
-#define SERIAL_5O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_6O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_7O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
-#define SERIAL_8O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
+// Define config for Serialx.begin(baud, config);
+// Note that these modes are only applicable for USART module
+#define SERIAL_5N1 ( US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT )
+#define SERIAL_6N1 ( US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT )
+#define SERIAL_7N1 ( US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT )
+#define SERIAL_8N1 ( US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT )
+
+#define SERIAL_5N15 ( US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_6N15 ( US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_7N15 ( US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_8N15 ( US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_5_BIT )
+
+#define SERIAL_5N2 ( US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT )
+#define SERIAL_6N2 ( US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT )
+#define SERIAL_7N2 ( US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT )
+#define SERIAL_8N2 ( US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT )
+
+#define SERIAL_5E1 ( US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT )
+#define SERIAL_6E1 ( US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT )
+#define SERIAL_7E1 ( US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT )
+#define SERIAL_8E1 ( US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT )
+
+#define SERIAL_5E15 ( US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_6E15 ( US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_7E15 ( US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_8E15 ( US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_5_BIT )
+
+#define SERIAL_5E2 ( US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT )
+#define SERIAL_6E2 ( US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT )
+#define SERIAL_7E2 ( US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT )
+#define SERIAL_8E2 ( US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT )
+
+#define SERIAL_5O1 ( US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT )
+#define SERIAL_6O1 ( US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT )
+#define SERIAL_7O1 ( US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT )
+#define SERIAL_8O1 ( US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT )
+
+#define SERIAL_5O15 ( US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_6O15 ( US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_7O15 ( US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_8O15 ( US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_5_BIT )
+
+#define SERIAL_5O2 ( US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT )
+#define SERIAL_6O2 ( US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT )
+#define SERIAL_7O2 ( US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT )
+#define SERIAL_8O2 ( US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT )
+
+#define SERIAL_5M1 ( US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT )
+#define SERIAL_6M1 ( US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT )
+#define SERIAL_7M1 ( US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT )
+#define SERIAL_8M1 ( US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT )
+
+#define SERIAL_5M15 ( US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_6M15 ( US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_7M15 ( US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_8M15 ( US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_5_BIT )
+
+#define SERIAL_5M2 ( US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT )
+#define SERIAL_6M2 ( US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT )
+#define SERIAL_7M2 ( US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT )
+#define SERIAL_8M2 ( US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT )
+
+#define SERIAL_5S1 ( US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT )
+#define SERIAL_6S1 ( US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT )
+#define SERIAL_7S1 ( US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT )
+#define SERIAL_8S1 ( US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT )
+
+#define SERIAL_5S15 ( US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_6S15 ( US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_7S15 ( US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_8S15 ( US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_5_BIT )
+
+#define SERIAL_5S2 ( US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT )
+#define SERIAL_6S2 ( US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT )
+#define SERIAL_7S2 ( US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT )
+#define SERIAL_8S2 ( US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT )
+
+// Defines for 9-bit modes ready for future implementation
+/*
+#ifdef SERIAL_9BIT_SUPPORT 
+#pragma message("NOTE: 9-bit serial mode enabled")
+#define SERIAL_9N1  ( US_MR_MODE9 | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT )
+#define SERIAL_9N15 ( US_MR_MODE9 | US_MR_PAR_NO | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_9N2  ( US_MR_MODE9 | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT )
+
+#define SERIAL_9E1  ( US_MR_MODE9 | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT )
+#define SERIAL_9E15 ( US_MR_MODE9 | US_MR_PAR_EVEN | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_9E2  ( US_MR_MODE9 | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT )
+
+#define SERIAL_9O1  ( US_MR_MODE9 | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT )
+#define SERIAL_9O15 ( US_MR_MODE9 | US_MR_PAR_ODD | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_9O2  ( US_MR_MODE9 | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT )
+
+#define SERIAL_9M1  ( US_MR_MODE9 | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT )
+#define SERIAL_9M15 ( US_MR_MODE9 | US_MR_PAR_MARK | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_9M2  ( US_MR_MODE9 | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT )
+
+#define SERIAL_9S1  ( US_MR_MODE9 | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT )
+#define SERIAL_9S15 ( US_MR_MODE9 | US_MR_PAR_SPACE | US_MR_NBSTOP_1_5_BIT )
+#define SERIAL_9S2  ( US_MR_MODE9 | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT )
+#endif
+*/
 
 class USARTClass : public HardwareSerial
 {
@@ -70,7 +142,7 @@ class USARTClass : public HardwareSerial
     USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer ) ;
 
     void begin( const uint32_t dwBaudRate ) ;
-	void begin( const uint32_t dwBaudRate , const uint32_t config ) ;
+    void begin( const uint32_t dwBaudRate , const uint32_t config ) ;
     void end( void ) ;
     int available( void ) ;
     int peek( void ) ;