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sistemi-embedded-task2

This task is part of a project whose aim is the realization of a bistatic passive radar. In particular this task has the goal to design & develop two IPcores.

IPcore 1

This IPcore is a signal generator with configurable frequency and phase. This IPcore uses Xilinx DDS-compiler for the part concerning the signal generation while the control logic is realized with a finite state machine.

IPcore 2

This IPcore is a totally-custom component designed to compute the maximum magnitude from a set of samples presented as complex numbers. The numbers are first elaborated in order to obtain their magnitude then every magnitude is compared with the maximum in order update it if necessary.

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IP cores realization for a bistatic radar project.

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