From ed9bf87ab152509fcd5c54bdc40ebed9a2b4ede7 Mon Sep 17 00:00:00 2001 From: Xeonacid Date: Sat, 12 Feb 2022 21:26:52 +0800 Subject: [PATCH 1/2] [impl] add riscv cpu support --- src/c4/cpu.hpp | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/c4/cpu.hpp b/src/c4/cpu.hpp index 32d7ba04..d3016f9c 100644 --- a/src/c4/cpu.hpp +++ b/src/c4/cpu.hpp @@ -103,6 +103,16 @@ # define C4_WORDSIZE 8 # define C4_BYTE_ORDER _C4EB +#elif defined(__riscv) + #if __riscv_xlen == 64 + #define C4_CPU_RISCV64 + #define C4_WORDSIZE 8 + #else + #define C4_CPU_RISCV32 + #define C4_WORDSIZE 4 + #endif + #define C4_BYTE_ORDER _C4EL + #elif defined(__EMSCRIPTEN__) # define C4_BYTE_ORDER _C4EL # define C4_WORDSIZE 4 From 3f24366d95d65e3fcd751390f15f7361e052e97a Mon Sep 17 00:00:00 2001 From: Xeonacid Date: Sat, 12 Feb 2022 22:39:27 +0800 Subject: [PATCH 2/2] [fix] update cmake --- cmake | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmake b/cmake index 9416f297..ee21f7ac 160000 --- a/cmake +++ b/cmake @@ -1 +1 @@ -Subproject commit 9416f297430bc358eea48f8cf65aa0d602029629 +Subproject commit ee21f7ac0c42cfb1bdbd7ac0df75a83dea967864