From 52f8f896046916c827db02d36eddf1c57218696e Mon Sep 17 00:00:00 2001 From: Johnnie Birch Date: Mon, 14 Jun 2021 10:31:19 -0700 Subject: [PATCH] Update comment on fcvt_low_from_sint instruction --- cranelift/codegen/meta/src/shared/instructions.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cranelift/codegen/meta/src/shared/instructions.rs b/cranelift/codegen/meta/src/shared/instructions.rs index a5816c44b88b..54dcd696376d 100644 --- a/cranelift/codegen/meta/src/shared/instructions.rs +++ b/cranelift/codegen/meta/src/shared/instructions.rs @@ -4395,10 +4395,10 @@ pub(crate) fn define( Inst::new( "fcvt_low_from_sint", r#" - Converts packed signed doubleword integers to packed double precision floating point. + Converts packed signed 32-bit integers to packed double precision floating point. Considering only the low half of the register, each lane in `x` is interpreted as a - signed doubleword integer that is then converted to a double precision float. This + signed 32-bit integer that is then converted to a double precision float. This instruction differs from fcvt_from_sint in that it converts half the number of lanes which are converted to occupy twice the number of bits. No rounding should be needed for the resulting float.