Unconditionally enable sse3, ssse3, and sse4.1 when fuzzing #3814
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This commit unconditionally enables some x86_64 instructions when fuzzing because the cranelift backend is known to not work if these features are disabled. From discussion on the wasm simd proposal the assumed general baseline for running simd code is SSE4.1 anyway. At this time I haven't added any sort of checks in Wasmtime itself. Wasmtime by default uses the native architecture and when explicitly enabling features this still needs to be explicitly specified. Closes bytecodealliance#3809
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Co-authored-by: Andrew Brown <andrew.brown@intel.com>
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…alliance#3814) * Unconditionally enable sse3, ssse3, and sse4.1 when fuzzing This commit unconditionally enables some x86_64 instructions when fuzzing because the cranelift backend is known to not work if these features are disabled. From discussion on the wasm simd proposal the assumed general baseline for running simd code is SSE4.1 anyway. At this time I haven't added any sort of checks in Wasmtime itself. Wasmtime by default uses the native architecture and when explicitly enabling features this still needs to be explicitly specified. Closes bytecodealliance#3809 * Update crates/fuzzing/src/generators.rs Co-authored-by: Andrew Brown <andrew.brown@intel.com> Co-authored-by: Andrew Brown <andrew.brown@intel.com>
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This commit unconditionally enables some x86_64 instructions when
fuzzing because the cranelift backend is known to not work if these
features are disabled. From discussion on the wasm simd proposal the
assumed general baseline for running simd code is SSE4.1 anyway.
At this time I haven't added any sort of checks in Wasmtime itself.
Wasmtime by default uses the native architecture and when explicitly
enabling features this still needs to be explicitly specified.
Closes #3809